auich.c revision 1.135
1 /* $NetBSD: auich.c,v 1.135 2010/01/13 23:24:29 jakllsch Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2004, 2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Copyright (c) 2000 Michael Shalayeff 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. The name of the author may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 51 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 52 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 53 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 55 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 56 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 57 * THE POSSIBILITY OF SUCH DAMAGE. 58 * 59 * from OpenBSD: ich.c,v 1.3 2000/08/11 06:17:18 mickey Exp 60 */ 61 62 /* 63 * Copyright (c) 2000 Katsurajima Naoto <raven (at) katsurajima.seya.yokohama.jp> 64 * Copyright (c) 2001 Cameron Grant <cg (at) freebsd.org> 65 * All rights reserved. 66 * 67 * Redistribution and use in source and binary forms, with or without 68 * modification, are permitted provided that the following conditions 69 * are met: 70 * 1. Redistributions of source code must retain the above copyright 71 * notice, this list of conditions and the following disclaimer. 72 * 2. Redistributions in binary form must reproduce the above copyright 73 * notice, this list of conditions and the following disclaimer in the 74 * documentation and/or other materials provided with the distribution. 75 * 76 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 77 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 78 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 79 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 80 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 81 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 82 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 83 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 84 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 85 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF 86 * SUCH DAMAGE. 87 * 88 * auich_calibrate() was from FreeBSD: ich.c,v 1.22 2002/06/27 22:36:01 scottl Exp 89 */ 90 91 92 /* #define AUICH_DEBUG */ 93 /* 94 * AC'97 audio found on Intel 810/820/440MX chipsets. 95 * http://developer.intel.com/design/chipsets/datashts/290655.htm 96 * http://developer.intel.com/design/chipsets/manuals/298028.htm 97 * ICH3:http://www.intel.com/design/chipsets/datashts/290716.htm 98 * ICH4:http://www.intel.com/design/chipsets/datashts/290744.htm 99 * ICH5:http://www.intel.com/design/chipsets/datashts/252516.htm 100 * AMD8111: 101 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/24674.pdf 102 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25720.pdf 103 * 104 * TODO: 105 * - Add support for the dedicated microphone input. 106 * 107 * NOTE: 108 * - The 440MX B-stepping at running 100MHz has a hardware erratum. 109 * It causes PCI master abort and hangups until cold reboot. 110 * http://www.intel.com/design/chipsets/specupdt/245051.htm 111 */ 112 113 #include <sys/cdefs.h> 114 __KERNEL_RCSID(0, "$NetBSD: auich.c,v 1.135 2010/01/13 23:24:29 jakllsch Exp $"); 115 116 #include <sys/param.h> 117 #include <sys/systm.h> 118 #include <sys/kernel.h> 119 #include <sys/malloc.h> 120 #include <sys/device.h> 121 #include <sys/fcntl.h> 122 #include <sys/proc.h> 123 #include <sys/sysctl.h> 124 125 #include <uvm/uvm_extern.h> /* for PAGE_SIZE */ 126 127 #include <dev/pci/pcidevs.h> 128 #include <dev/pci/pcivar.h> 129 #include <dev/pci/auichreg.h> 130 131 #include <sys/audioio.h> 132 #include <dev/audio_if.h> 133 #include <dev/mulaw.h> 134 #include <dev/auconv.h> 135 136 #include <sys/bus.h> 137 138 #include <dev/ic/ac97reg.h> 139 #include <dev/ic/ac97var.h> 140 141 struct auich_dma { 142 bus_dmamap_t map; 143 void *addr; 144 bus_dma_segment_t segs[1]; 145 int nsegs; 146 size_t size; 147 struct auich_dma *next; 148 }; 149 150 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 151 #define KERNADDR(p) ((void *)((p)->addr)) 152 153 struct auich_cdata { 154 struct auich_dmalist ic_dmalist_pcmo[ICH_DMALIST_MAX]; 155 struct auich_dmalist ic_dmalist_pcmi[ICH_DMALIST_MAX]; 156 struct auich_dmalist ic_dmalist_mici[ICH_DMALIST_MAX]; 157 }; 158 159 #define ICH_CDOFF(x) offsetof(struct auich_cdata, x) 160 #define ICH_PCMO_OFF(x) ICH_CDOFF(ic_dmalist_pcmo[(x)]) 161 #define ICH_PCMI_OFF(x) ICH_CDOFF(ic_dmalist_pcmi[(x)]) 162 #define ICH_MICI_OFF(x) ICH_CDOFF(ic_dmalist_mici[(x)]) 163 164 struct auich_softc { 165 device_t sc_dev; 166 void *sc_ih; 167 168 device_t sc_audiodev; 169 audio_device_t sc_audev; 170 171 pci_chipset_tag_t sc_pc; 172 pcitag_t sc_pt; 173 bus_space_tag_t iot; 174 bus_space_handle_t mix_ioh; 175 bus_size_t mix_size; 176 bus_space_handle_t aud_ioh; 177 bus_size_t aud_size; 178 bus_dma_tag_t dmat; 179 pci_intr_handle_t intrh; 180 181 struct ac97_codec_if *codec_if; 182 struct ac97_host_if host_if; 183 int sc_codecnum; 184 int sc_codectype; 185 enum ac97_host_flags sc_codecflags; 186 bool sc_spdif; 187 188 /* multi-channel control bits */ 189 int sc_pcm246_mask; 190 int sc_pcm2; 191 int sc_pcm4; 192 int sc_pcm6; 193 194 /* DMA scatter-gather lists. */ 195 bus_dmamap_t sc_cddmamap; 196 #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr 197 198 struct auich_cdata *sc_cdata; 199 200 struct auich_ring { 201 int qptr; 202 struct auich_dmalist *dmalist; 203 204 uint32_t start, p, end; 205 int blksize; 206 207 void (*intr)(void *); 208 void *arg; 209 } pcmo, pcmi, mici; 210 211 struct auich_dma *sc_dmas; 212 213 /* SiS 7012 hack */ 214 int sc_sample_shift; 215 int sc_sts_reg; 216 /* 440MX workaround */ 217 int sc_dmamap_flags; 218 /* flags */ 219 int sc_iose :1, 220 :31; 221 222 /* sysctl */ 223 struct sysctllog *sc_log; 224 uint32_t sc_ac97_clock; 225 int sc_ac97_clock_mib; 226 227 int sc_modem_offset; 228 229 #define AUICH_AUDIO_NFORMATS 3 230 #define AUICH_MODEM_NFORMATS 1 231 struct audio_format sc_audio_formats[AUICH_AUDIO_NFORMATS]; 232 struct audio_format sc_modem_formats[AUICH_MODEM_NFORMATS]; 233 struct audio_encoding_set *sc_encodings; 234 struct audio_encoding_set *sc_spdif_encodings; 235 }; 236 237 /* Debug */ 238 #ifdef AUICH_DEBUG 239 #define DPRINTF(l,x) do { if (auich_debug & (l)) printf x; } while(0) 240 int auich_debug = 0xfffe; 241 #define ICH_DEBUG_CODECIO 0x0001 242 #define ICH_DEBUG_DMA 0x0002 243 #define ICH_DEBUG_INTR 0x0004 244 #else 245 #define DPRINTF(x,y) /* nothing */ 246 #endif 247 248 static int auich_match(device_t, cfdata_t, void *); 249 static void auich_attach(device_t, device_t, void *); 250 static int auich_detach(device_t, int); 251 static void auich_childdet(device_t, device_t); 252 static int auich_intr(void *); 253 254 CFATTACH_DECL2_NEW(auich, sizeof(struct auich_softc), 255 auich_match, auich_attach, auich_detach, NULL, NULL, auich_childdet); 256 257 static int auich_open(void *, int); 258 static void auich_close(void *); 259 static int auich_query_encoding(void *, struct audio_encoding *); 260 static int auich_set_params(void *, int, int, audio_params_t *, 261 audio_params_t *, stream_filter_list_t *, 262 stream_filter_list_t *); 263 static int auich_round_blocksize(void *, int, int, const audio_params_t *); 264 static void auich_halt_pipe(struct auich_softc *, int); 265 static int auich_halt_output(void *); 266 static int auich_halt_input(void *); 267 static int auich_getdev(void *, struct audio_device *); 268 static int auich_set_port(void *, mixer_ctrl_t *); 269 static int auich_get_port(void *, mixer_ctrl_t *); 270 static int auich_query_devinfo(void *, mixer_devinfo_t *); 271 static void *auich_allocm(void *, int, size_t, struct malloc_type *, int); 272 static void auich_freem(void *, void *, struct malloc_type *); 273 static size_t auich_round_buffersize(void *, int, size_t); 274 static paddr_t auich_mappage(void *, void *, off_t, int); 275 static int auich_get_props(void *); 276 static void auich_trigger_pipe(struct auich_softc *, int, struct auich_ring *); 277 static void auich_intr_pipe(struct auich_softc *, int, struct auich_ring *); 278 static int auich_trigger_output(void *, void *, void *, int, 279 void (*)(void *), void *, const audio_params_t *); 280 static int auich_trigger_input(void *, void *, void *, int, 281 void (*)(void *), void *, const audio_params_t *); 282 static int auich_powerstate(void *, int); 283 284 static int auich_alloc_cdata(struct auich_softc *); 285 286 static int auich_allocmem(struct auich_softc *, size_t, size_t, 287 struct auich_dma *); 288 static int auich_freemem(struct auich_softc *, struct auich_dma *); 289 290 static bool auich_resume(device_t, pmf_qual_t); 291 static int auich_set_rate(struct auich_softc *, int, u_long); 292 static int auich_sysctl_verify(SYSCTLFN_ARGS); 293 static void auich_finish_attach(device_t); 294 static void auich_calibrate(struct auich_softc *); 295 static void auich_clear_cas(struct auich_softc *); 296 297 static int auich_attach_codec(void *, struct ac97_codec_if *); 298 static int auich_read_codec(void *, uint8_t, uint16_t *); 299 static int auich_write_codec(void *, uint8_t, uint16_t); 300 static int auich_reset_codec(void *); 301 static enum ac97_host_flags auich_flags_codec(void *); 302 static void auich_spdif_event(void *, bool); 303 304 static const struct audio_hw_if auich_hw_if = { 305 auich_open, 306 auich_close, 307 NULL, /* drain */ 308 auich_query_encoding, 309 auich_set_params, 310 auich_round_blocksize, 311 NULL, /* commit_setting */ 312 NULL, /* init_output */ 313 NULL, /* init_input */ 314 NULL, /* start_output */ 315 NULL, /* start_input */ 316 auich_halt_output, 317 auich_halt_input, 318 NULL, /* speaker_ctl */ 319 auich_getdev, 320 NULL, /* getfd */ 321 auich_set_port, 322 auich_get_port, 323 auich_query_devinfo, 324 auich_allocm, 325 auich_freem, 326 auich_round_buffersize, 327 auich_mappage, 328 auich_get_props, 329 auich_trigger_output, 330 auich_trigger_input, 331 NULL, /* dev_ioctl */ 332 auich_powerstate, 333 }; 334 335 #define AUICH_FORMATS_1CH 0 336 #define AUICH_FORMATS_4CH 1 337 #define AUICH_FORMATS_6CH 2 338 static const struct audio_format auich_audio_formats[AUICH_AUDIO_NFORMATS] = { 339 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 340 2, AUFMT_STEREO, 0, {8000, 48000}}, 341 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 342 4, AUFMT_SURROUND4, 0, {8000, 48000}}, 343 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 344 6, AUFMT_DOLBY_5_1, 0, {8000, 48000}}, 345 }; 346 347 #define AUICH_SPDIF_NFORMATS 1 348 static const struct audio_format auich_spdif_formats[AUICH_SPDIF_NFORMATS] = { 349 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 350 2, AUFMT_STEREO, 1, {48000}}, 351 }; 352 353 static const struct audio_format auich_modem_formats[AUICH_MODEM_NFORMATS] = { 354 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 355 1, AUFMT_MONAURAL, 0, {8000, 16000}}, 356 }; 357 358 #define PCI_ID_CODE0(v, p) PCI_ID_CODE(PCI_VENDOR_##v, PCI_PRODUCT_##v##_##p) 359 #define PCIID_ICH PCI_ID_CODE0(INTEL, 82801AA_ACA) 360 #define PCIID_ICH0 PCI_ID_CODE0(INTEL, 82801AB_ACA) 361 #define PCIID_ICH2 PCI_ID_CODE0(INTEL, 82801BA_ACA) 362 #define PCIID_440MX PCI_ID_CODE0(INTEL, 82440MX_ACA) 363 #define PCIID_ICH3 PCI_ID_CODE0(INTEL, 82801CA_AC) 364 #define PCIID_ICH4 PCI_ID_CODE0(INTEL, 82801DB_AC) 365 #define PCIID_ICH5 PCI_ID_CODE0(INTEL, 82801EB_AC) 366 #define PCIID_ICH6 PCI_ID_CODE0(INTEL, 82801FB_AC) 367 #define PCIID_ICH7 PCI_ID_CODE0(INTEL, 82801G_ACA) 368 #define PCIID_I6300ESB PCI_ID_CODE0(INTEL, 6300ESB_ACA) 369 #define PCIID_SIS7012 PCI_ID_CODE0(SIS, 7012_AC) 370 #define PCIID_NFORCE PCI_ID_CODE0(NVIDIA, NFORCE_MCP_AC) 371 #define PCIID_NFORCE2 PCI_ID_CODE0(NVIDIA, NFORCE2_MCPT_AC) 372 #define PCIID_NFORCE2_400 PCI_ID_CODE0(NVIDIA, NFORCE2_400_MCPT_AC) 373 #define PCIID_NFORCE3 PCI_ID_CODE0(NVIDIA, NFORCE3_MCPT_AC) 374 #define PCIID_NFORCE3_250 PCI_ID_CODE0(NVIDIA, NFORCE3_250_MCPT_AC) 375 #define PCIID_NFORCE4 PCI_ID_CODE0(NVIDIA, NFORCE4_AC) 376 #define PCIID_NFORCE430 PCI_ID_CODE0(NVIDIA, NFORCE430_AC) 377 #define PCIID_AMD768 PCI_ID_CODE0(AMD, PBC768_AC) 378 #define PCIID_AMD8111 PCI_ID_CODE0(AMD, PBC8111_AC) 379 380 #define PCIID_ICH3MODEM PCI_ID_CODE0(INTEL, 82801CA_MOD) 381 #define PCIID_ICH4MODEM PCI_ID_CODE0(INTEL, 82801DB_MOD) 382 #define PCIID_ICH6MODEM PCI_ID_CODE0(INTEL, 82801FB_ACM) 383 384 struct auich_devtype { 385 pcireg_t id; 386 const char *name; 387 const char *shortname; /* must be less than 11 characters */ 388 }; 389 390 static const struct auich_devtype auich_audio_devices[] = { 391 { PCIID_ICH, "i82801AA (ICH) AC-97 Audio", "ICH" }, 392 { PCIID_ICH0, "i82801AB (ICH0) AC-97 Audio", "ICH0" }, 393 { PCIID_ICH2, "i82801BA (ICH2) AC-97 Audio", "ICH2" }, 394 { PCIID_440MX, "i82440MX AC-97 Audio", "440MX" }, 395 { PCIID_ICH3, "i82801CA (ICH3) AC-97 Audio", "ICH3" }, 396 { PCIID_ICH4, "i82801DB/DBM (ICH4/ICH4M) AC-97 Audio", "ICH4" }, 397 { PCIID_ICH5, "i82801EB (ICH5) AC-97 Audio", "ICH5" }, 398 { PCIID_ICH6, "i82801FB (ICH6) AC-97 Audio", "ICH6" }, 399 { PCIID_ICH7, "i82801GB/GR (ICH7) AC-97 Audio", "ICH7" }, 400 { PCIID_I6300ESB, "Intel 6300ESB AC-97 Audio", "I6300ESB" }, 401 { PCIID_SIS7012, "SiS 7012 AC-97 Audio", "SiS7012" }, 402 { PCIID_NFORCE, "nForce MCP AC-97 Audio", "nForce" }, 403 { PCIID_NFORCE2, "nForce2 MCP-T AC-97 Audio", "nForce2" }, 404 { PCIID_NFORCE2_400, "nForce2 400 MCP-T AC-97 Audio", "nForce2" }, 405 { PCIID_NFORCE3, "nForce3 MCP-T AC-97 Audio", "nForce3" }, 406 { PCIID_NFORCE3_250, "nForce3 250 MCP-T AC-97 Audio", "nForce3" }, 407 { PCIID_NFORCE4, "nForce4 AC-97 Audio", "nForce4" }, 408 { PCIID_NFORCE430, "nForce430 (MCP51) AC-97 Audio", "nForce430" }, 409 { PCIID_AMD768, "AMD768 AC-97 Audio", "AMD768" }, 410 { PCIID_AMD8111,"AMD8111 AC-97 Audio", "AMD8111" }, 411 { 0, NULL, NULL }, 412 }; 413 414 static const struct auich_devtype auich_modem_devices[] = { 415 #ifdef AUICH_ATTACH_MODEM 416 { PCIID_ICH3MODEM, "i82801CA (ICH3) AC-97 Modem", "ICH3MODEM" }, 417 { PCIID_ICH4MODEM, "i82801DB (ICH4) AC-97 Modem", "ICH4MODEM" }, 418 { PCIID_ICH6MODEM, "i82801FB (ICH6) AC-97 Modem", "ICH6MODEM" }, 419 #endif 420 { 0, NULL, NULL }, 421 }; 422 423 static const struct auich_devtype * 424 auich_lookup(struct pci_attach_args *pa, const struct auich_devtype *auich_devices) 425 { 426 const struct auich_devtype *d; 427 428 for (d = auich_devices; d->name != NULL; d++) { 429 if (pa->pa_id == d->id) 430 return d; 431 } 432 433 return NULL; 434 } 435 436 static int 437 auich_match(device_t parent, cfdata_t match, void *aux) 438 { 439 struct pci_attach_args *pa; 440 441 pa = aux; 442 if (auich_lookup(pa, auich_audio_devices) != NULL) 443 return 1; 444 if (auich_lookup(pa, auich_modem_devices) != NULL) 445 return 1; 446 447 return 0; 448 } 449 450 static void 451 auich_attach(device_t parent, device_t self, void *aux) 452 { 453 struct auich_softc *sc = device_private(self); 454 struct pci_attach_args *pa; 455 pcireg_t v, subdev; 456 const char *intrstr; 457 const struct auich_devtype *d; 458 const struct sysctlnode *node, *node_ac97clock; 459 int err, node_mib, i; 460 461 sc->sc_dev = self; 462 pa = aux; 463 464 if ((d = auich_lookup(pa, auich_modem_devices)) != NULL) { 465 sc->sc_modem_offset = 0x10; 466 sc->sc_codectype = AC97_CODEC_TYPE_MODEM; 467 } else if ((d = auich_lookup(pa, auich_audio_devices)) != NULL) { 468 sc->sc_modem_offset = 0; 469 sc->sc_codectype = AC97_CODEC_TYPE_AUDIO; 470 } else 471 panic("auich_attach: impossible"); 472 473 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 474 aprint_naive(": Audio controller\n"); 475 else 476 aprint_naive(": Modem controller\n"); 477 478 sc->sc_pc = pa->pa_pc; 479 sc->sc_pt = pa->pa_tag; 480 481 aprint_normal(": %s\n", d->name); 482 483 if (d->id == PCIID_ICH4 || d->id == PCIID_ICH5 || d->id == PCIID_ICH6 484 || d->id == PCIID_ICH7 || d->id == PCIID_I6300ESB 485 || d->id == PCIID_ICH4MODEM) { 486 /* 487 * Use native mode for Intel 6300ESB and ICH4/ICH5/ICH6/ICH7 488 */ 489 490 if (pci_mapreg_map(pa, ICH_MMBAR, PCI_MAPREG_TYPE_MEM, 0, 491 &sc->iot, &sc->mix_ioh, NULL, &sc->mix_size)) { 492 goto retry_map; 493 } 494 if (pci_mapreg_map(pa, ICH_MBBAR, PCI_MAPREG_TYPE_MEM, 0, 495 &sc->iot, &sc->aud_ioh, NULL, &sc->aud_size)) { 496 goto retry_map; 497 } 498 goto map_done; 499 } else 500 goto non_native_map; 501 502 retry_map: 503 sc->sc_iose = 1; 504 v = pci_conf_read(pa->pa_pc, pa->pa_tag, ICH_CFG); 505 pci_conf_write(pa->pa_pc, pa->pa_tag, ICH_CFG, 506 v | ICH_CFG_IOSE); 507 508 non_native_map: 509 if (pci_mapreg_map(pa, ICH_NAMBAR, PCI_MAPREG_TYPE_IO, 0, 510 &sc->iot, &sc->mix_ioh, NULL, &sc->mix_size)) { 511 aprint_error_dev(self, "can't map codec i/o space\n"); 512 return; 513 } 514 if (pci_mapreg_map(pa, ICH_NABMBAR, PCI_MAPREG_TYPE_IO, 0, 515 &sc->iot, &sc->aud_ioh, NULL, &sc->aud_size)) { 516 aprint_error_dev(self, "can't map device i/o space\n"); 517 return; 518 } 519 520 map_done: 521 sc->dmat = pa->pa_dmat; 522 523 /* enable bus mastering */ 524 v = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 525 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 526 v | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_BACKTOBACK_ENABLE); 527 528 /* Map and establish the interrupt. */ 529 if (pci_intr_map(pa, &sc->intrh)) { 530 aprint_error_dev(self, "can't map interrupt\n"); 531 return; 532 } 533 intrstr = pci_intr_string(pa->pa_pc, sc->intrh); 534 sc->sc_ih = pci_intr_establish(pa->pa_pc, sc->intrh, IPL_AUDIO, 535 auich_intr, sc); 536 if (sc->sc_ih == NULL) { 537 aprint_error_dev(self, "can't establish interrupt"); 538 if (intrstr != NULL) 539 aprint_error(" at %s", intrstr); 540 aprint_error("\n"); 541 return; 542 } 543 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 544 545 snprintf(sc->sc_audev.name, MAX_AUDIO_DEV_LEN, "%s AC97", d->shortname); 546 snprintf(sc->sc_audev.version, MAX_AUDIO_DEV_LEN, 547 "0x%02x", PCI_REVISION(pa->pa_class)); 548 strlcpy(sc->sc_audev.config, device_xname(self), MAX_AUDIO_DEV_LEN); 549 550 /* SiS 7012 needs special handling */ 551 if (d->id == PCIID_SIS7012) { 552 sc->sc_sts_reg = ICH_PICB; 553 sc->sc_sample_shift = 0; 554 sc->sc_pcm246_mask = ICH_SIS_PCM246_MASK; 555 sc->sc_pcm2 = ICH_SIS_PCM2; 556 sc->sc_pcm4 = ICH_SIS_PCM4; 557 sc->sc_pcm6 = ICH_SIS_PCM6; 558 /* Un-mute output. From Linux. */ 559 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_SIS_NV_CTL, 560 bus_space_read_4(sc->iot, sc->aud_ioh, ICH_SIS_NV_CTL) | 561 ICH_SIS_CTL_UNMUTE); 562 } else { 563 sc->sc_sts_reg = ICH_STS; 564 sc->sc_sample_shift = 1; 565 sc->sc_pcm246_mask = ICH_PCM246_MASK; 566 sc->sc_pcm2 = ICH_PCM2; 567 sc->sc_pcm4 = ICH_PCM4; 568 sc->sc_pcm6 = ICH_PCM6; 569 } 570 571 /* Workaround for a 440MX B-stepping erratum */ 572 sc->sc_dmamap_flags = BUS_DMA_COHERENT; 573 if (d->id == PCIID_440MX) { 574 sc->sc_dmamap_flags |= BUS_DMA_NOCACHE; 575 aprint_normal_dev(self, "DMA bug workaround enabled\n"); 576 } 577 578 /* Set up DMA lists. */ 579 sc->pcmo.qptr = sc->pcmi.qptr = sc->mici.qptr = 0; 580 auich_alloc_cdata(sc); 581 582 DPRINTF(ICH_DEBUG_DMA, ("auich_attach: lists %p %p %p\n", 583 sc->pcmo.dmalist, sc->pcmi.dmalist, sc->mici.dmalist)); 584 585 /* Modem codecs are always the secondary codec on ICH */ 586 sc->sc_codecnum = sc->sc_codectype == AC97_CODEC_TYPE_MODEM ? 1 : 0; 587 588 sc->host_if.arg = sc; 589 sc->host_if.attach = auich_attach_codec; 590 sc->host_if.read = auich_read_codec; 591 sc->host_if.write = auich_write_codec; 592 sc->host_if.reset = auich_reset_codec; 593 sc->host_if.flags = auich_flags_codec; 594 sc->host_if.spdif_event = auich_spdif_event; 595 596 subdev = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 597 switch (subdev) { 598 case 0x202f161f: /* Gateway 7326GZ */ 599 case 0x203a161f: /* Gateway 4028GZ */ 600 case 0x204c161f: /* Kvazar-Micro Senator 3592XT */ 601 case 0x8144104d: /* Sony VAIO PCG-TR* */ 602 case 0x8197104d: /* Sony S1XP */ 603 case 0x81c0104d: /* Sony VAIO type T */ 604 case 0x81c5104d: /* Sony VAIO VGN-B1XP */ 605 sc->sc_codecflags = AC97_HOST_INVERTED_EAMP; 606 break; 607 default: 608 sc->sc_codecflags = 0; 609 break; 610 } 611 612 if (ac97_attach_type(&sc->host_if, self, sc->sc_codectype) != 0) 613 return; 614 sc->codec_if->vtbl->unlock(sc->codec_if); 615 616 /* setup audio_format */ 617 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 618 memcpy(sc->sc_audio_formats, auich_audio_formats, sizeof(auich_audio_formats)); 619 if (!AC97_IS_4CH(sc->codec_if)) 620 AUFMT_INVALIDATE(&sc->sc_audio_formats[AUICH_FORMATS_4CH]); 621 if (!AC97_IS_6CH(sc->codec_if)) 622 AUFMT_INVALIDATE(&sc->sc_audio_formats[AUICH_FORMATS_6CH]); 623 if (AC97_IS_FIXED_RATE(sc->codec_if)) { 624 for (i = 0; i < AUICH_AUDIO_NFORMATS; i++) { 625 sc->sc_audio_formats[i].frequency_type = 1; 626 sc->sc_audio_formats[i].frequency[0] = 48000; 627 } 628 } 629 if (0 != auconv_create_encodings(sc->sc_audio_formats, AUICH_AUDIO_NFORMATS, 630 &sc->sc_encodings)) 631 return; 632 if (0 != auconv_create_encodings(auich_spdif_formats, AUICH_SPDIF_NFORMATS, 633 &sc->sc_spdif_encodings)) 634 return; 635 } else { 636 memcpy(sc->sc_modem_formats, auich_modem_formats, sizeof(auich_modem_formats)); 637 if (0 != auconv_create_encodings(sc->sc_modem_formats, AUICH_MODEM_NFORMATS, 638 &sc->sc_encodings)) 639 return; 640 } 641 642 /* Watch for power change */ 643 if (!pmf_device_register(self, NULL, auich_resume)) 644 aprint_error_dev(self, "couldn't establish power handler\n"); 645 646 config_interrupts(self, auich_finish_attach); 647 648 /* sysctl setup */ 649 if (AC97_IS_FIXED_RATE(sc->codec_if) && 650 sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 651 return; 652 653 err = sysctl_createv(&sc->sc_log, 0, NULL, NULL, 0, 654 CTLTYPE_NODE, "hw", NULL, NULL, 0, NULL, 0, 655 CTL_HW, CTL_EOL); 656 if (err != 0) 657 goto sysctl_err; 658 err = sysctl_createv(&sc->sc_log, 0, NULL, &node, 0, 659 CTLTYPE_NODE, device_xname(self), NULL, NULL, 0, 660 NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 661 if (err != 0) 662 goto sysctl_err; 663 node_mib = node->sysctl_num; 664 665 if (!AC97_IS_FIXED_RATE(sc->codec_if)) { 666 /* passing the sc address instead of &sc->sc_ac97_clock */ 667 err = sysctl_createv(&sc->sc_log, 0, NULL, &node_ac97clock, 668 CTLFLAG_READWRITE, 669 CTLTYPE_INT, "ac97rate", 670 SYSCTL_DESCR("AC'97 codec link rate"), 671 auich_sysctl_verify, 0, sc, 0, 672 CTL_HW, node_mib, CTL_CREATE, CTL_EOL); 673 if (err != 0) 674 goto sysctl_err; 675 sc->sc_ac97_clock_mib = node_ac97clock->sysctl_num; 676 } 677 678 return; 679 680 sysctl_err: 681 printf("%s: failed to add sysctl nodes. (%d)\n", 682 device_xname(self), err); 683 return; /* failure of sysctl is not fatal. */ 684 } 685 686 static void 687 auich_childdet(device_t self, device_t child) 688 { 689 struct auich_softc *sc = device_private(self); 690 691 KASSERT(sc->sc_audiodev == child); 692 sc->sc_audiodev = NULL; 693 } 694 695 static int 696 auich_detach(device_t self, int flags) 697 { 698 struct auich_softc *sc = device_private(self); 699 700 /* audio */ 701 if (sc->sc_audiodev != NULL) 702 config_detach(sc->sc_audiodev, flags); 703 704 /* sysctl */ 705 sysctl_teardown(&sc->sc_log); 706 707 /* audio_encoding_set */ 708 auconv_delete_encodings(sc->sc_encodings); 709 auconv_delete_encodings(sc->sc_spdif_encodings); 710 711 /* ac97 */ 712 if (sc->codec_if != NULL) 713 sc->codec_if->vtbl->detach(sc->codec_if); 714 715 /* PCI */ 716 if (sc->sc_ih != NULL) 717 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 718 if (sc->mix_size != 0) 719 bus_space_unmap(sc->iot, sc->mix_ioh, sc->mix_size); 720 if (sc->aud_size != 0) 721 bus_space_unmap(sc->iot, sc->aud_ioh, sc->aud_size); 722 return 0; 723 } 724 725 static int 726 auich_sysctl_verify(SYSCTLFN_ARGS) 727 { 728 int error, tmp; 729 struct sysctlnode node; 730 struct auich_softc *sc; 731 732 node = *rnode; 733 sc = rnode->sysctl_data; 734 if (node.sysctl_num == sc->sc_ac97_clock_mib) { 735 tmp = sc->sc_ac97_clock; 736 node.sysctl_data = &tmp; 737 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 738 if (error || newp == NULL) 739 return error; 740 741 if (tmp < 48000 || tmp > 96000) 742 return EINVAL; 743 sc->sc_ac97_clock = tmp; 744 } 745 746 return 0; 747 } 748 749 static void 750 auich_finish_attach(device_t self) 751 { 752 struct auich_softc *sc = device_private(self); 753 754 if (!AC97_IS_FIXED_RATE(sc->codec_if)) 755 auich_calibrate(sc); 756 757 sc->sc_audiodev = audio_attach_mi(&auich_hw_if, sc, sc->sc_dev); 758 759 return; 760 } 761 762 #define ICH_CODECIO_INTERVAL 10 763 static int 764 auich_read_codec(void *v, uint8_t reg, uint16_t *val) 765 { 766 struct auich_softc *sc; 767 int i; 768 uint32_t status; 769 770 sc = v; 771 /* wait for an access semaphore */ 772 for (i = ICH_SEMATIMO / ICH_CODECIO_INTERVAL; i-- && 773 bus_space_read_1(sc->iot, sc->aud_ioh, 774 ICH_CAS + sc->sc_modem_offset) & 1; 775 DELAY(ICH_CODECIO_INTERVAL)); 776 777 if (i > 0) { 778 *val = bus_space_read_2(sc->iot, sc->mix_ioh, 779 reg + (sc->sc_codecnum * ICH_CODEC_OFFSET)); 780 DPRINTF(ICH_DEBUG_CODECIO, 781 ("auich_read_codec(%x, %x)\n", reg, *val)); 782 status = bus_space_read_4(sc->iot, sc->aud_ioh, 783 ICH_GSTS + sc->sc_modem_offset); 784 if (status & ICH_RCS) { 785 bus_space_write_4(sc->iot, sc->aud_ioh, 786 ICH_GSTS + sc->sc_modem_offset, 787 status & ~(ICH_SRI|ICH_PRI|ICH_GSCI)); 788 *val = 0xffff; 789 DPRINTF(ICH_DEBUG_CODECIO, 790 ("%s: read_codec error\n", device_xname(sc->sc_dev))); 791 if (reg == AC97_REG_GPIO_STATUS) 792 auich_clear_cas(sc); 793 return -1; 794 } 795 if (reg == AC97_REG_GPIO_STATUS) 796 auich_clear_cas(sc); 797 return 0; 798 } else { 799 aprint_normal_dev(sc->sc_dev, "read_codec timeout\n"); 800 if (reg == AC97_REG_GPIO_STATUS) 801 auich_clear_cas(sc); 802 return -1; 803 } 804 } 805 806 static int 807 auich_write_codec(void *v, uint8_t reg, uint16_t val) 808 { 809 struct auich_softc *sc; 810 int i; 811 812 DPRINTF(ICH_DEBUG_CODECIO, ("auich_write_codec(%x, %x)\n", reg, val)); 813 sc = v; 814 /* wait for an access semaphore */ 815 for (i = ICH_SEMATIMO / ICH_CODECIO_INTERVAL; i-- && 816 bus_space_read_1(sc->iot, sc->aud_ioh, 817 ICH_CAS + sc->sc_modem_offset) & 1; 818 DELAY(ICH_CODECIO_INTERVAL)); 819 820 if (i > 0) { 821 bus_space_write_2(sc->iot, sc->mix_ioh, 822 reg + (sc->sc_codecnum * ICH_CODEC_OFFSET), val); 823 return 0; 824 } else { 825 aprint_normal_dev(sc->sc_dev, "write_codec timeout\n"); 826 return -1; 827 } 828 } 829 830 static int 831 auich_attach_codec(void *v, struct ac97_codec_if *cif) 832 { 833 struct auich_softc *sc; 834 835 sc = v; 836 sc->codec_if = cif; 837 838 return 0; 839 } 840 841 static int 842 auich_reset_codec(void *v) 843 { 844 struct auich_softc *sc; 845 int i; 846 uint32_t control, status; 847 848 sc = v; 849 control = bus_space_read_4(sc->iot, sc->aud_ioh, 850 ICH_GCTRL + sc->sc_modem_offset); 851 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 852 control &= ~(ICH_ACLSO | sc->sc_pcm246_mask); 853 } else { 854 control &= ~ICH_ACLSO; 855 control |= ICH_GIE; 856 } 857 control |= (control & ICH_CRESET) ? ICH_WRESET : ICH_CRESET; 858 bus_space_write_4(sc->iot, sc->aud_ioh, 859 ICH_GCTRL + sc->sc_modem_offset, control); 860 861 for (i = 500000; i >= 0; i--) { 862 status = bus_space_read_4(sc->iot, sc->aud_ioh, 863 ICH_GSTS + sc->sc_modem_offset); 864 if (status & (ICH_PCR | ICH_SCR | ICH_S2CR)) 865 break; 866 DELAY(1); 867 } 868 if (i <= 0) { 869 aprint_error_dev(sc->sc_dev, "auich_reset_codec: time out\n"); 870 return ETIMEDOUT; 871 } 872 #ifdef AUICH_DEBUG 873 if (status & ICH_SCR) 874 printf("%s: The 2nd codec is ready.\n", 875 device_xname(sc->sc_dev)); 876 if (status & ICH_S2CR) 877 printf("%s: The 3rd codec is ready.\n", 878 device_xname(sc->sc_dev)); 879 #endif 880 return 0; 881 } 882 883 static enum ac97_host_flags 884 auich_flags_codec(void *v) 885 { 886 struct auich_softc *sc = v; 887 return sc->sc_codecflags; 888 } 889 890 static void 891 auich_spdif_event(void *addr, bool flag) 892 { 893 struct auich_softc *sc; 894 895 sc = addr; 896 sc->sc_spdif = flag; 897 } 898 899 static int 900 auich_open(void *addr, int flags) 901 { 902 struct auich_softc *sc; 903 904 sc = (struct auich_softc *)addr; 905 sc->codec_if->vtbl->lock(sc->codec_if); 906 return 0; 907 } 908 909 static void 910 auich_close(void *addr) 911 { 912 struct auich_softc *sc; 913 914 sc = (struct auich_softc *)addr; 915 sc->codec_if->vtbl->unlock(sc->codec_if); 916 } 917 918 static int 919 auich_query_encoding(void *v, struct audio_encoding *aep) 920 { 921 struct auich_softc *sc; 922 923 sc = (struct auich_softc *)v; 924 return auconv_query_encoding( 925 sc->sc_spdif ? sc->sc_spdif_encodings : sc->sc_encodings, aep); 926 } 927 928 static int 929 auich_set_rate(struct auich_softc *sc, int mode, u_long srate) 930 { 931 int ret; 932 u_int ratetmp; 933 934 sc->codec_if->vtbl->set_clock(sc->codec_if, sc->sc_ac97_clock); 935 ratetmp = srate; 936 if (mode == AUMODE_RECORD) 937 return sc->codec_if->vtbl->set_rate(sc->codec_if, 938 AC97_REG_PCM_LR_ADC_RATE, &ratetmp); 939 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 940 AC97_REG_PCM_FRONT_DAC_RATE, &ratetmp); 941 if (ret) 942 return ret; 943 ratetmp = srate; 944 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 945 AC97_REG_PCM_SURR_DAC_RATE, &ratetmp); 946 if (ret) 947 return ret; 948 ratetmp = srate; 949 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 950 AC97_REG_PCM_LFE_DAC_RATE, &ratetmp); 951 return ret; 952 } 953 954 static int 955 auich_set_params(void *v, int setmode, int usemode, 956 audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil, 957 stream_filter_list_t *rfil) 958 { 959 struct auich_softc *sc; 960 audio_params_t *p; 961 stream_filter_list_t *fil; 962 int mode, index; 963 uint32_t control; 964 965 sc = v; 966 for (mode = AUMODE_RECORD; mode != -1; 967 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 968 if ((setmode & mode) == 0) 969 continue; 970 971 p = mode == AUMODE_PLAY ? play : rec; 972 fil = mode == AUMODE_PLAY ? pfil : rfil; 973 if (p == NULL) 974 continue; 975 976 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 977 if (p->sample_rate < 8000 || 978 p->sample_rate > 48000) 979 return EINVAL; 980 981 if (!sc->sc_spdif) 982 index = auconv_set_converter(sc->sc_audio_formats, 983 AUICH_AUDIO_NFORMATS, mode, p, TRUE, fil); 984 else 985 index = auconv_set_converter(auich_spdif_formats, 986 AUICH_SPDIF_NFORMATS, mode, p, TRUE, fil); 987 } else { 988 if (p->sample_rate != 8000 && p->sample_rate != 16000) 989 return EINVAL; 990 index = auconv_set_converter(sc->sc_modem_formats, 991 AUICH_MODEM_NFORMATS, mode, p, TRUE, fil); 992 } 993 if (index < 0) 994 return EINVAL; 995 if (fil->req_size > 0) 996 p = &fil->filters[0].param; 997 /* p represents HW encoding */ 998 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 999 if (sc->sc_audio_formats[index].frequency_type != 1 1000 && auich_set_rate(sc, mode, p->sample_rate)) 1001 return EINVAL; 1002 } else { 1003 if (sc->sc_modem_formats[index].frequency_type != 1 1004 && auich_set_rate(sc, mode, p->sample_rate)) 1005 return EINVAL; 1006 auich_write_codec(sc, AC97_REG_LINE1_RATE, 1007 p->sample_rate); 1008 auich_write_codec(sc, AC97_REG_LINE1_LEVEL, 0); 1009 } 1010 if (mode == AUMODE_PLAY && 1011 sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 1012 control = bus_space_read_4(sc->iot, sc->aud_ioh, 1013 ICH_GCTRL + sc->sc_modem_offset); 1014 control &= ~sc->sc_pcm246_mask; 1015 if (p->channels == 4) { 1016 control |= sc->sc_pcm4; 1017 } else if (p->channels == 6) { 1018 control |= sc->sc_pcm6; 1019 } 1020 bus_space_write_4(sc->iot, sc->aud_ioh, 1021 ICH_GCTRL + sc->sc_modem_offset, control); 1022 } 1023 } 1024 1025 return 0; 1026 } 1027 1028 static int 1029 auich_round_blocksize(void *v, int blk, int mode, 1030 const audio_params_t *param) 1031 { 1032 1033 return blk & ~0x3f; /* keep good alignment */ 1034 } 1035 1036 static void 1037 auich_halt_pipe(struct auich_softc *sc, int pipe) 1038 { 1039 int i; 1040 uint32_t status; 1041 1042 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, 0); 1043 for (i = 0; i < 100; i++) { 1044 status = bus_space_read_4(sc->iot, sc->aud_ioh, pipe + ICH_STS); 1045 if (status & ICH_DCH) 1046 break; 1047 DELAY(1); 1048 } 1049 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, ICH_RR); 1050 1051 #if AUICH_DEBUG 1052 if (i > 0) 1053 printf("auich_halt_pipe: halt took %d cycles\n", i); 1054 #endif 1055 } 1056 1057 static int 1058 auich_halt_output(void *v) 1059 { 1060 struct auich_softc *sc; 1061 1062 sc = v; 1063 DPRINTF(ICH_DEBUG_DMA, ("%s: halt_output\n", device_xname(sc->sc_dev))); 1064 1065 auich_halt_pipe(sc, ICH_PCMO); 1066 sc->pcmo.intr = NULL; 1067 1068 return 0; 1069 } 1070 1071 static int 1072 auich_halt_input(void *v) 1073 { 1074 struct auich_softc *sc; 1075 1076 sc = v; 1077 DPRINTF(ICH_DEBUG_DMA, ("%s: halt_input\n", device_xname(sc->sc_dev))); 1078 1079 auich_halt_pipe(sc, ICH_PCMI); 1080 sc->pcmi.intr = NULL; 1081 1082 return 0; 1083 } 1084 1085 static int 1086 auich_getdev(void *v, struct audio_device *adp) 1087 { 1088 struct auich_softc *sc; 1089 1090 sc = v; 1091 *adp = sc->sc_audev; 1092 return 0; 1093 } 1094 1095 static int 1096 auich_set_port(void *v, mixer_ctrl_t *cp) 1097 { 1098 struct auich_softc *sc; 1099 1100 sc = v; 1101 return sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp); 1102 } 1103 1104 static int 1105 auich_get_port(void *v, mixer_ctrl_t *cp) 1106 { 1107 struct auich_softc *sc; 1108 1109 sc = v; 1110 return sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp); 1111 } 1112 1113 static int 1114 auich_query_devinfo(void *v, mixer_devinfo_t *dp) 1115 { 1116 struct auich_softc *sc; 1117 1118 sc = v; 1119 return sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp); 1120 } 1121 1122 static void * 1123 auich_allocm(void *v, int direction, size_t size, 1124 struct malloc_type *pool, int flags) 1125 { 1126 struct auich_softc *sc; 1127 struct auich_dma *p; 1128 int error; 1129 1130 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX)) 1131 return NULL; 1132 1133 p = malloc(sizeof(*p), pool, flags|M_ZERO); 1134 if (p == NULL) 1135 return NULL; 1136 1137 sc = v; 1138 error = auich_allocmem(sc, size, 0, p); 1139 if (error) { 1140 free(p, pool); 1141 return NULL; 1142 } 1143 1144 p->next = sc->sc_dmas; 1145 sc->sc_dmas = p; 1146 1147 return KERNADDR(p); 1148 } 1149 1150 static void 1151 auich_freem(void *v, void *ptr, struct malloc_type *pool) 1152 { 1153 struct auich_softc *sc; 1154 struct auich_dma *p, **pp; 1155 1156 sc = v; 1157 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 1158 if (KERNADDR(p) == ptr) { 1159 auich_freemem(sc, p); 1160 *pp = p->next; 1161 free(p, pool); 1162 return; 1163 } 1164 } 1165 } 1166 1167 static size_t 1168 auich_round_buffersize(void *v, int direction, size_t size) 1169 { 1170 1171 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX)) 1172 size = ICH_DMALIST_MAX * ICH_DMASEG_MAX; 1173 1174 return size; 1175 } 1176 1177 static paddr_t 1178 auich_mappage(void *v, void *mem, off_t off, int prot) 1179 { 1180 struct auich_softc *sc; 1181 struct auich_dma *p; 1182 1183 if (off < 0) 1184 return -1; 1185 sc = v; 1186 for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next) 1187 continue; 1188 if (!p) 1189 return -1; 1190 return bus_dmamem_mmap(sc->dmat, p->segs, p->nsegs, 1191 off, prot, BUS_DMA_WAITOK); 1192 } 1193 1194 static int 1195 auich_get_props(void *v) 1196 { 1197 struct auich_softc *sc; 1198 int props; 1199 1200 props = AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 1201 sc = v; 1202 /* 1203 * Even if the codec is fixed-rate, set_param() succeeds for any sample 1204 * rate because of aurateconv. Applications can't know what rate the 1205 * device can process in the case of mmap(). 1206 */ 1207 if (!AC97_IS_FIXED_RATE(sc->codec_if) || 1208 sc->sc_codectype == AC97_CODEC_TYPE_MODEM) 1209 props |= AUDIO_PROP_MMAP; 1210 return props; 1211 } 1212 1213 static int 1214 auich_intr(void *v) 1215 { 1216 struct auich_softc *sc; 1217 int ret, gsts; 1218 #ifdef DIAGNOSTIC 1219 int csts; 1220 #endif 1221 1222 sc = v; 1223 1224 if (!device_has_power(sc->sc_dev)) 1225 return (0); 1226 1227 ret = 0; 1228 #ifdef DIAGNOSTIC 1229 csts = pci_conf_read(sc->sc_pc, sc->sc_pt, PCI_COMMAND_STATUS_REG); 1230 if (csts & PCI_STATUS_MASTER_ABORT) { 1231 printf("auich_intr: PCI master abort\n"); 1232 } 1233 #endif 1234 1235 gsts = bus_space_read_4(sc->iot, sc->aud_ioh, 1236 ICH_GSTS + sc->sc_modem_offset); 1237 DPRINTF(ICH_DEBUG_INTR, ("auich_intr: gsts=0x%x\n", gsts)); 1238 1239 if ((sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_POINT) || 1240 (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_MOINT)) { 1241 int sts; 1242 1243 sts = bus_space_read_2(sc->iot, sc->aud_ioh, 1244 ICH_PCMO + sc->sc_sts_reg); 1245 DPRINTF(ICH_DEBUG_INTR, 1246 ("auich_intr: osts=0x%x\n", sts)); 1247 1248 if (sts & ICH_FIFOE) 1249 printf("%s: fifo underrun\n", device_xname(sc->sc_dev)); 1250 1251 if (sts & ICH_BCIS) 1252 auich_intr_pipe(sc, ICH_PCMO, &sc->pcmo); 1253 1254 /* int ack */ 1255 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMO + 1256 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE)); 1257 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 1258 bus_space_write_4(sc->iot, sc->aud_ioh, 1259 ICH_GSTS + sc->sc_modem_offset, ICH_POINT); 1260 else 1261 bus_space_write_4(sc->iot, sc->aud_ioh, 1262 ICH_GSTS + sc->sc_modem_offset, ICH_MOINT); 1263 ret++; 1264 } 1265 1266 if ((sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_PIINT) || 1267 (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_MIINT)) { 1268 int sts; 1269 1270 sts = bus_space_read_2(sc->iot, sc->aud_ioh, 1271 ICH_PCMI + sc->sc_sts_reg); 1272 DPRINTF(ICH_DEBUG_INTR, 1273 ("auich_intr: ists=0x%x\n", sts)); 1274 1275 if (sts & ICH_FIFOE) 1276 printf("%s: fifo overrun\n", device_xname(sc->sc_dev)); 1277 1278 if (sts & ICH_BCIS) 1279 auich_intr_pipe(sc, ICH_PCMI, &sc->pcmi); 1280 1281 /* int ack */ 1282 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMI + 1283 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE)); 1284 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 1285 bus_space_write_4(sc->iot, sc->aud_ioh, 1286 ICH_GSTS + sc->sc_modem_offset, ICH_PIINT); 1287 else 1288 bus_space_write_4(sc->iot, sc->aud_ioh, 1289 ICH_GSTS + sc->sc_modem_offset, ICH_MIINT); 1290 ret++; 1291 } 1292 1293 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_MINT) { 1294 int sts; 1295 1296 sts = bus_space_read_2(sc->iot, sc->aud_ioh, 1297 ICH_MICI + sc->sc_sts_reg); 1298 DPRINTF(ICH_DEBUG_INTR, 1299 ("auich_intr: ists=0x%x\n", sts)); 1300 1301 if (sts & ICH_FIFOE) 1302 printf("%s: fifo overrun\n", device_xname(sc->sc_dev)); 1303 1304 if (sts & ICH_BCIS) 1305 auich_intr_pipe(sc, ICH_MICI, &sc->mici); 1306 1307 /* int ack */ 1308 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_MICI + 1309 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE)); 1310 bus_space_write_4(sc->iot, sc->aud_ioh, 1311 ICH_GSTS + sc->sc_modem_offset, ICH_MINT); 1312 ret++; 1313 } 1314 1315 #ifdef AUICH_MODEM_DEBUG 1316 if (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_GSCI) { 1317 printf("%s: gsts=0x%x\n", device_xname(sc->sc_dev), gsts); 1318 /* int ack */ 1319 bus_space_write_4(sc->iot, sc->aud_ioh, 1320 ICH_GSTS + sc->sc_modem_offset, ICH_GSCI); 1321 ret++; 1322 } 1323 #endif 1324 1325 return ret; 1326 } 1327 1328 static void 1329 auich_trigger_pipe(struct auich_softc *sc, int pipe, struct auich_ring *ring) 1330 { 1331 int blksize, qptr; 1332 struct auich_dmalist *q; 1333 1334 blksize = ring->blksize; 1335 1336 for (qptr = 0; qptr < ICH_DMALIST_MAX; qptr++) { 1337 q = &ring->dmalist[qptr]; 1338 q->base = ring->p; 1339 q->len = (blksize >> sc->sc_sample_shift) | ICH_DMAF_IOC; 1340 1341 ring->p += blksize; 1342 if (ring->p >= ring->end) 1343 ring->p = ring->start; 1344 } 1345 ring->qptr = 0; 1346 1347 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_LVI, 1348 (qptr - 1) & ICH_LVI_MASK); 1349 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, 1350 ICH_IOCE | ICH_FEIE | ICH_RPBM); 1351 } 1352 1353 static void 1354 auich_intr_pipe(struct auich_softc *sc, int pipe, struct auich_ring *ring) 1355 { 1356 int blksize, qptr, nqptr; 1357 struct auich_dmalist *q; 1358 1359 blksize = ring->blksize; 1360 qptr = ring->qptr; 1361 nqptr = bus_space_read_1(sc->iot, sc->aud_ioh, pipe + ICH_CIV); 1362 1363 while (qptr != nqptr) { 1364 q = &ring->dmalist[qptr]; 1365 q->base = ring->p; 1366 q->len = (blksize >> sc->sc_sample_shift) | ICH_DMAF_IOC; 1367 1368 DPRINTF(ICH_DEBUG_INTR, 1369 ("auich_intr: %p, %p = %x @ 0x%x\n", 1370 &ring->dmalist[qptr], q, q->len, q->base)); 1371 1372 ring->p += blksize; 1373 if (ring->p >= ring->end) 1374 ring->p = ring->start; 1375 1376 qptr = (qptr + 1) & ICH_LVI_MASK; 1377 if (ring->intr) 1378 ring->intr(ring->arg); 1379 } 1380 ring->qptr = qptr; 1381 1382 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_LVI, 1383 (qptr - 1) & ICH_LVI_MASK); 1384 } 1385 1386 static int 1387 auich_trigger_output(void *v, void *start, void *end, int blksize, 1388 void (*intr)(void *), void *arg, const audio_params_t *param) 1389 { 1390 struct auich_softc *sc; 1391 struct auich_dma *p; 1392 size_t size; 1393 1394 DPRINTF(ICH_DEBUG_DMA, 1395 ("auich_trigger_output(%p, %p, %d, %p, %p, %p)\n", 1396 start, end, blksize, intr, arg, param)); 1397 sc = v; 1398 1399 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1400 continue; 1401 if (!p) { 1402 printf("auich_trigger_output: bad addr %p\n", start); 1403 return EINVAL; 1404 } 1405 1406 size = (size_t)((char *)end - (char *)start); 1407 1408 sc->pcmo.intr = intr; 1409 sc->pcmo.arg = arg; 1410 sc->pcmo.start = DMAADDR(p); 1411 sc->pcmo.p = sc->pcmo.start; 1412 sc->pcmo.end = sc->pcmo.start + size; 1413 sc->pcmo.blksize = blksize; 1414 1415 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_BDBAR, 1416 sc->sc_cddma + ICH_PCMO_OFF(0)); 1417 auich_trigger_pipe(sc, ICH_PCMO, &sc->pcmo); 1418 1419 return 0; 1420 } 1421 1422 static int 1423 auich_trigger_input(void *v, void *start, void *end, int blksize, 1424 void (*intr)(void *), void *arg, const audio_params_t *param) 1425 { 1426 struct auich_softc *sc; 1427 struct auich_dma *p; 1428 size_t size; 1429 1430 DPRINTF(ICH_DEBUG_DMA, 1431 ("auich_trigger_input(%p, %p, %d, %p, %p, %p)\n", 1432 start, end, blksize, intr, arg, param)); 1433 sc = v; 1434 1435 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1436 continue; 1437 if (!p) { 1438 printf("auich_trigger_input: bad addr %p\n", start); 1439 return EINVAL; 1440 } 1441 1442 size = (size_t)((char *)end - (char *)start); 1443 1444 sc->pcmi.intr = intr; 1445 sc->pcmi.arg = arg; 1446 sc->pcmi.start = DMAADDR(p); 1447 sc->pcmi.p = sc->pcmi.start; 1448 sc->pcmi.end = sc->pcmi.start + size; 1449 sc->pcmi.blksize = blksize; 1450 1451 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_BDBAR, 1452 sc->sc_cddma + ICH_PCMI_OFF(0)); 1453 auich_trigger_pipe(sc, ICH_PCMI, &sc->pcmi); 1454 1455 return 0; 1456 } 1457 1458 static int 1459 auich_powerstate(void *v, int state) 1460 { 1461 return 0; 1462 } 1463 1464 static int 1465 auich_allocmem(struct auich_softc *sc, size_t size, size_t align, 1466 struct auich_dma *p) 1467 { 1468 int error; 1469 1470 p->size = size; 1471 error = bus_dmamem_alloc(sc->dmat, p->size, align, 0, 1472 p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 1473 &p->nsegs, BUS_DMA_NOWAIT); 1474 if (error) 1475 return error; 1476 1477 error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size, 1478 &p->addr, BUS_DMA_NOWAIT|sc->sc_dmamap_flags); 1479 if (error) 1480 goto free; 1481 1482 error = bus_dmamap_create(sc->dmat, p->size, 1, p->size, 1483 0, BUS_DMA_NOWAIT, &p->map); 1484 if (error) 1485 goto unmap; 1486 1487 error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL, 1488 BUS_DMA_NOWAIT); 1489 if (error) 1490 goto destroy; 1491 return 0; 1492 1493 destroy: 1494 bus_dmamap_destroy(sc->dmat, p->map); 1495 unmap: 1496 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1497 free: 1498 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1499 return error; 1500 } 1501 1502 static int 1503 auich_freemem(struct auich_softc *sc, struct auich_dma *p) 1504 { 1505 1506 bus_dmamap_unload(sc->dmat, p->map); 1507 bus_dmamap_destroy(sc->dmat, p->map); 1508 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1509 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1510 return 0; 1511 } 1512 1513 static int 1514 auich_alloc_cdata(struct auich_softc *sc) 1515 { 1516 bus_dma_segment_t seg; 1517 int error, rseg; 1518 1519 /* 1520 * Allocate the control data structure, and create and load the 1521 * DMA map for it. 1522 */ 1523 if ((error = bus_dmamem_alloc(sc->dmat, 1524 sizeof(struct auich_cdata), 1525 PAGE_SIZE, 0, &seg, 1, &rseg, 0)) != 0) { 1526 aprint_error_dev(sc->sc_dev, "unable to allocate control data, error = %d\n", error); 1527 goto fail_0; 1528 } 1529 1530 if ((error = bus_dmamem_map(sc->dmat, &seg, rseg, 1531 sizeof(struct auich_cdata), 1532 (void **) &sc->sc_cdata, 1533 sc->sc_dmamap_flags)) != 0) { 1534 aprint_error_dev(sc->sc_dev, "unable to map control data, error = %d\n", error); 1535 goto fail_1; 1536 } 1537 1538 if ((error = bus_dmamap_create(sc->dmat, sizeof(struct auich_cdata), 1, 1539 sizeof(struct auich_cdata), 0, 0, 1540 &sc->sc_cddmamap)) != 0) { 1541 aprint_error_dev(sc->sc_dev, "unable to create control data DMA map, " 1542 "error = %d\n", error); 1543 goto fail_2; 1544 } 1545 1546 if ((error = bus_dmamap_load(sc->dmat, sc->sc_cddmamap, 1547 sc->sc_cdata, sizeof(struct auich_cdata), 1548 NULL, 0)) != 0) { 1549 aprint_error_dev(sc->sc_dev, "unable tp load control data DMA map, " 1550 "error = %d\n", error); 1551 goto fail_3; 1552 } 1553 1554 sc->pcmo.dmalist = sc->sc_cdata->ic_dmalist_pcmo; 1555 sc->pcmi.dmalist = sc->sc_cdata->ic_dmalist_pcmi; 1556 sc->mici.dmalist = sc->sc_cdata->ic_dmalist_mici; 1557 1558 return 0; 1559 1560 fail_3: 1561 bus_dmamap_destroy(sc->dmat, sc->sc_cddmamap); 1562 fail_2: 1563 bus_dmamem_unmap(sc->dmat, (void *) sc->sc_cdata, 1564 sizeof(struct auich_cdata)); 1565 fail_1: 1566 bus_dmamem_free(sc->dmat, &seg, rseg); 1567 fail_0: 1568 return error; 1569 } 1570 1571 static bool 1572 auich_resume(device_t dv, pmf_qual_t qual) 1573 { 1574 struct auich_softc *sc = device_private(dv); 1575 pcireg_t v; 1576 1577 if (sc->sc_iose) { 1578 v = pci_conf_read(sc->sc_pc, sc->sc_pt, ICH_CFG); 1579 pci_conf_write(sc->sc_pc, sc->sc_pt, ICH_CFG, 1580 v | ICH_CFG_IOSE); 1581 } 1582 1583 auich_reset_codec(sc); 1584 DELAY(1000); 1585 (sc->codec_if->vtbl->restore_ports)(sc->codec_if); 1586 1587 return true; 1588 } 1589 1590 /* 1591 * Calibrate card (some boards are overclocked and need scaling) 1592 */ 1593 static void 1594 auich_calibrate(struct auich_softc *sc) 1595 { 1596 struct timeval t1, t2; 1597 uint8_t ociv, nciv; 1598 uint64_t wait_us; 1599 uint32_t actual_48k_rate, bytes, ac97rate; 1600 void *temp_buffer; 1601 struct auich_dma *p; 1602 u_int rate; 1603 1604 /* 1605 * Grab audio from input for fixed interval and compare how 1606 * much we actually get with what we expect. Interval needs 1607 * to be sufficiently short that no interrupts are 1608 * generated. 1609 */ 1610 1611 /* Force the codec to a known state first. */ 1612 sc->codec_if->vtbl->set_clock(sc->codec_if, 48000); 1613 rate = sc->sc_ac97_clock = 48000; 1614 sc->codec_if->vtbl->set_rate(sc->codec_if, AC97_REG_PCM_LR_ADC_RATE, 1615 &rate); 1616 1617 /* Setup a buffer */ 1618 bytes = 64000; 1619 temp_buffer = auich_allocm(sc, AUMODE_RECORD, bytes, M_DEVBUF, M_WAITOK); 1620 1621 for (p = sc->sc_dmas; p && KERNADDR(p) != temp_buffer; p = p->next) 1622 continue; 1623 if (p == NULL) { 1624 printf("auich_calibrate: bad address %p\n", temp_buffer); 1625 return; 1626 } 1627 sc->pcmi.dmalist[0].base = DMAADDR(p); 1628 sc->pcmi.dmalist[0].len = (bytes >> sc->sc_sample_shift); 1629 1630 /* 1631 * our data format is stereo, 16 bit so each sample is 4 bytes. 1632 * assuming we get 48000 samples per second, we get 192000 bytes/sec. 1633 * we're going to start recording with interrupts disabled and measure 1634 * the time taken for one block to complete. we know the block size, 1635 * we know the time in microseconds, we calculate the sample rate: 1636 * 1637 * actual_rate [bps] = bytes / (time [s] * 4) 1638 * actual_rate [bps] = (bytes * 1000000) / (time [us] * 4) 1639 * actual_rate [Hz] = (bytes * 250000) / time [us] 1640 */ 1641 1642 /* prepare */ 1643 ociv = bus_space_read_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CIV); 1644 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_BDBAR, 1645 sc->sc_cddma + ICH_PCMI_OFF(0)); 1646 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_LVI, 1647 (0 - 1) & ICH_LVI_MASK); 1648 1649 /* start */ 1650 microtime(&t1); 1651 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, ICH_RPBM); 1652 1653 /* wait */ 1654 nciv = ociv; 1655 do { 1656 microtime(&t2); 1657 if (t2.tv_sec - t1.tv_sec > 1) 1658 break; 1659 nciv = bus_space_read_1(sc->iot, sc->aud_ioh, 1660 ICH_PCMI + ICH_CIV); 1661 } while (nciv == ociv); 1662 microtime(&t2); 1663 1664 /* stop */ 1665 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, 0); 1666 1667 /* reset */ 1668 DELAY(100); 1669 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, ICH_RR); 1670 1671 /* turn time delta into us */ 1672 wait_us = ((t2.tv_sec - t1.tv_sec) * 1000000) + t2.tv_usec - t1.tv_usec; 1673 1674 auich_freem(sc, temp_buffer, M_DEVBUF); 1675 1676 if (nciv == ociv) { 1677 printf("%s: ac97 link rate calibration timed out after %" 1678 PRIu64 " us\n", device_xname(sc->sc_dev), wait_us); 1679 return; 1680 } 1681 1682 actual_48k_rate = (bytes * UINT64_C(250000)) / wait_us; 1683 1684 if (actual_48k_rate < 50000) 1685 ac97rate = 48000; 1686 else 1687 ac97rate = ((actual_48k_rate + 500) / 1000) * 1000; 1688 1689 printf("%s: measured ac97 link rate at %d Hz", 1690 device_xname(sc->sc_dev), actual_48k_rate); 1691 if (ac97rate != actual_48k_rate) 1692 printf(", will use %d Hz", ac97rate); 1693 printf("\n"); 1694 1695 sc->sc_ac97_clock = ac97rate; 1696 } 1697 1698 static void 1699 auich_clear_cas(struct auich_softc *sc) 1700 { 1701 /* Clear the codec access semaphore */ 1702 (void)bus_space_read_2(sc->iot, sc->mix_ioh, 1703 AC97_REG_RESET * (sc->sc_codecnum * ICH_CODEC_OFFSET)); 1704 1705 return; 1706 } 1707
Indexes created Thu Oct 23 22:10:10 GMT 2025