auich.c revision 1.138
1 /* $NetBSD: auich.c,v 1.138 2010/11/13 13:52:05 uebayasi Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2004, 2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Copyright (c) 2000 Michael Shalayeff 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. The name of the author may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 51 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 52 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 53 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 55 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 56 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 57 * THE POSSIBILITY OF SUCH DAMAGE. 58 * 59 * from OpenBSD: ich.c,v 1.3 2000/08/11 06:17:18 mickey Exp 60 */ 61 62 /* 63 * Copyright (c) 2000 Katsurajima Naoto <raven (at) katsurajima.seya.yokohama.jp> 64 * Copyright (c) 2001 Cameron Grant <cg (at) freebsd.org> 65 * All rights reserved. 66 * 67 * Redistribution and use in source and binary forms, with or without 68 * modification, are permitted provided that the following conditions 69 * are met: 70 * 1. Redistributions of source code must retain the above copyright 71 * notice, this list of conditions and the following disclaimer. 72 * 2. Redistributions in binary form must reproduce the above copyright 73 * notice, this list of conditions and the following disclaimer in the 74 * documentation and/or other materials provided with the distribution. 75 * 76 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 77 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 78 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 79 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 80 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 81 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 82 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 83 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 84 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 85 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF 86 * SUCH DAMAGE. 87 * 88 * auich_calibrate() was from FreeBSD: ich.c,v 1.22 2002/06/27 22:36:01 scottl Exp 89 */ 90 91 92 /* #define AUICH_DEBUG */ 93 /* 94 * AC'97 audio found on Intel 810/820/440MX chipsets. 95 * http://developer.intel.com/design/chipsets/datashts/290655.htm 96 * http://developer.intel.com/design/chipsets/manuals/298028.htm 97 * ICH3:http://www.intel.com/design/chipsets/datashts/290716.htm 98 * ICH4:http://www.intel.com/design/chipsets/datashts/290744.htm 99 * ICH5:http://www.intel.com/design/chipsets/datashts/252516.htm 100 * AMD8111: 101 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/24674.pdf 102 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25720.pdf 103 * 104 * TODO: 105 * - Add support for the dedicated microphone input. 106 * 107 * NOTE: 108 * - The 440MX B-stepping at running 100MHz has a hardware erratum. 109 * It causes PCI master abort and hangups until cold reboot. 110 * http://www.intel.com/design/chipsets/specupdt/245051.htm 111 */ 112 113 #include <sys/cdefs.h> 114 __KERNEL_RCSID(0, "$NetBSD: auich.c,v 1.138 2010/11/13 13:52:05 uebayasi Exp $"); 115 116 #include <sys/param.h> 117 #include <sys/systm.h> 118 #include <sys/kernel.h> 119 #include <sys/malloc.h> 120 #include <sys/device.h> 121 #include <sys/fcntl.h> 122 #include <sys/proc.h> 123 #include <sys/sysctl.h> 124 125 #include <dev/pci/pcidevs.h> 126 #include <dev/pci/pcivar.h> 127 #include <dev/pci/auichreg.h> 128 129 #include <sys/audioio.h> 130 #include <dev/audio_if.h> 131 #include <dev/mulaw.h> 132 #include <dev/auconv.h> 133 134 #include <sys/bus.h> 135 136 #include <dev/ic/ac97reg.h> 137 #include <dev/ic/ac97var.h> 138 139 struct auich_dma { 140 bus_dmamap_t map; 141 void *addr; 142 bus_dma_segment_t segs[1]; 143 int nsegs; 144 size_t size; 145 struct auich_dma *next; 146 }; 147 148 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 149 #define KERNADDR(p) ((void *)((p)->addr)) 150 151 struct auich_cdata { 152 struct auich_dmalist ic_dmalist_pcmo[ICH_DMALIST_MAX]; 153 struct auich_dmalist ic_dmalist_pcmi[ICH_DMALIST_MAX]; 154 struct auich_dmalist ic_dmalist_mici[ICH_DMALIST_MAX]; 155 }; 156 157 #define ICH_CDOFF(x) offsetof(struct auich_cdata, x) 158 #define ICH_PCMO_OFF(x) ICH_CDOFF(ic_dmalist_pcmo[(x)]) 159 #define ICH_PCMI_OFF(x) ICH_CDOFF(ic_dmalist_pcmi[(x)]) 160 #define ICH_MICI_OFF(x) ICH_CDOFF(ic_dmalist_mici[(x)]) 161 162 struct auich_softc { 163 device_t sc_dev; 164 void *sc_ih; 165 166 device_t sc_audiodev; 167 audio_device_t sc_audev; 168 169 pci_chipset_tag_t sc_pc; 170 pcitag_t sc_pt; 171 bus_space_tag_t iot; 172 bus_space_handle_t mix_ioh; 173 bus_size_t mix_size; 174 bus_space_handle_t aud_ioh; 175 bus_size_t aud_size; 176 bus_dma_tag_t dmat; 177 pci_intr_handle_t intrh; 178 179 struct ac97_codec_if *codec_if; 180 struct ac97_host_if host_if; 181 int sc_codecnum; 182 int sc_codectype; 183 enum ac97_host_flags sc_codecflags; 184 bool sc_spdif; 185 186 /* multi-channel control bits */ 187 int sc_pcm246_mask; 188 int sc_pcm2; 189 int sc_pcm4; 190 int sc_pcm6; 191 192 /* DMA scatter-gather lists. */ 193 bus_dmamap_t sc_cddmamap; 194 #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr 195 196 struct auich_cdata *sc_cdata; 197 198 struct auich_ring { 199 int qptr; 200 struct auich_dmalist *dmalist; 201 202 uint32_t start, p, end; 203 int blksize; 204 205 void (*intr)(void *); 206 void *arg; 207 } pcmo, pcmi, mici; 208 209 struct auich_dma *sc_dmas; 210 211 /* SiS 7012 hack */ 212 int sc_sample_shift; 213 int sc_sts_reg; 214 /* 440MX workaround */ 215 int sc_dmamap_flags; 216 /* flags */ 217 int sc_iose :1, 218 :31; 219 220 /* sysctl */ 221 struct sysctllog *sc_log; 222 uint32_t sc_ac97_clock; 223 int sc_ac97_clock_mib; 224 225 int sc_modem_offset; 226 227 #define AUICH_AUDIO_NFORMATS 3 228 #define AUICH_MODEM_NFORMATS 1 229 struct audio_format sc_audio_formats[AUICH_AUDIO_NFORMATS]; 230 struct audio_format sc_modem_formats[AUICH_MODEM_NFORMATS]; 231 struct audio_encoding_set *sc_encodings; 232 struct audio_encoding_set *sc_spdif_encodings; 233 }; 234 235 /* Debug */ 236 #ifdef AUICH_DEBUG 237 #define DPRINTF(l,x) do { if (auich_debug & (l)) printf x; } while(0) 238 int auich_debug = 0xfffe; 239 #define ICH_DEBUG_CODECIO 0x0001 240 #define ICH_DEBUG_DMA 0x0002 241 #define ICH_DEBUG_INTR 0x0004 242 #else 243 #define DPRINTF(x,y) /* nothing */ 244 #endif 245 246 static int auich_match(device_t, cfdata_t, void *); 247 static void auich_attach(device_t, device_t, void *); 248 static int auich_detach(device_t, int); 249 static void auich_childdet(device_t, device_t); 250 static int auich_intr(void *); 251 252 CFATTACH_DECL2_NEW(auich, sizeof(struct auich_softc), 253 auich_match, auich_attach, auich_detach, NULL, NULL, auich_childdet); 254 255 static int auich_open(void *, int); 256 static void auich_close(void *); 257 static int auich_query_encoding(void *, struct audio_encoding *); 258 static int auich_set_params(void *, int, int, audio_params_t *, 259 audio_params_t *, stream_filter_list_t *, 260 stream_filter_list_t *); 261 static int auich_round_blocksize(void *, int, int, const audio_params_t *); 262 static void auich_halt_pipe(struct auich_softc *, int); 263 static int auich_halt_output(void *); 264 static int auich_halt_input(void *); 265 static int auich_getdev(void *, struct audio_device *); 266 static int auich_set_port(void *, mixer_ctrl_t *); 267 static int auich_get_port(void *, mixer_ctrl_t *); 268 static int auich_query_devinfo(void *, mixer_devinfo_t *); 269 static void *auich_allocm(void *, int, size_t, struct malloc_type *, int); 270 static void auich_freem(void *, void *, struct malloc_type *); 271 static size_t auich_round_buffersize(void *, int, size_t); 272 static paddr_t auich_mappage(void *, void *, off_t, int); 273 static int auich_get_props(void *); 274 static void auich_trigger_pipe(struct auich_softc *, int, struct auich_ring *); 275 static void auich_intr_pipe(struct auich_softc *, int, struct auich_ring *); 276 static int auich_trigger_output(void *, void *, void *, int, 277 void (*)(void *), void *, const audio_params_t *); 278 static int auich_trigger_input(void *, void *, void *, int, 279 void (*)(void *), void *, const audio_params_t *); 280 static int auich_powerstate(void *, int); 281 282 static int auich_alloc_cdata(struct auich_softc *); 283 284 static int auich_allocmem(struct auich_softc *, size_t, size_t, 285 struct auich_dma *); 286 static int auich_freemem(struct auich_softc *, struct auich_dma *); 287 288 static bool auich_resume(device_t, const pmf_qual_t *); 289 static int auich_set_rate(struct auich_softc *, int, u_long); 290 static int auich_sysctl_verify(SYSCTLFN_ARGS); 291 static void auich_finish_attach(device_t); 292 static void auich_calibrate(struct auich_softc *); 293 static void auich_clear_cas(struct auich_softc *); 294 295 static int auich_attach_codec(void *, struct ac97_codec_if *); 296 static int auich_read_codec(void *, uint8_t, uint16_t *); 297 static int auich_write_codec(void *, uint8_t, uint16_t); 298 static int auich_reset_codec(void *); 299 static enum ac97_host_flags auich_flags_codec(void *); 300 static void auich_spdif_event(void *, bool); 301 302 static const struct audio_hw_if auich_hw_if = { 303 auich_open, 304 auich_close, 305 NULL, /* drain */ 306 auich_query_encoding, 307 auich_set_params, 308 auich_round_blocksize, 309 NULL, /* commit_setting */ 310 NULL, /* init_output */ 311 NULL, /* init_input */ 312 NULL, /* start_output */ 313 NULL, /* start_input */ 314 auich_halt_output, 315 auich_halt_input, 316 NULL, /* speaker_ctl */ 317 auich_getdev, 318 NULL, /* getfd */ 319 auich_set_port, 320 auich_get_port, 321 auich_query_devinfo, 322 auich_allocm, 323 auich_freem, 324 auich_round_buffersize, 325 auich_mappage, 326 auich_get_props, 327 auich_trigger_output, 328 auich_trigger_input, 329 NULL, /* dev_ioctl */ 330 auich_powerstate, 331 }; 332 333 #define AUICH_FORMATS_1CH 0 334 #define AUICH_FORMATS_4CH 1 335 #define AUICH_FORMATS_6CH 2 336 static const struct audio_format auich_audio_formats[AUICH_AUDIO_NFORMATS] = { 337 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 338 2, AUFMT_STEREO, 0, {8000, 48000}}, 339 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 340 4, AUFMT_SURROUND4, 0, {8000, 48000}}, 341 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 342 6, AUFMT_DOLBY_5_1, 0, {8000, 48000}}, 343 }; 344 345 #define AUICH_SPDIF_NFORMATS 1 346 static const struct audio_format auich_spdif_formats[AUICH_SPDIF_NFORMATS] = { 347 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 348 2, AUFMT_STEREO, 1, {48000}}, 349 }; 350 351 static const struct audio_format auich_modem_formats[AUICH_MODEM_NFORMATS] = { 352 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 353 1, AUFMT_MONAURAL, 0, {8000, 16000}}, 354 }; 355 356 #define PCI_ID_CODE0(v, p) PCI_ID_CODE(PCI_VENDOR_##v, PCI_PRODUCT_##v##_##p) 357 #define PCIID_ICH PCI_ID_CODE0(INTEL, 82801AA_ACA) 358 #define PCIID_ICH0 PCI_ID_CODE0(INTEL, 82801AB_ACA) 359 #define PCIID_ICH2 PCI_ID_CODE0(INTEL, 82801BA_ACA) 360 #define PCIID_440MX PCI_ID_CODE0(INTEL, 82440MX_ACA) 361 #define PCIID_ICH3 PCI_ID_CODE0(INTEL, 82801CA_AC) 362 #define PCIID_ICH4 PCI_ID_CODE0(INTEL, 82801DB_AC) 363 #define PCIID_ICH5 PCI_ID_CODE0(INTEL, 82801EB_AC) 364 #define PCIID_ICH6 PCI_ID_CODE0(INTEL, 82801FB_AC) 365 #define PCIID_ICH7 PCI_ID_CODE0(INTEL, 82801G_ACA) 366 #define PCIID_I6300ESB PCI_ID_CODE0(INTEL, 6300ESB_ACA) 367 #define PCIID_SIS7012 PCI_ID_CODE0(SIS, 7012_AC) 368 #define PCIID_NFORCE PCI_ID_CODE0(NVIDIA, NFORCE_MCP_AC) 369 #define PCIID_NFORCE2 PCI_ID_CODE0(NVIDIA, NFORCE2_MCPT_AC) 370 #define PCIID_NFORCE2_400 PCI_ID_CODE0(NVIDIA, NFORCE2_400_MCPT_AC) 371 #define PCIID_NFORCE3 PCI_ID_CODE0(NVIDIA, NFORCE3_MCPT_AC) 372 #define PCIID_NFORCE3_250 PCI_ID_CODE0(NVIDIA, NFORCE3_250_MCPT_AC) 373 #define PCIID_NFORCE4 PCI_ID_CODE0(NVIDIA, NFORCE4_AC) 374 #define PCIID_NFORCE430 PCI_ID_CODE0(NVIDIA, NFORCE430_AC) 375 #define PCIID_AMD768 PCI_ID_CODE0(AMD, PBC768_AC) 376 #define PCIID_AMD8111 PCI_ID_CODE0(AMD, PBC8111_AC) 377 378 #define PCIID_ICH3MODEM PCI_ID_CODE0(INTEL, 82801CA_MOD) 379 #define PCIID_ICH4MODEM PCI_ID_CODE0(INTEL, 82801DB_MOD) 380 #define PCIID_ICH6MODEM PCI_ID_CODE0(INTEL, 82801FB_ACM) 381 382 struct auich_devtype { 383 pcireg_t id; 384 const char *name; 385 const char *shortname; /* must be less than 11 characters */ 386 }; 387 388 static const struct auich_devtype auich_audio_devices[] = { 389 { PCIID_ICH, "i82801AA (ICH) AC-97 Audio", "ICH" }, 390 { PCIID_ICH0, "i82801AB (ICH0) AC-97 Audio", "ICH0" }, 391 { PCIID_ICH2, "i82801BA (ICH2) AC-97 Audio", "ICH2" }, 392 { PCIID_440MX, "i82440MX AC-97 Audio", "440MX" }, 393 { PCIID_ICH3, "i82801CA (ICH3) AC-97 Audio", "ICH3" }, 394 { PCIID_ICH4, "i82801DB/DBM (ICH4/ICH4M) AC-97 Audio", "ICH4" }, 395 { PCIID_ICH5, "i82801EB (ICH5) AC-97 Audio", "ICH5" }, 396 { PCIID_ICH6, "i82801FB (ICH6) AC-97 Audio", "ICH6" }, 397 { PCIID_ICH7, "i82801GB/GR (ICH7) AC-97 Audio", "ICH7" }, 398 { PCIID_I6300ESB, "Intel 6300ESB AC-97 Audio", "I6300ESB" }, 399 { PCIID_SIS7012, "SiS 7012 AC-97 Audio", "SiS7012" }, 400 { PCIID_NFORCE, "nForce MCP AC-97 Audio", "nForce" }, 401 { PCIID_NFORCE2, "nForce2 MCP-T AC-97 Audio", "nForce2" }, 402 { PCIID_NFORCE2_400, "nForce2 400 MCP-T AC-97 Audio", "nForce2" }, 403 { PCIID_NFORCE3, "nForce3 MCP-T AC-97 Audio", "nForce3" }, 404 { PCIID_NFORCE3_250, "nForce3 250 MCP-T AC-97 Audio", "nForce3" }, 405 { PCIID_NFORCE4, "nForce4 AC-97 Audio", "nForce4" }, 406 { PCIID_NFORCE430, "nForce430 (MCP51) AC-97 Audio", "nForce430" }, 407 { PCIID_AMD768, "AMD768 AC-97 Audio", "AMD768" }, 408 { PCIID_AMD8111,"AMD8111 AC-97 Audio", "AMD8111" }, 409 { 0, NULL, NULL }, 410 }; 411 412 static const struct auich_devtype auich_modem_devices[] = { 413 #ifdef AUICH_ATTACH_MODEM 414 { PCIID_ICH3MODEM, "i82801CA (ICH3) AC-97 Modem", "ICH3MODEM" }, 415 { PCIID_ICH4MODEM, "i82801DB (ICH4) AC-97 Modem", "ICH4MODEM" }, 416 { PCIID_ICH6MODEM, "i82801FB (ICH6) AC-97 Modem", "ICH6MODEM" }, 417 #endif 418 { 0, NULL, NULL }, 419 }; 420 421 static const struct auich_devtype * 422 auich_lookup(struct pci_attach_args *pa, const struct auich_devtype *auich_devices) 423 { 424 const struct auich_devtype *d; 425 426 for (d = auich_devices; d->name != NULL; d++) { 427 if (pa->pa_id == d->id) 428 return d; 429 } 430 431 return NULL; 432 } 433 434 static int 435 auich_match(device_t parent, cfdata_t match, void *aux) 436 { 437 struct pci_attach_args *pa; 438 439 pa = aux; 440 if (auich_lookup(pa, auich_audio_devices) != NULL) 441 return 1; 442 if (auich_lookup(pa, auich_modem_devices) != NULL) 443 return 1; 444 445 return 0; 446 } 447 448 static void 449 auich_attach(device_t parent, device_t self, void *aux) 450 { 451 struct auich_softc *sc = device_private(self); 452 struct pci_attach_args *pa; 453 pcireg_t v, subdev; 454 const char *intrstr; 455 const struct auich_devtype *d; 456 const struct sysctlnode *node, *node_ac97clock; 457 int err, node_mib, i; 458 459 sc->sc_dev = self; 460 pa = aux; 461 462 if ((d = auich_lookup(pa, auich_modem_devices)) != NULL) { 463 sc->sc_modem_offset = 0x10; 464 sc->sc_codectype = AC97_CODEC_TYPE_MODEM; 465 } else if ((d = auich_lookup(pa, auich_audio_devices)) != NULL) { 466 sc->sc_modem_offset = 0; 467 sc->sc_codectype = AC97_CODEC_TYPE_AUDIO; 468 } else 469 panic("auich_attach: impossible"); 470 471 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 472 aprint_naive(": Audio controller\n"); 473 else 474 aprint_naive(": Modem controller\n"); 475 476 sc->sc_pc = pa->pa_pc; 477 sc->sc_pt = pa->pa_tag; 478 479 aprint_normal(": %s\n", d->name); 480 481 if (d->id == PCIID_ICH4 || d->id == PCIID_ICH5 || d->id == PCIID_ICH6 482 || d->id == PCIID_ICH7 || d->id == PCIID_I6300ESB 483 || d->id == PCIID_ICH4MODEM) { 484 /* 485 * Use native mode for Intel 6300ESB and ICH4/ICH5/ICH6/ICH7 486 */ 487 488 if (pci_mapreg_map(pa, ICH_MMBAR, PCI_MAPREG_TYPE_MEM, 0, 489 &sc->iot, &sc->mix_ioh, NULL, &sc->mix_size)) { 490 goto retry_map; 491 } 492 if (pci_mapreg_map(pa, ICH_MBBAR, PCI_MAPREG_TYPE_MEM, 0, 493 &sc->iot, &sc->aud_ioh, NULL, &sc->aud_size)) { 494 goto retry_map; 495 } 496 goto map_done; 497 } else 498 goto non_native_map; 499 500 retry_map: 501 sc->sc_iose = 1; 502 v = pci_conf_read(pa->pa_pc, pa->pa_tag, ICH_CFG); 503 pci_conf_write(pa->pa_pc, pa->pa_tag, ICH_CFG, 504 v | ICH_CFG_IOSE); 505 506 non_native_map: 507 if (pci_mapreg_map(pa, ICH_NAMBAR, PCI_MAPREG_TYPE_IO, 0, 508 &sc->iot, &sc->mix_ioh, NULL, &sc->mix_size)) { 509 aprint_error_dev(self, "can't map codec i/o space\n"); 510 return; 511 } 512 if (pci_mapreg_map(pa, ICH_NABMBAR, PCI_MAPREG_TYPE_IO, 0, 513 &sc->iot, &sc->aud_ioh, NULL, &sc->aud_size)) { 514 aprint_error_dev(self, "can't map device i/o space\n"); 515 return; 516 } 517 518 map_done: 519 sc->dmat = pa->pa_dmat; 520 521 /* enable bus mastering */ 522 v = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 523 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 524 v | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_BACKTOBACK_ENABLE); 525 526 /* Map and establish the interrupt. */ 527 if (pci_intr_map(pa, &sc->intrh)) { 528 aprint_error_dev(self, "can't map interrupt\n"); 529 return; 530 } 531 intrstr = pci_intr_string(pa->pa_pc, sc->intrh); 532 sc->sc_ih = pci_intr_establish(pa->pa_pc, sc->intrh, IPL_AUDIO, 533 auich_intr, sc); 534 if (sc->sc_ih == NULL) { 535 aprint_error_dev(self, "can't establish interrupt"); 536 if (intrstr != NULL) 537 aprint_error(" at %s", intrstr); 538 aprint_error("\n"); 539 return; 540 } 541 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 542 543 snprintf(sc->sc_audev.name, MAX_AUDIO_DEV_LEN, "%s AC97", d->shortname); 544 snprintf(sc->sc_audev.version, MAX_AUDIO_DEV_LEN, 545 "0x%02x", PCI_REVISION(pa->pa_class)); 546 strlcpy(sc->sc_audev.config, device_xname(self), MAX_AUDIO_DEV_LEN); 547 548 /* SiS 7012 needs special handling */ 549 if (d->id == PCIID_SIS7012) { 550 sc->sc_sts_reg = ICH_PICB; 551 sc->sc_sample_shift = 0; 552 sc->sc_pcm246_mask = ICH_SIS_PCM246_MASK; 553 sc->sc_pcm2 = ICH_SIS_PCM2; 554 sc->sc_pcm4 = ICH_SIS_PCM4; 555 sc->sc_pcm6 = ICH_SIS_PCM6; 556 /* Un-mute output. From Linux. */ 557 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_SIS_NV_CTL, 558 bus_space_read_4(sc->iot, sc->aud_ioh, ICH_SIS_NV_CTL) | 559 ICH_SIS_CTL_UNMUTE); 560 } else { 561 sc->sc_sts_reg = ICH_STS; 562 sc->sc_sample_shift = 1; 563 sc->sc_pcm246_mask = ICH_PCM246_MASK; 564 sc->sc_pcm2 = ICH_PCM2; 565 sc->sc_pcm4 = ICH_PCM4; 566 sc->sc_pcm6 = ICH_PCM6; 567 } 568 569 /* Workaround for a 440MX B-stepping erratum */ 570 sc->sc_dmamap_flags = BUS_DMA_COHERENT; 571 if (d->id == PCIID_440MX) { 572 sc->sc_dmamap_flags |= BUS_DMA_NOCACHE; 573 aprint_normal_dev(self, "DMA bug workaround enabled\n"); 574 } 575 576 /* Set up DMA lists. */ 577 sc->pcmo.qptr = sc->pcmi.qptr = sc->mici.qptr = 0; 578 auich_alloc_cdata(sc); 579 580 DPRINTF(ICH_DEBUG_DMA, ("auich_attach: lists %p %p %p\n", 581 sc->pcmo.dmalist, sc->pcmi.dmalist, sc->mici.dmalist)); 582 583 /* Modem codecs are always the secondary codec on ICH */ 584 sc->sc_codecnum = sc->sc_codectype == AC97_CODEC_TYPE_MODEM ? 1 : 0; 585 586 sc->host_if.arg = sc; 587 sc->host_if.attach = auich_attach_codec; 588 sc->host_if.read = auich_read_codec; 589 sc->host_if.write = auich_write_codec; 590 sc->host_if.reset = auich_reset_codec; 591 sc->host_if.flags = auich_flags_codec; 592 sc->host_if.spdif_event = auich_spdif_event; 593 594 subdev = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 595 switch (subdev) { 596 case 0x202f161f: /* Gateway 7326GZ */ 597 case 0x203a161f: /* Gateway 4028GZ */ 598 case 0x204c161f: /* Kvazar-Micro Senator 3592XT */ 599 case 0x8144104d: /* Sony VAIO PCG-TR* */ 600 case 0x8197104d: /* Sony S1XP */ 601 case 0x81c0104d: /* Sony VAIO type T */ 602 case 0x81c5104d: /* Sony VAIO VGN-B1XP */ 603 sc->sc_codecflags = AC97_HOST_INVERTED_EAMP; 604 break; 605 default: 606 sc->sc_codecflags = 0; 607 break; 608 } 609 610 if (ac97_attach_type(&sc->host_if, self, sc->sc_codectype) != 0) 611 return; 612 sc->codec_if->vtbl->unlock(sc->codec_if); 613 614 /* setup audio_format */ 615 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 616 memcpy(sc->sc_audio_formats, auich_audio_formats, sizeof(auich_audio_formats)); 617 if (!AC97_IS_4CH(sc->codec_if)) 618 AUFMT_INVALIDATE(&sc->sc_audio_formats[AUICH_FORMATS_4CH]); 619 if (!AC97_IS_6CH(sc->codec_if)) 620 AUFMT_INVALIDATE(&sc->sc_audio_formats[AUICH_FORMATS_6CH]); 621 if (AC97_IS_FIXED_RATE(sc->codec_if)) { 622 for (i = 0; i < AUICH_AUDIO_NFORMATS; i++) { 623 sc->sc_audio_formats[i].frequency_type = 1; 624 sc->sc_audio_formats[i].frequency[0] = 48000; 625 } 626 } 627 if (0 != auconv_create_encodings(sc->sc_audio_formats, AUICH_AUDIO_NFORMATS, 628 &sc->sc_encodings)) 629 return; 630 if (0 != auconv_create_encodings(auich_spdif_formats, AUICH_SPDIF_NFORMATS, 631 &sc->sc_spdif_encodings)) 632 return; 633 } else { 634 memcpy(sc->sc_modem_formats, auich_modem_formats, sizeof(auich_modem_formats)); 635 if (0 != auconv_create_encodings(sc->sc_modem_formats, AUICH_MODEM_NFORMATS, 636 &sc->sc_encodings)) 637 return; 638 } 639 640 /* Watch for power change */ 641 if (!pmf_device_register(self, NULL, auich_resume)) 642 aprint_error_dev(self, "couldn't establish power handler\n"); 643 644 config_interrupts(self, auich_finish_attach); 645 646 /* sysctl setup */ 647 if (AC97_IS_FIXED_RATE(sc->codec_if) && 648 sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 649 return; 650 651 err = sysctl_createv(&sc->sc_log, 0, NULL, NULL, 0, 652 CTLTYPE_NODE, "hw", NULL, NULL, 0, NULL, 0, 653 CTL_HW, CTL_EOL); 654 if (err != 0) 655 goto sysctl_err; 656 err = sysctl_createv(&sc->sc_log, 0, NULL, &node, 0, 657 CTLTYPE_NODE, device_xname(self), NULL, NULL, 0, 658 NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 659 if (err != 0) 660 goto sysctl_err; 661 node_mib = node->sysctl_num; 662 663 if (!AC97_IS_FIXED_RATE(sc->codec_if)) { 664 /* passing the sc address instead of &sc->sc_ac97_clock */ 665 err = sysctl_createv(&sc->sc_log, 0, NULL, &node_ac97clock, 666 CTLFLAG_READWRITE, 667 CTLTYPE_INT, "ac97rate", 668 SYSCTL_DESCR("AC'97 codec link rate"), 669 auich_sysctl_verify, 0, sc, 0, 670 CTL_HW, node_mib, CTL_CREATE, CTL_EOL); 671 if (err != 0) 672 goto sysctl_err; 673 sc->sc_ac97_clock_mib = node_ac97clock->sysctl_num; 674 } 675 676 return; 677 678 sysctl_err: 679 printf("%s: failed to add sysctl nodes. (%d)\n", 680 device_xname(self), err); 681 return; /* failure of sysctl is not fatal. */ 682 } 683 684 static void 685 auich_childdet(device_t self, device_t child) 686 { 687 struct auich_softc *sc = device_private(self); 688 689 KASSERT(sc->sc_audiodev == child); 690 sc->sc_audiodev = NULL; 691 } 692 693 static int 694 auich_detach(device_t self, int flags) 695 { 696 struct auich_softc *sc = device_private(self); 697 698 /* audio */ 699 if (sc->sc_audiodev != NULL) 700 config_detach(sc->sc_audiodev, flags); 701 702 /* sysctl */ 703 sysctl_teardown(&sc->sc_log); 704 705 /* audio_encoding_set */ 706 auconv_delete_encodings(sc->sc_encodings); 707 auconv_delete_encodings(sc->sc_spdif_encodings); 708 709 /* ac97 */ 710 if (sc->codec_if != NULL) 711 sc->codec_if->vtbl->detach(sc->codec_if); 712 713 /* PCI */ 714 if (sc->sc_ih != NULL) 715 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 716 if (sc->mix_size != 0) 717 bus_space_unmap(sc->iot, sc->mix_ioh, sc->mix_size); 718 if (sc->aud_size != 0) 719 bus_space_unmap(sc->iot, sc->aud_ioh, sc->aud_size); 720 return 0; 721 } 722 723 static int 724 auich_sysctl_verify(SYSCTLFN_ARGS) 725 { 726 int error, tmp; 727 struct sysctlnode node; 728 struct auich_softc *sc; 729 730 node = *rnode; 731 sc = rnode->sysctl_data; 732 if (node.sysctl_num == sc->sc_ac97_clock_mib) { 733 tmp = sc->sc_ac97_clock; 734 node.sysctl_data = &tmp; 735 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 736 if (error || newp == NULL) 737 return error; 738 739 if (tmp < 48000 || tmp > 96000) 740 return EINVAL; 741 sc->sc_ac97_clock = tmp; 742 } 743 744 return 0; 745 } 746 747 static void 748 auich_finish_attach(device_t self) 749 { 750 struct auich_softc *sc = device_private(self); 751 752 if (!AC97_IS_FIXED_RATE(sc->codec_if)) 753 auich_calibrate(sc); 754 755 sc->sc_audiodev = audio_attach_mi(&auich_hw_if, sc, sc->sc_dev); 756 757 return; 758 } 759 760 #define ICH_CODECIO_INTERVAL 10 761 static int 762 auich_read_codec(void *v, uint8_t reg, uint16_t *val) 763 { 764 struct auich_softc *sc; 765 int i; 766 uint32_t status; 767 768 sc = v; 769 /* wait for an access semaphore */ 770 for (i = ICH_SEMATIMO / ICH_CODECIO_INTERVAL; i-- && 771 bus_space_read_1(sc->iot, sc->aud_ioh, 772 ICH_CAS + sc->sc_modem_offset) & 1; 773 DELAY(ICH_CODECIO_INTERVAL)); 774 775 if (i > 0) { 776 *val = bus_space_read_2(sc->iot, sc->mix_ioh, 777 reg + (sc->sc_codecnum * ICH_CODEC_OFFSET)); 778 DPRINTF(ICH_DEBUG_CODECIO, 779 ("auich_read_codec(%x, %x)\n", reg, *val)); 780 status = bus_space_read_4(sc->iot, sc->aud_ioh, 781 ICH_GSTS + sc->sc_modem_offset); 782 if (status & ICH_RCS) { 783 bus_space_write_4(sc->iot, sc->aud_ioh, 784 ICH_GSTS + sc->sc_modem_offset, 785 status & ~(ICH_SRI|ICH_PRI|ICH_GSCI)); 786 *val = 0xffff; 787 DPRINTF(ICH_DEBUG_CODECIO, 788 ("%s: read_codec error\n", device_xname(sc->sc_dev))); 789 if (reg == AC97_REG_GPIO_STATUS) 790 auich_clear_cas(sc); 791 return -1; 792 } 793 if (reg == AC97_REG_GPIO_STATUS) 794 auich_clear_cas(sc); 795 return 0; 796 } else { 797 aprint_normal_dev(sc->sc_dev, "read_codec timeout\n"); 798 if (reg == AC97_REG_GPIO_STATUS) 799 auich_clear_cas(sc); 800 return -1; 801 } 802 } 803 804 static int 805 auich_write_codec(void *v, uint8_t reg, uint16_t val) 806 { 807 struct auich_softc *sc; 808 int i; 809 810 DPRINTF(ICH_DEBUG_CODECIO, ("auich_write_codec(%x, %x)\n", reg, val)); 811 sc = v; 812 /* wait for an access semaphore */ 813 for (i = ICH_SEMATIMO / ICH_CODECIO_INTERVAL; i-- && 814 bus_space_read_1(sc->iot, sc->aud_ioh, 815 ICH_CAS + sc->sc_modem_offset) & 1; 816 DELAY(ICH_CODECIO_INTERVAL)); 817 818 if (i > 0) { 819 bus_space_write_2(sc->iot, sc->mix_ioh, 820 reg + (sc->sc_codecnum * ICH_CODEC_OFFSET), val); 821 return 0; 822 } else { 823 aprint_normal_dev(sc->sc_dev, "write_codec timeout\n"); 824 return -1; 825 } 826 } 827 828 static int 829 auich_attach_codec(void *v, struct ac97_codec_if *cif) 830 { 831 struct auich_softc *sc; 832 833 sc = v; 834 sc->codec_if = cif; 835 836 return 0; 837 } 838 839 static int 840 auich_reset_codec(void *v) 841 { 842 struct auich_softc *sc; 843 int i; 844 uint32_t control, status; 845 846 sc = v; 847 control = bus_space_read_4(sc->iot, sc->aud_ioh, 848 ICH_GCTRL + sc->sc_modem_offset); 849 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 850 control &= ~(ICH_ACLSO | sc->sc_pcm246_mask); 851 } else { 852 control &= ~ICH_ACLSO; 853 control |= ICH_GIE; 854 } 855 control |= (control & ICH_CRESET) ? ICH_WRESET : ICH_CRESET; 856 bus_space_write_4(sc->iot, sc->aud_ioh, 857 ICH_GCTRL + sc->sc_modem_offset, control); 858 859 for (i = 500000; i >= 0; i--) { 860 status = bus_space_read_4(sc->iot, sc->aud_ioh, 861 ICH_GSTS + sc->sc_modem_offset); 862 if (status & (ICH_PCR | ICH_SCR | ICH_S2CR)) 863 break; 864 DELAY(1); 865 } 866 if (i <= 0) { 867 aprint_error_dev(sc->sc_dev, "auich_reset_codec: time out\n"); 868 return ETIMEDOUT; 869 } 870 #ifdef AUICH_DEBUG 871 if (status & ICH_SCR) 872 printf("%s: The 2nd codec is ready.\n", 873 device_xname(sc->sc_dev)); 874 if (status & ICH_S2CR) 875 printf("%s: The 3rd codec is ready.\n", 876 device_xname(sc->sc_dev)); 877 #endif 878 return 0; 879 } 880 881 static enum ac97_host_flags 882 auich_flags_codec(void *v) 883 { 884 struct auich_softc *sc = v; 885 return sc->sc_codecflags; 886 } 887 888 static void 889 auich_spdif_event(void *addr, bool flag) 890 { 891 struct auich_softc *sc; 892 893 sc = addr; 894 sc->sc_spdif = flag; 895 } 896 897 static int 898 auich_open(void *addr, int flags) 899 { 900 struct auich_softc *sc; 901 902 sc = (struct auich_softc *)addr; 903 sc->codec_if->vtbl->lock(sc->codec_if); 904 return 0; 905 } 906 907 static void 908 auich_close(void *addr) 909 { 910 struct auich_softc *sc; 911 912 sc = (struct auich_softc *)addr; 913 sc->codec_if->vtbl->unlock(sc->codec_if); 914 } 915 916 static int 917 auich_query_encoding(void *v, struct audio_encoding *aep) 918 { 919 struct auich_softc *sc; 920 921 sc = (struct auich_softc *)v; 922 return auconv_query_encoding( 923 sc->sc_spdif ? sc->sc_spdif_encodings : sc->sc_encodings, aep); 924 } 925 926 static int 927 auich_set_rate(struct auich_softc *sc, int mode, u_long srate) 928 { 929 int ret; 930 u_int ratetmp; 931 932 sc->codec_if->vtbl->set_clock(sc->codec_if, sc->sc_ac97_clock); 933 ratetmp = srate; 934 if (mode == AUMODE_RECORD) 935 return sc->codec_if->vtbl->set_rate(sc->codec_if, 936 AC97_REG_PCM_LR_ADC_RATE, &ratetmp); 937 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 938 AC97_REG_PCM_FRONT_DAC_RATE, &ratetmp); 939 if (ret) 940 return ret; 941 ratetmp = srate; 942 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 943 AC97_REG_PCM_SURR_DAC_RATE, &ratetmp); 944 if (ret) 945 return ret; 946 ratetmp = srate; 947 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 948 AC97_REG_PCM_LFE_DAC_RATE, &ratetmp); 949 return ret; 950 } 951 952 static int 953 auich_set_params(void *v, int setmode, int usemode, 954 audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil, 955 stream_filter_list_t *rfil) 956 { 957 struct auich_softc *sc; 958 audio_params_t *p; 959 stream_filter_list_t *fil; 960 int mode, index; 961 uint32_t control; 962 963 sc = v; 964 for (mode = AUMODE_RECORD; mode != -1; 965 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 966 if ((setmode & mode) == 0) 967 continue; 968 969 p = mode == AUMODE_PLAY ? play : rec; 970 fil = mode == AUMODE_PLAY ? pfil : rfil; 971 if (p == NULL) 972 continue; 973 974 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 975 if (p->sample_rate < 8000 || 976 p->sample_rate > 48000) 977 return EINVAL; 978 979 if (!sc->sc_spdif) 980 index = auconv_set_converter(sc->sc_audio_formats, 981 AUICH_AUDIO_NFORMATS, mode, p, TRUE, fil); 982 else 983 index = auconv_set_converter(auich_spdif_formats, 984 AUICH_SPDIF_NFORMATS, mode, p, TRUE, fil); 985 } else { 986 if (p->sample_rate != 8000 && p->sample_rate != 16000) 987 return EINVAL; 988 index = auconv_set_converter(sc->sc_modem_formats, 989 AUICH_MODEM_NFORMATS, mode, p, TRUE, fil); 990 } 991 if (index < 0) 992 return EINVAL; 993 if (fil->req_size > 0) 994 p = &fil->filters[0].param; 995 /* p represents HW encoding */ 996 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 997 if (sc->sc_audio_formats[index].frequency_type != 1 998 && auich_set_rate(sc, mode, p->sample_rate)) 999 return EINVAL; 1000 } else { 1001 if (sc->sc_modem_formats[index].frequency_type != 1 1002 && auich_set_rate(sc, mode, p->sample_rate)) 1003 return EINVAL; 1004 auich_write_codec(sc, AC97_REG_LINE1_RATE, 1005 p->sample_rate); 1006 auich_write_codec(sc, AC97_REG_LINE1_LEVEL, 0); 1007 } 1008 if (mode == AUMODE_PLAY && 1009 sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 1010 control = bus_space_read_4(sc->iot, sc->aud_ioh, 1011 ICH_GCTRL + sc->sc_modem_offset); 1012 control &= ~sc->sc_pcm246_mask; 1013 if (p->channels == 4) { 1014 control |= sc->sc_pcm4; 1015 } else if (p->channels == 6) { 1016 control |= sc->sc_pcm6; 1017 } 1018 bus_space_write_4(sc->iot, sc->aud_ioh, 1019 ICH_GCTRL + sc->sc_modem_offset, control); 1020 } 1021 } 1022 1023 return 0; 1024 } 1025 1026 static int 1027 auich_round_blocksize(void *v, int blk, int mode, 1028 const audio_params_t *param) 1029 { 1030 1031 return blk & ~0x3f; /* keep good alignment */ 1032 } 1033 1034 static void 1035 auich_halt_pipe(struct auich_softc *sc, int pipe) 1036 { 1037 int i; 1038 uint32_t status; 1039 1040 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, 0); 1041 for (i = 0; i < 100; i++) { 1042 status = bus_space_read_4(sc->iot, sc->aud_ioh, pipe + ICH_STS); 1043 if (status & ICH_DCH) 1044 break; 1045 DELAY(1); 1046 } 1047 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, ICH_RR); 1048 1049 #if AUICH_DEBUG 1050 if (i > 0) 1051 printf("auich_halt_pipe: halt took %d cycles\n", i); 1052 #endif 1053 } 1054 1055 static int 1056 auich_halt_output(void *v) 1057 { 1058 struct auich_softc *sc; 1059 1060 sc = v; 1061 DPRINTF(ICH_DEBUG_DMA, ("%s: halt_output\n", device_xname(sc->sc_dev))); 1062 1063 auich_halt_pipe(sc, ICH_PCMO); 1064 sc->pcmo.intr = NULL; 1065 1066 return 0; 1067 } 1068 1069 static int 1070 auich_halt_input(void *v) 1071 { 1072 struct auich_softc *sc; 1073 1074 sc = v; 1075 DPRINTF(ICH_DEBUG_DMA, ("%s: halt_input\n", device_xname(sc->sc_dev))); 1076 1077 auich_halt_pipe(sc, ICH_PCMI); 1078 sc->pcmi.intr = NULL; 1079 1080 return 0; 1081 } 1082 1083 static int 1084 auich_getdev(void *v, struct audio_device *adp) 1085 { 1086 struct auich_softc *sc; 1087 1088 sc = v; 1089 *adp = sc->sc_audev; 1090 return 0; 1091 } 1092 1093 static int 1094 auich_set_port(void *v, mixer_ctrl_t *cp) 1095 { 1096 struct auich_softc *sc; 1097 1098 sc = v; 1099 return sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp); 1100 } 1101 1102 static int 1103 auich_get_port(void *v, mixer_ctrl_t *cp) 1104 { 1105 struct auich_softc *sc; 1106 1107 sc = v; 1108 return sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp); 1109 } 1110 1111 static int 1112 auich_query_devinfo(void *v, mixer_devinfo_t *dp) 1113 { 1114 struct auich_softc *sc; 1115 1116 sc = v; 1117 return sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp); 1118 } 1119 1120 static void * 1121 auich_allocm(void *v, int direction, size_t size, 1122 struct malloc_type *pool, int flags) 1123 { 1124 struct auich_softc *sc; 1125 struct auich_dma *p; 1126 int error; 1127 1128 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX)) 1129 return NULL; 1130 1131 p = malloc(sizeof(*p), pool, flags|M_ZERO); 1132 if (p == NULL) 1133 return NULL; 1134 1135 sc = v; 1136 error = auich_allocmem(sc, size, 0, p); 1137 if (error) { 1138 free(p, pool); 1139 return NULL; 1140 } 1141 1142 p->next = sc->sc_dmas; 1143 sc->sc_dmas = p; 1144 1145 return KERNADDR(p); 1146 } 1147 1148 static void 1149 auich_freem(void *v, void *ptr, struct malloc_type *pool) 1150 { 1151 struct auich_softc *sc; 1152 struct auich_dma *p, **pp; 1153 1154 sc = v; 1155 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 1156 if (KERNADDR(p) == ptr) { 1157 auich_freemem(sc, p); 1158 *pp = p->next; 1159 free(p, pool); 1160 return; 1161 } 1162 } 1163 } 1164 1165 static size_t 1166 auich_round_buffersize(void *v, int direction, size_t size) 1167 { 1168 1169 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX)) 1170 size = ICH_DMALIST_MAX * ICH_DMASEG_MAX; 1171 1172 return size; 1173 } 1174 1175 static paddr_t 1176 auich_mappage(void *v, void *mem, off_t off, int prot) 1177 { 1178 struct auich_softc *sc; 1179 struct auich_dma *p; 1180 1181 if (off < 0) 1182 return -1; 1183 sc = v; 1184 for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next) 1185 continue; 1186 if (!p) 1187 return -1; 1188 return bus_dmamem_mmap(sc->dmat, p->segs, p->nsegs, 1189 off, prot, BUS_DMA_WAITOK); 1190 } 1191 1192 static int 1193 auich_get_props(void *v) 1194 { 1195 struct auich_softc *sc; 1196 int props; 1197 1198 props = AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 1199 sc = v; 1200 /* 1201 * Even if the codec is fixed-rate, set_param() succeeds for any sample 1202 * rate because of aurateconv. Applications can't know what rate the 1203 * device can process in the case of mmap(). 1204 */ 1205 if (!AC97_IS_FIXED_RATE(sc->codec_if) || 1206 sc->sc_codectype == AC97_CODEC_TYPE_MODEM) 1207 props |= AUDIO_PROP_MMAP; 1208 return props; 1209 } 1210 1211 static int 1212 auich_intr(void *v) 1213 { 1214 struct auich_softc *sc; 1215 int ret, gsts; 1216 #ifdef DIAGNOSTIC 1217 int csts; 1218 #endif 1219 1220 sc = v; 1221 1222 if (!device_has_power(sc->sc_dev)) 1223 return (0); 1224 1225 ret = 0; 1226 #ifdef DIAGNOSTIC 1227 csts = pci_conf_read(sc->sc_pc, sc->sc_pt, PCI_COMMAND_STATUS_REG); 1228 if (csts & PCI_STATUS_MASTER_ABORT) { 1229 printf("auich_intr: PCI master abort\n"); 1230 } 1231 #endif 1232 1233 gsts = bus_space_read_4(sc->iot, sc->aud_ioh, 1234 ICH_GSTS + sc->sc_modem_offset); 1235 DPRINTF(ICH_DEBUG_INTR, ("auich_intr: gsts=0x%x\n", gsts)); 1236 1237 if ((sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_POINT) || 1238 (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_MOINT)) { 1239 int sts; 1240 1241 sts = bus_space_read_2(sc->iot, sc->aud_ioh, 1242 ICH_PCMO + sc->sc_sts_reg); 1243 DPRINTF(ICH_DEBUG_INTR, 1244 ("auich_intr: osts=0x%x\n", sts)); 1245 1246 if (sts & ICH_FIFOE) 1247 printf("%s: fifo underrun\n", device_xname(sc->sc_dev)); 1248 1249 if (sts & ICH_BCIS) 1250 auich_intr_pipe(sc, ICH_PCMO, &sc->pcmo); 1251 1252 /* int ack */ 1253 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMO + 1254 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE)); 1255 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 1256 bus_space_write_4(sc->iot, sc->aud_ioh, 1257 ICH_GSTS + sc->sc_modem_offset, ICH_POINT); 1258 else 1259 bus_space_write_4(sc->iot, sc->aud_ioh, 1260 ICH_GSTS + sc->sc_modem_offset, ICH_MOINT); 1261 ret++; 1262 } 1263 1264 if ((sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_PIINT) || 1265 (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_MIINT)) { 1266 int sts; 1267 1268 sts = bus_space_read_2(sc->iot, sc->aud_ioh, 1269 ICH_PCMI + sc->sc_sts_reg); 1270 DPRINTF(ICH_DEBUG_INTR, 1271 ("auich_intr: ists=0x%x\n", sts)); 1272 1273 if (sts & ICH_FIFOE) 1274 printf("%s: fifo overrun\n", device_xname(sc->sc_dev)); 1275 1276 if (sts & ICH_BCIS) 1277 auich_intr_pipe(sc, ICH_PCMI, &sc->pcmi); 1278 1279 /* int ack */ 1280 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMI + 1281 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE)); 1282 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 1283 bus_space_write_4(sc->iot, sc->aud_ioh, 1284 ICH_GSTS + sc->sc_modem_offset, ICH_PIINT); 1285 else 1286 bus_space_write_4(sc->iot, sc->aud_ioh, 1287 ICH_GSTS + sc->sc_modem_offset, ICH_MIINT); 1288 ret++; 1289 } 1290 1291 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_MINT) { 1292 int sts; 1293 1294 sts = bus_space_read_2(sc->iot, sc->aud_ioh, 1295 ICH_MICI + sc->sc_sts_reg); 1296 DPRINTF(ICH_DEBUG_INTR, 1297 ("auich_intr: ists=0x%x\n", sts)); 1298 1299 if (sts & ICH_FIFOE) 1300 printf("%s: fifo overrun\n", device_xname(sc->sc_dev)); 1301 1302 if (sts & ICH_BCIS) 1303 auich_intr_pipe(sc, ICH_MICI, &sc->mici); 1304 1305 /* int ack */ 1306 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_MICI + 1307 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE)); 1308 bus_space_write_4(sc->iot, sc->aud_ioh, 1309 ICH_GSTS + sc->sc_modem_offset, ICH_MINT); 1310 ret++; 1311 } 1312 1313 #ifdef AUICH_MODEM_DEBUG 1314 if (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_GSCI) { 1315 printf("%s: gsts=0x%x\n", device_xname(sc->sc_dev), gsts); 1316 /* int ack */ 1317 bus_space_write_4(sc->iot, sc->aud_ioh, 1318 ICH_GSTS + sc->sc_modem_offset, ICH_GSCI); 1319 ret++; 1320 } 1321 #endif 1322 1323 return ret; 1324 } 1325 1326 static void 1327 auich_trigger_pipe(struct auich_softc *sc, int pipe, struct auich_ring *ring) 1328 { 1329 int blksize, qptr; 1330 struct auich_dmalist *q; 1331 1332 blksize = ring->blksize; 1333 1334 for (qptr = 0; qptr < ICH_DMALIST_MAX; qptr++) { 1335 q = &ring->dmalist[qptr]; 1336 q->base = ring->p; 1337 q->len = (blksize >> sc->sc_sample_shift) | ICH_DMAF_IOC; 1338 1339 ring->p += blksize; 1340 if (ring->p >= ring->end) 1341 ring->p = ring->start; 1342 } 1343 ring->qptr = 0; 1344 1345 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_LVI, 1346 (qptr - 1) & ICH_LVI_MASK); 1347 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, 1348 ICH_IOCE | ICH_FEIE | ICH_RPBM); 1349 } 1350 1351 static void 1352 auich_intr_pipe(struct auich_softc *sc, int pipe, struct auich_ring *ring) 1353 { 1354 int blksize, qptr, nqptr; 1355 struct auich_dmalist *q; 1356 1357 blksize = ring->blksize; 1358 qptr = ring->qptr; 1359 nqptr = bus_space_read_1(sc->iot, sc->aud_ioh, pipe + ICH_CIV); 1360 1361 while (qptr != nqptr) { 1362 q = &ring->dmalist[qptr]; 1363 q->base = ring->p; 1364 q->len = (blksize >> sc->sc_sample_shift) | ICH_DMAF_IOC; 1365 1366 DPRINTF(ICH_DEBUG_INTR, 1367 ("auich_intr: %p, %p = %x @ 0x%x\n", 1368 &ring->dmalist[qptr], q, q->len, q->base)); 1369 1370 ring->p += blksize; 1371 if (ring->p >= ring->end) 1372 ring->p = ring->start; 1373 1374 qptr = (qptr + 1) & ICH_LVI_MASK; 1375 if (ring->intr) 1376 ring->intr(ring->arg); 1377 } 1378 ring->qptr = qptr; 1379 1380 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_LVI, 1381 (qptr - 1) & ICH_LVI_MASK); 1382 } 1383 1384 static int 1385 auich_trigger_output(void *v, void *start, void *end, int blksize, 1386 void (*intr)(void *), void *arg, const audio_params_t *param) 1387 { 1388 struct auich_softc *sc; 1389 struct auich_dma *p; 1390 size_t size; 1391 1392 DPRINTF(ICH_DEBUG_DMA, 1393 ("auich_trigger_output(%p, %p, %d, %p, %p, %p)\n", 1394 start, end, blksize, intr, arg, param)); 1395 sc = v; 1396 1397 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1398 continue; 1399 if (!p) { 1400 printf("auich_trigger_output: bad addr %p\n", start); 1401 return EINVAL; 1402 } 1403 1404 size = (size_t)((char *)end - (char *)start); 1405 1406 sc->pcmo.intr = intr; 1407 sc->pcmo.arg = arg; 1408 sc->pcmo.start = DMAADDR(p); 1409 sc->pcmo.p = sc->pcmo.start; 1410 sc->pcmo.end = sc->pcmo.start + size; 1411 sc->pcmo.blksize = blksize; 1412 1413 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_BDBAR, 1414 sc->sc_cddma + ICH_PCMO_OFF(0)); 1415 auich_trigger_pipe(sc, ICH_PCMO, &sc->pcmo); 1416 1417 return 0; 1418 } 1419 1420 static int 1421 auich_trigger_input(void *v, void *start, void *end, int blksize, 1422 void (*intr)(void *), void *arg, const audio_params_t *param) 1423 { 1424 struct auich_softc *sc; 1425 struct auich_dma *p; 1426 size_t size; 1427 1428 DPRINTF(ICH_DEBUG_DMA, 1429 ("auich_trigger_input(%p, %p, %d, %p, %p, %p)\n", 1430 start, end, blksize, intr, arg, param)); 1431 sc = v; 1432 1433 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1434 continue; 1435 if (!p) { 1436 printf("auich_trigger_input: bad addr %p\n", start); 1437 return EINVAL; 1438 } 1439 1440 size = (size_t)((char *)end - (char *)start); 1441 1442 sc->pcmi.intr = intr; 1443 sc->pcmi.arg = arg; 1444 sc->pcmi.start = DMAADDR(p); 1445 sc->pcmi.p = sc->pcmi.start; 1446 sc->pcmi.end = sc->pcmi.start + size; 1447 sc->pcmi.blksize = blksize; 1448 1449 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_BDBAR, 1450 sc->sc_cddma + ICH_PCMI_OFF(0)); 1451 auich_trigger_pipe(sc, ICH_PCMI, &sc->pcmi); 1452 1453 return 0; 1454 } 1455 1456 static int 1457 auich_powerstate(void *v, int state) 1458 { 1459 return 0; 1460 } 1461 1462 static int 1463 auich_allocmem(struct auich_softc *sc, size_t size, size_t align, 1464 struct auich_dma *p) 1465 { 1466 int error; 1467 1468 p->size = size; 1469 error = bus_dmamem_alloc(sc->dmat, p->size, align, 0, 1470 p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 1471 &p->nsegs, BUS_DMA_NOWAIT); 1472 if (error) 1473 return error; 1474 1475 error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size, 1476 &p->addr, BUS_DMA_NOWAIT|sc->sc_dmamap_flags); 1477 if (error) 1478 goto free; 1479 1480 error = bus_dmamap_create(sc->dmat, p->size, 1, p->size, 1481 0, BUS_DMA_NOWAIT, &p->map); 1482 if (error) 1483 goto unmap; 1484 1485 error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL, 1486 BUS_DMA_NOWAIT); 1487 if (error) 1488 goto destroy; 1489 return 0; 1490 1491 destroy: 1492 bus_dmamap_destroy(sc->dmat, p->map); 1493 unmap: 1494 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1495 free: 1496 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1497 return error; 1498 } 1499 1500 static int 1501 auich_freemem(struct auich_softc *sc, struct auich_dma *p) 1502 { 1503 1504 bus_dmamap_unload(sc->dmat, p->map); 1505 bus_dmamap_destroy(sc->dmat, p->map); 1506 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1507 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1508 return 0; 1509 } 1510 1511 static int 1512 auich_alloc_cdata(struct auich_softc *sc) 1513 { 1514 bus_dma_segment_t seg; 1515 int error, rseg; 1516 1517 /* 1518 * Allocate the control data structure, and create and load the 1519 * DMA map for it. 1520 */ 1521 if ((error = bus_dmamem_alloc(sc->dmat, 1522 sizeof(struct auich_cdata), 1523 PAGE_SIZE, 0, &seg, 1, &rseg, 0)) != 0) { 1524 aprint_error_dev(sc->sc_dev, "unable to allocate control data, error = %d\n", error); 1525 goto fail_0; 1526 } 1527 1528 if ((error = bus_dmamem_map(sc->dmat, &seg, rseg, 1529 sizeof(struct auich_cdata), 1530 (void **) &sc->sc_cdata, 1531 sc->sc_dmamap_flags)) != 0) { 1532 aprint_error_dev(sc->sc_dev, "unable to map control data, error = %d\n", error); 1533 goto fail_1; 1534 } 1535 1536 if ((error = bus_dmamap_create(sc->dmat, sizeof(struct auich_cdata), 1, 1537 sizeof(struct auich_cdata), 0, 0, 1538 &sc->sc_cddmamap)) != 0) { 1539 aprint_error_dev(sc->sc_dev, "unable to create control data DMA map, " 1540 "error = %d\n", error); 1541 goto fail_2; 1542 } 1543 1544 if ((error = bus_dmamap_load(sc->dmat, sc->sc_cddmamap, 1545 sc->sc_cdata, sizeof(struct auich_cdata), 1546 NULL, 0)) != 0) { 1547 aprint_error_dev(sc->sc_dev, "unable tp load control data DMA map, " 1548 "error = %d\n", error); 1549 goto fail_3; 1550 } 1551 1552 sc->pcmo.dmalist = sc->sc_cdata->ic_dmalist_pcmo; 1553 sc->pcmi.dmalist = sc->sc_cdata->ic_dmalist_pcmi; 1554 sc->mici.dmalist = sc->sc_cdata->ic_dmalist_mici; 1555 1556 return 0; 1557 1558 fail_3: 1559 bus_dmamap_destroy(sc->dmat, sc->sc_cddmamap); 1560 fail_2: 1561 bus_dmamem_unmap(sc->dmat, (void *) sc->sc_cdata, 1562 sizeof(struct auich_cdata)); 1563 fail_1: 1564 bus_dmamem_free(sc->dmat, &seg, rseg); 1565 fail_0: 1566 return error; 1567 } 1568 1569 static bool 1570 auich_resume(device_t dv, const pmf_qual_t *qual) 1571 { 1572 struct auich_softc *sc = device_private(dv); 1573 pcireg_t v; 1574 1575 if (sc->sc_iose) { 1576 v = pci_conf_read(sc->sc_pc, sc->sc_pt, ICH_CFG); 1577 pci_conf_write(sc->sc_pc, sc->sc_pt, ICH_CFG, 1578 v | ICH_CFG_IOSE); 1579 } 1580 1581 auich_reset_codec(sc); 1582 DELAY(1000); 1583 (sc->codec_if->vtbl->restore_ports)(sc->codec_if); 1584 1585 return true; 1586 } 1587 1588 /* 1589 * Calibrate card (some boards are overclocked and need scaling) 1590 */ 1591 static void 1592 auich_calibrate(struct auich_softc *sc) 1593 { 1594 struct timeval t1, t2; 1595 uint8_t ociv, nciv; 1596 uint64_t wait_us; 1597 uint32_t actual_48k_rate, bytes, ac97rate; 1598 void *temp_buffer; 1599 struct auich_dma *p; 1600 u_int rate; 1601 1602 /* 1603 * Grab audio from input for fixed interval and compare how 1604 * much we actually get with what we expect. Interval needs 1605 * to be sufficiently short that no interrupts are 1606 * generated. 1607 */ 1608 1609 /* Force the codec to a known state first. */ 1610 sc->codec_if->vtbl->set_clock(sc->codec_if, 48000); 1611 rate = sc->sc_ac97_clock = 48000; 1612 sc->codec_if->vtbl->set_rate(sc->codec_if, AC97_REG_PCM_LR_ADC_RATE, 1613 &rate); 1614 1615 /* Setup a buffer */ 1616 bytes = 64000; 1617 temp_buffer = auich_allocm(sc, AUMODE_RECORD, bytes, M_DEVBUF, M_WAITOK); 1618 1619 for (p = sc->sc_dmas; p && KERNADDR(p) != temp_buffer; p = p->next) 1620 continue; 1621 if (p == NULL) { 1622 printf("auich_calibrate: bad address %p\n", temp_buffer); 1623 return; 1624 } 1625 sc->pcmi.dmalist[0].base = DMAADDR(p); 1626 sc->pcmi.dmalist[0].len = (bytes >> sc->sc_sample_shift); 1627 1628 /* 1629 * our data format is stereo, 16 bit so each sample is 4 bytes. 1630 * assuming we get 48000 samples per second, we get 192000 bytes/sec. 1631 * we're going to start recording with interrupts disabled and measure 1632 * the time taken for one block to complete. we know the block size, 1633 * we know the time in microseconds, we calculate the sample rate: 1634 * 1635 * actual_rate [bps] = bytes / (time [s] * 4) 1636 * actual_rate [bps] = (bytes * 1000000) / (time [us] * 4) 1637 * actual_rate [Hz] = (bytes * 250000) / time [us] 1638 */ 1639 1640 /* prepare */ 1641 ociv = bus_space_read_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CIV); 1642 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_BDBAR, 1643 sc->sc_cddma + ICH_PCMI_OFF(0)); 1644 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_LVI, 1645 (0 - 1) & ICH_LVI_MASK); 1646 1647 /* start */ 1648 microtime(&t1); 1649 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, ICH_RPBM); 1650 1651 /* wait */ 1652 nciv = ociv; 1653 do { 1654 microtime(&t2); 1655 if (t2.tv_sec - t1.tv_sec > 1) 1656 break; 1657 nciv = bus_space_read_1(sc->iot, sc->aud_ioh, 1658 ICH_PCMI + ICH_CIV); 1659 } while (nciv == ociv); 1660 microtime(&t2); 1661 1662 /* stop */ 1663 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, 0); 1664 1665 /* reset */ 1666 DELAY(100); 1667 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, ICH_RR); 1668 1669 /* turn time delta into us */ 1670 wait_us = ((t2.tv_sec - t1.tv_sec) * 1000000) + t2.tv_usec - t1.tv_usec; 1671 1672 auich_freem(sc, temp_buffer, M_DEVBUF); 1673 1674 if (nciv == ociv) { 1675 printf("%s: ac97 link rate calibration timed out after %" 1676 PRIu64 " us\n", device_xname(sc->sc_dev), wait_us); 1677 return; 1678 } 1679 1680 actual_48k_rate = (bytes * UINT64_C(250000)) / wait_us; 1681 1682 if (actual_48k_rate < 50000) 1683 ac97rate = 48000; 1684 else 1685 ac97rate = ((actual_48k_rate + 500) / 1000) * 1000; 1686 1687 aprint_verbose_dev(sc->sc_dev, "measured ac97 link rate at %d Hz", 1688 actual_48k_rate); 1689 if (ac97rate != actual_48k_rate) 1690 aprint_verbose(", will use %d Hz", ac97rate); 1691 aprint_verbose("\n"); 1692 1693 sc->sc_ac97_clock = ac97rate; 1694 } 1695 1696 static void 1697 auich_clear_cas(struct auich_softc *sc) 1698 { 1699 /* Clear the codec access semaphore */ 1700 (void)bus_space_read_2(sc->iot, sc->mix_ioh, 1701 AC97_REG_RESET * (sc->sc_codecnum * ICH_CODEC_OFFSET)); 1702 1703 return; 1704 } 1705
Indexes created Thu Oct 23 22:10:10 GMT 2025