auich.c revision 1.138.10.1
1 /* $NetBSD: auich.c,v 1.138.10.1 2011/11/19 21:49:40 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2004, 2005, 2008 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Copyright (c) 2000 Michael Shalayeff 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. The name of the author may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 51 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 52 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 53 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 55 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 56 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 57 * THE POSSIBILITY OF SUCH DAMAGE. 58 * 59 * from OpenBSD: ich.c,v 1.3 2000/08/11 06:17:18 mickey Exp 60 */ 61 62 /* 63 * Copyright (c) 2000 Katsurajima Naoto <raven (at) katsurajima.seya.yokohama.jp> 64 * Copyright (c) 2001 Cameron Grant <cg (at) freebsd.org> 65 * All rights reserved. 66 * 67 * Redistribution and use in source and binary forms, with or without 68 * modification, are permitted provided that the following conditions 69 * are met: 70 * 1. Redistributions of source code must retain the above copyright 71 * notice, this list of conditions and the following disclaimer. 72 * 2. Redistributions in binary form must reproduce the above copyright 73 * notice, this list of conditions and the following disclaimer in the 74 * documentation and/or other materials provided with the distribution. 75 * 76 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 77 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 78 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 79 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 80 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 81 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 82 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 83 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 84 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 85 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF 86 * SUCH DAMAGE. 87 * 88 * auich_calibrate() was from FreeBSD: ich.c,v 1.22 2002/06/27 22:36:01 scottl Exp 89 */ 90 91 92 /* #define AUICH_DEBUG */ 93 /* 94 * AC'97 audio found on Intel 810/820/440MX chipsets. 95 * http://developer.intel.com/design/chipsets/datashts/290655.htm 96 * http://developer.intel.com/design/chipsets/manuals/298028.htm 97 * ICH3:http://www.intel.com/design/chipsets/datashts/290716.htm 98 * ICH4:http://www.intel.com/design/chipsets/datashts/290744.htm 99 * ICH5:http://www.intel.com/design/chipsets/datashts/252516.htm 100 * AMD8111: 101 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/24674.pdf 102 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25720.pdf 103 * 104 * TODO: 105 * - Add support for the dedicated microphone input. 106 * 107 * NOTE: 108 * - The 440MX B-stepping at running 100MHz has a hardware erratum. 109 * It causes PCI master abort and hangups until cold reboot. 110 * http://www.intel.com/design/chipsets/specupdt/245051.htm 111 */ 112 113 #include <sys/cdefs.h> 114 __KERNEL_RCSID(0, "$NetBSD: auich.c,v 1.138.10.1 2011/11/19 21:49:40 jmcneill Exp $"); 115 116 #include <sys/param.h> 117 #include <sys/systm.h> 118 #include <sys/kernel.h> 119 #include <sys/kmem.h> 120 #include <sys/device.h> 121 #include <sys/fcntl.h> 122 #include <sys/proc.h> 123 #include <sys/sysctl.h> 124 #include <sys/audioio.h> 125 #include <sys/bus.h> 126 127 #include <dev/pci/pcidevs.h> 128 #include <dev/pci/pcivar.h> 129 #include <dev/pci/auichreg.h> 130 131 #include <dev/audio_if.h> 132 #include <dev/mulaw.h> 133 #include <dev/auconv.h> 134 135 #include <dev/ic/ac97reg.h> 136 #include <dev/ic/ac97var.h> 137 138 struct auich_dma { 139 bus_dmamap_t map; 140 void *addr; 141 bus_dma_segment_t segs[1]; 142 int nsegs; 143 size_t size; 144 struct auich_dma *next; 145 }; 146 147 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 148 #define KERNADDR(p) ((void *)((p)->addr)) 149 150 struct auich_cdata { 151 struct auich_dmalist ic_dmalist_pcmo[ICH_DMALIST_MAX]; 152 struct auich_dmalist ic_dmalist_pcmi[ICH_DMALIST_MAX]; 153 struct auich_dmalist ic_dmalist_mici[ICH_DMALIST_MAX]; 154 }; 155 156 #define ICH_CDOFF(x) offsetof(struct auich_cdata, x) 157 #define ICH_PCMO_OFF(x) ICH_CDOFF(ic_dmalist_pcmo[(x)]) 158 #define ICH_PCMI_OFF(x) ICH_CDOFF(ic_dmalist_pcmi[(x)]) 159 #define ICH_MICI_OFF(x) ICH_CDOFF(ic_dmalist_mici[(x)]) 160 161 struct auich_softc { 162 device_t sc_dev; 163 void *sc_ih; 164 kmutex_t sc_lock; 165 kmutex_t sc_intr_lock; 166 167 device_t sc_audiodev; 168 audio_device_t sc_audev; 169 170 pci_chipset_tag_t sc_pc; 171 pcitag_t sc_pt; 172 bus_space_tag_t iot; 173 bus_space_handle_t mix_ioh; 174 bus_size_t mix_size; 175 bus_space_handle_t aud_ioh; 176 bus_size_t aud_size; 177 bus_dma_tag_t dmat; 178 pci_intr_handle_t intrh; 179 180 struct ac97_codec_if *codec_if; 181 struct ac97_host_if host_if; 182 int sc_codecnum; 183 int sc_codectype; 184 int sc_fixedrate; 185 enum ac97_host_flags sc_codecflags; 186 bool sc_spdif; 187 188 /* multi-channel control bits */ 189 int sc_pcm246_mask; 190 int sc_pcm2; 191 int sc_pcm4; 192 int sc_pcm6; 193 194 /* DMA scatter-gather lists. */ 195 bus_dmamap_t sc_cddmamap; 196 #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr 197 198 struct auich_cdata *sc_cdata; 199 200 struct auich_ring { 201 int qptr; 202 struct auich_dmalist *dmalist; 203 204 uint32_t start, p, end; 205 int blksize; 206 207 void (*intr)(void *); 208 void *arg; 209 } pcmo, pcmi, mici; 210 211 struct auich_dma *sc_dmas; 212 213 /* SiS 7012 hack */ 214 int sc_sample_shift; 215 int sc_sts_reg; 216 /* 440MX workaround */ 217 int sc_dmamap_flags; 218 /* flags */ 219 int sc_iose :1, 220 :31; 221 222 /* sysctl */ 223 struct sysctllog *sc_log; 224 uint32_t sc_ac97_clock; 225 int sc_ac97_clock_mib; 226 227 int sc_modem_offset; 228 229 #define AUICH_AUDIO_NFORMATS 3 230 #define AUICH_MODEM_NFORMATS 1 231 struct audio_format sc_audio_formats[AUICH_AUDIO_NFORMATS]; 232 struct audio_format sc_modem_formats[AUICH_MODEM_NFORMATS]; 233 struct audio_encoding_set *sc_encodings; 234 struct audio_encoding_set *sc_spdif_encodings; 235 }; 236 237 /* Debug */ 238 #ifdef AUICH_DEBUG 239 #define DPRINTF(l,x) do { if (auich_debug & (l)) printf x; } while(0) 240 int auich_debug = 0xfffe; 241 #define ICH_DEBUG_CODECIO 0x0001 242 #define ICH_DEBUG_DMA 0x0002 243 #define ICH_DEBUG_INTR 0x0004 244 #else 245 #define DPRINTF(x,y) /* nothing */ 246 #endif 247 248 static int auich_match(device_t, cfdata_t, void *); 249 static void auich_attach(device_t, device_t, void *); 250 static int auich_detach(device_t, int); 251 static void auich_childdet(device_t, device_t); 252 static int auich_intr(void *); 253 254 CFATTACH_DECL2_NEW(auich, sizeof(struct auich_softc), 255 auich_match, auich_attach, auich_detach, NULL, NULL, auich_childdet); 256 257 static int auich_open(void *, int); 258 static void auich_close(void *); 259 static int auich_query_encoding(void *, struct audio_encoding *); 260 static int auich_set_params(void *, int, int, audio_params_t *, 261 audio_params_t *, stream_filter_list_t *, 262 stream_filter_list_t *); 263 static int auich_round_blocksize(void *, int, int, const audio_params_t *); 264 static void auich_halt_pipe(struct auich_softc *, int); 265 static int auich_halt_output(void *); 266 static int auich_halt_input(void *); 267 static int auich_getdev(void *, struct audio_device *); 268 static int auich_set_port(void *, mixer_ctrl_t *); 269 static int auich_get_port(void *, mixer_ctrl_t *); 270 static int auich_query_devinfo(void *, mixer_devinfo_t *); 271 static void *auich_allocm(void *, int, size_t); 272 static void auich_freem(void *, void *, size_t); 273 static size_t auich_round_buffersize(void *, int, size_t); 274 static paddr_t auich_mappage(void *, void *, off_t, int); 275 static int auich_get_props(void *); 276 static void auich_trigger_pipe(struct auich_softc *, int, struct auich_ring *); 277 static void auich_intr_pipe(struct auich_softc *, int, struct auich_ring *); 278 static int auich_trigger_output(void *, void *, void *, int, 279 void (*)(void *), void *, const audio_params_t *); 280 static int auich_trigger_input(void *, void *, void *, int, 281 void (*)(void *), void *, const audio_params_t *); 282 static int auich_powerstate(void *, int); 283 static void auich_get_locks(void *, kmutex_t **, kmutex_t **); 284 285 static int auich_alloc_cdata(struct auich_softc *); 286 287 static int auich_allocmem(struct auich_softc *, size_t, size_t, 288 struct auich_dma *); 289 static int auich_freemem(struct auich_softc *, struct auich_dma *); 290 291 static bool auich_resume(device_t, const pmf_qual_t *); 292 static int auich_set_rate(struct auich_softc *, int, u_long); 293 static int auich_sysctl_verify(SYSCTLFN_ARGS); 294 static void auich_finish_attach(device_t); 295 static void auich_calibrate(struct auich_softc *); 296 static void auich_clear_cas(struct auich_softc *); 297 298 static int auich_attach_codec(void *, struct ac97_codec_if *); 299 static int auich_read_codec(void *, uint8_t, uint16_t *); 300 static int auich_write_codec(void *, uint8_t, uint16_t); 301 static int auich_reset_codec(void *); 302 static enum ac97_host_flags auich_flags_codec(void *); 303 static void auich_spdif_event(void *, bool); 304 305 static const struct audio_hw_if auich_hw_if = { 306 auich_open, 307 auich_close, 308 NULL, /* drain */ 309 auich_query_encoding, 310 auich_set_params, 311 auich_round_blocksize, 312 NULL, /* commit_setting */ 313 NULL, /* init_output */ 314 NULL, /* init_input */ 315 NULL, /* start_output */ 316 NULL, /* start_input */ 317 auich_halt_output, 318 auich_halt_input, 319 NULL, /* speaker_ctl */ 320 auich_getdev, 321 NULL, /* getfd */ 322 auich_set_port, 323 auich_get_port, 324 auich_query_devinfo, 325 auich_allocm, 326 auich_freem, 327 auich_round_buffersize, 328 auich_mappage, 329 auich_get_props, 330 auich_trigger_output, 331 auich_trigger_input, 332 NULL, /* dev_ioctl */ 333 auich_powerstate, 334 auich_get_locks, 335 }; 336 337 #define AUICH_FORMATS_1CH 0 338 #define AUICH_FORMATS_4CH 1 339 #define AUICH_FORMATS_6CH 2 340 static const struct audio_format auich_audio_formats[AUICH_AUDIO_NFORMATS] = { 341 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 342 2, AUFMT_STEREO, 0, {8000, 48000}}, 343 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 344 4, AUFMT_SURROUND4, 0, {8000, 48000}}, 345 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 346 6, AUFMT_DOLBY_5_1, 0, {8000, 48000}}, 347 }; 348 349 #define AUICH_SPDIF_NFORMATS 1 350 static const struct audio_format auich_spdif_formats[AUICH_SPDIF_NFORMATS] = { 351 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 352 2, AUFMT_STEREO, 1, {48000}}, 353 }; 354 355 static const struct audio_format auich_modem_formats[AUICH_MODEM_NFORMATS] = { 356 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 357 1, AUFMT_MONAURAL, 0, {8000, 16000}}, 358 }; 359 360 #define PCI_ID_CODE0(v, p) PCI_ID_CODE(PCI_VENDOR_##v, PCI_PRODUCT_##v##_##p) 361 #define PCIID_ICH PCI_ID_CODE0(INTEL, 82801AA_ACA) 362 #define PCIID_ICH0 PCI_ID_CODE0(INTEL, 82801AB_ACA) 363 #define PCIID_ICH2 PCI_ID_CODE0(INTEL, 82801BA_ACA) 364 #define PCIID_440MX PCI_ID_CODE0(INTEL, 82440MX_ACA) 365 #define PCIID_ICH3 PCI_ID_CODE0(INTEL, 82801CA_AC) 366 #define PCIID_ICH4 PCI_ID_CODE0(INTEL, 82801DB_AC) 367 #define PCIID_ICH5 PCI_ID_CODE0(INTEL, 82801EB_AC) 368 #define PCIID_ICH6 PCI_ID_CODE0(INTEL, 82801FB_AC) 369 #define PCIID_ICH7 PCI_ID_CODE0(INTEL, 82801G_ACA) 370 #define PCIID_I6300ESB PCI_ID_CODE0(INTEL, 6300ESB_ACA) 371 #define PCIID_SIS7012 PCI_ID_CODE0(SIS, 7012_AC) 372 #define PCIID_NFORCE PCI_ID_CODE0(NVIDIA, NFORCE_MCP_AC) 373 #define PCIID_NFORCE2 PCI_ID_CODE0(NVIDIA, NFORCE2_MCPT_AC) 374 #define PCIID_NFORCE2_400 PCI_ID_CODE0(NVIDIA, NFORCE2_400_MCPT_AC) 375 #define PCIID_NFORCE3 PCI_ID_CODE0(NVIDIA, NFORCE3_MCPT_AC) 376 #define PCIID_NFORCE3_250 PCI_ID_CODE0(NVIDIA, NFORCE3_250_MCPT_AC) 377 #define PCIID_NFORCE4 PCI_ID_CODE0(NVIDIA, NFORCE4_AC) 378 #define PCIID_NFORCE430 PCI_ID_CODE0(NVIDIA, NFORCE430_AC) 379 #define PCIID_AMD768 PCI_ID_CODE0(AMD, PBC768_AC) 380 #define PCIID_AMD8111 PCI_ID_CODE0(AMD, PBC8111_AC) 381 382 #define PCIID_ICH3MODEM PCI_ID_CODE0(INTEL, 82801CA_MOD) 383 #define PCIID_ICH4MODEM PCI_ID_CODE0(INTEL, 82801DB_MOD) 384 #define PCIID_ICH6MODEM PCI_ID_CODE0(INTEL, 82801FB_ACM) 385 386 struct auich_devtype { 387 pcireg_t id; 388 const char *name; 389 const char *shortname; /* must be less than 11 characters */ 390 }; 391 392 static const struct auich_devtype auich_audio_devices[] = { 393 { PCIID_ICH, "i82801AA (ICH) AC-97 Audio", "ICH" }, 394 { PCIID_ICH0, "i82801AB (ICH0) AC-97 Audio", "ICH0" }, 395 { PCIID_ICH2, "i82801BA (ICH2) AC-97 Audio", "ICH2" }, 396 { PCIID_440MX, "i82440MX AC-97 Audio", "440MX" }, 397 { PCIID_ICH3, "i82801CA (ICH3) AC-97 Audio", "ICH3" }, 398 { PCIID_ICH4, "i82801DB/DBM (ICH4/ICH4M) AC-97 Audio", "ICH4" }, 399 { PCIID_ICH5, "i82801EB (ICH5) AC-97 Audio", "ICH5" }, 400 { PCIID_ICH6, "i82801FB (ICH6) AC-97 Audio", "ICH6" }, 401 { PCIID_ICH7, "i82801GB/GR (ICH7) AC-97 Audio", "ICH7" }, 402 { PCIID_I6300ESB, "Intel 6300ESB AC-97 Audio", "I6300ESB" }, 403 { PCIID_SIS7012, "SiS 7012 AC-97 Audio", "SiS7012" }, 404 { PCIID_NFORCE, "nForce MCP AC-97 Audio", "nForce" }, 405 { PCIID_NFORCE2, "nForce2 MCP-T AC-97 Audio", "nForce2" }, 406 { PCIID_NFORCE2_400, "nForce2 400 MCP-T AC-97 Audio", "nForce2" }, 407 { PCIID_NFORCE3, "nForce3 MCP-T AC-97 Audio", "nForce3" }, 408 { PCIID_NFORCE3_250, "nForce3 250 MCP-T AC-97 Audio", "nForce3" }, 409 { PCIID_NFORCE4, "nForce4 AC-97 Audio", "nForce4" }, 410 { PCIID_NFORCE430, "nForce430 (MCP51) AC-97 Audio", "nForce430" }, 411 { PCIID_AMD768, "AMD768 AC-97 Audio", "AMD768" }, 412 { PCIID_AMD8111,"AMD8111 AC-97 Audio", "AMD8111" }, 413 { 0, NULL, NULL }, 414 }; 415 416 static const struct auich_devtype auich_modem_devices[] = { 417 #ifdef AUICH_ATTACH_MODEM 418 { PCIID_ICH3MODEM, "i82801CA (ICH3) AC-97 Modem", "ICH3MODEM" }, 419 { PCIID_ICH4MODEM, "i82801DB (ICH4) AC-97 Modem", "ICH4MODEM" }, 420 { PCIID_ICH6MODEM, "i82801FB (ICH6) AC-97 Modem", "ICH6MODEM" }, 421 #endif 422 { 0, NULL, NULL }, 423 }; 424 425 static const struct auich_devtype * 426 auich_lookup(struct pci_attach_args *pa, const struct auich_devtype *auich_devices) 427 { 428 const struct auich_devtype *d; 429 430 for (d = auich_devices; d->name != NULL; d++) { 431 if (pa->pa_id == d->id) 432 return d; 433 } 434 435 return NULL; 436 } 437 438 static int 439 auich_match(device_t parent, cfdata_t match, void *aux) 440 { 441 struct pci_attach_args *pa; 442 443 pa = aux; 444 if (auich_lookup(pa, auich_audio_devices) != NULL) 445 return 1; 446 if (auich_lookup(pa, auich_modem_devices) != NULL) 447 return 1; 448 449 return 0; 450 } 451 452 static void 453 auich_attach(device_t parent, device_t self, void *aux) 454 { 455 struct auich_softc *sc = device_private(self); 456 struct pci_attach_args *pa; 457 pcireg_t v, subdev; 458 const char *intrstr; 459 const struct auich_devtype *d; 460 const struct sysctlnode *node, *node_ac97clock; 461 int err, node_mib, i; 462 463 sc->sc_dev = self; 464 pa = aux; 465 466 if ((d = auich_lookup(pa, auich_modem_devices)) != NULL) { 467 sc->sc_modem_offset = 0x10; 468 sc->sc_codectype = AC97_CODEC_TYPE_MODEM; 469 } else if ((d = auich_lookup(pa, auich_audio_devices)) != NULL) { 470 sc->sc_modem_offset = 0; 471 sc->sc_codectype = AC97_CODEC_TYPE_AUDIO; 472 } else 473 panic("auich_attach: impossible"); 474 475 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 476 aprint_naive(": Audio controller\n"); 477 else 478 aprint_naive(": Modem controller\n"); 479 480 sc->sc_pc = pa->pa_pc; 481 sc->sc_pt = pa->pa_tag; 482 483 aprint_normal(": %s\n", d->name); 484 485 if (d->id == PCIID_ICH4 || d->id == PCIID_ICH5 || d->id == PCIID_ICH6 486 || d->id == PCIID_ICH7 || d->id == PCIID_I6300ESB 487 || d->id == PCIID_ICH4MODEM) { 488 /* 489 * Use native mode for Intel 6300ESB and ICH4/ICH5/ICH6/ICH7 490 */ 491 492 if (pci_mapreg_map(pa, ICH_MMBAR, PCI_MAPREG_TYPE_MEM, 0, 493 &sc->iot, &sc->mix_ioh, NULL, &sc->mix_size)) { 494 goto retry_map; 495 } 496 if (pci_mapreg_map(pa, ICH_MBBAR, PCI_MAPREG_TYPE_MEM, 0, 497 &sc->iot, &sc->aud_ioh, NULL, &sc->aud_size)) { 498 goto retry_map; 499 } 500 goto map_done; 501 } else 502 goto non_native_map; 503 504 retry_map: 505 sc->sc_iose = 1; 506 v = pci_conf_read(pa->pa_pc, pa->pa_tag, ICH_CFG); 507 pci_conf_write(pa->pa_pc, pa->pa_tag, ICH_CFG, 508 v | ICH_CFG_IOSE); 509 510 non_native_map: 511 if (pci_mapreg_map(pa, ICH_NAMBAR, PCI_MAPREG_TYPE_IO, 0, 512 &sc->iot, &sc->mix_ioh, NULL, &sc->mix_size)) { 513 aprint_error_dev(self, "can't map codec i/o space\n"); 514 return; 515 } 516 if (pci_mapreg_map(pa, ICH_NABMBAR, PCI_MAPREG_TYPE_IO, 0, 517 &sc->iot, &sc->aud_ioh, NULL, &sc->aud_size)) { 518 aprint_error_dev(self, "can't map device i/o space\n"); 519 return; 520 } 521 522 map_done: 523 sc->dmat = pa->pa_dmat; 524 525 /* enable bus mastering */ 526 v = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 527 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 528 v | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_BACKTOBACK_ENABLE); 529 530 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 531 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED); 532 533 /* Map and establish the interrupt. */ 534 if (pci_intr_map(pa, &sc->intrh)) { 535 aprint_error_dev(self, "can't map interrupt\n"); 536 return; 537 } 538 intrstr = pci_intr_string(pa->pa_pc, sc->intrh); 539 sc->sc_ih = pci_intr_establish(pa->pa_pc, sc->intrh, IPL_SCHED, 540 auich_intr, sc); 541 if (sc->sc_ih == NULL) { 542 aprint_error_dev(self, "can't establish interrupt"); 543 if (intrstr != NULL) 544 aprint_error(" at %s", intrstr); 545 aprint_error("\n"); 546 return; 547 } 548 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 549 550 snprintf(sc->sc_audev.name, MAX_AUDIO_DEV_LEN, "%s AC97", d->shortname); 551 snprintf(sc->sc_audev.version, MAX_AUDIO_DEV_LEN, 552 "0x%02x", PCI_REVISION(pa->pa_class)); 553 strlcpy(sc->sc_audev.config, device_xname(self), MAX_AUDIO_DEV_LEN); 554 555 /* SiS 7012 needs special handling */ 556 if (d->id == PCIID_SIS7012) { 557 sc->sc_sts_reg = ICH_PICB; 558 sc->sc_sample_shift = 0; 559 sc->sc_pcm246_mask = ICH_SIS_PCM246_MASK; 560 sc->sc_pcm2 = ICH_SIS_PCM2; 561 sc->sc_pcm4 = ICH_SIS_PCM4; 562 sc->sc_pcm6 = ICH_SIS_PCM6; 563 /* Un-mute output. From Linux. */ 564 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_SIS_NV_CTL, 565 bus_space_read_4(sc->iot, sc->aud_ioh, ICH_SIS_NV_CTL) | 566 ICH_SIS_CTL_UNMUTE); 567 } else { 568 sc->sc_sts_reg = ICH_STS; 569 sc->sc_sample_shift = 1; 570 sc->sc_pcm246_mask = ICH_PCM246_MASK; 571 sc->sc_pcm2 = ICH_PCM2; 572 sc->sc_pcm4 = ICH_PCM4; 573 sc->sc_pcm6 = ICH_PCM6; 574 } 575 576 /* Workaround for a 440MX B-stepping erratum */ 577 sc->sc_dmamap_flags = BUS_DMA_COHERENT; 578 if (d->id == PCIID_440MX) { 579 sc->sc_dmamap_flags |= BUS_DMA_NOCACHE; 580 aprint_normal_dev(self, "DMA bug workaround enabled\n"); 581 } 582 583 /* Set up DMA lists. */ 584 sc->pcmo.qptr = sc->pcmi.qptr = sc->mici.qptr = 0; 585 auich_alloc_cdata(sc); 586 587 DPRINTF(ICH_DEBUG_DMA, ("auich_attach: lists %p %p %p\n", 588 sc->pcmo.dmalist, sc->pcmi.dmalist, sc->mici.dmalist)); 589 590 /* Modem codecs are always the secondary codec on ICH */ 591 sc->sc_codecnum = sc->sc_codectype == AC97_CODEC_TYPE_MODEM ? 1 : 0; 592 593 sc->host_if.arg = sc; 594 sc->host_if.attach = auich_attach_codec; 595 sc->host_if.read = auich_read_codec; 596 sc->host_if.write = auich_write_codec; 597 sc->host_if.reset = auich_reset_codec; 598 sc->host_if.flags = auich_flags_codec; 599 sc->host_if.spdif_event = auich_spdif_event; 600 601 subdev = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 602 switch (subdev) { 603 case 0x202f161f: /* Gateway 7326GZ */ 604 case 0x203a161f: /* Gateway 4028GZ */ 605 case 0x204c161f: /* Kvazar-Micro Senator 3592XT */ 606 case 0x8144104d: /* Sony VAIO PCG-TR* */ 607 case 0x8197104d: /* Sony S1XP */ 608 case 0x81c0104d: /* Sony VAIO type T */ 609 case 0x81c5104d: /* Sony VAIO VGN-B1XP */ 610 sc->sc_codecflags = AC97_HOST_INVERTED_EAMP; 611 break; 612 default: 613 sc->sc_codecflags = 0; 614 break; 615 } 616 617 if (ac97_attach_type(&sc->host_if, self, sc->sc_codectype, 618 &sc->sc_lock) != 0) 619 return; 620 621 mutex_enter(&sc->sc_lock); 622 sc->codec_if->vtbl->unlock(sc->codec_if); 623 sc->sc_fixedrate = AC97_IS_FIXED_RATE(sc->codec_if); 624 625 /* setup audio_format */ 626 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 627 memcpy(sc->sc_audio_formats, auich_audio_formats, sizeof(auich_audio_formats)); 628 if (!AC97_IS_4CH(sc->codec_if)) 629 AUFMT_INVALIDATE(&sc->sc_audio_formats[AUICH_FORMATS_4CH]); 630 if (!AC97_IS_6CH(sc->codec_if)) 631 AUFMT_INVALIDATE(&sc->sc_audio_formats[AUICH_FORMATS_6CH]); 632 if (AC97_IS_FIXED_RATE(sc->codec_if)) { 633 for (i = 0; i < AUICH_AUDIO_NFORMATS; i++) { 634 sc->sc_audio_formats[i].frequency_type = 1; 635 sc->sc_audio_formats[i].frequency[0] = 48000; 636 } 637 } 638 mutex_exit(&sc->sc_lock); 639 if (0 != auconv_create_encodings(sc->sc_audio_formats, AUICH_AUDIO_NFORMATS, 640 &sc->sc_encodings)) 641 return; 642 if (0 != auconv_create_encodings(auich_spdif_formats, AUICH_SPDIF_NFORMATS, 643 &sc->sc_spdif_encodings)) 644 return; 645 } else { 646 mutex_exit(&sc->sc_lock); 647 memcpy(sc->sc_modem_formats, auich_modem_formats, sizeof(auich_modem_formats)); 648 if (0 != auconv_create_encodings(sc->sc_modem_formats, AUICH_MODEM_NFORMATS, 649 &sc->sc_encodings)) 650 return; 651 } 652 653 /* Watch for power change */ 654 if (!pmf_device_register(self, NULL, auich_resume)) 655 aprint_error_dev(self, "couldn't establish power handler\n"); 656 657 config_interrupts(self, auich_finish_attach); 658 659 /* sysctl setup */ 660 if (sc->sc_fixedrate && sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 661 return; 662 663 err = sysctl_createv(&sc->sc_log, 0, NULL, NULL, 0, 664 CTLTYPE_NODE, "hw", NULL, NULL, 0, NULL, 0, 665 CTL_HW, CTL_EOL); 666 if (err != 0) 667 goto sysctl_err; 668 err = sysctl_createv(&sc->sc_log, 0, NULL, &node, 0, 669 CTLTYPE_NODE, device_xname(self), NULL, NULL, 0, 670 NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 671 if (err != 0) 672 goto sysctl_err; 673 node_mib = node->sysctl_num; 674 675 if (!sc->sc_fixedrate) { 676 /* passing the sc address instead of &sc->sc_ac97_clock */ 677 err = sysctl_createv(&sc->sc_log, 0, NULL, &node_ac97clock, 678 CTLFLAG_READWRITE, 679 CTLTYPE_INT, "ac97rate", 680 SYSCTL_DESCR("AC'97 codec link rate"), 681 auich_sysctl_verify, 0, sc, 0, 682 CTL_HW, node_mib, CTL_CREATE, CTL_EOL); 683 if (err != 0) 684 goto sysctl_err; 685 sc->sc_ac97_clock_mib = node_ac97clock->sysctl_num; 686 } 687 688 return; 689 690 sysctl_err: 691 printf("%s: failed to add sysctl nodes. (%d)\n", 692 device_xname(self), err); 693 return; /* failure of sysctl is not fatal. */ 694 } 695 696 static void 697 auich_childdet(device_t self, device_t child) 698 { 699 struct auich_softc *sc = device_private(self); 700 701 KASSERT(sc->sc_audiodev == child); 702 sc->sc_audiodev = NULL; 703 } 704 705 static int 706 auich_detach(device_t self, int flags) 707 { 708 struct auich_softc *sc = device_private(self); 709 710 /* audio */ 711 if (sc->sc_audiodev != NULL) 712 config_detach(sc->sc_audiodev, flags); 713 714 /* sysctl */ 715 sysctl_teardown(&sc->sc_log); 716 717 mutex_enter(&sc->sc_lock); 718 719 /* audio_encoding_set */ 720 auconv_delete_encodings(sc->sc_encodings); 721 auconv_delete_encodings(sc->sc_spdif_encodings); 722 723 /* ac97 */ 724 if (sc->codec_if != NULL) 725 sc->codec_if->vtbl->detach(sc->codec_if); 726 727 mutex_exit(&sc->sc_lock); 728 mutex_destroy(&sc->sc_lock); 729 mutex_destroy(&sc->sc_intr_lock); 730 731 /* PCI */ 732 if (sc->sc_ih != NULL) 733 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 734 if (sc->mix_size != 0) 735 bus_space_unmap(sc->iot, sc->mix_ioh, sc->mix_size); 736 if (sc->aud_size != 0) 737 bus_space_unmap(sc->iot, sc->aud_ioh, sc->aud_size); 738 return 0; 739 } 740 741 static int 742 auich_sysctl_verify(SYSCTLFN_ARGS) 743 { 744 int error, tmp; 745 struct sysctlnode node; 746 struct auich_softc *sc; 747 748 node = *rnode; 749 sc = rnode->sysctl_data; 750 if (node.sysctl_num == sc->sc_ac97_clock_mib) { 751 tmp = sc->sc_ac97_clock; 752 node.sysctl_data = &tmp; 753 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 754 if (error || newp == NULL) 755 return error; 756 757 if (tmp < 48000 || tmp > 96000) 758 return EINVAL; 759 mutex_enter(&sc->sc_lock); 760 sc->sc_ac97_clock = tmp; 761 mutex_exit(&sc->sc_lock); 762 } 763 764 return 0; 765 } 766 767 static void 768 auich_finish_attach(device_t self) 769 { 770 struct auich_softc *sc = device_private(self); 771 772 mutex_enter(&sc->sc_lock); 773 if (!AC97_IS_FIXED_RATE(sc->codec_if)) 774 auich_calibrate(sc); 775 mutex_exit(&sc->sc_lock); 776 777 sc->sc_audiodev = audio_attach_mi(&auich_hw_if, sc, sc->sc_dev); 778 779 return; 780 } 781 782 #define ICH_CODECIO_INTERVAL 10 783 static int 784 auich_read_codec(void *v, uint8_t reg, uint16_t *val) 785 { 786 struct auich_softc *sc; 787 int i; 788 uint32_t status; 789 790 sc = v; 791 /* wait for an access semaphore */ 792 for (i = ICH_SEMATIMO / ICH_CODECIO_INTERVAL; i-- && 793 bus_space_read_1(sc->iot, sc->aud_ioh, 794 ICH_CAS + sc->sc_modem_offset) & 1; 795 DELAY(ICH_CODECIO_INTERVAL)); 796 797 if (i > 0) { 798 *val = bus_space_read_2(sc->iot, sc->mix_ioh, 799 reg + (sc->sc_codecnum * ICH_CODEC_OFFSET)); 800 DPRINTF(ICH_DEBUG_CODECIO, 801 ("auich_read_codec(%x, %x)\n", reg, *val)); 802 status = bus_space_read_4(sc->iot, sc->aud_ioh, 803 ICH_GSTS + sc->sc_modem_offset); 804 if (status & ICH_RCS) { 805 bus_space_write_4(sc->iot, sc->aud_ioh, 806 ICH_GSTS + sc->sc_modem_offset, 807 status & ~(ICH_SRI|ICH_PRI|ICH_GSCI)); 808 *val = 0xffff; 809 DPRINTF(ICH_DEBUG_CODECIO, 810 ("%s: read_codec error\n", device_xname(sc->sc_dev))); 811 if (reg == AC97_REG_GPIO_STATUS) 812 auich_clear_cas(sc); 813 return -1; 814 } 815 if (reg == AC97_REG_GPIO_STATUS) 816 auich_clear_cas(sc); 817 return 0; 818 } else { 819 aprint_normal_dev(sc->sc_dev, "read_codec timeout\n"); 820 if (reg == AC97_REG_GPIO_STATUS) 821 auich_clear_cas(sc); 822 return -1; 823 } 824 } 825 826 static int 827 auich_write_codec(void *v, uint8_t reg, uint16_t val) 828 { 829 struct auich_softc *sc; 830 int i; 831 832 DPRINTF(ICH_DEBUG_CODECIO, ("auich_write_codec(%x, %x)\n", reg, val)); 833 sc = v; 834 /* wait for an access semaphore */ 835 for (i = ICH_SEMATIMO / ICH_CODECIO_INTERVAL; i-- && 836 bus_space_read_1(sc->iot, sc->aud_ioh, 837 ICH_CAS + sc->sc_modem_offset) & 1; 838 DELAY(ICH_CODECIO_INTERVAL)); 839 840 if (i > 0) { 841 bus_space_write_2(sc->iot, sc->mix_ioh, 842 reg + (sc->sc_codecnum * ICH_CODEC_OFFSET), val); 843 return 0; 844 } else { 845 aprint_normal_dev(sc->sc_dev, "write_codec timeout\n"); 846 return -1; 847 } 848 } 849 850 static int 851 auich_attach_codec(void *v, struct ac97_codec_if *cif) 852 { 853 struct auich_softc *sc; 854 855 sc = v; 856 sc->codec_if = cif; 857 858 return 0; 859 } 860 861 static int 862 auich_reset_codec(void *v) 863 { 864 struct auich_softc *sc; 865 int i; 866 uint32_t control, status; 867 868 sc = v; 869 control = bus_space_read_4(sc->iot, sc->aud_ioh, 870 ICH_GCTRL + sc->sc_modem_offset); 871 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 872 control &= ~(ICH_ACLSO | sc->sc_pcm246_mask); 873 } else { 874 control &= ~ICH_ACLSO; 875 control |= ICH_GIE; 876 } 877 control |= (control & ICH_CRESET) ? ICH_WRESET : ICH_CRESET; 878 bus_space_write_4(sc->iot, sc->aud_ioh, 879 ICH_GCTRL + sc->sc_modem_offset, control); 880 881 for (i = 500000; i >= 0; i--) { 882 status = bus_space_read_4(sc->iot, sc->aud_ioh, 883 ICH_GSTS + sc->sc_modem_offset); 884 if (status & (ICH_PCR | ICH_SCR | ICH_S2CR)) 885 break; 886 DELAY(1); 887 } 888 if (i <= 0) { 889 aprint_error_dev(sc->sc_dev, "auich_reset_codec: time out\n"); 890 return ETIMEDOUT; 891 } 892 #ifdef AUICH_DEBUG 893 if (status & ICH_SCR) 894 printf("%s: The 2nd codec is ready.\n", 895 device_xname(sc->sc_dev)); 896 if (status & ICH_S2CR) 897 printf("%s: The 3rd codec is ready.\n", 898 device_xname(sc->sc_dev)); 899 #endif 900 return 0; 901 } 902 903 static enum ac97_host_flags 904 auich_flags_codec(void *v) 905 { 906 struct auich_softc *sc = v; 907 return sc->sc_codecflags; 908 } 909 910 static void 911 auich_spdif_event(void *addr, bool flag) 912 { 913 struct auich_softc *sc; 914 915 sc = addr; 916 sc->sc_spdif = flag; 917 } 918 919 static int 920 auich_open(void *addr, int flags) 921 { 922 struct auich_softc *sc; 923 924 sc = (struct auich_softc *)addr; 925 mutex_spin_exit(&sc->sc_intr_lock); 926 sc->codec_if->vtbl->lock(sc->codec_if); 927 mutex_spin_enter(&sc->sc_intr_lock); 928 return 0; 929 } 930 931 static void 932 auich_close(void *addr) 933 { 934 struct auich_softc *sc; 935 936 sc = (struct auich_softc *)addr; 937 mutex_spin_exit(&sc->sc_intr_lock); 938 sc->codec_if->vtbl->unlock(sc->codec_if); 939 mutex_spin_enter(&sc->sc_intr_lock); 940 } 941 942 static int 943 auich_query_encoding(void *v, struct audio_encoding *aep) 944 { 945 struct auich_softc *sc; 946 947 sc = (struct auich_softc *)v; 948 return auconv_query_encoding( 949 sc->sc_spdif ? sc->sc_spdif_encodings : sc->sc_encodings, aep); 950 } 951 952 static int 953 auich_set_rate(struct auich_softc *sc, int mode, u_long srate) 954 { 955 int ret; 956 u_int ratetmp; 957 958 sc->codec_if->vtbl->set_clock(sc->codec_if, sc->sc_ac97_clock); 959 ratetmp = srate; 960 if (mode == AUMODE_RECORD) 961 return sc->codec_if->vtbl->set_rate(sc->codec_if, 962 AC97_REG_PCM_LR_ADC_RATE, &ratetmp); 963 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 964 AC97_REG_PCM_FRONT_DAC_RATE, &ratetmp); 965 if (ret) 966 return ret; 967 ratetmp = srate; 968 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 969 AC97_REG_PCM_SURR_DAC_RATE, &ratetmp); 970 if (ret) 971 return ret; 972 ratetmp = srate; 973 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 974 AC97_REG_PCM_LFE_DAC_RATE, &ratetmp); 975 return ret; 976 } 977 978 static int 979 auich_set_params(void *v, int setmode, int usemode, 980 audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil, 981 stream_filter_list_t *rfil) 982 { 983 struct auich_softc *sc; 984 audio_params_t *p; 985 stream_filter_list_t *fil; 986 int mode, index; 987 uint32_t control; 988 989 sc = v; 990 for (mode = AUMODE_RECORD; mode != -1; 991 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 992 if ((setmode & mode) == 0) 993 continue; 994 995 p = mode == AUMODE_PLAY ? play : rec; 996 fil = mode == AUMODE_PLAY ? pfil : rfil; 997 if (p == NULL) 998 continue; 999 1000 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 1001 if (p->sample_rate < 8000 || 1002 p->sample_rate > 48000) 1003 return EINVAL; 1004 1005 if (!sc->sc_spdif) 1006 index = auconv_set_converter(sc->sc_audio_formats, 1007 AUICH_AUDIO_NFORMATS, mode, p, TRUE, fil); 1008 else 1009 index = auconv_set_converter(auich_spdif_formats, 1010 AUICH_SPDIF_NFORMATS, mode, p, TRUE, fil); 1011 } else { 1012 if (p->sample_rate != 8000 && p->sample_rate != 16000) 1013 return EINVAL; 1014 index = auconv_set_converter(sc->sc_modem_formats, 1015 AUICH_MODEM_NFORMATS, mode, p, TRUE, fil); 1016 } 1017 if (index < 0) 1018 return EINVAL; 1019 if (fil->req_size > 0) 1020 p = &fil->filters[0].param; 1021 /* p represents HW encoding */ 1022 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 1023 if (sc->sc_audio_formats[index].frequency_type != 1 1024 && auich_set_rate(sc, mode, p->sample_rate)) 1025 return EINVAL; 1026 } else { 1027 if (sc->sc_modem_formats[index].frequency_type != 1 1028 && auich_set_rate(sc, mode, p->sample_rate)) 1029 return EINVAL; 1030 auich_write_codec(sc, AC97_REG_LINE1_RATE, 1031 p->sample_rate); 1032 auich_write_codec(sc, AC97_REG_LINE1_LEVEL, 0); 1033 } 1034 if (mode == AUMODE_PLAY && 1035 sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 1036 control = bus_space_read_4(sc->iot, sc->aud_ioh, 1037 ICH_GCTRL + sc->sc_modem_offset); 1038 control &= ~sc->sc_pcm246_mask; 1039 if (p->channels == 4) { 1040 control |= sc->sc_pcm4; 1041 } else if (p->channels == 6) { 1042 control |= sc->sc_pcm6; 1043 } 1044 bus_space_write_4(sc->iot, sc->aud_ioh, 1045 ICH_GCTRL + sc->sc_modem_offset, control); 1046 } 1047 } 1048 1049 return 0; 1050 } 1051 1052 static int 1053 auich_round_blocksize(void *v, int blk, int mode, 1054 const audio_params_t *param) 1055 { 1056 1057 return blk & ~0x3f; /* keep good alignment */ 1058 } 1059 1060 static void 1061 auich_halt_pipe(struct auich_softc *sc, int pipe) 1062 { 1063 int i; 1064 uint32_t status; 1065 1066 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, 0); 1067 for (i = 0; i < 100; i++) { 1068 status = bus_space_read_4(sc->iot, sc->aud_ioh, pipe + ICH_STS); 1069 if (status & ICH_DCH) 1070 break; 1071 DELAY(1); 1072 } 1073 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, ICH_RR); 1074 1075 #if AUICH_DEBUG 1076 if (i > 0) 1077 printf("auich_halt_pipe: halt took %d cycles\n", i); 1078 #endif 1079 } 1080 1081 static int 1082 auich_halt_output(void *v) 1083 { 1084 struct auich_softc *sc; 1085 1086 sc = v; 1087 DPRINTF(ICH_DEBUG_DMA, ("%s: halt_output\n", device_xname(sc->sc_dev))); 1088 1089 auich_halt_pipe(sc, ICH_PCMO); 1090 sc->pcmo.intr = NULL; 1091 1092 return 0; 1093 } 1094 1095 static int 1096 auich_halt_input(void *v) 1097 { 1098 struct auich_softc *sc; 1099 1100 sc = v; 1101 DPRINTF(ICH_DEBUG_DMA, ("%s: halt_input\n", device_xname(sc->sc_dev))); 1102 1103 auich_halt_pipe(sc, ICH_PCMI); 1104 sc->pcmi.intr = NULL; 1105 1106 return 0; 1107 } 1108 1109 static int 1110 auich_getdev(void *v, struct audio_device *adp) 1111 { 1112 struct auich_softc *sc; 1113 1114 sc = v; 1115 *adp = sc->sc_audev; 1116 return 0; 1117 } 1118 1119 static int 1120 auich_set_port(void *v, mixer_ctrl_t *cp) 1121 { 1122 struct auich_softc *sc; 1123 1124 sc = v; 1125 return sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp); 1126 } 1127 1128 static int 1129 auich_get_port(void *v, mixer_ctrl_t *cp) 1130 { 1131 struct auich_softc *sc; 1132 1133 sc = v; 1134 return sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp); 1135 } 1136 1137 static int 1138 auich_query_devinfo(void *v, mixer_devinfo_t *dp) 1139 { 1140 struct auich_softc *sc; 1141 1142 sc = v; 1143 return sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp); 1144 } 1145 1146 static void * 1147 auich_allocm(void *v, int direction, size_t size) 1148 { 1149 struct auich_softc *sc; 1150 struct auich_dma *p; 1151 int error; 1152 1153 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX)) 1154 return NULL; 1155 1156 p = kmem_alloc(sizeof(*p), KM_SLEEP); 1157 if (p == NULL) 1158 return NULL; 1159 1160 sc = v; 1161 error = auich_allocmem(sc, size, 0, p); 1162 if (error) { 1163 kmem_free(p, sizeof(*p)); 1164 return NULL; 1165 } 1166 1167 p->next = sc->sc_dmas; 1168 sc->sc_dmas = p; 1169 1170 return KERNADDR(p); 1171 } 1172 1173 static void 1174 auich_freem(void *v, void *ptr, size_t size) 1175 { 1176 struct auich_softc *sc; 1177 struct auich_dma *p, **pp; 1178 1179 sc = v; 1180 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 1181 if (KERNADDR(p) == ptr) { 1182 auich_freemem(sc, p); 1183 *pp = p->next; 1184 kmem_free(p, sizeof(*p)); 1185 return; 1186 } 1187 } 1188 } 1189 1190 static size_t 1191 auich_round_buffersize(void *v, int direction, size_t size) 1192 { 1193 1194 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX)) 1195 size = ICH_DMALIST_MAX * ICH_DMASEG_MAX; 1196 1197 return size; 1198 } 1199 1200 static paddr_t 1201 auich_mappage(void *v, void *mem, off_t off, int prot) 1202 { 1203 struct auich_softc *sc; 1204 struct auich_dma *p; 1205 1206 if (off < 0) 1207 return -1; 1208 sc = v; 1209 for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next) 1210 continue; 1211 if (!p) 1212 return -1; 1213 return bus_dmamem_mmap(sc->dmat, p->segs, p->nsegs, 1214 off, prot, BUS_DMA_WAITOK); 1215 } 1216 1217 static int 1218 auich_get_props(void *v) 1219 { 1220 struct auich_softc *sc; 1221 int props; 1222 1223 props = AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 1224 sc = v; 1225 /* 1226 * Even if the codec is fixed-rate, set_param() succeeds for any sample 1227 * rate because of aurateconv. Applications can't know what rate the 1228 * device can process in the case of mmap(). 1229 */ 1230 if (!AC97_IS_FIXED_RATE(sc->codec_if) || 1231 sc->sc_codectype == AC97_CODEC_TYPE_MODEM) 1232 props |= AUDIO_PROP_MMAP; 1233 return props; 1234 } 1235 1236 static int 1237 auich_intr(void *v) 1238 { 1239 struct auich_softc *sc; 1240 int ret, gsts; 1241 #ifdef DIAGNOSTIC 1242 int csts; 1243 #endif 1244 1245 sc = v; 1246 1247 if (!device_has_power(sc->sc_dev)) 1248 return (0); 1249 1250 mutex_spin_enter(&sc->sc_intr_lock); 1251 1252 ret = 0; 1253 #ifdef DIAGNOSTIC 1254 csts = pci_conf_read(sc->sc_pc, sc->sc_pt, PCI_COMMAND_STATUS_REG); 1255 if (csts & PCI_STATUS_MASTER_ABORT) { 1256 printf("auich_intr: PCI master abort\n"); 1257 } 1258 #endif 1259 1260 gsts = bus_space_read_4(sc->iot, sc->aud_ioh, 1261 ICH_GSTS + sc->sc_modem_offset); 1262 DPRINTF(ICH_DEBUG_INTR, ("auich_intr: gsts=0x%x\n", gsts)); 1263 1264 if ((sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_POINT) || 1265 (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_MOINT)) { 1266 int sts; 1267 1268 sts = bus_space_read_2(sc->iot, sc->aud_ioh, 1269 ICH_PCMO + sc->sc_sts_reg); 1270 DPRINTF(ICH_DEBUG_INTR, 1271 ("auich_intr: osts=0x%x\n", sts)); 1272 1273 if (sts & ICH_FIFOE) 1274 printf("%s: fifo underrun\n", device_xname(sc->sc_dev)); 1275 1276 if (sts & ICH_BCIS) 1277 auich_intr_pipe(sc, ICH_PCMO, &sc->pcmo); 1278 1279 /* int ack */ 1280 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMO + 1281 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE)); 1282 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 1283 bus_space_write_4(sc->iot, sc->aud_ioh, 1284 ICH_GSTS + sc->sc_modem_offset, ICH_POINT); 1285 else 1286 bus_space_write_4(sc->iot, sc->aud_ioh, 1287 ICH_GSTS + sc->sc_modem_offset, ICH_MOINT); 1288 ret++; 1289 } 1290 1291 if ((sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_PIINT) || 1292 (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_MIINT)) { 1293 int sts; 1294 1295 sts = bus_space_read_2(sc->iot, sc->aud_ioh, 1296 ICH_PCMI + sc->sc_sts_reg); 1297 DPRINTF(ICH_DEBUG_INTR, 1298 ("auich_intr: ists=0x%x\n", sts)); 1299 1300 if (sts & ICH_FIFOE) 1301 printf("%s: fifo overrun\n", device_xname(sc->sc_dev)); 1302 1303 if (sts & ICH_BCIS) 1304 auich_intr_pipe(sc, ICH_PCMI, &sc->pcmi); 1305 1306 /* int ack */ 1307 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMI + 1308 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE)); 1309 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 1310 bus_space_write_4(sc->iot, sc->aud_ioh, 1311 ICH_GSTS + sc->sc_modem_offset, ICH_PIINT); 1312 else 1313 bus_space_write_4(sc->iot, sc->aud_ioh, 1314 ICH_GSTS + sc->sc_modem_offset, ICH_MIINT); 1315 ret++; 1316 } 1317 1318 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_MINT) { 1319 int sts; 1320 1321 sts = bus_space_read_2(sc->iot, sc->aud_ioh, 1322 ICH_MICI + sc->sc_sts_reg); 1323 DPRINTF(ICH_DEBUG_INTR, 1324 ("auich_intr: ists=0x%x\n", sts)); 1325 1326 if (sts & ICH_FIFOE) 1327 printf("%s: fifo overrun\n", device_xname(sc->sc_dev)); 1328 1329 if (sts & ICH_BCIS) 1330 auich_intr_pipe(sc, ICH_MICI, &sc->mici); 1331 1332 /* int ack */ 1333 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_MICI + 1334 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE)); 1335 bus_space_write_4(sc->iot, sc->aud_ioh, 1336 ICH_GSTS + sc->sc_modem_offset, ICH_MINT); 1337 ret++; 1338 } 1339 1340 #ifdef AUICH_MODEM_DEBUG 1341 if (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_GSCI) { 1342 printf("%s: gsts=0x%x\n", device_xname(sc->sc_dev), gsts); 1343 /* int ack */ 1344 bus_space_write_4(sc->iot, sc->aud_ioh, 1345 ICH_GSTS + sc->sc_modem_offset, ICH_GSCI); 1346 ret++; 1347 } 1348 #endif 1349 1350 mutex_spin_exit(&sc->sc_intr_lock); 1351 1352 return ret; 1353 } 1354 1355 static void 1356 auich_trigger_pipe(struct auich_softc *sc, int pipe, struct auich_ring *ring) 1357 { 1358 int blksize, qptr; 1359 struct auich_dmalist *q; 1360 1361 blksize = ring->blksize; 1362 1363 for (qptr = 0; qptr < ICH_DMALIST_MAX; qptr++) { 1364 q = &ring->dmalist[qptr]; 1365 q->base = ring->p; 1366 q->len = (blksize >> sc->sc_sample_shift) | ICH_DMAF_IOC; 1367 1368 ring->p += blksize; 1369 if (ring->p >= ring->end) 1370 ring->p = ring->start; 1371 } 1372 ring->qptr = 0; 1373 1374 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_LVI, 1375 (qptr - 1) & ICH_LVI_MASK); 1376 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, 1377 ICH_IOCE | ICH_FEIE | ICH_RPBM); 1378 } 1379 1380 static void 1381 auich_intr_pipe(struct auich_softc *sc, int pipe, struct auich_ring *ring) 1382 { 1383 int blksize, qptr, nqptr; 1384 struct auich_dmalist *q; 1385 1386 blksize = ring->blksize; 1387 qptr = ring->qptr; 1388 nqptr = bus_space_read_1(sc->iot, sc->aud_ioh, pipe + ICH_CIV); 1389 1390 while (qptr != nqptr) { 1391 q = &ring->dmalist[qptr]; 1392 q->base = ring->p; 1393 q->len = (blksize >> sc->sc_sample_shift) | ICH_DMAF_IOC; 1394 1395 DPRINTF(ICH_DEBUG_INTR, 1396 ("auich_intr: %p, %p = %x @ 0x%x\n", 1397 &ring->dmalist[qptr], q, q->len, q->base)); 1398 1399 ring->p += blksize; 1400 if (ring->p >= ring->end) 1401 ring->p = ring->start; 1402 1403 qptr = (qptr + 1) & ICH_LVI_MASK; 1404 if (ring->intr) 1405 ring->intr(ring->arg); 1406 } 1407 ring->qptr = qptr; 1408 1409 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_LVI, 1410 (qptr - 1) & ICH_LVI_MASK); 1411 } 1412 1413 static int 1414 auich_trigger_output(void *v, void *start, void *end, int blksize, 1415 void (*intr)(void *), void *arg, const audio_params_t *param) 1416 { 1417 struct auich_softc *sc; 1418 struct auich_dma *p; 1419 size_t size; 1420 1421 DPRINTF(ICH_DEBUG_DMA, 1422 ("auich_trigger_output(%p, %p, %d, %p, %p, %p)\n", 1423 start, end, blksize, intr, arg, param)); 1424 sc = v; 1425 1426 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1427 continue; 1428 if (!p) { 1429 printf("auich_trigger_output: bad addr %p\n", start); 1430 return EINVAL; 1431 } 1432 1433 size = (size_t)((char *)end - (char *)start); 1434 1435 sc->pcmo.intr = intr; 1436 sc->pcmo.arg = arg; 1437 sc->pcmo.start = DMAADDR(p); 1438 sc->pcmo.p = sc->pcmo.start; 1439 sc->pcmo.end = sc->pcmo.start + size; 1440 sc->pcmo.blksize = blksize; 1441 1442 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_BDBAR, 1443 sc->sc_cddma + ICH_PCMO_OFF(0)); 1444 auich_trigger_pipe(sc, ICH_PCMO, &sc->pcmo); 1445 1446 return 0; 1447 } 1448 1449 static int 1450 auich_trigger_input(void *v, void *start, void *end, int blksize, 1451 void (*intr)(void *), void *arg, const audio_params_t *param) 1452 { 1453 struct auich_softc *sc; 1454 struct auich_dma *p; 1455 size_t size; 1456 1457 DPRINTF(ICH_DEBUG_DMA, 1458 ("auich_trigger_input(%p, %p, %d, %p, %p, %p)\n", 1459 start, end, blksize, intr, arg, param)); 1460 sc = v; 1461 1462 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1463 continue; 1464 if (!p) { 1465 printf("auich_trigger_input: bad addr %p\n", start); 1466 return EINVAL; 1467 } 1468 1469 size = (size_t)((char *)end - (char *)start); 1470 1471 sc->pcmi.intr = intr; 1472 sc->pcmi.arg = arg; 1473 sc->pcmi.start = DMAADDR(p); 1474 sc->pcmi.p = sc->pcmi.start; 1475 sc->pcmi.end = sc->pcmi.start + size; 1476 sc->pcmi.blksize = blksize; 1477 1478 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_BDBAR, 1479 sc->sc_cddma + ICH_PCMI_OFF(0)); 1480 auich_trigger_pipe(sc, ICH_PCMI, &sc->pcmi); 1481 1482 return 0; 1483 } 1484 1485 static int 1486 auich_powerstate(void *v, int state) 1487 { 1488 return 0; 1489 } 1490 1491 static int 1492 auich_allocmem(struct auich_softc *sc, size_t size, size_t align, 1493 struct auich_dma *p) 1494 { 1495 int error; 1496 1497 p->size = size; 1498 error = bus_dmamem_alloc(sc->dmat, p->size, align, 0, 1499 p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 1500 &p->nsegs, BUS_DMA_WAITOK); 1501 if (error) 1502 return error; 1503 1504 error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size, 1505 &p->addr, BUS_DMA_WAITOK|sc->sc_dmamap_flags); 1506 if (error) 1507 goto free; 1508 1509 error = bus_dmamap_create(sc->dmat, p->size, 1, p->size, 1510 0, BUS_DMA_WAITOK, &p->map); 1511 if (error) 1512 goto unmap; 1513 1514 error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL, 1515 BUS_DMA_WAITOK); 1516 if (error) 1517 goto destroy; 1518 return 0; 1519 1520 destroy: 1521 bus_dmamap_destroy(sc->dmat, p->map); 1522 unmap: 1523 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1524 free: 1525 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1526 return error; 1527 } 1528 1529 static int 1530 auich_freemem(struct auich_softc *sc, struct auich_dma *p) 1531 { 1532 1533 bus_dmamap_unload(sc->dmat, p->map); 1534 bus_dmamap_destroy(sc->dmat, p->map); 1535 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1536 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1537 return 0; 1538 } 1539 1540 static int 1541 auich_alloc_cdata(struct auich_softc *sc) 1542 { 1543 bus_dma_segment_t seg; 1544 int error, rseg; 1545 1546 /* 1547 * Allocate the control data structure, and create and load the 1548 * DMA map for it. 1549 */ 1550 if ((error = bus_dmamem_alloc(sc->dmat, 1551 sizeof(struct auich_cdata), 1552 PAGE_SIZE, 0, &seg, 1, &rseg, 0)) != 0) { 1553 aprint_error_dev(sc->sc_dev, "unable to allocate control data, error = %d\n", error); 1554 goto fail_0; 1555 } 1556 1557 if ((error = bus_dmamem_map(sc->dmat, &seg, rseg, 1558 sizeof(struct auich_cdata), 1559 (void **) &sc->sc_cdata, 1560 sc->sc_dmamap_flags)) != 0) { 1561 aprint_error_dev(sc->sc_dev, "unable to map control data, error = %d\n", error); 1562 goto fail_1; 1563 } 1564 1565 if ((error = bus_dmamap_create(sc->dmat, sizeof(struct auich_cdata), 1, 1566 sizeof(struct auich_cdata), 0, 0, 1567 &sc->sc_cddmamap)) != 0) { 1568 aprint_error_dev(sc->sc_dev, "unable to create control data DMA map, " 1569 "error = %d\n", error); 1570 goto fail_2; 1571 } 1572 1573 if ((error = bus_dmamap_load(sc->dmat, sc->sc_cddmamap, 1574 sc->sc_cdata, sizeof(struct auich_cdata), 1575 NULL, 0)) != 0) { 1576 aprint_error_dev(sc->sc_dev, "unable tp load control data DMA map, " 1577 "error = %d\n", error); 1578 goto fail_3; 1579 } 1580 1581 sc->pcmo.dmalist = sc->sc_cdata->ic_dmalist_pcmo; 1582 sc->pcmi.dmalist = sc->sc_cdata->ic_dmalist_pcmi; 1583 sc->mici.dmalist = sc->sc_cdata->ic_dmalist_mici; 1584 1585 return 0; 1586 1587 fail_3: 1588 bus_dmamap_destroy(sc->dmat, sc->sc_cddmamap); 1589 fail_2: 1590 bus_dmamem_unmap(sc->dmat, (void *) sc->sc_cdata, 1591 sizeof(struct auich_cdata)); 1592 fail_1: 1593 bus_dmamem_free(sc->dmat, &seg, rseg); 1594 fail_0: 1595 return error; 1596 } 1597 1598 static bool 1599 auich_resume(device_t dv, const pmf_qual_t *qual) 1600 { 1601 struct auich_softc *sc = device_private(dv); 1602 pcireg_t v; 1603 1604 mutex_enter(&sc->sc_lock); 1605 mutex_spin_enter(&sc->sc_intr_lock); 1606 1607 if (sc->sc_iose) { 1608 v = pci_conf_read(sc->sc_pc, sc->sc_pt, ICH_CFG); 1609 pci_conf_write(sc->sc_pc, sc->sc_pt, ICH_CFG, 1610 v | ICH_CFG_IOSE); 1611 } 1612 1613 auich_reset_codec(sc); 1614 mutex_spin_exit(&sc->sc_intr_lock); 1615 DELAY(1000); 1616 (sc->codec_if->vtbl->restore_ports)(sc->codec_if); 1617 mutex_exit(&sc->sc_lock); 1618 1619 return true; 1620 } 1621 1622 /* 1623 * Calibrate card (some boards are overclocked and need scaling) 1624 */ 1625 static void 1626 auich_calibrate(struct auich_softc *sc) 1627 { 1628 struct timeval t1, t2; 1629 uint8_t ociv, nciv; 1630 uint64_t wait_us; 1631 uint32_t actual_48k_rate, bytes, ac97rate; 1632 void *temp_buffer; 1633 struct auich_dma *p; 1634 u_int rate; 1635 1636 /* 1637 * Grab audio from input for fixed interval and compare how 1638 * much we actually get with what we expect. Interval needs 1639 * to be sufficiently short that no interrupts are 1640 * generated. 1641 */ 1642 1643 /* Force the codec to a known state first. */ 1644 sc->codec_if->vtbl->set_clock(sc->codec_if, 48000); 1645 rate = sc->sc_ac97_clock = 48000; 1646 sc->codec_if->vtbl->set_rate(sc->codec_if, AC97_REG_PCM_LR_ADC_RATE, 1647 &rate); 1648 1649 /* Setup a buffer */ 1650 bytes = 64000; 1651 temp_buffer = auich_allocm(sc, AUMODE_RECORD, bytes); 1652 1653 for (p = sc->sc_dmas; p && KERNADDR(p) != temp_buffer; p = p->next) 1654 continue; 1655 if (p == NULL) { 1656 printf("auich_calibrate: bad address %p\n", temp_buffer); 1657 return; 1658 } 1659 sc->pcmi.dmalist[0].base = DMAADDR(p); 1660 sc->pcmi.dmalist[0].len = (bytes >> sc->sc_sample_shift); 1661 1662 /* 1663 * our data format is stereo, 16 bit so each sample is 4 bytes. 1664 * assuming we get 48000 samples per second, we get 192000 bytes/sec. 1665 * we're going to start recording with interrupts disabled and measure 1666 * the time taken for one block to complete. we know the block size, 1667 * we know the time in microseconds, we calculate the sample rate: 1668 * 1669 * actual_rate [bps] = bytes / (time [s] * 4) 1670 * actual_rate [bps] = (bytes * 1000000) / (time [us] * 4) 1671 * actual_rate [Hz] = (bytes * 250000) / time [us] 1672 */ 1673 1674 /* prepare */ 1675 ociv = bus_space_read_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CIV); 1676 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_BDBAR, 1677 sc->sc_cddma + ICH_PCMI_OFF(0)); 1678 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_LVI, 1679 (0 - 1) & ICH_LVI_MASK); 1680 1681 /* start */ 1682 kpreempt_disable(); 1683 microtime(&t1); 1684 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, ICH_RPBM); 1685 1686 /* wait */ 1687 nciv = ociv; 1688 do { 1689 microtime(&t2); 1690 if (t2.tv_sec - t1.tv_sec > 1) 1691 break; 1692 nciv = bus_space_read_1(sc->iot, sc->aud_ioh, 1693 ICH_PCMI + ICH_CIV); 1694 } while (nciv == ociv); 1695 microtime(&t2); 1696 1697 /* stop */ 1698 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, 0); 1699 kpreempt_enable(); 1700 1701 /* reset */ 1702 DELAY(100); 1703 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, ICH_RR); 1704 1705 /* turn time delta into us */ 1706 wait_us = ((t2.tv_sec - t1.tv_sec) * 1000000) + t2.tv_usec - t1.tv_usec; 1707 1708 auich_freem(sc, temp_buffer, bytes); 1709 1710 if (nciv == ociv) { 1711 printf("%s: ac97 link rate calibration timed out after %" 1712 PRIu64 " us\n", device_xname(sc->sc_dev), wait_us); 1713 return; 1714 } 1715 1716 actual_48k_rate = (bytes * UINT64_C(250000)) / wait_us; 1717 1718 if (actual_48k_rate < 50000) 1719 ac97rate = 48000; 1720 else 1721 ac97rate = ((actual_48k_rate + 500) / 1000) * 1000; 1722 1723 aprint_verbose_dev(sc->sc_dev, "measured ac97 link rate at %d Hz", 1724 actual_48k_rate); 1725 if (ac97rate != actual_48k_rate) 1726 aprint_verbose(", will use %d Hz", ac97rate); 1727 aprint_verbose("\n"); 1728 1729 sc->sc_ac97_clock = ac97rate; 1730 } 1731 1732 static void 1733 auich_clear_cas(struct auich_softc *sc) 1734 { 1735 /* Clear the codec access semaphore */ 1736 (void)bus_space_read_2(sc->iot, sc->mix_ioh, 1737 AC97_REG_RESET * (sc->sc_codecnum * ICH_CODEC_OFFSET)); 1738 1739 return; 1740 } 1741 1742 static void 1743 auich_get_locks(void *addr, kmutex_t **intr, kmutex_t **thread) 1744 { 1745 struct auich_softc *sc; 1746 1747 sc = addr; 1748 *intr = &sc->sc_intr_lock; 1749 *thread = &sc->sc_lock; 1750 } 1751
Indexes created Thu Oct 23 22:10:10 GMT 2025