auich.c revision 1.141
1 /* $NetBSD: auich.c,v 1.141 2012/06/02 21:36:44 dsl Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2004, 2005, 2008 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Copyright (c) 2000 Michael Shalayeff 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. The name of the author may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 51 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 52 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 53 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 55 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 56 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 57 * THE POSSIBILITY OF SUCH DAMAGE. 58 * 59 * from OpenBSD: ich.c,v 1.3 2000/08/11 06:17:18 mickey Exp 60 */ 61 62 /* 63 * Copyright (c) 2000 Katsurajima Naoto <raven (at) katsurajima.seya.yokohama.jp> 64 * Copyright (c) 2001 Cameron Grant <cg (at) freebsd.org> 65 * All rights reserved. 66 * 67 * Redistribution and use in source and binary forms, with or without 68 * modification, are permitted provided that the following conditions 69 * are met: 70 * 1. Redistributions of source code must retain the above copyright 71 * notice, this list of conditions and the following disclaimer. 72 * 2. Redistributions in binary form must reproduce the above copyright 73 * notice, this list of conditions and the following disclaimer in the 74 * documentation and/or other materials provided with the distribution. 75 * 76 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 77 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 78 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 79 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 80 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 81 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 82 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 83 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 84 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 85 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF 86 * SUCH DAMAGE. 87 * 88 * auich_calibrate() was from FreeBSD: ich.c,v 1.22 2002/06/27 22:36:01 scottl Exp 89 */ 90 91 92 /* #define AUICH_DEBUG */ 93 /* 94 * AC'97 audio found on Intel 810/820/440MX chipsets. 95 * http://developer.intel.com/design/chipsets/datashts/290655.htm 96 * http://developer.intel.com/design/chipsets/manuals/298028.htm 97 * ICH3:http://www.intel.com/design/chipsets/datashts/290716.htm 98 * ICH4:http://www.intel.com/design/chipsets/datashts/290744.htm 99 * ICH5:http://www.intel.com/design/chipsets/datashts/252516.htm 100 * AMD8111: 101 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/24674.pdf 102 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25720.pdf 103 * 104 * TODO: 105 * - Add support for the dedicated microphone input. 106 * 107 * NOTE: 108 * - The 440MX B-stepping at running 100MHz has a hardware erratum. 109 * It causes PCI master abort and hangups until cold reboot. 110 * http://www.intel.com/design/chipsets/specupdt/245051.htm 111 */ 112 113 #include <sys/cdefs.h> 114 __KERNEL_RCSID(0, "$NetBSD: auich.c,v 1.141 2012/06/02 21:36:44 dsl Exp $"); 115 116 #include <sys/param.h> 117 #include <sys/systm.h> 118 #include <sys/kernel.h> 119 #include <sys/kmem.h> 120 #include <sys/device.h> 121 #include <sys/fcntl.h> 122 #include <sys/proc.h> 123 #include <sys/sysctl.h> 124 #include <sys/audioio.h> 125 #include <sys/bus.h> 126 127 #include <dev/pci/pcidevs.h> 128 #include <dev/pci/pcivar.h> 129 #include <dev/pci/auichreg.h> 130 131 #include <dev/audio_if.h> 132 #include <dev/mulaw.h> 133 #include <dev/auconv.h> 134 135 #include <dev/ic/ac97reg.h> 136 #include <dev/ic/ac97var.h> 137 138 struct auich_dma { 139 bus_dmamap_t map; 140 void *addr; 141 bus_dma_segment_t segs[1]; 142 int nsegs; 143 size_t size; 144 struct auich_dma *next; 145 }; 146 147 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 148 #define KERNADDR(p) ((void *)((p)->addr)) 149 150 struct auich_cdata { 151 struct auich_dmalist ic_dmalist_pcmo[ICH_DMALIST_MAX]; 152 struct auich_dmalist ic_dmalist_pcmi[ICH_DMALIST_MAX]; 153 struct auich_dmalist ic_dmalist_mici[ICH_DMALIST_MAX]; 154 }; 155 156 #define ICH_CDOFF(x) offsetof(struct auich_cdata, x) 157 #define ICH_PCMO_OFF(x) ICH_CDOFF(ic_dmalist_pcmo[(x)]) 158 #define ICH_PCMI_OFF(x) ICH_CDOFF(ic_dmalist_pcmi[(x)]) 159 #define ICH_MICI_OFF(x) ICH_CDOFF(ic_dmalist_mici[(x)]) 160 161 struct auich_softc { 162 device_t sc_dev; 163 void *sc_ih; 164 kmutex_t sc_lock; 165 kmutex_t sc_intr_lock; 166 167 device_t sc_audiodev; 168 audio_device_t sc_audev; 169 170 pci_chipset_tag_t sc_pc; 171 pcitag_t sc_pt; 172 bus_space_tag_t iot; 173 bus_space_handle_t mix_ioh; 174 bus_size_t mix_size; 175 bus_space_handle_t aud_ioh; 176 bus_size_t aud_size; 177 bus_dma_tag_t dmat; 178 pci_intr_handle_t intrh; 179 180 struct ac97_codec_if *codec_if; 181 struct ac97_host_if host_if; 182 int sc_codecnum; 183 int sc_codectype; 184 int sc_fixedrate; 185 enum ac97_host_flags sc_codecflags; 186 bool sc_spdif; 187 188 /* multi-channel control bits */ 189 int sc_pcm246_mask; 190 int sc_pcm2; 191 int sc_pcm4; 192 int sc_pcm6; 193 194 /* DMA scatter-gather lists. */ 195 bus_dmamap_t sc_cddmamap; 196 #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr 197 198 struct auich_cdata *sc_cdata; 199 200 struct auich_ring { 201 int qptr; 202 struct auich_dmalist *dmalist; 203 204 uint32_t start, p, end; 205 int blksize; 206 207 void (*intr)(void *); 208 void *arg; 209 } pcmo, pcmi, mici; 210 211 struct auich_dma *sc_dmas; 212 213 /* SiS 7012 hack */ 214 int sc_sample_shift; 215 int sc_sts_reg; 216 /* 440MX workaround */ 217 int sc_dmamap_flags; 218 /* flags */ 219 int sc_iose :1, 220 :31; 221 222 /* sysctl */ 223 struct sysctllog *sc_log; 224 uint32_t sc_ac97_clock; 225 int sc_ac97_clock_mib; 226 227 int sc_modem_offset; 228 229 #define AUICH_AUDIO_NFORMATS 3 230 #define AUICH_MODEM_NFORMATS 1 231 struct audio_format sc_audio_formats[AUICH_AUDIO_NFORMATS]; 232 struct audio_format sc_modem_formats[AUICH_MODEM_NFORMATS]; 233 struct audio_encoding_set *sc_encodings; 234 struct audio_encoding_set *sc_spdif_encodings; 235 }; 236 237 /* Debug */ 238 #ifdef AUICH_DEBUG 239 #define DPRINTF(l,x) do { if (auich_debug & (l)) printf x; } while(0) 240 int auich_debug = 0xfffe; 241 #define ICH_DEBUG_CODECIO 0x0001 242 #define ICH_DEBUG_DMA 0x0002 243 #define ICH_DEBUG_INTR 0x0004 244 #else 245 #define DPRINTF(x,y) /* nothing */ 246 #endif 247 248 static int auich_match(device_t, cfdata_t, void *); 249 static void auich_attach(device_t, device_t, void *); 250 static int auich_detach(device_t, int); 251 static void auich_childdet(device_t, device_t); 252 static int auich_intr(void *); 253 254 CFATTACH_DECL2_NEW(auich, sizeof(struct auich_softc), 255 auich_match, auich_attach, auich_detach, NULL, NULL, auich_childdet); 256 257 static int auich_open(void *, int); 258 static void auich_close(void *); 259 static int auich_query_encoding(void *, struct audio_encoding *); 260 static int auich_set_params(void *, int, int, audio_params_t *, 261 audio_params_t *, stream_filter_list_t *, 262 stream_filter_list_t *); 263 static int auich_round_blocksize(void *, int, int, const audio_params_t *); 264 static void auich_halt_pipe(struct auich_softc *, int); 265 static int auich_halt_output(void *); 266 static int auich_halt_input(void *); 267 static int auich_getdev(void *, struct audio_device *); 268 static int auich_set_port(void *, mixer_ctrl_t *); 269 static int auich_get_port(void *, mixer_ctrl_t *); 270 static int auich_query_devinfo(void *, mixer_devinfo_t *); 271 static void *auich_allocm(void *, int, size_t); 272 static void auich_freem(void *, void *, size_t); 273 static size_t auich_round_buffersize(void *, int, size_t); 274 static paddr_t auich_mappage(void *, void *, off_t, int); 275 static int auich_get_props(void *); 276 static void auich_trigger_pipe(struct auich_softc *, int, struct auich_ring *); 277 static void auich_intr_pipe(struct auich_softc *, int, struct auich_ring *); 278 static int auich_trigger_output(void *, void *, void *, int, 279 void (*)(void *), void *, const audio_params_t *); 280 static int auich_trigger_input(void *, void *, void *, int, 281 void (*)(void *), void *, const audio_params_t *); 282 static void auich_get_locks(void *, kmutex_t **, kmutex_t **); 283 284 static int auich_alloc_cdata(struct auich_softc *); 285 286 static int auich_allocmem(struct auich_softc *, size_t, size_t, 287 struct auich_dma *); 288 static int auich_freemem(struct auich_softc *, struct auich_dma *); 289 290 static bool auich_resume(device_t, const pmf_qual_t *); 291 static int auich_set_rate(struct auich_softc *, int, u_long); 292 static int auich_sysctl_verify(SYSCTLFN_ARGS); 293 static void auich_finish_attach(device_t); 294 static void auich_calibrate(struct auich_softc *); 295 static void auich_clear_cas(struct auich_softc *); 296 297 static int auich_attach_codec(void *, struct ac97_codec_if *); 298 static int auich_read_codec(void *, uint8_t, uint16_t *); 299 static int auich_write_codec(void *, uint8_t, uint16_t); 300 static int auich_reset_codec(void *); 301 static enum ac97_host_flags auich_flags_codec(void *); 302 static void auich_spdif_event(void *, bool); 303 304 static const struct audio_hw_if auich_hw_if = { 305 auich_open, 306 auich_close, 307 NULL, /* drain */ 308 auich_query_encoding, 309 auich_set_params, 310 auich_round_blocksize, 311 NULL, /* commit_setting */ 312 NULL, /* init_output */ 313 NULL, /* init_input */ 314 NULL, /* start_output */ 315 NULL, /* start_input */ 316 auich_halt_output, 317 auich_halt_input, 318 NULL, /* speaker_ctl */ 319 auich_getdev, 320 NULL, /* getfd */ 321 auich_set_port, 322 auich_get_port, 323 auich_query_devinfo, 324 auich_allocm, 325 auich_freem, 326 auich_round_buffersize, 327 auich_mappage, 328 auich_get_props, 329 auich_trigger_output, 330 auich_trigger_input, 331 NULL, /* dev_ioctl */ 332 auich_get_locks, 333 }; 334 335 #define AUICH_FORMATS_1CH 0 336 #define AUICH_FORMATS_4CH 1 337 #define AUICH_FORMATS_6CH 2 338 static const struct audio_format auich_audio_formats[AUICH_AUDIO_NFORMATS] = { 339 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 340 2, AUFMT_STEREO, 0, {8000, 48000}}, 341 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 342 4, AUFMT_SURROUND4, 0, {8000, 48000}}, 343 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 344 6, AUFMT_DOLBY_5_1, 0, {8000, 48000}}, 345 }; 346 347 #define AUICH_SPDIF_NFORMATS 1 348 static const struct audio_format auich_spdif_formats[AUICH_SPDIF_NFORMATS] = { 349 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 350 2, AUFMT_STEREO, 1, {48000}}, 351 }; 352 353 static const struct audio_format auich_modem_formats[AUICH_MODEM_NFORMATS] = { 354 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 355 1, AUFMT_MONAURAL, 0, {8000, 16000}}, 356 }; 357 358 #define PCI_ID_CODE0(v, p) PCI_ID_CODE(PCI_VENDOR_##v, PCI_PRODUCT_##v##_##p) 359 #define PCIID_ICH PCI_ID_CODE0(INTEL, 82801AA_ACA) 360 #define PCIID_ICH0 PCI_ID_CODE0(INTEL, 82801AB_ACA) 361 #define PCIID_ICH2 PCI_ID_CODE0(INTEL, 82801BA_ACA) 362 #define PCIID_440MX PCI_ID_CODE0(INTEL, 82440MX_ACA) 363 #define PCIID_ICH3 PCI_ID_CODE0(INTEL, 82801CA_AC) 364 #define PCIID_ICH4 PCI_ID_CODE0(INTEL, 82801DB_AC) 365 #define PCIID_ICH5 PCI_ID_CODE0(INTEL, 82801EB_AC) 366 #define PCIID_ICH6 PCI_ID_CODE0(INTEL, 82801FB_AC) 367 #define PCIID_ICH7 PCI_ID_CODE0(INTEL, 82801G_ACA) 368 #define PCIID_I6300ESB PCI_ID_CODE0(INTEL, 6300ESB_ACA) 369 #define PCIID_SIS7012 PCI_ID_CODE0(SIS, 7012_AC) 370 #define PCIID_NFORCE PCI_ID_CODE0(NVIDIA, NFORCE_MCP_AC) 371 #define PCIID_NFORCE2 PCI_ID_CODE0(NVIDIA, NFORCE2_MCPT_AC) 372 #define PCIID_NFORCE2_400 PCI_ID_CODE0(NVIDIA, NFORCE2_400_MCPT_AC) 373 #define PCIID_NFORCE3 PCI_ID_CODE0(NVIDIA, NFORCE3_MCPT_AC) 374 #define PCIID_NFORCE3_250 PCI_ID_CODE0(NVIDIA, NFORCE3_250_MCPT_AC) 375 #define PCIID_NFORCE4 PCI_ID_CODE0(NVIDIA, NFORCE4_AC) 376 #define PCIID_NFORCE430 PCI_ID_CODE0(NVIDIA, NFORCE430_AC) 377 #define PCIID_AMD768 PCI_ID_CODE0(AMD, PBC768_AC) 378 #define PCIID_AMD8111 PCI_ID_CODE0(AMD, PBC8111_AC) 379 380 #define PCIID_ICH3MODEM PCI_ID_CODE0(INTEL, 82801CA_MOD) 381 #define PCIID_ICH4MODEM PCI_ID_CODE0(INTEL, 82801DB_MOD) 382 #define PCIID_ICH6MODEM PCI_ID_CODE0(INTEL, 82801FB_ACM) 383 384 struct auich_devtype { 385 pcireg_t id; 386 const char *name; 387 const char *shortname; /* must be less than 11 characters */ 388 }; 389 390 static const struct auich_devtype auich_audio_devices[] = { 391 { PCIID_ICH, "i82801AA (ICH) AC-97 Audio", "ICH" }, 392 { PCIID_ICH0, "i82801AB (ICH0) AC-97 Audio", "ICH0" }, 393 { PCIID_ICH2, "i82801BA (ICH2) AC-97 Audio", "ICH2" }, 394 { PCIID_440MX, "i82440MX AC-97 Audio", "440MX" }, 395 { PCIID_ICH3, "i82801CA (ICH3) AC-97 Audio", "ICH3" }, 396 { PCIID_ICH4, "i82801DB/DBM (ICH4/ICH4M) AC-97 Audio", "ICH4" }, 397 { PCIID_ICH5, "i82801EB (ICH5) AC-97 Audio", "ICH5" }, 398 { PCIID_ICH6, "i82801FB (ICH6) AC-97 Audio", "ICH6" }, 399 { PCIID_ICH7, "i82801GB/GR (ICH7) AC-97 Audio", "ICH7" }, 400 { PCIID_I6300ESB, "Intel 6300ESB AC-97 Audio", "I6300ESB" }, 401 { PCIID_SIS7012, "SiS 7012 AC-97 Audio", "SiS7012" }, 402 { PCIID_NFORCE, "nForce MCP AC-97 Audio", "nForce" }, 403 { PCIID_NFORCE2, "nForce2 MCP-T AC-97 Audio", "nForce2" }, 404 { PCIID_NFORCE2_400, "nForce2 400 MCP-T AC-97 Audio", "nForce2" }, 405 { PCIID_NFORCE3, "nForce3 MCP-T AC-97 Audio", "nForce3" }, 406 { PCIID_NFORCE3_250, "nForce3 250 MCP-T AC-97 Audio", "nForce3" }, 407 { PCIID_NFORCE4, "nForce4 AC-97 Audio", "nForce4" }, 408 { PCIID_NFORCE430, "nForce430 (MCP51) AC-97 Audio", "nForce430" }, 409 { PCIID_AMD768, "AMD768 AC-97 Audio", "AMD768" }, 410 { PCIID_AMD8111,"AMD8111 AC-97 Audio", "AMD8111" }, 411 { 0, NULL, NULL }, 412 }; 413 414 static const struct auich_devtype auich_modem_devices[] = { 415 #ifdef AUICH_ATTACH_MODEM 416 { PCIID_ICH3MODEM, "i82801CA (ICH3) AC-97 Modem", "ICH3MODEM" }, 417 { PCIID_ICH4MODEM, "i82801DB (ICH4) AC-97 Modem", "ICH4MODEM" }, 418 { PCIID_ICH6MODEM, "i82801FB (ICH6) AC-97 Modem", "ICH6MODEM" }, 419 #endif 420 { 0, NULL, NULL }, 421 }; 422 423 static const struct auich_devtype * 424 auich_lookup(struct pci_attach_args *pa, const struct auich_devtype *auich_devices) 425 { 426 const struct auich_devtype *d; 427 428 for (d = auich_devices; d->name != NULL; d++) { 429 if (pa->pa_id == d->id) 430 return d; 431 } 432 433 return NULL; 434 } 435 436 static int 437 auich_match(device_t parent, cfdata_t match, void *aux) 438 { 439 struct pci_attach_args *pa; 440 441 pa = aux; 442 if (auich_lookup(pa, auich_audio_devices) != NULL) 443 return 1; 444 if (auich_lookup(pa, auich_modem_devices) != NULL) 445 return 1; 446 447 return 0; 448 } 449 450 static void 451 auich_attach(device_t parent, device_t self, void *aux) 452 { 453 struct auich_softc *sc = device_private(self); 454 struct pci_attach_args *pa; 455 pcireg_t v, subdev; 456 const char *intrstr; 457 const struct auich_devtype *d; 458 const struct sysctlnode *node, *node_ac97clock; 459 int err, node_mib, i; 460 461 sc->sc_dev = self; 462 pa = aux; 463 464 if ((d = auich_lookup(pa, auich_modem_devices)) != NULL) { 465 sc->sc_modem_offset = 0x10; 466 sc->sc_codectype = AC97_CODEC_TYPE_MODEM; 467 } else if ((d = auich_lookup(pa, auich_audio_devices)) != NULL) { 468 sc->sc_modem_offset = 0; 469 sc->sc_codectype = AC97_CODEC_TYPE_AUDIO; 470 } else 471 panic("auich_attach: impossible"); 472 473 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 474 aprint_naive(": Audio controller\n"); 475 else 476 aprint_naive(": Modem controller\n"); 477 478 sc->sc_pc = pa->pa_pc; 479 sc->sc_pt = pa->pa_tag; 480 481 aprint_normal(": %s\n", d->name); 482 483 if (d->id == PCIID_ICH4 || d->id == PCIID_ICH5 || d->id == PCIID_ICH6 484 || d->id == PCIID_ICH7 || d->id == PCIID_I6300ESB 485 || d->id == PCIID_ICH4MODEM) { 486 /* 487 * Use native mode for Intel 6300ESB and ICH4/ICH5/ICH6/ICH7 488 */ 489 490 if (pci_mapreg_map(pa, ICH_MMBAR, PCI_MAPREG_TYPE_MEM, 0, 491 &sc->iot, &sc->mix_ioh, NULL, &sc->mix_size)) { 492 goto retry_map; 493 } 494 if (pci_mapreg_map(pa, ICH_MBBAR, PCI_MAPREG_TYPE_MEM, 0, 495 &sc->iot, &sc->aud_ioh, NULL, &sc->aud_size)) { 496 goto retry_map; 497 } 498 goto map_done; 499 } else 500 goto non_native_map; 501 502 retry_map: 503 sc->sc_iose = 1; 504 v = pci_conf_read(pa->pa_pc, pa->pa_tag, ICH_CFG); 505 pci_conf_write(pa->pa_pc, pa->pa_tag, ICH_CFG, 506 v | ICH_CFG_IOSE); 507 508 non_native_map: 509 if (pci_mapreg_map(pa, ICH_NAMBAR, PCI_MAPREG_TYPE_IO, 0, 510 &sc->iot, &sc->mix_ioh, NULL, &sc->mix_size)) { 511 aprint_error_dev(self, "can't map codec i/o space\n"); 512 return; 513 } 514 if (pci_mapreg_map(pa, ICH_NABMBAR, PCI_MAPREG_TYPE_IO, 0, 515 &sc->iot, &sc->aud_ioh, NULL, &sc->aud_size)) { 516 aprint_error_dev(self, "can't map device i/o space\n"); 517 return; 518 } 519 520 map_done: 521 sc->dmat = pa->pa_dmat; 522 523 /* enable bus mastering */ 524 v = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 525 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 526 v | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_BACKTOBACK_ENABLE); 527 528 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 529 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO); 530 531 /* Map and establish the interrupt. */ 532 if (pci_intr_map(pa, &sc->intrh)) { 533 aprint_error_dev(self, "can't map interrupt\n"); 534 return; 535 } 536 intrstr = pci_intr_string(pa->pa_pc, sc->intrh); 537 sc->sc_ih = pci_intr_establish(pa->pa_pc, sc->intrh, IPL_AUDIO, 538 auich_intr, sc); 539 if (sc->sc_ih == NULL) { 540 aprint_error_dev(self, "can't establish interrupt"); 541 if (intrstr != NULL) 542 aprint_error(" at %s", intrstr); 543 aprint_error("\n"); 544 return; 545 } 546 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 547 548 snprintf(sc->sc_audev.name, MAX_AUDIO_DEV_LEN, "%s AC97", d->shortname); 549 snprintf(sc->sc_audev.version, MAX_AUDIO_DEV_LEN, 550 "0x%02x", PCI_REVISION(pa->pa_class)); 551 strlcpy(sc->sc_audev.config, device_xname(self), MAX_AUDIO_DEV_LEN); 552 553 /* SiS 7012 needs special handling */ 554 if (d->id == PCIID_SIS7012) { 555 sc->sc_sts_reg = ICH_PICB; 556 sc->sc_sample_shift = 0; 557 sc->sc_pcm246_mask = ICH_SIS_PCM246_MASK; 558 sc->sc_pcm2 = ICH_SIS_PCM2; 559 sc->sc_pcm4 = ICH_SIS_PCM4; 560 sc->sc_pcm6 = ICH_SIS_PCM6; 561 /* Un-mute output. From Linux. */ 562 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_SIS_NV_CTL, 563 bus_space_read_4(sc->iot, sc->aud_ioh, ICH_SIS_NV_CTL) | 564 ICH_SIS_CTL_UNMUTE); 565 } else { 566 sc->sc_sts_reg = ICH_STS; 567 sc->sc_sample_shift = 1; 568 sc->sc_pcm246_mask = ICH_PCM246_MASK; 569 sc->sc_pcm2 = ICH_PCM2; 570 sc->sc_pcm4 = ICH_PCM4; 571 sc->sc_pcm6 = ICH_PCM6; 572 } 573 574 /* Workaround for a 440MX B-stepping erratum */ 575 sc->sc_dmamap_flags = BUS_DMA_COHERENT; 576 if (d->id == PCIID_440MX) { 577 sc->sc_dmamap_flags |= BUS_DMA_NOCACHE; 578 aprint_normal_dev(self, "DMA bug workaround enabled\n"); 579 } 580 581 /* Set up DMA lists. */ 582 sc->pcmo.qptr = sc->pcmi.qptr = sc->mici.qptr = 0; 583 auich_alloc_cdata(sc); 584 585 DPRINTF(ICH_DEBUG_DMA, ("auich_attach: lists %p %p %p\n", 586 sc->pcmo.dmalist, sc->pcmi.dmalist, sc->mici.dmalist)); 587 588 /* Modem codecs are always the secondary codec on ICH */ 589 sc->sc_codecnum = sc->sc_codectype == AC97_CODEC_TYPE_MODEM ? 1 : 0; 590 591 sc->host_if.arg = sc; 592 sc->host_if.attach = auich_attach_codec; 593 sc->host_if.read = auich_read_codec; 594 sc->host_if.write = auich_write_codec; 595 sc->host_if.reset = auich_reset_codec; 596 sc->host_if.flags = auich_flags_codec; 597 sc->host_if.spdif_event = auich_spdif_event; 598 599 subdev = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 600 switch (subdev) { 601 case 0x202f161f: /* Gateway 7326GZ */ 602 case 0x203a161f: /* Gateway 4028GZ */ 603 case 0x204c161f: /* Kvazar-Micro Senator 3592XT */ 604 case 0x8144104d: /* Sony VAIO PCG-TR* */ 605 case 0x8197104d: /* Sony S1XP */ 606 case 0x81c0104d: /* Sony VAIO type T */ 607 case 0x81c5104d: /* Sony VAIO VGN-B1XP */ 608 sc->sc_codecflags = AC97_HOST_INVERTED_EAMP; 609 break; 610 default: 611 sc->sc_codecflags = 0; 612 break; 613 } 614 615 if (ac97_attach_type(&sc->host_if, self, sc->sc_codectype, 616 &sc->sc_lock) != 0) 617 return; 618 619 mutex_enter(&sc->sc_lock); 620 sc->codec_if->vtbl->unlock(sc->codec_if); 621 sc->sc_fixedrate = AC97_IS_FIXED_RATE(sc->codec_if); 622 623 /* setup audio_format */ 624 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 625 memcpy(sc->sc_audio_formats, auich_audio_formats, sizeof(auich_audio_formats)); 626 if (!AC97_IS_4CH(sc->codec_if)) 627 AUFMT_INVALIDATE(&sc->sc_audio_formats[AUICH_FORMATS_4CH]); 628 if (!AC97_IS_6CH(sc->codec_if)) 629 AUFMT_INVALIDATE(&sc->sc_audio_formats[AUICH_FORMATS_6CH]); 630 if (AC97_IS_FIXED_RATE(sc->codec_if)) { 631 for (i = 0; i < AUICH_AUDIO_NFORMATS; i++) { 632 sc->sc_audio_formats[i].frequency_type = 1; 633 sc->sc_audio_formats[i].frequency[0] = 48000; 634 } 635 } 636 mutex_exit(&sc->sc_lock); 637 if (0 != auconv_create_encodings(sc->sc_audio_formats, AUICH_AUDIO_NFORMATS, 638 &sc->sc_encodings)) 639 return; 640 if (0 != auconv_create_encodings(auich_spdif_formats, AUICH_SPDIF_NFORMATS, 641 &sc->sc_spdif_encodings)) 642 return; 643 } else { 644 mutex_exit(&sc->sc_lock); 645 memcpy(sc->sc_modem_formats, auich_modem_formats, sizeof(auich_modem_formats)); 646 if (0 != auconv_create_encodings(sc->sc_modem_formats, AUICH_MODEM_NFORMATS, 647 &sc->sc_encodings)) 648 return; 649 } 650 651 /* Watch for power change */ 652 if (!pmf_device_register(self, NULL, auich_resume)) 653 aprint_error_dev(self, "couldn't establish power handler\n"); 654 655 config_interrupts(self, auich_finish_attach); 656 657 /* sysctl setup */ 658 if (sc->sc_fixedrate && sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 659 return; 660 661 err = sysctl_createv(&sc->sc_log, 0, NULL, NULL, 0, 662 CTLTYPE_NODE, "hw", NULL, NULL, 0, NULL, 0, 663 CTL_HW, CTL_EOL); 664 if (err != 0) 665 goto sysctl_err; 666 err = sysctl_createv(&sc->sc_log, 0, NULL, &node, 0, 667 CTLTYPE_NODE, device_xname(self), NULL, NULL, 0, 668 NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 669 if (err != 0) 670 goto sysctl_err; 671 node_mib = node->sysctl_num; 672 673 if (!sc->sc_fixedrate) { 674 /* passing the sc address instead of &sc->sc_ac97_clock */ 675 err = sysctl_createv(&sc->sc_log, 0, NULL, &node_ac97clock, 676 CTLFLAG_READWRITE, 677 CTLTYPE_INT, "ac97rate", 678 SYSCTL_DESCR("AC'97 codec link rate"), 679 auich_sysctl_verify, 0, (void *)sc, 0, 680 CTL_HW, node_mib, CTL_CREATE, CTL_EOL); 681 if (err != 0) 682 goto sysctl_err; 683 sc->sc_ac97_clock_mib = node_ac97clock->sysctl_num; 684 } 685 686 return; 687 688 sysctl_err: 689 printf("%s: failed to add sysctl nodes. (%d)\n", 690 device_xname(self), err); 691 return; /* failure of sysctl is not fatal. */ 692 } 693 694 static void 695 auich_childdet(device_t self, device_t child) 696 { 697 struct auich_softc *sc = device_private(self); 698 699 KASSERT(sc->sc_audiodev == child); 700 sc->sc_audiodev = NULL; 701 } 702 703 static int 704 auich_detach(device_t self, int flags) 705 { 706 struct auich_softc *sc = device_private(self); 707 708 /* audio */ 709 if (sc->sc_audiodev != NULL) 710 config_detach(sc->sc_audiodev, flags); 711 712 /* sysctl */ 713 sysctl_teardown(&sc->sc_log); 714 715 mutex_enter(&sc->sc_lock); 716 717 /* audio_encoding_set */ 718 auconv_delete_encodings(sc->sc_encodings); 719 auconv_delete_encodings(sc->sc_spdif_encodings); 720 721 /* ac97 */ 722 if (sc->codec_if != NULL) 723 sc->codec_if->vtbl->detach(sc->codec_if); 724 725 mutex_exit(&sc->sc_lock); 726 mutex_destroy(&sc->sc_lock); 727 mutex_destroy(&sc->sc_intr_lock); 728 729 /* PCI */ 730 if (sc->sc_ih != NULL) 731 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 732 if (sc->mix_size != 0) 733 bus_space_unmap(sc->iot, sc->mix_ioh, sc->mix_size); 734 if (sc->aud_size != 0) 735 bus_space_unmap(sc->iot, sc->aud_ioh, sc->aud_size); 736 return 0; 737 } 738 739 static int 740 auich_sysctl_verify(SYSCTLFN_ARGS) 741 { 742 int error, tmp; 743 struct sysctlnode node; 744 struct auich_softc *sc; 745 746 node = *rnode; 747 sc = rnode->sysctl_data; 748 if (node.sysctl_num == sc->sc_ac97_clock_mib) { 749 tmp = sc->sc_ac97_clock; 750 node.sysctl_data = &tmp; 751 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 752 if (error || newp == NULL) 753 return error; 754 755 if (tmp < 48000 || tmp > 96000) 756 return EINVAL; 757 mutex_enter(&sc->sc_lock); 758 sc->sc_ac97_clock = tmp; 759 mutex_exit(&sc->sc_lock); 760 } 761 762 return 0; 763 } 764 765 static void 766 auich_finish_attach(device_t self) 767 { 768 struct auich_softc *sc = device_private(self); 769 770 mutex_enter(&sc->sc_lock); 771 if (!AC97_IS_FIXED_RATE(sc->codec_if)) 772 auich_calibrate(sc); 773 mutex_exit(&sc->sc_lock); 774 775 sc->sc_audiodev = audio_attach_mi(&auich_hw_if, sc, sc->sc_dev); 776 777 return; 778 } 779 780 #define ICH_CODECIO_INTERVAL 10 781 static int 782 auich_read_codec(void *v, uint8_t reg, uint16_t *val) 783 { 784 struct auich_softc *sc; 785 int i; 786 uint32_t status; 787 788 sc = v; 789 /* wait for an access semaphore */ 790 for (i = ICH_SEMATIMO / ICH_CODECIO_INTERVAL; i-- && 791 bus_space_read_1(sc->iot, sc->aud_ioh, 792 ICH_CAS + sc->sc_modem_offset) & 1; 793 DELAY(ICH_CODECIO_INTERVAL)); 794 795 if (i > 0) { 796 *val = bus_space_read_2(sc->iot, sc->mix_ioh, 797 reg + (sc->sc_codecnum * ICH_CODEC_OFFSET)); 798 DPRINTF(ICH_DEBUG_CODECIO, 799 ("auich_read_codec(%x, %x)\n", reg, *val)); 800 status = bus_space_read_4(sc->iot, sc->aud_ioh, 801 ICH_GSTS + sc->sc_modem_offset); 802 if (status & ICH_RCS) { 803 bus_space_write_4(sc->iot, sc->aud_ioh, 804 ICH_GSTS + sc->sc_modem_offset, 805 status & ~(ICH_SRI|ICH_PRI|ICH_GSCI)); 806 *val = 0xffff; 807 DPRINTF(ICH_DEBUG_CODECIO, 808 ("%s: read_codec error\n", device_xname(sc->sc_dev))); 809 if (reg == AC97_REG_GPIO_STATUS) 810 auich_clear_cas(sc); 811 return -1; 812 } 813 if (reg == AC97_REG_GPIO_STATUS) 814 auich_clear_cas(sc); 815 return 0; 816 } else { 817 aprint_normal_dev(sc->sc_dev, "read_codec timeout\n"); 818 if (reg == AC97_REG_GPIO_STATUS) 819 auich_clear_cas(sc); 820 return -1; 821 } 822 } 823 824 static int 825 auich_write_codec(void *v, uint8_t reg, uint16_t val) 826 { 827 struct auich_softc *sc; 828 int i; 829 830 DPRINTF(ICH_DEBUG_CODECIO, ("auich_write_codec(%x, %x)\n", reg, val)); 831 sc = v; 832 /* wait for an access semaphore */ 833 for (i = ICH_SEMATIMO / ICH_CODECIO_INTERVAL; i-- && 834 bus_space_read_1(sc->iot, sc->aud_ioh, 835 ICH_CAS + sc->sc_modem_offset) & 1; 836 DELAY(ICH_CODECIO_INTERVAL)); 837 838 if (i > 0) { 839 bus_space_write_2(sc->iot, sc->mix_ioh, 840 reg + (sc->sc_codecnum * ICH_CODEC_OFFSET), val); 841 return 0; 842 } else { 843 aprint_normal_dev(sc->sc_dev, "write_codec timeout\n"); 844 return -1; 845 } 846 } 847 848 static int 849 auich_attach_codec(void *v, struct ac97_codec_if *cif) 850 { 851 struct auich_softc *sc; 852 853 sc = v; 854 sc->codec_if = cif; 855 856 return 0; 857 } 858 859 static int 860 auich_reset_codec(void *v) 861 { 862 struct auich_softc *sc; 863 int i; 864 uint32_t control, status; 865 866 sc = v; 867 control = bus_space_read_4(sc->iot, sc->aud_ioh, 868 ICH_GCTRL + sc->sc_modem_offset); 869 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 870 control &= ~(ICH_ACLSO | sc->sc_pcm246_mask); 871 } else { 872 control &= ~ICH_ACLSO; 873 control |= ICH_GIE; 874 } 875 control |= (control & ICH_CRESET) ? ICH_WRESET : ICH_CRESET; 876 bus_space_write_4(sc->iot, sc->aud_ioh, 877 ICH_GCTRL + sc->sc_modem_offset, control); 878 879 for (i = 500000; i >= 0; i--) { 880 status = bus_space_read_4(sc->iot, sc->aud_ioh, 881 ICH_GSTS + sc->sc_modem_offset); 882 if (status & (ICH_PCR | ICH_SCR | ICH_S2CR)) 883 break; 884 DELAY(1); 885 } 886 if (i <= 0) { 887 aprint_error_dev(sc->sc_dev, "auich_reset_codec: time out\n"); 888 return ETIMEDOUT; 889 } 890 #ifdef AUICH_DEBUG 891 if (status & ICH_SCR) 892 printf("%s: The 2nd codec is ready.\n", 893 device_xname(sc->sc_dev)); 894 if (status & ICH_S2CR) 895 printf("%s: The 3rd codec is ready.\n", 896 device_xname(sc->sc_dev)); 897 #endif 898 return 0; 899 } 900 901 static enum ac97_host_flags 902 auich_flags_codec(void *v) 903 { 904 struct auich_softc *sc = v; 905 return sc->sc_codecflags; 906 } 907 908 static void 909 auich_spdif_event(void *addr, bool flag) 910 { 911 struct auich_softc *sc; 912 913 sc = addr; 914 sc->sc_spdif = flag; 915 } 916 917 static int 918 auich_open(void *addr, int flags) 919 { 920 struct auich_softc *sc; 921 922 sc = (struct auich_softc *)addr; 923 mutex_spin_exit(&sc->sc_intr_lock); 924 sc->codec_if->vtbl->lock(sc->codec_if); 925 mutex_spin_enter(&sc->sc_intr_lock); 926 return 0; 927 } 928 929 static void 930 auich_close(void *addr) 931 { 932 struct auich_softc *sc; 933 934 sc = (struct auich_softc *)addr; 935 mutex_spin_exit(&sc->sc_intr_lock); 936 sc->codec_if->vtbl->unlock(sc->codec_if); 937 mutex_spin_enter(&sc->sc_intr_lock); 938 } 939 940 static int 941 auich_query_encoding(void *v, struct audio_encoding *aep) 942 { 943 struct auich_softc *sc; 944 945 sc = (struct auich_softc *)v; 946 return auconv_query_encoding( 947 sc->sc_spdif ? sc->sc_spdif_encodings : sc->sc_encodings, aep); 948 } 949 950 static int 951 auich_set_rate(struct auich_softc *sc, int mode, u_long srate) 952 { 953 int ret; 954 u_int ratetmp; 955 956 sc->codec_if->vtbl->set_clock(sc->codec_if, sc->sc_ac97_clock); 957 ratetmp = srate; 958 if (mode == AUMODE_RECORD) 959 return sc->codec_if->vtbl->set_rate(sc->codec_if, 960 AC97_REG_PCM_LR_ADC_RATE, &ratetmp); 961 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 962 AC97_REG_PCM_FRONT_DAC_RATE, &ratetmp); 963 if (ret) 964 return ret; 965 ratetmp = srate; 966 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 967 AC97_REG_PCM_SURR_DAC_RATE, &ratetmp); 968 if (ret) 969 return ret; 970 ratetmp = srate; 971 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 972 AC97_REG_PCM_LFE_DAC_RATE, &ratetmp); 973 return ret; 974 } 975 976 static int 977 auich_set_params(void *v, int setmode, int usemode, 978 audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil, 979 stream_filter_list_t *rfil) 980 { 981 struct auich_softc *sc; 982 audio_params_t *p; 983 stream_filter_list_t *fil; 984 int mode, index; 985 uint32_t control; 986 987 sc = v; 988 for (mode = AUMODE_RECORD; mode != -1; 989 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 990 if ((setmode & mode) == 0) 991 continue; 992 993 p = mode == AUMODE_PLAY ? play : rec; 994 fil = mode == AUMODE_PLAY ? pfil : rfil; 995 if (p == NULL) 996 continue; 997 998 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 999 if (p->sample_rate < 8000 || 1000 p->sample_rate > 48000) 1001 return EINVAL; 1002 1003 if (!sc->sc_spdif) 1004 index = auconv_set_converter(sc->sc_audio_formats, 1005 AUICH_AUDIO_NFORMATS, mode, p, TRUE, fil); 1006 else 1007 index = auconv_set_converter(auich_spdif_formats, 1008 AUICH_SPDIF_NFORMATS, mode, p, TRUE, fil); 1009 } else { 1010 if (p->sample_rate != 8000 && p->sample_rate != 16000) 1011 return EINVAL; 1012 index = auconv_set_converter(sc->sc_modem_formats, 1013 AUICH_MODEM_NFORMATS, mode, p, TRUE, fil); 1014 } 1015 if (index < 0) 1016 return EINVAL; 1017 if (fil->req_size > 0) 1018 p = &fil->filters[0].param; 1019 /* p represents HW encoding */ 1020 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 1021 if (sc->sc_audio_formats[index].frequency_type != 1 1022 && auich_set_rate(sc, mode, p->sample_rate)) 1023 return EINVAL; 1024 } else { 1025 if (sc->sc_modem_formats[index].frequency_type != 1 1026 && auich_set_rate(sc, mode, p->sample_rate)) 1027 return EINVAL; 1028 auich_write_codec(sc, AC97_REG_LINE1_RATE, 1029 p->sample_rate); 1030 auich_write_codec(sc, AC97_REG_LINE1_LEVEL, 0); 1031 } 1032 if (mode == AUMODE_PLAY && 1033 sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 1034 control = bus_space_read_4(sc->iot, sc->aud_ioh, 1035 ICH_GCTRL + sc->sc_modem_offset); 1036 control &= ~sc->sc_pcm246_mask; 1037 if (p->channels == 4) { 1038 control |= sc->sc_pcm4; 1039 } else if (p->channels == 6) { 1040 control |= sc->sc_pcm6; 1041 } 1042 bus_space_write_4(sc->iot, sc->aud_ioh, 1043 ICH_GCTRL + sc->sc_modem_offset, control); 1044 } 1045 } 1046 1047 return 0; 1048 } 1049 1050 static int 1051 auich_round_blocksize(void *v, int blk, int mode, 1052 const audio_params_t *param) 1053 { 1054 1055 return blk & ~0x3f; /* keep good alignment */ 1056 } 1057 1058 static void 1059 auich_halt_pipe(struct auich_softc *sc, int pipe) 1060 { 1061 int i; 1062 uint32_t status; 1063 1064 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, 0); 1065 for (i = 0; i < 100; i++) { 1066 status = bus_space_read_4(sc->iot, sc->aud_ioh, pipe + ICH_STS); 1067 if (status & ICH_DCH) 1068 break; 1069 DELAY(1); 1070 } 1071 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, ICH_RR); 1072 1073 #if AUICH_DEBUG 1074 if (i > 0) 1075 printf("auich_halt_pipe: halt took %d cycles\n", i); 1076 #endif 1077 } 1078 1079 static int 1080 auich_halt_output(void *v) 1081 { 1082 struct auich_softc *sc; 1083 1084 sc = v; 1085 DPRINTF(ICH_DEBUG_DMA, ("%s: halt_output\n", device_xname(sc->sc_dev))); 1086 1087 auich_halt_pipe(sc, ICH_PCMO); 1088 sc->pcmo.intr = NULL; 1089 1090 return 0; 1091 } 1092 1093 static int 1094 auich_halt_input(void *v) 1095 { 1096 struct auich_softc *sc; 1097 1098 sc = v; 1099 DPRINTF(ICH_DEBUG_DMA, ("%s: halt_input\n", device_xname(sc->sc_dev))); 1100 1101 auich_halt_pipe(sc, ICH_PCMI); 1102 sc->pcmi.intr = NULL; 1103 1104 return 0; 1105 } 1106 1107 static int 1108 auich_getdev(void *v, struct audio_device *adp) 1109 { 1110 struct auich_softc *sc; 1111 1112 sc = v; 1113 *adp = sc->sc_audev; 1114 return 0; 1115 } 1116 1117 static int 1118 auich_set_port(void *v, mixer_ctrl_t *cp) 1119 { 1120 struct auich_softc *sc; 1121 1122 sc = v; 1123 return sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp); 1124 } 1125 1126 static int 1127 auich_get_port(void *v, mixer_ctrl_t *cp) 1128 { 1129 struct auich_softc *sc; 1130 1131 sc = v; 1132 return sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp); 1133 } 1134 1135 static int 1136 auich_query_devinfo(void *v, mixer_devinfo_t *dp) 1137 { 1138 struct auich_softc *sc; 1139 1140 sc = v; 1141 return sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp); 1142 } 1143 1144 static void * 1145 auich_allocm(void *v, int direction, size_t size) 1146 { 1147 struct auich_softc *sc; 1148 struct auich_dma *p; 1149 int error; 1150 1151 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX)) 1152 return NULL; 1153 1154 p = kmem_alloc(sizeof(*p), KM_SLEEP); 1155 if (p == NULL) 1156 return NULL; 1157 1158 sc = v; 1159 error = auich_allocmem(sc, size, 0, p); 1160 if (error) { 1161 kmem_free(p, sizeof(*p)); 1162 return NULL; 1163 } 1164 1165 p->next = sc->sc_dmas; 1166 sc->sc_dmas = p; 1167 1168 return KERNADDR(p); 1169 } 1170 1171 static void 1172 auich_freem(void *v, void *ptr, size_t size) 1173 { 1174 struct auich_softc *sc; 1175 struct auich_dma *p, **pp; 1176 1177 sc = v; 1178 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 1179 if (KERNADDR(p) == ptr) { 1180 auich_freemem(sc, p); 1181 *pp = p->next; 1182 kmem_free(p, sizeof(*p)); 1183 return; 1184 } 1185 } 1186 } 1187 1188 static size_t 1189 auich_round_buffersize(void *v, int direction, size_t size) 1190 { 1191 1192 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX)) 1193 size = ICH_DMALIST_MAX * ICH_DMASEG_MAX; 1194 1195 return size; 1196 } 1197 1198 static paddr_t 1199 auich_mappage(void *v, void *mem, off_t off, int prot) 1200 { 1201 struct auich_softc *sc; 1202 struct auich_dma *p; 1203 1204 if (off < 0) 1205 return -1; 1206 sc = v; 1207 for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next) 1208 continue; 1209 if (!p) 1210 return -1; 1211 return bus_dmamem_mmap(sc->dmat, p->segs, p->nsegs, 1212 off, prot, BUS_DMA_WAITOK); 1213 } 1214 1215 static int 1216 auich_get_props(void *v) 1217 { 1218 struct auich_softc *sc; 1219 int props; 1220 1221 props = AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 1222 sc = v; 1223 /* 1224 * Even if the codec is fixed-rate, set_param() succeeds for any sample 1225 * rate because of aurateconv. Applications can't know what rate the 1226 * device can process in the case of mmap(). 1227 */ 1228 if (!AC97_IS_FIXED_RATE(sc->codec_if) || 1229 sc->sc_codectype == AC97_CODEC_TYPE_MODEM) 1230 props |= AUDIO_PROP_MMAP; 1231 return props; 1232 } 1233 1234 static int 1235 auich_intr(void *v) 1236 { 1237 struct auich_softc *sc; 1238 int ret, gsts; 1239 #ifdef DIAGNOSTIC 1240 int csts; 1241 #endif 1242 1243 sc = v; 1244 1245 if (!device_has_power(sc->sc_dev)) 1246 return (0); 1247 1248 mutex_spin_enter(&sc->sc_intr_lock); 1249 1250 ret = 0; 1251 #ifdef DIAGNOSTIC 1252 csts = pci_conf_read(sc->sc_pc, sc->sc_pt, PCI_COMMAND_STATUS_REG); 1253 if (csts & PCI_STATUS_MASTER_ABORT) { 1254 printf("auich_intr: PCI master abort\n"); 1255 } 1256 #endif 1257 1258 gsts = bus_space_read_4(sc->iot, sc->aud_ioh, 1259 ICH_GSTS + sc->sc_modem_offset); 1260 DPRINTF(ICH_DEBUG_INTR, ("auich_intr: gsts=0x%x\n", gsts)); 1261 1262 if ((sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_POINT) || 1263 (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_MOINT)) { 1264 int sts; 1265 1266 sts = bus_space_read_2(sc->iot, sc->aud_ioh, 1267 ICH_PCMO + sc->sc_sts_reg); 1268 DPRINTF(ICH_DEBUG_INTR, 1269 ("auich_intr: osts=0x%x\n", sts)); 1270 1271 if (sts & ICH_FIFOE) 1272 printf("%s: fifo underrun\n", device_xname(sc->sc_dev)); 1273 1274 if (sts & ICH_BCIS) 1275 auich_intr_pipe(sc, ICH_PCMO, &sc->pcmo); 1276 1277 /* int ack */ 1278 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMO + 1279 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE)); 1280 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 1281 bus_space_write_4(sc->iot, sc->aud_ioh, 1282 ICH_GSTS + sc->sc_modem_offset, ICH_POINT); 1283 else 1284 bus_space_write_4(sc->iot, sc->aud_ioh, 1285 ICH_GSTS + sc->sc_modem_offset, ICH_MOINT); 1286 ret++; 1287 } 1288 1289 if ((sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_PIINT) || 1290 (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_MIINT)) { 1291 int sts; 1292 1293 sts = bus_space_read_2(sc->iot, sc->aud_ioh, 1294 ICH_PCMI + sc->sc_sts_reg); 1295 DPRINTF(ICH_DEBUG_INTR, 1296 ("auich_intr: ists=0x%x\n", sts)); 1297 1298 if (sts & ICH_FIFOE) 1299 printf("%s: fifo overrun\n", device_xname(sc->sc_dev)); 1300 1301 if (sts & ICH_BCIS) 1302 auich_intr_pipe(sc, ICH_PCMI, &sc->pcmi); 1303 1304 /* int ack */ 1305 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMI + 1306 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE)); 1307 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 1308 bus_space_write_4(sc->iot, sc->aud_ioh, 1309 ICH_GSTS + sc->sc_modem_offset, ICH_PIINT); 1310 else 1311 bus_space_write_4(sc->iot, sc->aud_ioh, 1312 ICH_GSTS + sc->sc_modem_offset, ICH_MIINT); 1313 ret++; 1314 } 1315 1316 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_MINT) { 1317 int sts; 1318 1319 sts = bus_space_read_2(sc->iot, sc->aud_ioh, 1320 ICH_MICI + sc->sc_sts_reg); 1321 DPRINTF(ICH_DEBUG_INTR, 1322 ("auich_intr: ists=0x%x\n", sts)); 1323 1324 if (sts & ICH_FIFOE) 1325 printf("%s: fifo overrun\n", device_xname(sc->sc_dev)); 1326 1327 if (sts & ICH_BCIS) 1328 auich_intr_pipe(sc, ICH_MICI, &sc->mici); 1329 1330 /* int ack */ 1331 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_MICI + 1332 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE)); 1333 bus_space_write_4(sc->iot, sc->aud_ioh, 1334 ICH_GSTS + sc->sc_modem_offset, ICH_MINT); 1335 ret++; 1336 } 1337 1338 #ifdef AUICH_MODEM_DEBUG 1339 if (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_GSCI) { 1340 printf("%s: gsts=0x%x\n", device_xname(sc->sc_dev), gsts); 1341 /* int ack */ 1342 bus_space_write_4(sc->iot, sc->aud_ioh, 1343 ICH_GSTS + sc->sc_modem_offset, ICH_GSCI); 1344 ret++; 1345 } 1346 #endif 1347 1348 mutex_spin_exit(&sc->sc_intr_lock); 1349 1350 return ret; 1351 } 1352 1353 static void 1354 auich_trigger_pipe(struct auich_softc *sc, int pipe, struct auich_ring *ring) 1355 { 1356 int blksize, qptr; 1357 struct auich_dmalist *q; 1358 1359 blksize = ring->blksize; 1360 1361 for (qptr = 0; qptr < ICH_DMALIST_MAX; qptr++) { 1362 q = &ring->dmalist[qptr]; 1363 q->base = ring->p; 1364 q->len = (blksize >> sc->sc_sample_shift) | ICH_DMAF_IOC; 1365 1366 ring->p += blksize; 1367 if (ring->p >= ring->end) 1368 ring->p = ring->start; 1369 } 1370 ring->qptr = 0; 1371 1372 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_LVI, 1373 (qptr - 1) & ICH_LVI_MASK); 1374 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, 1375 ICH_IOCE | ICH_FEIE | ICH_RPBM); 1376 } 1377 1378 static void 1379 auich_intr_pipe(struct auich_softc *sc, int pipe, struct auich_ring *ring) 1380 { 1381 int blksize, qptr, nqptr; 1382 struct auich_dmalist *q; 1383 1384 blksize = ring->blksize; 1385 qptr = ring->qptr; 1386 nqptr = bus_space_read_1(sc->iot, sc->aud_ioh, pipe + ICH_CIV); 1387 1388 while (qptr != nqptr) { 1389 q = &ring->dmalist[qptr]; 1390 q->base = ring->p; 1391 q->len = (blksize >> sc->sc_sample_shift) | ICH_DMAF_IOC; 1392 1393 DPRINTF(ICH_DEBUG_INTR, 1394 ("auich_intr: %p, %p = %x @ 0x%x\n", 1395 &ring->dmalist[qptr], q, q->len, q->base)); 1396 1397 ring->p += blksize; 1398 if (ring->p >= ring->end) 1399 ring->p = ring->start; 1400 1401 qptr = (qptr + 1) & ICH_LVI_MASK; 1402 if (ring->intr) 1403 ring->intr(ring->arg); 1404 } 1405 ring->qptr = qptr; 1406 1407 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_LVI, 1408 (qptr - 1) & ICH_LVI_MASK); 1409 } 1410 1411 static int 1412 auich_trigger_output(void *v, void *start, void *end, int blksize, 1413 void (*intr)(void *), void *arg, const audio_params_t *param) 1414 { 1415 struct auich_softc *sc; 1416 struct auich_dma *p; 1417 size_t size; 1418 1419 DPRINTF(ICH_DEBUG_DMA, 1420 ("auich_trigger_output(%p, %p, %d, %p, %p, %p)\n", 1421 start, end, blksize, intr, arg, param)); 1422 sc = v; 1423 1424 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1425 continue; 1426 if (!p) { 1427 printf("auich_trigger_output: bad addr %p\n", start); 1428 return EINVAL; 1429 } 1430 1431 size = (size_t)((char *)end - (char *)start); 1432 1433 sc->pcmo.intr = intr; 1434 sc->pcmo.arg = arg; 1435 sc->pcmo.start = DMAADDR(p); 1436 sc->pcmo.p = sc->pcmo.start; 1437 sc->pcmo.end = sc->pcmo.start + size; 1438 sc->pcmo.blksize = blksize; 1439 1440 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_BDBAR, 1441 sc->sc_cddma + ICH_PCMO_OFF(0)); 1442 auich_trigger_pipe(sc, ICH_PCMO, &sc->pcmo); 1443 1444 return 0; 1445 } 1446 1447 static int 1448 auich_trigger_input(void *v, void *start, void *end, int blksize, 1449 void (*intr)(void *), void *arg, const audio_params_t *param) 1450 { 1451 struct auich_softc *sc; 1452 struct auich_dma *p; 1453 size_t size; 1454 1455 DPRINTF(ICH_DEBUG_DMA, 1456 ("auich_trigger_input(%p, %p, %d, %p, %p, %p)\n", 1457 start, end, blksize, intr, arg, param)); 1458 sc = v; 1459 1460 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1461 continue; 1462 if (!p) { 1463 printf("auich_trigger_input: bad addr %p\n", start); 1464 return EINVAL; 1465 } 1466 1467 size = (size_t)((char *)end - (char *)start); 1468 1469 sc->pcmi.intr = intr; 1470 sc->pcmi.arg = arg; 1471 sc->pcmi.start = DMAADDR(p); 1472 sc->pcmi.p = sc->pcmi.start; 1473 sc->pcmi.end = sc->pcmi.start + size; 1474 sc->pcmi.blksize = blksize; 1475 1476 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_BDBAR, 1477 sc->sc_cddma + ICH_PCMI_OFF(0)); 1478 auich_trigger_pipe(sc, ICH_PCMI, &sc->pcmi); 1479 1480 return 0; 1481 } 1482 1483 static int 1484 auich_allocmem(struct auich_softc *sc, size_t size, size_t align, 1485 struct auich_dma *p) 1486 { 1487 int error; 1488 1489 p->size = size; 1490 error = bus_dmamem_alloc(sc->dmat, p->size, align, 0, 1491 p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 1492 &p->nsegs, BUS_DMA_WAITOK); 1493 if (error) 1494 return error; 1495 1496 error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size, 1497 &p->addr, BUS_DMA_WAITOK|sc->sc_dmamap_flags); 1498 if (error) 1499 goto free; 1500 1501 error = bus_dmamap_create(sc->dmat, p->size, 1, p->size, 1502 0, BUS_DMA_WAITOK, &p->map); 1503 if (error) 1504 goto unmap; 1505 1506 error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL, 1507 BUS_DMA_WAITOK); 1508 if (error) 1509 goto destroy; 1510 return 0; 1511 1512 destroy: 1513 bus_dmamap_destroy(sc->dmat, p->map); 1514 unmap: 1515 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1516 free: 1517 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1518 return error; 1519 } 1520 1521 static int 1522 auich_freemem(struct auich_softc *sc, struct auich_dma *p) 1523 { 1524 1525 bus_dmamap_unload(sc->dmat, p->map); 1526 bus_dmamap_destroy(sc->dmat, p->map); 1527 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1528 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1529 return 0; 1530 } 1531 1532 static int 1533 auich_alloc_cdata(struct auich_softc *sc) 1534 { 1535 bus_dma_segment_t seg; 1536 int error, rseg; 1537 1538 /* 1539 * Allocate the control data structure, and create and load the 1540 * DMA map for it. 1541 */ 1542 if ((error = bus_dmamem_alloc(sc->dmat, 1543 sizeof(struct auich_cdata), 1544 PAGE_SIZE, 0, &seg, 1, &rseg, 0)) != 0) { 1545 aprint_error_dev(sc->sc_dev, "unable to allocate control data, error = %d\n", error); 1546 goto fail_0; 1547 } 1548 1549 if ((error = bus_dmamem_map(sc->dmat, &seg, rseg, 1550 sizeof(struct auich_cdata), 1551 (void **) &sc->sc_cdata, 1552 sc->sc_dmamap_flags)) != 0) { 1553 aprint_error_dev(sc->sc_dev, "unable to map control data, error = %d\n", error); 1554 goto fail_1; 1555 } 1556 1557 if ((error = bus_dmamap_create(sc->dmat, sizeof(struct auich_cdata), 1, 1558 sizeof(struct auich_cdata), 0, 0, 1559 &sc->sc_cddmamap)) != 0) { 1560 aprint_error_dev(sc->sc_dev, "unable to create control data DMA map, " 1561 "error = %d\n", error); 1562 goto fail_2; 1563 } 1564 1565 if ((error = bus_dmamap_load(sc->dmat, sc->sc_cddmamap, 1566 sc->sc_cdata, sizeof(struct auich_cdata), 1567 NULL, 0)) != 0) { 1568 aprint_error_dev(sc->sc_dev, "unable tp load control data DMA map, " 1569 "error = %d\n", error); 1570 goto fail_3; 1571 } 1572 1573 sc->pcmo.dmalist = sc->sc_cdata->ic_dmalist_pcmo; 1574 sc->pcmi.dmalist = sc->sc_cdata->ic_dmalist_pcmi; 1575 sc->mici.dmalist = sc->sc_cdata->ic_dmalist_mici; 1576 1577 return 0; 1578 1579 fail_3: 1580 bus_dmamap_destroy(sc->dmat, sc->sc_cddmamap); 1581 fail_2: 1582 bus_dmamem_unmap(sc->dmat, (void *) sc->sc_cdata, 1583 sizeof(struct auich_cdata)); 1584 fail_1: 1585 bus_dmamem_free(sc->dmat, &seg, rseg); 1586 fail_0: 1587 return error; 1588 } 1589 1590 static bool 1591 auich_resume(device_t dv, const pmf_qual_t *qual) 1592 { 1593 struct auich_softc *sc = device_private(dv); 1594 pcireg_t v; 1595 1596 mutex_enter(&sc->sc_lock); 1597 mutex_spin_enter(&sc->sc_intr_lock); 1598 1599 if (sc->sc_iose) { 1600 v = pci_conf_read(sc->sc_pc, sc->sc_pt, ICH_CFG); 1601 pci_conf_write(sc->sc_pc, sc->sc_pt, ICH_CFG, 1602 v | ICH_CFG_IOSE); 1603 } 1604 1605 auich_reset_codec(sc); 1606 mutex_spin_exit(&sc->sc_intr_lock); 1607 DELAY(1000); 1608 (sc->codec_if->vtbl->restore_ports)(sc->codec_if); 1609 mutex_exit(&sc->sc_lock); 1610 1611 return true; 1612 } 1613 1614 /* 1615 * Calibrate card (some boards are overclocked and need scaling) 1616 */ 1617 static void 1618 auich_calibrate(struct auich_softc *sc) 1619 { 1620 struct timeval t1, t2; 1621 uint8_t ociv, nciv; 1622 uint64_t wait_us; 1623 uint32_t actual_48k_rate, bytes, ac97rate; 1624 void *temp_buffer; 1625 struct auich_dma *p; 1626 u_int rate; 1627 1628 /* 1629 * Grab audio from input for fixed interval and compare how 1630 * much we actually get with what we expect. Interval needs 1631 * to be sufficiently short that no interrupts are 1632 * generated. 1633 */ 1634 1635 /* Force the codec to a known state first. */ 1636 sc->codec_if->vtbl->set_clock(sc->codec_if, 48000); 1637 rate = sc->sc_ac97_clock = 48000; 1638 sc->codec_if->vtbl->set_rate(sc->codec_if, AC97_REG_PCM_LR_ADC_RATE, 1639 &rate); 1640 1641 /* Setup a buffer */ 1642 bytes = 64000; 1643 temp_buffer = auich_allocm(sc, AUMODE_RECORD, bytes); 1644 1645 for (p = sc->sc_dmas; p && KERNADDR(p) != temp_buffer; p = p->next) 1646 continue; 1647 if (p == NULL) { 1648 printf("auich_calibrate: bad address %p\n", temp_buffer); 1649 return; 1650 } 1651 sc->pcmi.dmalist[0].base = DMAADDR(p); 1652 sc->pcmi.dmalist[0].len = (bytes >> sc->sc_sample_shift); 1653 1654 /* 1655 * our data format is stereo, 16 bit so each sample is 4 bytes. 1656 * assuming we get 48000 samples per second, we get 192000 bytes/sec. 1657 * we're going to start recording with interrupts disabled and measure 1658 * the time taken for one block to complete. we know the block size, 1659 * we know the time in microseconds, we calculate the sample rate: 1660 * 1661 * actual_rate [bps] = bytes / (time [s] * 4) 1662 * actual_rate [bps] = (bytes * 1000000) / (time [us] * 4) 1663 * actual_rate [Hz] = (bytes * 250000) / time [us] 1664 */ 1665 1666 /* prepare */ 1667 ociv = bus_space_read_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CIV); 1668 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_BDBAR, 1669 sc->sc_cddma + ICH_PCMI_OFF(0)); 1670 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_LVI, 1671 (0 - 1) & ICH_LVI_MASK); 1672 1673 /* start */ 1674 kpreempt_disable(); 1675 microtime(&t1); 1676 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, ICH_RPBM); 1677 1678 /* wait */ 1679 nciv = ociv; 1680 do { 1681 microtime(&t2); 1682 if (t2.tv_sec - t1.tv_sec > 1) 1683 break; 1684 nciv = bus_space_read_1(sc->iot, sc->aud_ioh, 1685 ICH_PCMI + ICH_CIV); 1686 } while (nciv == ociv); 1687 microtime(&t2); 1688 1689 /* stop */ 1690 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, 0); 1691 kpreempt_enable(); 1692 1693 /* reset */ 1694 DELAY(100); 1695 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, ICH_RR); 1696 1697 /* turn time delta into us */ 1698 wait_us = ((t2.tv_sec - t1.tv_sec) * 1000000) + t2.tv_usec - t1.tv_usec; 1699 1700 auich_freem(sc, temp_buffer, bytes); 1701 1702 if (nciv == ociv) { 1703 printf("%s: ac97 link rate calibration timed out after %" 1704 PRIu64 " us\n", device_xname(sc->sc_dev), wait_us); 1705 return; 1706 } 1707 1708 actual_48k_rate = (bytes * UINT64_C(250000)) / wait_us; 1709 1710 if (actual_48k_rate < 50000) 1711 ac97rate = 48000; 1712 else 1713 ac97rate = ((actual_48k_rate + 500) / 1000) * 1000; 1714 1715 aprint_verbose_dev(sc->sc_dev, "measured ac97 link rate at %d Hz", 1716 actual_48k_rate); 1717 if (ac97rate != actual_48k_rate) 1718 aprint_verbose(", will use %d Hz", ac97rate); 1719 aprint_verbose("\n"); 1720 1721 sc->sc_ac97_clock = ac97rate; 1722 } 1723 1724 static void 1725 auich_clear_cas(struct auich_softc *sc) 1726 { 1727 /* Clear the codec access semaphore */ 1728 (void)bus_space_read_2(sc->iot, sc->mix_ioh, 1729 AC97_REG_RESET * (sc->sc_codecnum * ICH_CODEC_OFFSET)); 1730 1731 return; 1732 } 1733 1734 static void 1735 auich_get_locks(void *addr, kmutex_t **intr, kmutex_t **thread) 1736 { 1737 struct auich_softc *sc; 1738 1739 sc = addr; 1740 *intr = &sc->sc_intr_lock; 1741 *thread = &sc->sc_lock; 1742 } 1743
Indexes created Wed Oct 22 13:09:56 GMT 2025