auich.c revision 1.142
1 /* $NetBSD: auich.c,v 1.142 2014/02/25 18:30:10 pooka Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2004, 2005, 2008 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Copyright (c) 2000 Michael Shalayeff 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. The name of the author may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 51 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 52 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 53 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 55 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 56 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 57 * THE POSSIBILITY OF SUCH DAMAGE. 58 * 59 * from OpenBSD: ich.c,v 1.3 2000/08/11 06:17:18 mickey Exp 60 */ 61 62 /* 63 * Copyright (c) 2000 Katsurajima Naoto <raven (at) katsurajima.seya.yokohama.jp> 64 * Copyright (c) 2001 Cameron Grant <cg (at) freebsd.org> 65 * All rights reserved. 66 * 67 * Redistribution and use in source and binary forms, with or without 68 * modification, are permitted provided that the following conditions 69 * are met: 70 * 1. Redistributions of source code must retain the above copyright 71 * notice, this list of conditions and the following disclaimer. 72 * 2. Redistributions in binary form must reproduce the above copyright 73 * notice, this list of conditions and the following disclaimer in the 74 * documentation and/or other materials provided with the distribution. 75 * 76 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 77 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 78 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 79 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 80 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 81 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 82 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 83 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 84 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 85 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF 86 * SUCH DAMAGE. 87 * 88 * auich_calibrate() was from FreeBSD: ich.c,v 1.22 2002/06/27 22:36:01 scottl Exp 89 */ 90 91 92 /* #define AUICH_DEBUG */ 93 /* 94 * AC'97 audio found on Intel 810/820/440MX chipsets. 95 * http://developer.intel.com/design/chipsets/datashts/290655.htm 96 * http://developer.intel.com/design/chipsets/manuals/298028.htm 97 * ICH3:http://www.intel.com/design/chipsets/datashts/290716.htm 98 * ICH4:http://www.intel.com/design/chipsets/datashts/290744.htm 99 * ICH5:http://www.intel.com/design/chipsets/datashts/252516.htm 100 * AMD8111: 101 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/24674.pdf 102 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25720.pdf 103 * 104 * TODO: 105 * - Add support for the dedicated microphone input. 106 * 107 * NOTE: 108 * - The 440MX B-stepping at running 100MHz has a hardware erratum. 109 * It causes PCI master abort and hangups until cold reboot. 110 * http://www.intel.com/design/chipsets/specupdt/245051.htm 111 */ 112 113 #include <sys/cdefs.h> 114 __KERNEL_RCSID(0, "$NetBSD: auich.c,v 1.142 2014/02/25 18:30:10 pooka Exp $"); 115 116 #include <sys/param.h> 117 #include <sys/systm.h> 118 #include <sys/kernel.h> 119 #include <sys/kmem.h> 120 #include <sys/device.h> 121 #include <sys/fcntl.h> 122 #include <sys/proc.h> 123 #include <sys/sysctl.h> 124 #include <sys/audioio.h> 125 #include <sys/bus.h> 126 127 #include <dev/pci/pcidevs.h> 128 #include <dev/pci/pcivar.h> 129 #include <dev/pci/auichreg.h> 130 131 #include <dev/audio_if.h> 132 #include <dev/mulaw.h> 133 #include <dev/auconv.h> 134 135 #include <dev/ic/ac97reg.h> 136 #include <dev/ic/ac97var.h> 137 138 struct auich_dma { 139 bus_dmamap_t map; 140 void *addr; 141 bus_dma_segment_t segs[1]; 142 int nsegs; 143 size_t size; 144 struct auich_dma *next; 145 }; 146 147 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 148 #define KERNADDR(p) ((void *)((p)->addr)) 149 150 struct auich_cdata { 151 struct auich_dmalist ic_dmalist_pcmo[ICH_DMALIST_MAX]; 152 struct auich_dmalist ic_dmalist_pcmi[ICH_DMALIST_MAX]; 153 struct auich_dmalist ic_dmalist_mici[ICH_DMALIST_MAX]; 154 }; 155 156 #define ICH_CDOFF(x) offsetof(struct auich_cdata, x) 157 #define ICH_PCMO_OFF(x) ICH_CDOFF(ic_dmalist_pcmo[(x)]) 158 #define ICH_PCMI_OFF(x) ICH_CDOFF(ic_dmalist_pcmi[(x)]) 159 #define ICH_MICI_OFF(x) ICH_CDOFF(ic_dmalist_mici[(x)]) 160 161 struct auich_softc { 162 device_t sc_dev; 163 void *sc_ih; 164 kmutex_t sc_lock; 165 kmutex_t sc_intr_lock; 166 167 device_t sc_audiodev; 168 audio_device_t sc_audev; 169 170 pci_chipset_tag_t sc_pc; 171 pcitag_t sc_pt; 172 bus_space_tag_t iot; 173 bus_space_handle_t mix_ioh; 174 bus_size_t mix_size; 175 bus_space_handle_t aud_ioh; 176 bus_size_t aud_size; 177 bus_dma_tag_t dmat; 178 pci_intr_handle_t intrh; 179 180 struct ac97_codec_if *codec_if; 181 struct ac97_host_if host_if; 182 int sc_codecnum; 183 int sc_codectype; 184 int sc_fixedrate; 185 enum ac97_host_flags sc_codecflags; 186 bool sc_spdif; 187 188 /* multi-channel control bits */ 189 int sc_pcm246_mask; 190 int sc_pcm2; 191 int sc_pcm4; 192 int sc_pcm6; 193 194 /* DMA scatter-gather lists. */ 195 bus_dmamap_t sc_cddmamap; 196 #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr 197 198 struct auich_cdata *sc_cdata; 199 200 struct auich_ring { 201 int qptr; 202 struct auich_dmalist *dmalist; 203 204 uint32_t start, p, end; 205 int blksize; 206 207 void (*intr)(void *); 208 void *arg; 209 } pcmo, pcmi, mici; 210 211 struct auich_dma *sc_dmas; 212 213 /* SiS 7012 hack */ 214 int sc_sample_shift; 215 int sc_sts_reg; 216 /* 440MX workaround */ 217 int sc_dmamap_flags; 218 /* flags */ 219 int sc_iose :1, 220 :31; 221 222 /* sysctl */ 223 struct sysctllog *sc_log; 224 uint32_t sc_ac97_clock; 225 int sc_ac97_clock_mib; 226 227 int sc_modem_offset; 228 229 #define AUICH_AUDIO_NFORMATS 3 230 #define AUICH_MODEM_NFORMATS 1 231 struct audio_format sc_audio_formats[AUICH_AUDIO_NFORMATS]; 232 struct audio_format sc_modem_formats[AUICH_MODEM_NFORMATS]; 233 struct audio_encoding_set *sc_encodings; 234 struct audio_encoding_set *sc_spdif_encodings; 235 }; 236 237 /* Debug */ 238 #ifdef AUICH_DEBUG 239 #define DPRINTF(l,x) do { if (auich_debug & (l)) printf x; } while(0) 240 int auich_debug = 0xfffe; 241 #define ICH_DEBUG_CODECIO 0x0001 242 #define ICH_DEBUG_DMA 0x0002 243 #define ICH_DEBUG_INTR 0x0004 244 #else 245 #define DPRINTF(x,y) /* nothing */ 246 #endif 247 248 static int auich_match(device_t, cfdata_t, void *); 249 static void auich_attach(device_t, device_t, void *); 250 static int auich_detach(device_t, int); 251 static void auich_childdet(device_t, device_t); 252 static int auich_intr(void *); 253 254 CFATTACH_DECL2_NEW(auich, sizeof(struct auich_softc), 255 auich_match, auich_attach, auich_detach, NULL, NULL, auich_childdet); 256 257 static int auich_open(void *, int); 258 static void auich_close(void *); 259 static int auich_query_encoding(void *, struct audio_encoding *); 260 static int auich_set_params(void *, int, int, audio_params_t *, 261 audio_params_t *, stream_filter_list_t *, 262 stream_filter_list_t *); 263 static int auich_round_blocksize(void *, int, int, const audio_params_t *); 264 static void auich_halt_pipe(struct auich_softc *, int); 265 static int auich_halt_output(void *); 266 static int auich_halt_input(void *); 267 static int auich_getdev(void *, struct audio_device *); 268 static int auich_set_port(void *, mixer_ctrl_t *); 269 static int auich_get_port(void *, mixer_ctrl_t *); 270 static int auich_query_devinfo(void *, mixer_devinfo_t *); 271 static void *auich_allocm(void *, int, size_t); 272 static void auich_freem(void *, void *, size_t); 273 static size_t auich_round_buffersize(void *, int, size_t); 274 static paddr_t auich_mappage(void *, void *, off_t, int); 275 static int auich_get_props(void *); 276 static void auich_trigger_pipe(struct auich_softc *, int, struct auich_ring *); 277 static void auich_intr_pipe(struct auich_softc *, int, struct auich_ring *); 278 static int auich_trigger_output(void *, void *, void *, int, 279 void (*)(void *), void *, const audio_params_t *); 280 static int auich_trigger_input(void *, void *, void *, int, 281 void (*)(void *), void *, const audio_params_t *); 282 static void auich_get_locks(void *, kmutex_t **, kmutex_t **); 283 284 static int auich_alloc_cdata(struct auich_softc *); 285 286 static int auich_allocmem(struct auich_softc *, size_t, size_t, 287 struct auich_dma *); 288 static int auich_freemem(struct auich_softc *, struct auich_dma *); 289 290 static bool auich_resume(device_t, const pmf_qual_t *); 291 static int auich_set_rate(struct auich_softc *, int, u_long); 292 static int auich_sysctl_verify(SYSCTLFN_ARGS); 293 static void auich_finish_attach(device_t); 294 static void auich_calibrate(struct auich_softc *); 295 static void auich_clear_cas(struct auich_softc *); 296 297 static int auich_attach_codec(void *, struct ac97_codec_if *); 298 static int auich_read_codec(void *, uint8_t, uint16_t *); 299 static int auich_write_codec(void *, uint8_t, uint16_t); 300 static int auich_reset_codec(void *); 301 static enum ac97_host_flags auich_flags_codec(void *); 302 static void auich_spdif_event(void *, bool); 303 304 static const struct audio_hw_if auich_hw_if = { 305 auich_open, 306 auich_close, 307 NULL, /* drain */ 308 auich_query_encoding, 309 auich_set_params, 310 auich_round_blocksize, 311 NULL, /* commit_setting */ 312 NULL, /* init_output */ 313 NULL, /* init_input */ 314 NULL, /* start_output */ 315 NULL, /* start_input */ 316 auich_halt_output, 317 auich_halt_input, 318 NULL, /* speaker_ctl */ 319 auich_getdev, 320 NULL, /* getfd */ 321 auich_set_port, 322 auich_get_port, 323 auich_query_devinfo, 324 auich_allocm, 325 auich_freem, 326 auich_round_buffersize, 327 auich_mappage, 328 auich_get_props, 329 auich_trigger_output, 330 auich_trigger_input, 331 NULL, /* dev_ioctl */ 332 auich_get_locks, 333 }; 334 335 #define AUICH_FORMATS_1CH 0 336 #define AUICH_FORMATS_4CH 1 337 #define AUICH_FORMATS_6CH 2 338 static const struct audio_format auich_audio_formats[AUICH_AUDIO_NFORMATS] = { 339 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 340 2, AUFMT_STEREO, 0, {8000, 48000}}, 341 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 342 4, AUFMT_SURROUND4, 0, {8000, 48000}}, 343 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 344 6, AUFMT_DOLBY_5_1, 0, {8000, 48000}}, 345 }; 346 347 #define AUICH_SPDIF_NFORMATS 1 348 static const struct audio_format auich_spdif_formats[AUICH_SPDIF_NFORMATS] = { 349 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 350 2, AUFMT_STEREO, 1, {48000}}, 351 }; 352 353 static const struct audio_format auich_modem_formats[AUICH_MODEM_NFORMATS] = { 354 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 355 1, AUFMT_MONAURAL, 0, {8000, 16000}}, 356 }; 357 358 #define PCI_ID_CODE0(v, p) PCI_ID_CODE(PCI_VENDOR_##v, PCI_PRODUCT_##v##_##p) 359 #define PCIID_ICH PCI_ID_CODE0(INTEL, 82801AA_ACA) 360 #define PCIID_ICH0 PCI_ID_CODE0(INTEL, 82801AB_ACA) 361 #define PCIID_ICH2 PCI_ID_CODE0(INTEL, 82801BA_ACA) 362 #define PCIID_440MX PCI_ID_CODE0(INTEL, 82440MX_ACA) 363 #define PCIID_ICH3 PCI_ID_CODE0(INTEL, 82801CA_AC) 364 #define PCIID_ICH4 PCI_ID_CODE0(INTEL, 82801DB_AC) 365 #define PCIID_ICH5 PCI_ID_CODE0(INTEL, 82801EB_AC) 366 #define PCIID_ICH6 PCI_ID_CODE0(INTEL, 82801FB_AC) 367 #define PCIID_ICH7 PCI_ID_CODE0(INTEL, 82801G_ACA) 368 #define PCIID_I6300ESB PCI_ID_CODE0(INTEL, 6300ESB_ACA) 369 #define PCIID_SIS7012 PCI_ID_CODE0(SIS, 7012_AC) 370 #define PCIID_NFORCE PCI_ID_CODE0(NVIDIA, NFORCE_MCP_AC) 371 #define PCIID_NFORCE2 PCI_ID_CODE0(NVIDIA, NFORCE2_MCPT_AC) 372 #define PCIID_NFORCE2_400 PCI_ID_CODE0(NVIDIA, NFORCE2_400_MCPT_AC) 373 #define PCIID_NFORCE3 PCI_ID_CODE0(NVIDIA, NFORCE3_MCPT_AC) 374 #define PCIID_NFORCE3_250 PCI_ID_CODE0(NVIDIA, NFORCE3_250_MCPT_AC) 375 #define PCIID_NFORCE4 PCI_ID_CODE0(NVIDIA, NFORCE4_AC) 376 #define PCIID_NFORCE430 PCI_ID_CODE0(NVIDIA, NFORCE430_AC) 377 #define PCIID_AMD768 PCI_ID_CODE0(AMD, PBC768_AC) 378 #define PCIID_AMD8111 PCI_ID_CODE0(AMD, PBC8111_AC) 379 380 #define PCIID_ICH3MODEM PCI_ID_CODE0(INTEL, 82801CA_MOD) 381 #define PCIID_ICH4MODEM PCI_ID_CODE0(INTEL, 82801DB_MOD) 382 #define PCIID_ICH6MODEM PCI_ID_CODE0(INTEL, 82801FB_ACM) 383 384 struct auich_devtype { 385 pcireg_t id; 386 const char *name; 387 const char *shortname; /* must be less than 11 characters */ 388 }; 389 390 static const struct auich_devtype auich_audio_devices[] = { 391 { PCIID_ICH, "i82801AA (ICH) AC-97 Audio", "ICH" }, 392 { PCIID_ICH0, "i82801AB (ICH0) AC-97 Audio", "ICH0" }, 393 { PCIID_ICH2, "i82801BA (ICH2) AC-97 Audio", "ICH2" }, 394 { PCIID_440MX, "i82440MX AC-97 Audio", "440MX" }, 395 { PCIID_ICH3, "i82801CA (ICH3) AC-97 Audio", "ICH3" }, 396 { PCIID_ICH4, "i82801DB/DBM (ICH4/ICH4M) AC-97 Audio", "ICH4" }, 397 { PCIID_ICH5, "i82801EB (ICH5) AC-97 Audio", "ICH5" }, 398 { PCIID_ICH6, "i82801FB (ICH6) AC-97 Audio", "ICH6" }, 399 { PCIID_ICH7, "i82801GB/GR (ICH7) AC-97 Audio", "ICH7" }, 400 { PCIID_I6300ESB, "Intel 6300ESB AC-97 Audio", "I6300ESB" }, 401 { PCIID_SIS7012, "SiS 7012 AC-97 Audio", "SiS7012" }, 402 { PCIID_NFORCE, "nForce MCP AC-97 Audio", "nForce" }, 403 { PCIID_NFORCE2, "nForce2 MCP-T AC-97 Audio", "nForce2" }, 404 { PCIID_NFORCE2_400, "nForce2 400 MCP-T AC-97 Audio", "nForce2" }, 405 { PCIID_NFORCE3, "nForce3 MCP-T AC-97 Audio", "nForce3" }, 406 { PCIID_NFORCE3_250, "nForce3 250 MCP-T AC-97 Audio", "nForce3" }, 407 { PCIID_NFORCE4, "nForce4 AC-97 Audio", "nForce4" }, 408 { PCIID_NFORCE430, "nForce430 (MCP51) AC-97 Audio", "nForce430" }, 409 { PCIID_AMD768, "AMD768 AC-97 Audio", "AMD768" }, 410 { PCIID_AMD8111,"AMD8111 AC-97 Audio", "AMD8111" }, 411 { 0, NULL, NULL }, 412 }; 413 414 static const struct auich_devtype auich_modem_devices[] = { 415 #ifdef AUICH_ATTACH_MODEM 416 { PCIID_ICH3MODEM, "i82801CA (ICH3) AC-97 Modem", "ICH3MODEM" }, 417 { PCIID_ICH4MODEM, "i82801DB (ICH4) AC-97 Modem", "ICH4MODEM" }, 418 { PCIID_ICH6MODEM, "i82801FB (ICH6) AC-97 Modem", "ICH6MODEM" }, 419 #endif 420 { 0, NULL, NULL }, 421 }; 422 423 static const struct auich_devtype * 424 auich_lookup(struct pci_attach_args *pa, const struct auich_devtype *auich_devices) 425 { 426 const struct auich_devtype *d; 427 428 for (d = auich_devices; d->name != NULL; d++) { 429 if (pa->pa_id == d->id) 430 return d; 431 } 432 433 return NULL; 434 } 435 436 static int 437 auich_match(device_t parent, cfdata_t match, void *aux) 438 { 439 struct pci_attach_args *pa; 440 441 pa = aux; 442 if (auich_lookup(pa, auich_audio_devices) != NULL) 443 return 1; 444 if (auich_lookup(pa, auich_modem_devices) != NULL) 445 return 1; 446 447 return 0; 448 } 449 450 static void 451 auich_attach(device_t parent, device_t self, void *aux) 452 { 453 struct auich_softc *sc = device_private(self); 454 struct pci_attach_args *pa; 455 pcireg_t v, subdev; 456 const char *intrstr; 457 const struct auich_devtype *d; 458 const struct sysctlnode *node, *node_ac97clock; 459 int err, node_mib, i; 460 461 sc->sc_dev = self; 462 pa = aux; 463 464 if ((d = auich_lookup(pa, auich_modem_devices)) != NULL) { 465 sc->sc_modem_offset = 0x10; 466 sc->sc_codectype = AC97_CODEC_TYPE_MODEM; 467 } else if ((d = auich_lookup(pa, auich_audio_devices)) != NULL) { 468 sc->sc_modem_offset = 0; 469 sc->sc_codectype = AC97_CODEC_TYPE_AUDIO; 470 } else 471 panic("auich_attach: impossible"); 472 473 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 474 aprint_naive(": Audio controller\n"); 475 else 476 aprint_naive(": Modem controller\n"); 477 478 sc->sc_pc = pa->pa_pc; 479 sc->sc_pt = pa->pa_tag; 480 481 aprint_normal(": %s\n", d->name); 482 483 if (d->id == PCIID_ICH4 || d->id == PCIID_ICH5 || d->id == PCIID_ICH6 484 || d->id == PCIID_ICH7 || d->id == PCIID_I6300ESB 485 || d->id == PCIID_ICH4MODEM) { 486 /* 487 * Use native mode for Intel 6300ESB and ICH4/ICH5/ICH6/ICH7 488 */ 489 490 if (pci_mapreg_map(pa, ICH_MMBAR, PCI_MAPREG_TYPE_MEM, 0, 491 &sc->iot, &sc->mix_ioh, NULL, &sc->mix_size)) { 492 goto retry_map; 493 } 494 if (pci_mapreg_map(pa, ICH_MBBAR, PCI_MAPREG_TYPE_MEM, 0, 495 &sc->iot, &sc->aud_ioh, NULL, &sc->aud_size)) { 496 goto retry_map; 497 } 498 goto map_done; 499 } else 500 goto non_native_map; 501 502 retry_map: 503 sc->sc_iose = 1; 504 v = pci_conf_read(pa->pa_pc, pa->pa_tag, ICH_CFG); 505 pci_conf_write(pa->pa_pc, pa->pa_tag, ICH_CFG, 506 v | ICH_CFG_IOSE); 507 508 non_native_map: 509 if (pci_mapreg_map(pa, ICH_NAMBAR, PCI_MAPREG_TYPE_IO, 0, 510 &sc->iot, &sc->mix_ioh, NULL, &sc->mix_size)) { 511 aprint_error_dev(self, "can't map codec i/o space\n"); 512 return; 513 } 514 if (pci_mapreg_map(pa, ICH_NABMBAR, PCI_MAPREG_TYPE_IO, 0, 515 &sc->iot, &sc->aud_ioh, NULL, &sc->aud_size)) { 516 aprint_error_dev(self, "can't map device i/o space\n"); 517 return; 518 } 519 520 map_done: 521 sc->dmat = pa->pa_dmat; 522 523 /* enable bus mastering */ 524 v = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 525 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 526 v | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_BACKTOBACK_ENABLE); 527 528 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 529 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO); 530 531 /* Map and establish the interrupt. */ 532 if (pci_intr_map(pa, &sc->intrh)) { 533 aprint_error_dev(self, "can't map interrupt\n"); 534 return; 535 } 536 intrstr = pci_intr_string(pa->pa_pc, sc->intrh); 537 sc->sc_ih = pci_intr_establish(pa->pa_pc, sc->intrh, IPL_AUDIO, 538 auich_intr, sc); 539 if (sc->sc_ih == NULL) { 540 aprint_error_dev(self, "can't establish interrupt"); 541 if (intrstr != NULL) 542 aprint_error(" at %s", intrstr); 543 aprint_error("\n"); 544 return; 545 } 546 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 547 548 snprintf(sc->sc_audev.name, MAX_AUDIO_DEV_LEN, "%s AC97", d->shortname); 549 snprintf(sc->sc_audev.version, MAX_AUDIO_DEV_LEN, 550 "0x%02x", PCI_REVISION(pa->pa_class)); 551 strlcpy(sc->sc_audev.config, device_xname(self), MAX_AUDIO_DEV_LEN); 552 553 /* SiS 7012 needs special handling */ 554 if (d->id == PCIID_SIS7012) { 555 sc->sc_sts_reg = ICH_PICB; 556 sc->sc_sample_shift = 0; 557 sc->sc_pcm246_mask = ICH_SIS_PCM246_MASK; 558 sc->sc_pcm2 = ICH_SIS_PCM2; 559 sc->sc_pcm4 = ICH_SIS_PCM4; 560 sc->sc_pcm6 = ICH_SIS_PCM6; 561 /* Un-mute output. From Linux. */ 562 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_SIS_NV_CTL, 563 bus_space_read_4(sc->iot, sc->aud_ioh, ICH_SIS_NV_CTL) | 564 ICH_SIS_CTL_UNMUTE); 565 } else { 566 sc->sc_sts_reg = ICH_STS; 567 sc->sc_sample_shift = 1; 568 sc->sc_pcm246_mask = ICH_PCM246_MASK; 569 sc->sc_pcm2 = ICH_PCM2; 570 sc->sc_pcm4 = ICH_PCM4; 571 sc->sc_pcm6 = ICH_PCM6; 572 } 573 574 /* Workaround for a 440MX B-stepping erratum */ 575 sc->sc_dmamap_flags = BUS_DMA_COHERENT; 576 if (d->id == PCIID_440MX) { 577 sc->sc_dmamap_flags |= BUS_DMA_NOCACHE; 578 aprint_normal_dev(self, "DMA bug workaround enabled\n"); 579 } 580 581 /* Set up DMA lists. */ 582 sc->pcmo.qptr = sc->pcmi.qptr = sc->mici.qptr = 0; 583 auich_alloc_cdata(sc); 584 585 DPRINTF(ICH_DEBUG_DMA, ("auich_attach: lists %p %p %p\n", 586 sc->pcmo.dmalist, sc->pcmi.dmalist, sc->mici.dmalist)); 587 588 /* Modem codecs are always the secondary codec on ICH */ 589 sc->sc_codecnum = sc->sc_codectype == AC97_CODEC_TYPE_MODEM ? 1 : 0; 590 591 sc->host_if.arg = sc; 592 sc->host_if.attach = auich_attach_codec; 593 sc->host_if.read = auich_read_codec; 594 sc->host_if.write = auich_write_codec; 595 sc->host_if.reset = auich_reset_codec; 596 sc->host_if.flags = auich_flags_codec; 597 sc->host_if.spdif_event = auich_spdif_event; 598 599 subdev = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 600 switch (subdev) { 601 case 0x202f161f: /* Gateway 7326GZ */ 602 case 0x203a161f: /* Gateway 4028GZ */ 603 case 0x204c161f: /* Kvazar-Micro Senator 3592XT */ 604 case 0x8144104d: /* Sony VAIO PCG-TR* */ 605 case 0x8197104d: /* Sony S1XP */ 606 case 0x81c0104d: /* Sony VAIO type T */ 607 case 0x81c5104d: /* Sony VAIO VGN-B1XP */ 608 sc->sc_codecflags = AC97_HOST_INVERTED_EAMP; 609 break; 610 default: 611 sc->sc_codecflags = 0; 612 break; 613 } 614 615 if (ac97_attach_type(&sc->host_if, self, sc->sc_codectype, 616 &sc->sc_lock) != 0) 617 return; 618 619 mutex_enter(&sc->sc_lock); 620 sc->codec_if->vtbl->unlock(sc->codec_if); 621 sc->sc_fixedrate = AC97_IS_FIXED_RATE(sc->codec_if); 622 623 /* setup audio_format */ 624 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 625 memcpy(sc->sc_audio_formats, auich_audio_formats, sizeof(auich_audio_formats)); 626 if (!AC97_IS_4CH(sc->codec_if)) 627 AUFMT_INVALIDATE(&sc->sc_audio_formats[AUICH_FORMATS_4CH]); 628 if (!AC97_IS_6CH(sc->codec_if)) 629 AUFMT_INVALIDATE(&sc->sc_audio_formats[AUICH_FORMATS_6CH]); 630 if (AC97_IS_FIXED_RATE(sc->codec_if)) { 631 for (i = 0; i < AUICH_AUDIO_NFORMATS; i++) { 632 sc->sc_audio_formats[i].frequency_type = 1; 633 sc->sc_audio_formats[i].frequency[0] = 48000; 634 } 635 } 636 mutex_exit(&sc->sc_lock); 637 if (0 != auconv_create_encodings(sc->sc_audio_formats, AUICH_AUDIO_NFORMATS, 638 &sc->sc_encodings)) 639 return; 640 if (0 != auconv_create_encodings(auich_spdif_formats, AUICH_SPDIF_NFORMATS, 641 &sc->sc_spdif_encodings)) 642 return; 643 } else { 644 mutex_exit(&sc->sc_lock); 645 memcpy(sc->sc_modem_formats, auich_modem_formats, sizeof(auich_modem_formats)); 646 if (0 != auconv_create_encodings(sc->sc_modem_formats, AUICH_MODEM_NFORMATS, 647 &sc->sc_encodings)) 648 return; 649 } 650 651 /* Watch for power change */ 652 if (!pmf_device_register(self, NULL, auich_resume)) 653 aprint_error_dev(self, "couldn't establish power handler\n"); 654 655 config_interrupts(self, auich_finish_attach); 656 657 /* sysctl setup */ 658 if (sc->sc_fixedrate && sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 659 return; 660 661 err = sysctl_createv(&sc->sc_log, 0, NULL, &node, 0, 662 CTLTYPE_NODE, device_xname(self), NULL, NULL, 0, 663 NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 664 if (err != 0) 665 goto sysctl_err; 666 node_mib = node->sysctl_num; 667 668 if (!sc->sc_fixedrate) { 669 /* passing the sc address instead of &sc->sc_ac97_clock */ 670 err = sysctl_createv(&sc->sc_log, 0, NULL, &node_ac97clock, 671 CTLFLAG_READWRITE, 672 CTLTYPE_INT, "ac97rate", 673 SYSCTL_DESCR("AC'97 codec link rate"), 674 auich_sysctl_verify, 0, (void *)sc, 0, 675 CTL_HW, node_mib, CTL_CREATE, CTL_EOL); 676 if (err != 0) 677 goto sysctl_err; 678 sc->sc_ac97_clock_mib = node_ac97clock->sysctl_num; 679 } 680 681 return; 682 683 sysctl_err: 684 printf("%s: failed to add sysctl nodes. (%d)\n", 685 device_xname(self), err); 686 return; /* failure of sysctl is not fatal. */ 687 } 688 689 static void 690 auich_childdet(device_t self, device_t child) 691 { 692 struct auich_softc *sc = device_private(self); 693 694 KASSERT(sc->sc_audiodev == child); 695 sc->sc_audiodev = NULL; 696 } 697 698 static int 699 auich_detach(device_t self, int flags) 700 { 701 struct auich_softc *sc = device_private(self); 702 703 /* audio */ 704 if (sc->sc_audiodev != NULL) 705 config_detach(sc->sc_audiodev, flags); 706 707 /* sysctl */ 708 sysctl_teardown(&sc->sc_log); 709 710 mutex_enter(&sc->sc_lock); 711 712 /* audio_encoding_set */ 713 auconv_delete_encodings(sc->sc_encodings); 714 auconv_delete_encodings(sc->sc_spdif_encodings); 715 716 /* ac97 */ 717 if (sc->codec_if != NULL) 718 sc->codec_if->vtbl->detach(sc->codec_if); 719 720 mutex_exit(&sc->sc_lock); 721 mutex_destroy(&sc->sc_lock); 722 mutex_destroy(&sc->sc_intr_lock); 723 724 /* PCI */ 725 if (sc->sc_ih != NULL) 726 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 727 if (sc->mix_size != 0) 728 bus_space_unmap(sc->iot, sc->mix_ioh, sc->mix_size); 729 if (sc->aud_size != 0) 730 bus_space_unmap(sc->iot, sc->aud_ioh, sc->aud_size); 731 return 0; 732 } 733 734 static int 735 auich_sysctl_verify(SYSCTLFN_ARGS) 736 { 737 int error, tmp; 738 struct sysctlnode node; 739 struct auich_softc *sc; 740 741 node = *rnode; 742 sc = rnode->sysctl_data; 743 if (node.sysctl_num == sc->sc_ac97_clock_mib) { 744 tmp = sc->sc_ac97_clock; 745 node.sysctl_data = &tmp; 746 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 747 if (error || newp == NULL) 748 return error; 749 750 if (tmp < 48000 || tmp > 96000) 751 return EINVAL; 752 mutex_enter(&sc->sc_lock); 753 sc->sc_ac97_clock = tmp; 754 mutex_exit(&sc->sc_lock); 755 } 756 757 return 0; 758 } 759 760 static void 761 auich_finish_attach(device_t self) 762 { 763 struct auich_softc *sc = device_private(self); 764 765 mutex_enter(&sc->sc_lock); 766 if (!AC97_IS_FIXED_RATE(sc->codec_if)) 767 auich_calibrate(sc); 768 mutex_exit(&sc->sc_lock); 769 770 sc->sc_audiodev = audio_attach_mi(&auich_hw_if, sc, sc->sc_dev); 771 772 return; 773 } 774 775 #define ICH_CODECIO_INTERVAL 10 776 static int 777 auich_read_codec(void *v, uint8_t reg, uint16_t *val) 778 { 779 struct auich_softc *sc; 780 int i; 781 uint32_t status; 782 783 sc = v; 784 /* wait for an access semaphore */ 785 for (i = ICH_SEMATIMO / ICH_CODECIO_INTERVAL; i-- && 786 bus_space_read_1(sc->iot, sc->aud_ioh, 787 ICH_CAS + sc->sc_modem_offset) & 1; 788 DELAY(ICH_CODECIO_INTERVAL)); 789 790 if (i > 0) { 791 *val = bus_space_read_2(sc->iot, sc->mix_ioh, 792 reg + (sc->sc_codecnum * ICH_CODEC_OFFSET)); 793 DPRINTF(ICH_DEBUG_CODECIO, 794 ("auich_read_codec(%x, %x)\n", reg, *val)); 795 status = bus_space_read_4(sc->iot, sc->aud_ioh, 796 ICH_GSTS + sc->sc_modem_offset); 797 if (status & ICH_RCS) { 798 bus_space_write_4(sc->iot, sc->aud_ioh, 799 ICH_GSTS + sc->sc_modem_offset, 800 status & ~(ICH_SRI|ICH_PRI|ICH_GSCI)); 801 *val = 0xffff; 802 DPRINTF(ICH_DEBUG_CODECIO, 803 ("%s: read_codec error\n", device_xname(sc->sc_dev))); 804 if (reg == AC97_REG_GPIO_STATUS) 805 auich_clear_cas(sc); 806 return -1; 807 } 808 if (reg == AC97_REG_GPIO_STATUS) 809 auich_clear_cas(sc); 810 return 0; 811 } else { 812 aprint_normal_dev(sc->sc_dev, "read_codec timeout\n"); 813 if (reg == AC97_REG_GPIO_STATUS) 814 auich_clear_cas(sc); 815 return -1; 816 } 817 } 818 819 static int 820 auich_write_codec(void *v, uint8_t reg, uint16_t val) 821 { 822 struct auich_softc *sc; 823 int i; 824 825 DPRINTF(ICH_DEBUG_CODECIO, ("auich_write_codec(%x, %x)\n", reg, val)); 826 sc = v; 827 /* wait for an access semaphore */ 828 for (i = ICH_SEMATIMO / ICH_CODECIO_INTERVAL; i-- && 829 bus_space_read_1(sc->iot, sc->aud_ioh, 830 ICH_CAS + sc->sc_modem_offset) & 1; 831 DELAY(ICH_CODECIO_INTERVAL)); 832 833 if (i > 0) { 834 bus_space_write_2(sc->iot, sc->mix_ioh, 835 reg + (sc->sc_codecnum * ICH_CODEC_OFFSET), val); 836 return 0; 837 } else { 838 aprint_normal_dev(sc->sc_dev, "write_codec timeout\n"); 839 return -1; 840 } 841 } 842 843 static int 844 auich_attach_codec(void *v, struct ac97_codec_if *cif) 845 { 846 struct auich_softc *sc; 847 848 sc = v; 849 sc->codec_if = cif; 850 851 return 0; 852 } 853 854 static int 855 auich_reset_codec(void *v) 856 { 857 struct auich_softc *sc; 858 int i; 859 uint32_t control, status; 860 861 sc = v; 862 control = bus_space_read_4(sc->iot, sc->aud_ioh, 863 ICH_GCTRL + sc->sc_modem_offset); 864 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 865 control &= ~(ICH_ACLSO | sc->sc_pcm246_mask); 866 } else { 867 control &= ~ICH_ACLSO; 868 control |= ICH_GIE; 869 } 870 control |= (control & ICH_CRESET) ? ICH_WRESET : ICH_CRESET; 871 bus_space_write_4(sc->iot, sc->aud_ioh, 872 ICH_GCTRL + sc->sc_modem_offset, control); 873 874 for (i = 500000; i >= 0; i--) { 875 status = bus_space_read_4(sc->iot, sc->aud_ioh, 876 ICH_GSTS + sc->sc_modem_offset); 877 if (status & (ICH_PCR | ICH_SCR | ICH_S2CR)) 878 break; 879 DELAY(1); 880 } 881 if (i <= 0) { 882 aprint_error_dev(sc->sc_dev, "auich_reset_codec: time out\n"); 883 return ETIMEDOUT; 884 } 885 #ifdef AUICH_DEBUG 886 if (status & ICH_SCR) 887 printf("%s: The 2nd codec is ready.\n", 888 device_xname(sc->sc_dev)); 889 if (status & ICH_S2CR) 890 printf("%s: The 3rd codec is ready.\n", 891 device_xname(sc->sc_dev)); 892 #endif 893 return 0; 894 } 895 896 static enum ac97_host_flags 897 auich_flags_codec(void *v) 898 { 899 struct auich_softc *sc = v; 900 return sc->sc_codecflags; 901 } 902 903 static void 904 auich_spdif_event(void *addr, bool flag) 905 { 906 struct auich_softc *sc; 907 908 sc = addr; 909 sc->sc_spdif = flag; 910 } 911 912 static int 913 auich_open(void *addr, int flags) 914 { 915 struct auich_softc *sc; 916 917 sc = (struct auich_softc *)addr; 918 mutex_spin_exit(&sc->sc_intr_lock); 919 sc->codec_if->vtbl->lock(sc->codec_if); 920 mutex_spin_enter(&sc->sc_intr_lock); 921 return 0; 922 } 923 924 static void 925 auich_close(void *addr) 926 { 927 struct auich_softc *sc; 928 929 sc = (struct auich_softc *)addr; 930 mutex_spin_exit(&sc->sc_intr_lock); 931 sc->codec_if->vtbl->unlock(sc->codec_if); 932 mutex_spin_enter(&sc->sc_intr_lock); 933 } 934 935 static int 936 auich_query_encoding(void *v, struct audio_encoding *aep) 937 { 938 struct auich_softc *sc; 939 940 sc = (struct auich_softc *)v; 941 return auconv_query_encoding( 942 sc->sc_spdif ? sc->sc_spdif_encodings : sc->sc_encodings, aep); 943 } 944 945 static int 946 auich_set_rate(struct auich_softc *sc, int mode, u_long srate) 947 { 948 int ret; 949 u_int ratetmp; 950 951 sc->codec_if->vtbl->set_clock(sc->codec_if, sc->sc_ac97_clock); 952 ratetmp = srate; 953 if (mode == AUMODE_RECORD) 954 return sc->codec_if->vtbl->set_rate(sc->codec_if, 955 AC97_REG_PCM_LR_ADC_RATE, &ratetmp); 956 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 957 AC97_REG_PCM_FRONT_DAC_RATE, &ratetmp); 958 if (ret) 959 return ret; 960 ratetmp = srate; 961 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 962 AC97_REG_PCM_SURR_DAC_RATE, &ratetmp); 963 if (ret) 964 return ret; 965 ratetmp = srate; 966 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 967 AC97_REG_PCM_LFE_DAC_RATE, &ratetmp); 968 return ret; 969 } 970 971 static int 972 auich_set_params(void *v, int setmode, int usemode, 973 audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil, 974 stream_filter_list_t *rfil) 975 { 976 struct auich_softc *sc; 977 audio_params_t *p; 978 stream_filter_list_t *fil; 979 int mode, index; 980 uint32_t control; 981 982 sc = v; 983 for (mode = AUMODE_RECORD; mode != -1; 984 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 985 if ((setmode & mode) == 0) 986 continue; 987 988 p = mode == AUMODE_PLAY ? play : rec; 989 fil = mode == AUMODE_PLAY ? pfil : rfil; 990 if (p == NULL) 991 continue; 992 993 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 994 if (p->sample_rate < 8000 || 995 p->sample_rate > 48000) 996 return EINVAL; 997 998 if (!sc->sc_spdif) 999 index = auconv_set_converter(sc->sc_audio_formats, 1000 AUICH_AUDIO_NFORMATS, mode, p, TRUE, fil); 1001 else 1002 index = auconv_set_converter(auich_spdif_formats, 1003 AUICH_SPDIF_NFORMATS, mode, p, TRUE, fil); 1004 } else { 1005 if (p->sample_rate != 8000 && p->sample_rate != 16000) 1006 return EINVAL; 1007 index = auconv_set_converter(sc->sc_modem_formats, 1008 AUICH_MODEM_NFORMATS, mode, p, TRUE, fil); 1009 } 1010 if (index < 0) 1011 return EINVAL; 1012 if (fil->req_size > 0) 1013 p = &fil->filters[0].param; 1014 /* p represents HW encoding */ 1015 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 1016 if (sc->sc_audio_formats[index].frequency_type != 1 1017 && auich_set_rate(sc, mode, p->sample_rate)) 1018 return EINVAL; 1019 } else { 1020 if (sc->sc_modem_formats[index].frequency_type != 1 1021 && auich_set_rate(sc, mode, p->sample_rate)) 1022 return EINVAL; 1023 auich_write_codec(sc, AC97_REG_LINE1_RATE, 1024 p->sample_rate); 1025 auich_write_codec(sc, AC97_REG_LINE1_LEVEL, 0); 1026 } 1027 if (mode == AUMODE_PLAY && 1028 sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 1029 control = bus_space_read_4(sc->iot, sc->aud_ioh, 1030 ICH_GCTRL + sc->sc_modem_offset); 1031 control &= ~sc->sc_pcm246_mask; 1032 if (p->channels == 4) { 1033 control |= sc->sc_pcm4; 1034 } else if (p->channels == 6) { 1035 control |= sc->sc_pcm6; 1036 } 1037 bus_space_write_4(sc->iot, sc->aud_ioh, 1038 ICH_GCTRL + sc->sc_modem_offset, control); 1039 } 1040 } 1041 1042 return 0; 1043 } 1044 1045 static int 1046 auich_round_blocksize(void *v, int blk, int mode, 1047 const audio_params_t *param) 1048 { 1049 1050 return blk & ~0x3f; /* keep good alignment */ 1051 } 1052 1053 static void 1054 auich_halt_pipe(struct auich_softc *sc, int pipe) 1055 { 1056 int i; 1057 uint32_t status; 1058 1059 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, 0); 1060 for (i = 0; i < 100; i++) { 1061 status = bus_space_read_4(sc->iot, sc->aud_ioh, pipe + ICH_STS); 1062 if (status & ICH_DCH) 1063 break; 1064 DELAY(1); 1065 } 1066 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, ICH_RR); 1067 1068 #if AUICH_DEBUG 1069 if (i > 0) 1070 printf("auich_halt_pipe: halt took %d cycles\n", i); 1071 #endif 1072 } 1073 1074 static int 1075 auich_halt_output(void *v) 1076 { 1077 struct auich_softc *sc; 1078 1079 sc = v; 1080 DPRINTF(ICH_DEBUG_DMA, ("%s: halt_output\n", device_xname(sc->sc_dev))); 1081 1082 auich_halt_pipe(sc, ICH_PCMO); 1083 sc->pcmo.intr = NULL; 1084 1085 return 0; 1086 } 1087 1088 static int 1089 auich_halt_input(void *v) 1090 { 1091 struct auich_softc *sc; 1092 1093 sc = v; 1094 DPRINTF(ICH_DEBUG_DMA, ("%s: halt_input\n", device_xname(sc->sc_dev))); 1095 1096 auich_halt_pipe(sc, ICH_PCMI); 1097 sc->pcmi.intr = NULL; 1098 1099 return 0; 1100 } 1101 1102 static int 1103 auich_getdev(void *v, struct audio_device *adp) 1104 { 1105 struct auich_softc *sc; 1106 1107 sc = v; 1108 *adp = sc->sc_audev; 1109 return 0; 1110 } 1111 1112 static int 1113 auich_set_port(void *v, mixer_ctrl_t *cp) 1114 { 1115 struct auich_softc *sc; 1116 1117 sc = v; 1118 return sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp); 1119 } 1120 1121 static int 1122 auich_get_port(void *v, mixer_ctrl_t *cp) 1123 { 1124 struct auich_softc *sc; 1125 1126 sc = v; 1127 return sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp); 1128 } 1129 1130 static int 1131 auich_query_devinfo(void *v, mixer_devinfo_t *dp) 1132 { 1133 struct auich_softc *sc; 1134 1135 sc = v; 1136 return sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp); 1137 } 1138 1139 static void * 1140 auich_allocm(void *v, int direction, size_t size) 1141 { 1142 struct auich_softc *sc; 1143 struct auich_dma *p; 1144 int error; 1145 1146 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX)) 1147 return NULL; 1148 1149 p = kmem_alloc(sizeof(*p), KM_SLEEP); 1150 if (p == NULL) 1151 return NULL; 1152 1153 sc = v; 1154 error = auich_allocmem(sc, size, 0, p); 1155 if (error) { 1156 kmem_free(p, sizeof(*p)); 1157 return NULL; 1158 } 1159 1160 p->next = sc->sc_dmas; 1161 sc->sc_dmas = p; 1162 1163 return KERNADDR(p); 1164 } 1165 1166 static void 1167 auich_freem(void *v, void *ptr, size_t size) 1168 { 1169 struct auich_softc *sc; 1170 struct auich_dma *p, **pp; 1171 1172 sc = v; 1173 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 1174 if (KERNADDR(p) == ptr) { 1175 auich_freemem(sc, p); 1176 *pp = p->next; 1177 kmem_free(p, sizeof(*p)); 1178 return; 1179 } 1180 } 1181 } 1182 1183 static size_t 1184 auich_round_buffersize(void *v, int direction, size_t size) 1185 { 1186 1187 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX)) 1188 size = ICH_DMALIST_MAX * ICH_DMASEG_MAX; 1189 1190 return size; 1191 } 1192 1193 static paddr_t 1194 auich_mappage(void *v, void *mem, off_t off, int prot) 1195 { 1196 struct auich_softc *sc; 1197 struct auich_dma *p; 1198 1199 if (off < 0) 1200 return -1; 1201 sc = v; 1202 for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next) 1203 continue; 1204 if (!p) 1205 return -1; 1206 return bus_dmamem_mmap(sc->dmat, p->segs, p->nsegs, 1207 off, prot, BUS_DMA_WAITOK); 1208 } 1209 1210 static int 1211 auich_get_props(void *v) 1212 { 1213 struct auich_softc *sc; 1214 int props; 1215 1216 props = AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 1217 sc = v; 1218 /* 1219 * Even if the codec is fixed-rate, set_param() succeeds for any sample 1220 * rate because of aurateconv. Applications can't know what rate the 1221 * device can process in the case of mmap(). 1222 */ 1223 if (!AC97_IS_FIXED_RATE(sc->codec_if) || 1224 sc->sc_codectype == AC97_CODEC_TYPE_MODEM) 1225 props |= AUDIO_PROP_MMAP; 1226 return props; 1227 } 1228 1229 static int 1230 auich_intr(void *v) 1231 { 1232 struct auich_softc *sc; 1233 int ret, gsts; 1234 #ifdef DIAGNOSTIC 1235 int csts; 1236 #endif 1237 1238 sc = v; 1239 1240 if (!device_has_power(sc->sc_dev)) 1241 return (0); 1242 1243 mutex_spin_enter(&sc->sc_intr_lock); 1244 1245 ret = 0; 1246 #ifdef DIAGNOSTIC 1247 csts = pci_conf_read(sc->sc_pc, sc->sc_pt, PCI_COMMAND_STATUS_REG); 1248 if (csts & PCI_STATUS_MASTER_ABORT) { 1249 printf("auich_intr: PCI master abort\n"); 1250 } 1251 #endif 1252 1253 gsts = bus_space_read_4(sc->iot, sc->aud_ioh, 1254 ICH_GSTS + sc->sc_modem_offset); 1255 DPRINTF(ICH_DEBUG_INTR, ("auich_intr: gsts=0x%x\n", gsts)); 1256 1257 if ((sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_POINT) || 1258 (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_MOINT)) { 1259 int sts; 1260 1261 sts = bus_space_read_2(sc->iot, sc->aud_ioh, 1262 ICH_PCMO + sc->sc_sts_reg); 1263 DPRINTF(ICH_DEBUG_INTR, 1264 ("auich_intr: osts=0x%x\n", sts)); 1265 1266 if (sts & ICH_FIFOE) 1267 printf("%s: fifo underrun\n", device_xname(sc->sc_dev)); 1268 1269 if (sts & ICH_BCIS) 1270 auich_intr_pipe(sc, ICH_PCMO, &sc->pcmo); 1271 1272 /* int ack */ 1273 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMO + 1274 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE)); 1275 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 1276 bus_space_write_4(sc->iot, sc->aud_ioh, 1277 ICH_GSTS + sc->sc_modem_offset, ICH_POINT); 1278 else 1279 bus_space_write_4(sc->iot, sc->aud_ioh, 1280 ICH_GSTS + sc->sc_modem_offset, ICH_MOINT); 1281 ret++; 1282 } 1283 1284 if ((sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_PIINT) || 1285 (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_MIINT)) { 1286 int sts; 1287 1288 sts = bus_space_read_2(sc->iot, sc->aud_ioh, 1289 ICH_PCMI + sc->sc_sts_reg); 1290 DPRINTF(ICH_DEBUG_INTR, 1291 ("auich_intr: ists=0x%x\n", sts)); 1292 1293 if (sts & ICH_FIFOE) 1294 printf("%s: fifo overrun\n", device_xname(sc->sc_dev)); 1295 1296 if (sts & ICH_BCIS) 1297 auich_intr_pipe(sc, ICH_PCMI, &sc->pcmi); 1298 1299 /* int ack */ 1300 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMI + 1301 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE)); 1302 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 1303 bus_space_write_4(sc->iot, sc->aud_ioh, 1304 ICH_GSTS + sc->sc_modem_offset, ICH_PIINT); 1305 else 1306 bus_space_write_4(sc->iot, sc->aud_ioh, 1307 ICH_GSTS + sc->sc_modem_offset, ICH_MIINT); 1308 ret++; 1309 } 1310 1311 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_MINT) { 1312 int sts; 1313 1314 sts = bus_space_read_2(sc->iot, sc->aud_ioh, 1315 ICH_MICI + sc->sc_sts_reg); 1316 DPRINTF(ICH_DEBUG_INTR, 1317 ("auich_intr: ists=0x%x\n", sts)); 1318 1319 if (sts & ICH_FIFOE) 1320 printf("%s: fifo overrun\n", device_xname(sc->sc_dev)); 1321 1322 if (sts & ICH_BCIS) 1323 auich_intr_pipe(sc, ICH_MICI, &sc->mici); 1324 1325 /* int ack */ 1326 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_MICI + 1327 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE)); 1328 bus_space_write_4(sc->iot, sc->aud_ioh, 1329 ICH_GSTS + sc->sc_modem_offset, ICH_MINT); 1330 ret++; 1331 } 1332 1333 #ifdef AUICH_MODEM_DEBUG 1334 if (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_GSCI) { 1335 printf("%s: gsts=0x%x\n", device_xname(sc->sc_dev), gsts); 1336 /* int ack */ 1337 bus_space_write_4(sc->iot, sc->aud_ioh, 1338 ICH_GSTS + sc->sc_modem_offset, ICH_GSCI); 1339 ret++; 1340 } 1341 #endif 1342 1343 mutex_spin_exit(&sc->sc_intr_lock); 1344 1345 return ret; 1346 } 1347 1348 static void 1349 auich_trigger_pipe(struct auich_softc *sc, int pipe, struct auich_ring *ring) 1350 { 1351 int blksize, qptr; 1352 struct auich_dmalist *q; 1353 1354 blksize = ring->blksize; 1355 1356 for (qptr = 0; qptr < ICH_DMALIST_MAX; qptr++) { 1357 q = &ring->dmalist[qptr]; 1358 q->base = ring->p; 1359 q->len = (blksize >> sc->sc_sample_shift) | ICH_DMAF_IOC; 1360 1361 ring->p += blksize; 1362 if (ring->p >= ring->end) 1363 ring->p = ring->start; 1364 } 1365 ring->qptr = 0; 1366 1367 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_LVI, 1368 (qptr - 1) & ICH_LVI_MASK); 1369 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, 1370 ICH_IOCE | ICH_FEIE | ICH_RPBM); 1371 } 1372 1373 static void 1374 auich_intr_pipe(struct auich_softc *sc, int pipe, struct auich_ring *ring) 1375 { 1376 int blksize, qptr, nqptr; 1377 struct auich_dmalist *q; 1378 1379 blksize = ring->blksize; 1380 qptr = ring->qptr; 1381 nqptr = bus_space_read_1(sc->iot, sc->aud_ioh, pipe + ICH_CIV); 1382 1383 while (qptr != nqptr) { 1384 q = &ring->dmalist[qptr]; 1385 q->base = ring->p; 1386 q->len = (blksize >> sc->sc_sample_shift) | ICH_DMAF_IOC; 1387 1388 DPRINTF(ICH_DEBUG_INTR, 1389 ("auich_intr: %p, %p = %x @ 0x%x\n", 1390 &ring->dmalist[qptr], q, q->len, q->base)); 1391 1392 ring->p += blksize; 1393 if (ring->p >= ring->end) 1394 ring->p = ring->start; 1395 1396 qptr = (qptr + 1) & ICH_LVI_MASK; 1397 if (ring->intr) 1398 ring->intr(ring->arg); 1399 } 1400 ring->qptr = qptr; 1401 1402 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_LVI, 1403 (qptr - 1) & ICH_LVI_MASK); 1404 } 1405 1406 static int 1407 auich_trigger_output(void *v, void *start, void *end, int blksize, 1408 void (*intr)(void *), void *arg, const audio_params_t *param) 1409 { 1410 struct auich_softc *sc; 1411 struct auich_dma *p; 1412 size_t size; 1413 1414 DPRINTF(ICH_DEBUG_DMA, 1415 ("auich_trigger_output(%p, %p, %d, %p, %p, %p)\n", 1416 start, end, blksize, intr, arg, param)); 1417 sc = v; 1418 1419 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1420 continue; 1421 if (!p) { 1422 printf("auich_trigger_output: bad addr %p\n", start); 1423 return EINVAL; 1424 } 1425 1426 size = (size_t)((char *)end - (char *)start); 1427 1428 sc->pcmo.intr = intr; 1429 sc->pcmo.arg = arg; 1430 sc->pcmo.start = DMAADDR(p); 1431 sc->pcmo.p = sc->pcmo.start; 1432 sc->pcmo.end = sc->pcmo.start + size; 1433 sc->pcmo.blksize = blksize; 1434 1435 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_BDBAR, 1436 sc->sc_cddma + ICH_PCMO_OFF(0)); 1437 auich_trigger_pipe(sc, ICH_PCMO, &sc->pcmo); 1438 1439 return 0; 1440 } 1441 1442 static int 1443 auich_trigger_input(void *v, void *start, void *end, int blksize, 1444 void (*intr)(void *), void *arg, const audio_params_t *param) 1445 { 1446 struct auich_softc *sc; 1447 struct auich_dma *p; 1448 size_t size; 1449 1450 DPRINTF(ICH_DEBUG_DMA, 1451 ("auich_trigger_input(%p, %p, %d, %p, %p, %p)\n", 1452 start, end, blksize, intr, arg, param)); 1453 sc = v; 1454 1455 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1456 continue; 1457 if (!p) { 1458 printf("auich_trigger_input: bad addr %p\n", start); 1459 return EINVAL; 1460 } 1461 1462 size = (size_t)((char *)end - (char *)start); 1463 1464 sc->pcmi.intr = intr; 1465 sc->pcmi.arg = arg; 1466 sc->pcmi.start = DMAADDR(p); 1467 sc->pcmi.p = sc->pcmi.start; 1468 sc->pcmi.end = sc->pcmi.start + size; 1469 sc->pcmi.blksize = blksize; 1470 1471 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_BDBAR, 1472 sc->sc_cddma + ICH_PCMI_OFF(0)); 1473 auich_trigger_pipe(sc, ICH_PCMI, &sc->pcmi); 1474 1475 return 0; 1476 } 1477 1478 static int 1479 auich_allocmem(struct auich_softc *sc, size_t size, size_t align, 1480 struct auich_dma *p) 1481 { 1482 int error; 1483 1484 p->size = size; 1485 error = bus_dmamem_alloc(sc->dmat, p->size, align, 0, 1486 p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 1487 &p->nsegs, BUS_DMA_WAITOK); 1488 if (error) 1489 return error; 1490 1491 error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size, 1492 &p->addr, BUS_DMA_WAITOK|sc->sc_dmamap_flags); 1493 if (error) 1494 goto free; 1495 1496 error = bus_dmamap_create(sc->dmat, p->size, 1, p->size, 1497 0, BUS_DMA_WAITOK, &p->map); 1498 if (error) 1499 goto unmap; 1500 1501 error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL, 1502 BUS_DMA_WAITOK); 1503 if (error) 1504 goto destroy; 1505 return 0; 1506 1507 destroy: 1508 bus_dmamap_destroy(sc->dmat, p->map); 1509 unmap: 1510 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1511 free: 1512 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1513 return error; 1514 } 1515 1516 static int 1517 auich_freemem(struct auich_softc *sc, struct auich_dma *p) 1518 { 1519 1520 bus_dmamap_unload(sc->dmat, p->map); 1521 bus_dmamap_destroy(sc->dmat, p->map); 1522 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1523 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1524 return 0; 1525 } 1526 1527 static int 1528 auich_alloc_cdata(struct auich_softc *sc) 1529 { 1530 bus_dma_segment_t seg; 1531 int error, rseg; 1532 1533 /* 1534 * Allocate the control data structure, and create and load the 1535 * DMA map for it. 1536 */ 1537 if ((error = bus_dmamem_alloc(sc->dmat, 1538 sizeof(struct auich_cdata), 1539 PAGE_SIZE, 0, &seg, 1, &rseg, 0)) != 0) { 1540 aprint_error_dev(sc->sc_dev, "unable to allocate control data, error = %d\n", error); 1541 goto fail_0; 1542 } 1543 1544 if ((error = bus_dmamem_map(sc->dmat, &seg, rseg, 1545 sizeof(struct auich_cdata), 1546 (void **) &sc->sc_cdata, 1547 sc->sc_dmamap_flags)) != 0) { 1548 aprint_error_dev(sc->sc_dev, "unable to map control data, error = %d\n", error); 1549 goto fail_1; 1550 } 1551 1552 if ((error = bus_dmamap_create(sc->dmat, sizeof(struct auich_cdata), 1, 1553 sizeof(struct auich_cdata), 0, 0, 1554 &sc->sc_cddmamap)) != 0) { 1555 aprint_error_dev(sc->sc_dev, "unable to create control data DMA map, " 1556 "error = %d\n", error); 1557 goto fail_2; 1558 } 1559 1560 if ((error = bus_dmamap_load(sc->dmat, sc->sc_cddmamap, 1561 sc->sc_cdata, sizeof(struct auich_cdata), 1562 NULL, 0)) != 0) { 1563 aprint_error_dev(sc->sc_dev, "unable tp load control data DMA map, " 1564 "error = %d\n", error); 1565 goto fail_3; 1566 } 1567 1568 sc->pcmo.dmalist = sc->sc_cdata->ic_dmalist_pcmo; 1569 sc->pcmi.dmalist = sc->sc_cdata->ic_dmalist_pcmi; 1570 sc->mici.dmalist = sc->sc_cdata->ic_dmalist_mici; 1571 1572 return 0; 1573 1574 fail_3: 1575 bus_dmamap_destroy(sc->dmat, sc->sc_cddmamap); 1576 fail_2: 1577 bus_dmamem_unmap(sc->dmat, (void *) sc->sc_cdata, 1578 sizeof(struct auich_cdata)); 1579 fail_1: 1580 bus_dmamem_free(sc->dmat, &seg, rseg); 1581 fail_0: 1582 return error; 1583 } 1584 1585 static bool 1586 auich_resume(device_t dv, const pmf_qual_t *qual) 1587 { 1588 struct auich_softc *sc = device_private(dv); 1589 pcireg_t v; 1590 1591 mutex_enter(&sc->sc_lock); 1592 mutex_spin_enter(&sc->sc_intr_lock); 1593 1594 if (sc->sc_iose) { 1595 v = pci_conf_read(sc->sc_pc, sc->sc_pt, ICH_CFG); 1596 pci_conf_write(sc->sc_pc, sc->sc_pt, ICH_CFG, 1597 v | ICH_CFG_IOSE); 1598 } 1599 1600 auich_reset_codec(sc); 1601 mutex_spin_exit(&sc->sc_intr_lock); 1602 DELAY(1000); 1603 (sc->codec_if->vtbl->restore_ports)(sc->codec_if); 1604 mutex_exit(&sc->sc_lock); 1605 1606 return true; 1607 } 1608 1609 /* 1610 * Calibrate card (some boards are overclocked and need scaling) 1611 */ 1612 static void 1613 auich_calibrate(struct auich_softc *sc) 1614 { 1615 struct timeval t1, t2; 1616 uint8_t ociv, nciv; 1617 uint64_t wait_us; 1618 uint32_t actual_48k_rate, bytes, ac97rate; 1619 void *temp_buffer; 1620 struct auich_dma *p; 1621 u_int rate; 1622 1623 /* 1624 * Grab audio from input for fixed interval and compare how 1625 * much we actually get with what we expect. Interval needs 1626 * to be sufficiently short that no interrupts are 1627 * generated. 1628 */ 1629 1630 /* Force the codec to a known state first. */ 1631 sc->codec_if->vtbl->set_clock(sc->codec_if, 48000); 1632 rate = sc->sc_ac97_clock = 48000; 1633 sc->codec_if->vtbl->set_rate(sc->codec_if, AC97_REG_PCM_LR_ADC_RATE, 1634 &rate); 1635 1636 /* Setup a buffer */ 1637 bytes = 64000; 1638 temp_buffer = auich_allocm(sc, AUMODE_RECORD, bytes); 1639 1640 for (p = sc->sc_dmas; p && KERNADDR(p) != temp_buffer; p = p->next) 1641 continue; 1642 if (p == NULL) { 1643 printf("auich_calibrate: bad address %p\n", temp_buffer); 1644 return; 1645 } 1646 sc->pcmi.dmalist[0].base = DMAADDR(p); 1647 sc->pcmi.dmalist[0].len = (bytes >> sc->sc_sample_shift); 1648 1649 /* 1650 * our data format is stereo, 16 bit so each sample is 4 bytes. 1651 * assuming we get 48000 samples per second, we get 192000 bytes/sec. 1652 * we're going to start recording with interrupts disabled and measure 1653 * the time taken for one block to complete. we know the block size, 1654 * we know the time in microseconds, we calculate the sample rate: 1655 * 1656 * actual_rate [bps] = bytes / (time [s] * 4) 1657 * actual_rate [bps] = (bytes * 1000000) / (time [us] * 4) 1658 * actual_rate [Hz] = (bytes * 250000) / time [us] 1659 */ 1660 1661 /* prepare */ 1662 ociv = bus_space_read_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CIV); 1663 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_BDBAR, 1664 sc->sc_cddma + ICH_PCMI_OFF(0)); 1665 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_LVI, 1666 (0 - 1) & ICH_LVI_MASK); 1667 1668 /* start */ 1669 kpreempt_disable(); 1670 microtime(&t1); 1671 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, ICH_RPBM); 1672 1673 /* wait */ 1674 nciv = ociv; 1675 do { 1676 microtime(&t2); 1677 if (t2.tv_sec - t1.tv_sec > 1) 1678 break; 1679 nciv = bus_space_read_1(sc->iot, sc->aud_ioh, 1680 ICH_PCMI + ICH_CIV); 1681 } while (nciv == ociv); 1682 microtime(&t2); 1683 1684 /* stop */ 1685 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, 0); 1686 kpreempt_enable(); 1687 1688 /* reset */ 1689 DELAY(100); 1690 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, ICH_RR); 1691 1692 /* turn time delta into us */ 1693 wait_us = ((t2.tv_sec - t1.tv_sec) * 1000000) + t2.tv_usec - t1.tv_usec; 1694 1695 auich_freem(sc, temp_buffer, bytes); 1696 1697 if (nciv == ociv) { 1698 printf("%s: ac97 link rate calibration timed out after %" 1699 PRIu64 " us\n", device_xname(sc->sc_dev), wait_us); 1700 return; 1701 } 1702 1703 actual_48k_rate = (bytes * UINT64_C(250000)) / wait_us; 1704 1705 if (actual_48k_rate < 50000) 1706 ac97rate = 48000; 1707 else 1708 ac97rate = ((actual_48k_rate + 500) / 1000) * 1000; 1709 1710 aprint_verbose_dev(sc->sc_dev, "measured ac97 link rate at %d Hz", 1711 actual_48k_rate); 1712 if (ac97rate != actual_48k_rate) 1713 aprint_verbose(", will use %d Hz", ac97rate); 1714 aprint_verbose("\n"); 1715 1716 sc->sc_ac97_clock = ac97rate; 1717 } 1718 1719 static void 1720 auich_clear_cas(struct auich_softc *sc) 1721 { 1722 /* Clear the codec access semaphore */ 1723 (void)bus_space_read_2(sc->iot, sc->mix_ioh, 1724 AC97_REG_RESET * (sc->sc_codecnum * ICH_CODEC_OFFSET)); 1725 1726 return; 1727 } 1728 1729 static void 1730 auich_get_locks(void *addr, kmutex_t **intr, kmutex_t **thread) 1731 { 1732 struct auich_softc *sc; 1733 1734 sc = addr; 1735 *intr = &sc->sc_intr_lock; 1736 *thread = &sc->sc_lock; 1737 } 1738
Indexes created Wed Oct 22 13:09:56 GMT 2025