auich.c revision 1.154
1 /* $NetBSD: auich.c,v 1.154 2019/04/18 13:01:38 isaki Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2004, 2005, 2008 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Copyright (c) 2000 Michael Shalayeff 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. The name of the author may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 51 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 52 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 53 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 55 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 56 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 57 * THE POSSIBILITY OF SUCH DAMAGE. 58 * 59 * from OpenBSD: ich.c,v 1.3 2000/08/11 06:17:18 mickey Exp 60 */ 61 62 /* 63 * Copyright (c) 2000 Katsurajima Naoto <raven (at) katsurajima.seya.yokohama.jp> 64 * Copyright (c) 2001 Cameron Grant <cg (at) freebsd.org> 65 * All rights reserved. 66 * 67 * Redistribution and use in source and binary forms, with or without 68 * modification, are permitted provided that the following conditions 69 * are met: 70 * 1. Redistributions of source code must retain the above copyright 71 * notice, this list of conditions and the following disclaimer. 72 * 2. Redistributions in binary form must reproduce the above copyright 73 * notice, this list of conditions and the following disclaimer in the 74 * documentation and/or other materials provided with the distribution. 75 * 76 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 77 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 78 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 79 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 80 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 81 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 82 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 83 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 84 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 85 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF 86 * SUCH DAMAGE. 87 * 88 * auich_calibrate() was from FreeBSD: ich.c,v 1.22 2002/06/27 22:36:01 scottl Exp 89 */ 90 91 92 /* #define AUICH_DEBUG */ 93 /* 94 * AC'97 audio found on Intel 810/820/440MX chipsets. 95 * http://developer.intel.com/design/chipsets/datashts/290655.htm 96 * http://developer.intel.com/design/chipsets/manuals/298028.htm 97 * ICH3:http://www.intel.com/design/chipsets/datashts/290716.htm 98 * ICH4:http://www.intel.com/design/chipsets/datashts/290744.htm 99 * ICH5:http://www.intel.com/design/chipsets/datashts/252516.htm 100 * AMD8111: 101 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/24674.pdf 102 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25720.pdf 103 * 104 * TODO: 105 * - Add support for the dedicated microphone input. 106 * 107 * NOTE: 108 * - The 440MX B-stepping at running 100MHz has a hardware erratum. 109 * It causes PCI master abort and hangups until cold reboot. 110 * http://www.intel.com/design/chipsets/specupdt/245051.htm 111 */ 112 113 #include <sys/cdefs.h> 114 __KERNEL_RCSID(0, "$NetBSD: auich.c,v 1.154 2019/04/18 13:01:38 isaki Exp $"); 115 116 #include <sys/param.h> 117 #include <sys/systm.h> 118 #include <sys/kernel.h> 119 #include <sys/kmem.h> 120 #include <sys/device.h> 121 #include <sys/fcntl.h> 122 #include <sys/proc.h> 123 #include <sys/sysctl.h> 124 #include <sys/audioio.h> 125 #include <sys/bus.h> 126 #include <sys/rndsource.h> 127 128 #include <dev/pci/pcidevs.h> 129 #include <dev/pci/pcivar.h> 130 #include <dev/pci/auichreg.h> 131 132 #include <dev/audio_if.h> 133 #include <dev/mulaw.h> 134 #include <dev/auconv.h> 135 136 #include <dev/ic/ac97reg.h> 137 #include <dev/ic/ac97var.h> 138 139 struct auich_dma { 140 bus_dmamap_t map; 141 void *addr; 142 bus_dma_segment_t segs[1]; 143 int nsegs; 144 size_t size; 145 struct auich_dma *next; 146 }; 147 148 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 149 #define KERNADDR(p) ((void *)((p)->addr)) 150 151 struct auich_cdata { 152 struct auich_dmalist ic_dmalist_pcmo[ICH_DMALIST_MAX]; 153 struct auich_dmalist ic_dmalist_pcmi[ICH_DMALIST_MAX]; 154 struct auich_dmalist ic_dmalist_mici[ICH_DMALIST_MAX]; 155 }; 156 157 #define ICH_CDOFF(x) offsetof(struct auich_cdata, x) 158 #define ICH_PCMO_OFF(x) ICH_CDOFF(ic_dmalist_pcmo[(x)]) 159 #define ICH_PCMI_OFF(x) ICH_CDOFF(ic_dmalist_pcmi[(x)]) 160 #define ICH_MICI_OFF(x) ICH_CDOFF(ic_dmalist_mici[(x)]) 161 162 struct auich_softc { 163 device_t sc_dev; 164 void *sc_ih; 165 kmutex_t sc_lock; 166 kmutex_t sc_intr_lock; 167 168 device_t sc_audiodev; 169 audio_device_t sc_audev; 170 171 pci_chipset_tag_t sc_pc; 172 pcitag_t sc_pt; 173 bus_space_tag_t iot; 174 bus_space_handle_t mix_ioh; 175 bus_size_t mix_size; 176 bus_space_handle_t aud_ioh; 177 bus_size_t aud_size; 178 bus_dma_tag_t dmat; 179 pci_intr_handle_t intrh; 180 181 struct ac97_codec_if *codec_if; 182 struct ac97_host_if host_if; 183 int sc_codecnum; 184 int sc_codectype; 185 int sc_fixedrate; 186 enum ac97_host_flags sc_codecflags; 187 bool sc_spdif; 188 189 /* multi-channel control bits */ 190 int sc_pcm246_mask; 191 int sc_pcm2; 192 int sc_pcm4; 193 int sc_pcm6; 194 195 /* DMA scatter-gather lists. */ 196 bus_dmamap_t sc_cddmamap; 197 #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr 198 199 struct auich_cdata *sc_cdata; 200 201 struct auich_ring { 202 int qptr; 203 struct auich_dmalist *dmalist; 204 205 uint32_t start, p, end; 206 int blksize; 207 208 void (*intr)(void *); 209 void *arg; 210 } pcmo, pcmi, mici; 211 212 struct auich_dma *sc_dmas; 213 214 /* SiS 7012 hack */ 215 int sc_sample_shift; 216 int sc_sts_reg; 217 /* 440MX workaround */ 218 int sc_dmamap_flags; 219 /* flags */ 220 int sc_iose :1, 221 :31; 222 223 /* sysctl */ 224 struct sysctllog *sc_log; 225 uint32_t sc_ac97_clock; 226 int sc_ac97_clock_mib; 227 228 int sc_modem_offset; 229 230 #define AUICH_AUDIO_NFORMATS 3 231 #define AUICH_MODEM_NFORMATS 1 232 struct audio_format sc_audio_formats[AUICH_AUDIO_NFORMATS]; 233 struct audio_format sc_modem_formats[AUICH_MODEM_NFORMATS]; 234 struct audio_encoding_set *sc_encodings; 235 struct audio_encoding_set *sc_spdif_encodings; 236 237 int sc_cas_been_used; 238 }; 239 240 /* Debug */ 241 #ifdef AUICH_DEBUG 242 #define DPRINTF(l,x) do { if (auich_debug & (l)) aprint_normal_dev x; } while(0) 243 int auich_debug = 0xfffe; 244 #define ICH_DEBUG_CODECIO 0x0001 245 #define ICH_DEBUG_DMA 0x0002 246 #define ICH_DEBUG_INTR 0x0004 247 #else 248 #define DPRINTF(x,y) /* nothing */ 249 #endif 250 251 static int auich_match(device_t, cfdata_t, void *); 252 static void auich_attach(device_t, device_t, void *); 253 static int auich_detach(device_t, int); 254 static void auich_childdet(device_t, device_t); 255 static int auich_intr(void *); 256 257 CFATTACH_DECL2_NEW(auich, sizeof(struct auich_softc), 258 auich_match, auich_attach, auich_detach, NULL, NULL, auich_childdet); 259 260 static int auich_open(void *, int); 261 static void auich_close(void *); 262 static int auich_query_encoding(void *, struct audio_encoding *); 263 static int auich_set_params(void *, int, int, audio_params_t *, 264 audio_params_t *, stream_filter_list_t *, 265 stream_filter_list_t *); 266 static int auich_round_blocksize(void *, int, int, const audio_params_t *); 267 static void auich_halt_pipe(struct auich_softc *, int); 268 static int auich_halt_output(void *); 269 static int auich_halt_input(void *); 270 static int auich_getdev(void *, struct audio_device *); 271 static int auich_set_port(void *, mixer_ctrl_t *); 272 static int auich_get_port(void *, mixer_ctrl_t *); 273 static int auich_query_devinfo(void *, mixer_devinfo_t *); 274 static void *auich_allocm(void *, int, size_t); 275 static void auich_freem(void *, void *, size_t); 276 static size_t auich_round_buffersize(void *, int, size_t); 277 static paddr_t auich_mappage(void *, void *, off_t, int); 278 static int auich_get_props(void *); 279 static void auich_trigger_pipe(struct auich_softc *, int, struct auich_ring *); 280 static void auich_intr_pipe(struct auich_softc *, int, struct auich_ring *); 281 static int auich_trigger_output(void *, void *, void *, int, 282 void (*)(void *), void *, const audio_params_t *); 283 static int auich_trigger_input(void *, void *, void *, int, 284 void (*)(void *), void *, const audio_params_t *); 285 static void auich_get_locks(void *, kmutex_t **, kmutex_t **); 286 287 static int auich_alloc_cdata(struct auich_softc *); 288 289 static int auich_allocmem(struct auich_softc *, size_t, size_t, 290 struct auich_dma *); 291 static int auich_freemem(struct auich_softc *, struct auich_dma *); 292 293 static bool auich_resume(device_t, const pmf_qual_t *); 294 static int auich_set_rate(struct auich_softc *, int, u_long); 295 static int auich_sysctl_verify(SYSCTLFN_ARGS); 296 static void auich_finish_attach(device_t); 297 static void auich_calibrate(struct auich_softc *); 298 static void auich_clear_cas(struct auich_softc *); 299 300 static int auich_attach_codec(void *, struct ac97_codec_if *); 301 static int auich_read_codec(void *, uint8_t, uint16_t *); 302 static int auich_write_codec(void *, uint8_t, uint16_t); 303 static int auich_reset_codec(void *); 304 static enum ac97_host_flags auich_flags_codec(void *); 305 static void auich_spdif_event(void *, bool); 306 307 static const struct audio_hw_if auich_hw_if = { 308 .open = auich_open, 309 .close = auich_close, 310 .query_encoding = auich_query_encoding, 311 .set_params = auich_set_params, 312 .round_blocksize = auich_round_blocksize, 313 .halt_output = auich_halt_output, 314 .halt_input = auich_halt_input, 315 .getdev = auich_getdev, 316 .set_port = auich_set_port, 317 .get_port = auich_get_port, 318 .query_devinfo = auich_query_devinfo, 319 .allocm = auich_allocm, 320 .freem = auich_freem, 321 .round_buffersize = auich_round_buffersize, 322 .mappage = auich_mappage, 323 .get_props = auich_get_props, 324 .trigger_output = auich_trigger_output, 325 .trigger_input = auich_trigger_input, 326 .get_locks = auich_get_locks, 327 }; 328 329 #define AUICH_FORMATS_1CH 0 330 #define AUICH_FORMATS_4CH 1 331 #define AUICH_FORMATS_6CH 2 332 static const struct audio_format auich_audio_formats[AUICH_AUDIO_NFORMATS] = { 333 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 334 2, AUFMT_STEREO, 0, {8000, 48000}}, 335 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 336 4, AUFMT_SURROUND4, 0, {8000, 48000}}, 337 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 338 6, AUFMT_DOLBY_5_1, 0, {8000, 48000}}, 339 }; 340 341 #define AUICH_SPDIF_NFORMATS 1 342 static const struct audio_format auich_spdif_formats[AUICH_SPDIF_NFORMATS] = { 343 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 344 2, AUFMT_STEREO, 1, {48000}}, 345 }; 346 347 static const struct audio_format auich_modem_formats[AUICH_MODEM_NFORMATS] = { 348 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 349 1, AUFMT_MONAURAL, 0, {8000, 16000}}, 350 }; 351 352 #define PCI_ID_CODE0(v, p) PCI_ID_CODE(PCI_VENDOR_##v, PCI_PRODUCT_##v##_##p) 353 #define PCIID_ICH PCI_ID_CODE0(INTEL, 82801AA_ACA) 354 #define PCIID_ICH0 PCI_ID_CODE0(INTEL, 82801AB_ACA) 355 #define PCIID_ICH2 PCI_ID_CODE0(INTEL, 82801BA_ACA) 356 #define PCIID_440MX PCI_ID_CODE0(INTEL, 82440MX_ACA) 357 #define PCIID_ICH3 PCI_ID_CODE0(INTEL, 82801CA_AC) 358 #define PCIID_ICH4 PCI_ID_CODE0(INTEL, 82801DB_AC) 359 #define PCIID_ICH5 PCI_ID_CODE0(INTEL, 82801EB_AC) 360 #define PCIID_ICH6 PCI_ID_CODE0(INTEL, 82801FB_AC) 361 #define PCIID_ICH7 PCI_ID_CODE0(INTEL, 82801G_ACA) 362 #define PCIID_I6300ESB PCI_ID_CODE0(INTEL, 6300ESB_ACA) 363 #define PCIID_SIS7012 PCI_ID_CODE0(SIS, 7012_AC) 364 #define PCIID_NFORCE PCI_ID_CODE0(NVIDIA, NFORCE_MCP_AC) 365 #define PCIID_NFORCE2 PCI_ID_CODE0(NVIDIA, NFORCE2_MCPT_AC) 366 #define PCIID_NFORCE2_400 PCI_ID_CODE0(NVIDIA, NFORCE2_400_MCPT_AC) 367 #define PCIID_NFORCE3 PCI_ID_CODE0(NVIDIA, NFORCE3_MCPT_AC) 368 #define PCIID_NFORCE3_250 PCI_ID_CODE0(NVIDIA, NFORCE3_250_MCPT_AC) 369 #define PCIID_NFORCE4 PCI_ID_CODE0(NVIDIA, NFORCE4_AC) 370 #define PCIID_NFORCE430 PCI_ID_CODE0(NVIDIA, NFORCE430_AC) 371 #define PCIID_AMD768 PCI_ID_CODE0(AMD, PBC768_AC) 372 #define PCIID_AMD8111 PCI_ID_CODE0(AMD, PBC8111_AC) 373 374 #define PCIID_ICH3MODEM PCI_ID_CODE0(INTEL, 82801CA_MOD) 375 #define PCIID_ICH4MODEM PCI_ID_CODE0(INTEL, 82801DB_MOD) 376 #define PCIID_ICH6MODEM PCI_ID_CODE0(INTEL, 82801FB_ACM) 377 378 struct auich_devtype { 379 pcireg_t id; 380 const char *name; 381 const char *shortname; /* must be less than 11 characters */ 382 }; 383 384 static const struct auich_devtype auich_audio_devices[] = { 385 { PCIID_ICH, "i82801AA (ICH) AC-97 Audio", "ICH" }, 386 { PCIID_ICH0, "i82801AB (ICH0) AC-97 Audio", "ICH0" }, 387 { PCIID_ICH2, "i82801BA (ICH2) AC-97 Audio", "ICH2" }, 388 { PCIID_440MX, "i82440MX AC-97 Audio", "440MX" }, 389 { PCIID_ICH3, "i82801CA (ICH3) AC-97 Audio", "ICH3" }, 390 { PCIID_ICH4, "i82801DB/DBM (ICH4/ICH4M) AC-97 Audio", "ICH4" }, 391 { PCIID_ICH5, "i82801EB (ICH5) AC-97 Audio", "ICH5" }, 392 { PCIID_ICH6, "i82801FB (ICH6) AC-97 Audio", "ICH6" }, 393 { PCIID_ICH7, "i82801GB/GR (ICH7) AC-97 Audio", "ICH7" }, 394 { PCIID_I6300ESB, "Intel 6300ESB AC-97 Audio", "I6300ESB" }, 395 { PCIID_SIS7012, "SiS 7012 AC-97 Audio", "SiS7012" }, 396 { PCIID_NFORCE, "nForce MCP AC-97 Audio", "nForce" }, 397 { PCIID_NFORCE2, "nForce2 MCP-T AC-97 Audio", "nForce2" }, 398 { PCIID_NFORCE2_400, "nForce2 400 MCP-T AC-97 Audio", "nForce2" }, 399 { PCIID_NFORCE3, "nForce3 MCP-T AC-97 Audio", "nForce3" }, 400 { PCIID_NFORCE3_250, "nForce3 250 MCP-T AC-97 Audio", "nForce3" }, 401 { PCIID_NFORCE4, "nForce4 AC-97 Audio", "nForce4" }, 402 { PCIID_NFORCE430, "nForce430 (MCP51) AC-97 Audio", "nForce430" }, 403 { PCIID_AMD768, "AMD768 AC-97 Audio", "AMD768" }, 404 { PCIID_AMD8111,"AMD8111 AC-97 Audio", "AMD8111" }, 405 { 0, NULL, NULL }, 406 }; 407 408 static const struct auich_devtype auich_modem_devices[] = { 409 #ifdef AUICH_ATTACH_MODEM 410 { PCIID_ICH3MODEM, "i82801CA (ICH3) AC-97 Modem", "ICH3MODEM" }, 411 { PCIID_ICH4MODEM, "i82801DB (ICH4) AC-97 Modem", "ICH4MODEM" }, 412 { PCIID_ICH6MODEM, "i82801FB (ICH6) AC-97 Modem", "ICH6MODEM" }, 413 #endif 414 { 0, NULL, NULL }, 415 }; 416 417 static const struct auich_devtype * 418 auich_lookup(struct pci_attach_args *pa, const struct auich_devtype *auich_devices) 419 { 420 const struct auich_devtype *d; 421 422 for (d = auich_devices; d->name != NULL; d++) { 423 if (pa->pa_id == d->id) 424 return d; 425 } 426 427 return NULL; 428 } 429 430 static int 431 auich_match(device_t parent, cfdata_t match, void *aux) 432 { 433 struct pci_attach_args *pa; 434 435 pa = aux; 436 if (auich_lookup(pa, auich_audio_devices) != NULL) 437 return 1; 438 if (auich_lookup(pa, auich_modem_devices) != NULL) 439 return 1; 440 441 return 0; 442 } 443 444 static void 445 auich_attach(device_t parent, device_t self, void *aux) 446 { 447 struct auich_softc *sc = device_private(self); 448 struct pci_attach_args *pa; 449 pcireg_t v, subdev; 450 const char *intrstr; 451 const struct auich_devtype *d; 452 const struct sysctlnode *node, *node_ac97clock; 453 int err, node_mib, i; 454 char intrbuf[PCI_INTRSTR_LEN]; 455 456 sc->sc_dev = self; 457 pa = aux; 458 459 if ((d = auich_lookup(pa, auich_modem_devices)) != NULL) { 460 sc->sc_modem_offset = 0x10; 461 sc->sc_codectype = AC97_CODEC_TYPE_MODEM; 462 } else if ((d = auich_lookup(pa, auich_audio_devices)) != NULL) { 463 sc->sc_modem_offset = 0; 464 sc->sc_codectype = AC97_CODEC_TYPE_AUDIO; 465 } else 466 panic("auich_attach: impossible"); 467 468 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 469 aprint_naive(": Audio controller\n"); 470 else 471 aprint_naive(": Modem controller\n"); 472 473 sc->sc_pc = pa->pa_pc; 474 sc->sc_pt = pa->pa_tag; 475 476 aprint_normal(": %s\n", d->name); 477 478 if (d->id == PCIID_ICH4 || d->id == PCIID_ICH5 || d->id == PCIID_ICH6 479 || d->id == PCIID_ICH7 || d->id == PCIID_I6300ESB 480 || d->id == PCIID_ICH4MODEM) { 481 /* 482 * Use native mode for Intel 6300ESB and ICH4/ICH5/ICH6/ICH7 483 */ 484 485 if (pci_mapreg_map(pa, ICH_MMBAR, PCI_MAPREG_TYPE_MEM, 0, 486 &sc->iot, &sc->mix_ioh, NULL, &sc->mix_size)) { 487 goto retry_map; 488 } 489 if (pci_mapreg_map(pa, ICH_MBBAR, PCI_MAPREG_TYPE_MEM, 0, 490 &sc->iot, &sc->aud_ioh, NULL, &sc->aud_size)) { 491 goto retry_map; 492 } 493 goto map_done; 494 } else 495 goto non_native_map; 496 497 retry_map: 498 sc->sc_iose = 1; 499 v = pci_conf_read(pa->pa_pc, pa->pa_tag, ICH_CFG); 500 pci_conf_write(pa->pa_pc, pa->pa_tag, ICH_CFG, 501 v | ICH_CFG_IOSE); 502 503 non_native_map: 504 if (pci_mapreg_map(pa, ICH_NAMBAR, PCI_MAPREG_TYPE_IO, 0, 505 &sc->iot, &sc->mix_ioh, NULL, &sc->mix_size)) { 506 aprint_error_dev(self, "can't map codec i/o space\n"); 507 return; 508 } 509 if (pci_mapreg_map(pa, ICH_NABMBAR, PCI_MAPREG_TYPE_IO, 0, 510 &sc->iot, &sc->aud_ioh, NULL, &sc->aud_size)) { 511 aprint_error_dev(self, "can't map device i/o space\n"); 512 return; 513 } 514 515 map_done: 516 sc->dmat = pa->pa_dmat; 517 518 /* enable bus mastering */ 519 v = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 520 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 521 v | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_BACKTOBACK_ENABLE); 522 523 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 524 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO); 525 526 /* Map and establish the interrupt. */ 527 if (pci_intr_map(pa, &sc->intrh)) { 528 aprint_error_dev(self, "can't map interrupt\n"); 529 return; 530 } 531 intrstr = pci_intr_string(pa->pa_pc, sc->intrh, intrbuf, sizeof(intrbuf)); 532 sc->sc_ih = pci_intr_establish_xname(pa->pa_pc, sc->intrh, IPL_AUDIO, 533 auich_intr, sc, device_xname(sc->sc_dev)); 534 if (sc->sc_ih == NULL) { 535 aprint_error_dev(self, "can't establish interrupt"); 536 if (intrstr != NULL) 537 aprint_error(" at %s", intrstr); 538 aprint_error("\n"); 539 return; 540 } 541 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 542 543 snprintf(sc->sc_audev.name, MAX_AUDIO_DEV_LEN, "%s AC97", d->shortname); 544 snprintf(sc->sc_audev.version, MAX_AUDIO_DEV_LEN, 545 "0x%02x", PCI_REVISION(pa->pa_class)); 546 strlcpy(sc->sc_audev.config, device_xname(self), MAX_AUDIO_DEV_LEN); 547 548 /* SiS 7012 needs special handling */ 549 if (d->id == PCIID_SIS7012) { 550 sc->sc_sts_reg = ICH_PICB; 551 sc->sc_sample_shift = 0; 552 sc->sc_pcm246_mask = ICH_SIS_PCM246_MASK; 553 sc->sc_pcm2 = ICH_SIS_PCM2; 554 sc->sc_pcm4 = ICH_SIS_PCM4; 555 sc->sc_pcm6 = ICH_SIS_PCM6; 556 /* Un-mute output. From Linux. */ 557 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_SIS_NV_CTL, 558 bus_space_read_4(sc->iot, sc->aud_ioh, ICH_SIS_NV_CTL) | 559 ICH_SIS_CTL_UNMUTE); 560 } else { 561 sc->sc_sts_reg = ICH_STS; 562 sc->sc_sample_shift = 1; 563 sc->sc_pcm246_mask = ICH_PCM246_MASK; 564 sc->sc_pcm2 = ICH_PCM2; 565 sc->sc_pcm4 = ICH_PCM4; 566 sc->sc_pcm6 = ICH_PCM6; 567 } 568 569 /* Workaround for a 440MX B-stepping erratum */ 570 sc->sc_dmamap_flags = BUS_DMA_COHERENT; 571 if (d->id == PCIID_440MX) { 572 sc->sc_dmamap_flags |= BUS_DMA_NOCACHE; 573 aprint_normal_dev(self, "DMA bug workaround enabled\n"); 574 } 575 576 /* Set up DMA lists. */ 577 sc->pcmo.qptr = sc->pcmi.qptr = sc->mici.qptr = 0; 578 auich_alloc_cdata(sc); 579 580 DPRINTF(ICH_DEBUG_DMA, (sc->sc_dev, "%s: lists %p %p %p\n", 581 __func__, sc->pcmo.dmalist, sc->pcmi.dmalist, sc->mici.dmalist)); 582 583 /* Modem codecs are always the secondary codec on ICH */ 584 sc->sc_codecnum = sc->sc_codectype == AC97_CODEC_TYPE_MODEM ? 1 : 0; 585 586 sc->host_if.arg = sc; 587 sc->host_if.attach = auich_attach_codec; 588 sc->host_if.read = auich_read_codec; 589 sc->host_if.write = auich_write_codec; 590 sc->host_if.reset = auich_reset_codec; 591 sc->host_if.flags = auich_flags_codec; 592 sc->host_if.spdif_event = auich_spdif_event; 593 594 subdev = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 595 switch (subdev) { 596 case 0x202f161f: /* Gateway 7326GZ */ 597 case 0x203a161f: /* Gateway 4028GZ */ 598 case 0x204c161f: /* Kvazar-Micro Senator 3592XT */ 599 case 0x8144104d: /* Sony VAIO PCG-TR* */ 600 case 0x8197104d: /* Sony S1XP */ 601 case 0x81c0104d: /* Sony VAIO type T */ 602 case 0x81c5104d: /* Sony VAIO VGN-B1XP */ 603 sc->sc_codecflags = AC97_HOST_INVERTED_EAMP; 604 break; 605 default: 606 sc->sc_codecflags = 0; 607 break; 608 } 609 610 if (ac97_attach_type(&sc->host_if, self, sc->sc_codectype, 611 &sc->sc_lock) != 0) 612 return; 613 614 mutex_enter(&sc->sc_lock); 615 sc->codec_if->vtbl->unlock(sc->codec_if); 616 sc->sc_fixedrate = AC97_IS_FIXED_RATE(sc->codec_if); 617 618 /* setup audio_format */ 619 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 620 memcpy(sc->sc_audio_formats, auich_audio_formats, 621 sizeof(auich_audio_formats)); 622 if (!AC97_IS_4CH(sc->codec_if)) 623 AUFMT_INVALIDATE(&sc->sc_audio_formats[AUICH_FORMATS_4CH]); 624 if (!AC97_IS_6CH(sc->codec_if)) 625 AUFMT_INVALIDATE(&sc->sc_audio_formats[AUICH_FORMATS_6CH]); 626 if (AC97_IS_FIXED_RATE(sc->codec_if)) { 627 for (i = 0; i < AUICH_AUDIO_NFORMATS; i++) { 628 sc->sc_audio_formats[i].frequency_type = 1; 629 sc->sc_audio_formats[i].frequency[0] = 48000; 630 } 631 } 632 mutex_exit(&sc->sc_lock); 633 if (0 != auconv_create_encodings(sc->sc_audio_formats, 634 AUICH_AUDIO_NFORMATS, &sc->sc_encodings)) 635 return; 636 if (0 != auconv_create_encodings(auich_spdif_formats, 637 AUICH_SPDIF_NFORMATS, &sc->sc_spdif_encodings)) 638 return; 639 } else { 640 mutex_exit(&sc->sc_lock); 641 memcpy(sc->sc_modem_formats, auich_modem_formats, 642 sizeof(auich_modem_formats)); 643 if (0 != auconv_create_encodings(sc->sc_modem_formats, 644 AUICH_MODEM_NFORMATS, &sc->sc_encodings)) 645 return; 646 } 647 648 /* Watch for power change */ 649 if (!pmf_device_register(self, NULL, auich_resume)) 650 aprint_error_dev(self, "couldn't establish power handler\n"); 651 652 config_interrupts(self, auich_finish_attach); 653 654 /* sysctl setup */ 655 if (sc->sc_fixedrate && sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 656 return; 657 658 err = sysctl_createv(&sc->sc_log, 0, NULL, &node, 0, 659 CTLTYPE_NODE, device_xname(self), NULL, NULL, 0, 660 NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 661 if (err != 0) 662 goto sysctl_err; 663 node_mib = node->sysctl_num; 664 665 if (!sc->sc_fixedrate) { 666 /* passing the sc address instead of &sc->sc_ac97_clock */ 667 err = sysctl_createv(&sc->sc_log, 0, NULL, &node_ac97clock, 668 CTLFLAG_READWRITE, 669 CTLTYPE_INT, "ac97rate", 670 SYSCTL_DESCR("AC'97 codec link rate"), 671 auich_sysctl_verify, 0, (void *)sc, 0, 672 CTL_HW, node_mib, CTL_CREATE, CTL_EOL); 673 if (err != 0) 674 goto sysctl_err; 675 sc->sc_ac97_clock_mib = node_ac97clock->sysctl_num; 676 } 677 678 return; 679 680 sysctl_err: 681 aprint_error_dev(self, "failed to add sysctl nodes. (%d)\n", err); 682 return; /* failure of sysctl is not fatal. */ 683 } 684 685 static void 686 auich_childdet(device_t self, device_t child) 687 { 688 struct auich_softc *sc = device_private(self); 689 690 KASSERT(sc->sc_audiodev == child); 691 sc->sc_audiodev = NULL; 692 } 693 694 static int 695 auich_detach(device_t self, int flags) 696 { 697 struct auich_softc *sc = device_private(self); 698 699 /* audio */ 700 if (sc->sc_audiodev != NULL) 701 config_detach(sc->sc_audiodev, flags); 702 703 /* sysctl */ 704 sysctl_teardown(&sc->sc_log); 705 706 mutex_enter(&sc->sc_lock); 707 708 /* audio_encoding_set */ 709 auconv_delete_encodings(sc->sc_encodings); 710 auconv_delete_encodings(sc->sc_spdif_encodings); 711 712 /* ac97 */ 713 if (sc->codec_if != NULL) 714 sc->codec_if->vtbl->detach(sc->codec_if); 715 716 mutex_exit(&sc->sc_lock); 717 mutex_destroy(&sc->sc_lock); 718 mutex_destroy(&sc->sc_intr_lock); 719 720 /* PCI */ 721 if (sc->sc_ih != NULL) 722 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 723 if (sc->mix_size != 0) 724 bus_space_unmap(sc->iot, sc->mix_ioh, sc->mix_size); 725 if (sc->aud_size != 0) 726 bus_space_unmap(sc->iot, sc->aud_ioh, sc->aud_size); 727 return 0; 728 } 729 730 static int 731 auich_sysctl_verify(SYSCTLFN_ARGS) 732 { 733 int error, tmp; 734 struct sysctlnode node; 735 struct auich_softc *sc; 736 737 node = *rnode; 738 sc = rnode->sysctl_data; 739 if (node.sysctl_num == sc->sc_ac97_clock_mib) { 740 tmp = sc->sc_ac97_clock; 741 node.sysctl_data = &tmp; 742 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 743 if (error || newp == NULL) 744 return error; 745 746 if (tmp < 48000 || tmp > 96000) 747 return EINVAL; 748 mutex_enter(&sc->sc_lock); 749 sc->sc_ac97_clock = tmp; 750 mutex_exit(&sc->sc_lock); 751 } 752 753 return 0; 754 } 755 756 static void 757 auich_finish_attach(device_t self) 758 { 759 struct auich_softc *sc = device_private(self); 760 761 mutex_enter(&sc->sc_lock); 762 if (!AC97_IS_FIXED_RATE(sc->codec_if)) 763 auich_calibrate(sc); 764 mutex_exit(&sc->sc_lock); 765 766 sc->sc_audiodev = audio_attach_mi(&auich_hw_if, sc, sc->sc_dev); 767 768 return; 769 } 770 771 #define ICH_CODECIO_INTERVAL 10 772 static int 773 auich_read_codec(void *v, uint8_t reg, uint16_t *val) 774 { 775 struct auich_softc *sc; 776 int i; 777 uint32_t status; 778 779 sc = v; 780 /* wait for an access semaphore */ 781 for (i = ICH_SEMATIMO / ICH_CODECIO_INTERVAL; i-- && 782 bus_space_read_1(sc->iot, sc->aud_ioh, 783 ICH_CAS + sc->sc_modem_offset) & 1; 784 DELAY(ICH_CODECIO_INTERVAL)); 785 786 /* 787 * Be permissive in first attempt. If previous instances of 788 * this routine were interrupted precisely at this point (after 789 * access is granted by CAS but before a command is sent), 790 * they could have left hardware in an inconsistent state where 791 * a command is expected and therefore semaphore wait would hit 792 * the timeout. 793 */ 794 if (!sc->sc_cas_been_used && i <= 0) 795 i = 1; 796 sc->sc_cas_been_used = 1; 797 798 if (i > 0) { 799 *val = bus_space_read_2(sc->iot, sc->mix_ioh, 800 reg + (sc->sc_codecnum * ICH_CODEC_OFFSET)); 801 DPRINTF(ICH_DEBUG_CODECIO, 802 (sc->sc_dev, "%s(%x, %x)\n", __func__, reg, *val)); 803 status = bus_space_read_4(sc->iot, sc->aud_ioh, 804 ICH_GSTS + sc->sc_modem_offset); 805 if (status & ICH_RCS) { 806 bus_space_write_4(sc->iot, sc->aud_ioh, 807 ICH_GSTS + sc->sc_modem_offset, 808 status & ~(ICH_SRI|ICH_PRI|ICH_GSCI)); 809 *val = 0xffff; 810 DPRINTF(ICH_DEBUG_CODECIO, 811 (sc->sc_dev, "%s: read_codec error\n", __func__)); 812 if (reg == AC97_REG_GPIO_STATUS) 813 auich_clear_cas(sc); 814 return -1; 815 } 816 if (reg == AC97_REG_GPIO_STATUS) 817 auich_clear_cas(sc); 818 return 0; 819 } else { 820 aprint_normal_dev(sc->sc_dev, "read_codec timeout\n"); 821 if (reg == AC97_REG_GPIO_STATUS) 822 auich_clear_cas(sc); 823 return -1; 824 } 825 } 826 827 static int 828 auich_write_codec(void *v, uint8_t reg, uint16_t val) 829 { 830 struct auich_softc *sc; 831 int i; 832 833 sc = v; 834 DPRINTF(ICH_DEBUG_CODECIO, (sc->sc_dev, "%s(%x, %x)\n", 835 __func__, reg, val)); 836 /* wait for an access semaphore */ 837 for (i = ICH_SEMATIMO / ICH_CODECIO_INTERVAL; i-- && 838 bus_space_read_1(sc->iot, sc->aud_ioh, 839 ICH_CAS + sc->sc_modem_offset) & 1; 840 DELAY(ICH_CODECIO_INTERVAL)); 841 842 /* Be permissive in first attempt (see comments in auich_read_codec) */ 843 if (!sc->sc_cas_been_used && i <= 0) 844 i = 1; 845 sc->sc_cas_been_used = 1; 846 847 if (i > 0) { 848 bus_space_write_2(sc->iot, sc->mix_ioh, 849 reg + (sc->sc_codecnum * ICH_CODEC_OFFSET), val); 850 return 0; 851 } else { 852 aprint_normal_dev(sc->sc_dev, "write_codec timeout\n"); 853 return -1; 854 } 855 } 856 857 static int 858 auich_attach_codec(void *v, struct ac97_codec_if *cif) 859 { 860 struct auich_softc *sc; 861 862 sc = v; 863 sc->codec_if = cif; 864 865 return 0; 866 } 867 868 static int 869 auich_reset_codec(void *v) 870 { 871 struct auich_softc *sc; 872 int i; 873 uint32_t control, status; 874 875 sc = v; 876 control = bus_space_read_4(sc->iot, sc->aud_ioh, 877 ICH_GCTRL + sc->sc_modem_offset); 878 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 879 control &= ~(ICH_ACLSO | sc->sc_pcm246_mask); 880 } else { 881 control &= ~ICH_ACLSO; 882 control |= ICH_GIE; 883 } 884 control |= (control & ICH_CRESET) ? ICH_WRESET : ICH_CRESET; 885 bus_space_write_4(sc->iot, sc->aud_ioh, 886 ICH_GCTRL + sc->sc_modem_offset, control); 887 888 for (i = 500000; i >= 0; i--) { 889 status = bus_space_read_4(sc->iot, sc->aud_ioh, 890 ICH_GSTS + sc->sc_modem_offset); 891 if (status & (ICH_PCR | ICH_SCR | ICH_S2CR)) 892 break; 893 DELAY(1); 894 } 895 if (i <= 0) { 896 aprint_error_dev(sc->sc_dev, "auich_reset_codec: time out\n"); 897 return ETIMEDOUT; 898 } 899 #ifdef AUICH_DEBUG 900 if (status & ICH_SCR) 901 aprint_normal_dev(sc->sc_dev, "The 2nd codec is ready.\n"); 902 if (status & ICH_S2CR) 903 aprint_normal_dev(sc->sc_dev, "The 3rd codec is ready.\n"); 904 #endif 905 return 0; 906 } 907 908 static enum ac97_host_flags 909 auich_flags_codec(void *v) 910 { 911 struct auich_softc *sc = v; 912 return sc->sc_codecflags; 913 } 914 915 static void 916 auich_spdif_event(void *addr, bool flag) 917 { 918 struct auich_softc *sc; 919 920 sc = addr; 921 sc->sc_spdif = flag; 922 } 923 924 static int 925 auich_open(void *addr, int flags) 926 { 927 struct auich_softc *sc; 928 929 sc = (struct auich_softc *)addr; 930 mutex_spin_exit(&sc->sc_intr_lock); 931 sc->codec_if->vtbl->lock(sc->codec_if); 932 mutex_spin_enter(&sc->sc_intr_lock); 933 return 0; 934 } 935 936 static void 937 auich_close(void *addr) 938 { 939 struct auich_softc *sc; 940 941 sc = (struct auich_softc *)addr; 942 mutex_spin_exit(&sc->sc_intr_lock); 943 sc->codec_if->vtbl->unlock(sc->codec_if); 944 mutex_spin_enter(&sc->sc_intr_lock); 945 } 946 947 static int 948 auich_query_encoding(void *v, struct audio_encoding *aep) 949 { 950 struct auich_softc *sc; 951 952 sc = (struct auich_softc *)v; 953 return auconv_query_encoding( 954 sc->sc_spdif ? sc->sc_spdif_encodings : sc->sc_encodings, aep); 955 } 956 957 static int 958 auich_set_rate(struct auich_softc *sc, int mode, u_long srate) 959 { 960 int ret; 961 u_int ratetmp; 962 963 sc->codec_if->vtbl->set_clock(sc->codec_if, sc->sc_ac97_clock); 964 ratetmp = srate; 965 if (mode == AUMODE_RECORD) 966 return sc->codec_if->vtbl->set_rate(sc->codec_if, 967 AC97_REG_PCM_LR_ADC_RATE, &ratetmp); 968 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 969 AC97_REG_PCM_FRONT_DAC_RATE, &ratetmp); 970 if (ret) 971 return ret; 972 ratetmp = srate; 973 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 974 AC97_REG_PCM_SURR_DAC_RATE, &ratetmp); 975 if (ret) 976 return ret; 977 ratetmp = srate; 978 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 979 AC97_REG_PCM_LFE_DAC_RATE, &ratetmp); 980 return ret; 981 } 982 983 static int 984 auich_set_params(void *v, int setmode, int usemode, 985 audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil, 986 stream_filter_list_t *rfil) 987 { 988 struct auich_softc *sc; 989 audio_params_t *p; 990 stream_filter_list_t *fil; 991 int mode, index; 992 uint32_t control; 993 994 sc = v; 995 for (mode = AUMODE_RECORD; mode != -1; 996 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 997 if ((setmode & mode) == 0) 998 continue; 999 1000 p = mode == AUMODE_PLAY ? play : rec; 1001 fil = mode == AUMODE_PLAY ? pfil : rfil; 1002 if (p == NULL) 1003 continue; 1004 1005 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 1006 if (p->sample_rate < 8000 || 1007 p->sample_rate > 48000) 1008 return EINVAL; 1009 1010 if (!sc->sc_spdif) 1011 index = auconv_set_converter(sc->sc_audio_formats, 1012 AUICH_AUDIO_NFORMATS, mode, p, TRUE, fil); 1013 else 1014 index = auconv_set_converter(auich_spdif_formats, 1015 AUICH_SPDIF_NFORMATS, mode, p, TRUE, fil); 1016 } else { 1017 if (p->sample_rate != 8000 && p->sample_rate != 16000) 1018 return EINVAL; 1019 index = auconv_set_converter(sc->sc_modem_formats, 1020 AUICH_MODEM_NFORMATS, mode, p, TRUE, fil); 1021 } 1022 if (index < 0) 1023 return EINVAL; 1024 if (fil->req_size > 0) 1025 p = &fil->filters[0].param; 1026 /* p represents HW encoding */ 1027 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 1028 if (sc->sc_audio_formats[index].frequency_type != 1 1029 && auich_set_rate(sc, mode, p->sample_rate)) 1030 return EINVAL; 1031 } else { 1032 if (sc->sc_modem_formats[index].frequency_type != 1 1033 && auich_set_rate(sc, mode, p->sample_rate)) 1034 return EINVAL; 1035 auich_write_codec(sc, AC97_REG_LINE1_RATE, 1036 p->sample_rate); 1037 auich_write_codec(sc, AC97_REG_LINE1_LEVEL, 0); 1038 } 1039 if (mode == AUMODE_PLAY && 1040 sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 1041 control = bus_space_read_4(sc->iot, sc->aud_ioh, 1042 ICH_GCTRL + sc->sc_modem_offset); 1043 control &= ~sc->sc_pcm246_mask; 1044 if (p->channels == 4) { 1045 control |= sc->sc_pcm4; 1046 } else if (p->channels == 6) { 1047 control |= sc->sc_pcm6; 1048 } 1049 bus_space_write_4(sc->iot, sc->aud_ioh, 1050 ICH_GCTRL + sc->sc_modem_offset, control); 1051 } 1052 } 1053 1054 return 0; 1055 } 1056 1057 static int 1058 auich_round_blocksize(void *v, int blk, int mode, 1059 const audio_params_t *param) 1060 { 1061 1062 if (blk < 0x40) 1063 return 0x40; /* avoid 0 block size */ 1064 1065 return blk & ~0x3f; /* keep good alignment */ 1066 } 1067 1068 static void 1069 auich_halt_pipe(struct auich_softc *sc, int pipe) 1070 { 1071 int i; 1072 uint32_t status; 1073 1074 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, 0); 1075 for (i = 0; i < 100; i++) { 1076 status = bus_space_read_4(sc->iot, sc->aud_ioh, pipe + ICH_STS); 1077 if (status & ICH_DCH) 1078 break; 1079 DELAY(1); 1080 } 1081 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, ICH_RR); 1082 1083 #if AUICH_DEBUG 1084 if (i > 0) 1085 aprint_normal_dev(sc->sc_dev, "%s: halt took %d cycles\n", 1086 __func__, i); 1087 #endif 1088 } 1089 1090 static int 1091 auich_halt_output(void *v) 1092 { 1093 struct auich_softc *sc; 1094 1095 sc = v; 1096 DPRINTF(ICH_DEBUG_DMA, (sc->sc_dev, "%s\n", __func__)); 1097 1098 auich_halt_pipe(sc, ICH_PCMO); 1099 sc->pcmo.intr = NULL; 1100 1101 return 0; 1102 } 1103 1104 static int 1105 auich_halt_input(void *v) 1106 { 1107 struct auich_softc *sc; 1108 1109 sc = v; 1110 DPRINTF(ICH_DEBUG_DMA, (sc->sc_dev, "%s\n", __func__)); 1111 1112 auich_halt_pipe(sc, ICH_PCMI); 1113 sc->pcmi.intr = NULL; 1114 1115 return 0; 1116 } 1117 1118 static int 1119 auich_getdev(void *v, struct audio_device *adp) 1120 { 1121 struct auich_softc *sc; 1122 1123 sc = v; 1124 *adp = sc->sc_audev; 1125 return 0; 1126 } 1127 1128 static int 1129 auich_set_port(void *v, mixer_ctrl_t *cp) 1130 { 1131 struct auich_softc *sc; 1132 1133 sc = v; 1134 return sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp); 1135 } 1136 1137 static int 1138 auich_get_port(void *v, mixer_ctrl_t *cp) 1139 { 1140 struct auich_softc *sc; 1141 1142 sc = v; 1143 return sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp); 1144 } 1145 1146 static int 1147 auich_query_devinfo(void *v, mixer_devinfo_t *dp) 1148 { 1149 struct auich_softc *sc; 1150 1151 sc = v; 1152 return sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp); 1153 } 1154 1155 static void * 1156 auich_allocm(void *v, int direction, size_t size) 1157 { 1158 struct auich_softc *sc; 1159 struct auich_dma *p; 1160 int error; 1161 1162 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX)) 1163 return NULL; 1164 1165 p = kmem_alloc(sizeof(*p), KM_SLEEP); 1166 1167 sc = v; 1168 error = auich_allocmem(sc, size, 0, p); 1169 if (error) { 1170 kmem_free(p, sizeof(*p)); 1171 return NULL; 1172 } 1173 1174 p->next = sc->sc_dmas; 1175 sc->sc_dmas = p; 1176 1177 return KERNADDR(p); 1178 } 1179 1180 static void 1181 auich_freem(void *v, void *ptr, size_t size) 1182 { 1183 struct auich_softc *sc; 1184 struct auich_dma *p, **pp; 1185 1186 sc = v; 1187 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 1188 if (KERNADDR(p) == ptr) { 1189 auich_freemem(sc, p); 1190 *pp = p->next; 1191 kmem_free(p, sizeof(*p)); 1192 return; 1193 } 1194 } 1195 } 1196 1197 static size_t 1198 auich_round_buffersize(void *v, int direction, size_t size) 1199 { 1200 1201 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX)) 1202 size = ICH_DMALIST_MAX * ICH_DMASEG_MAX; 1203 1204 return size; 1205 } 1206 1207 static paddr_t 1208 auich_mappage(void *v, void *mem, off_t off, int prot) 1209 { 1210 struct auich_softc *sc; 1211 struct auich_dma *p; 1212 1213 if (off < 0) 1214 return -1; 1215 sc = v; 1216 for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next) 1217 continue; 1218 if (!p) 1219 return -1; 1220 return bus_dmamem_mmap(sc->dmat, p->segs, p->nsegs, 1221 off, prot, BUS_DMA_WAITOK); 1222 } 1223 1224 static int 1225 auich_get_props(void *v) 1226 { 1227 struct auich_softc *sc; 1228 int props; 1229 1230 props = AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 1231 sc = v; 1232 /* 1233 * Even if the codec is fixed-rate, set_param() succeeds for any sample 1234 * rate because of aurateconv. Applications can't know what rate the 1235 * device can process in the case of mmap(). 1236 */ 1237 if (!AC97_IS_FIXED_RATE(sc->codec_if) || 1238 sc->sc_codectype == AC97_CODEC_TYPE_MODEM) 1239 props |= AUDIO_PROP_MMAP; 1240 return props; 1241 } 1242 1243 static int 1244 auich_intr(void *v) 1245 { 1246 struct auich_softc *sc; 1247 int ret, gsts; 1248 #ifdef DIAGNOSTIC 1249 int csts; 1250 #endif 1251 1252 sc = v; 1253 1254 if (!device_has_power(sc->sc_dev)) 1255 return (0); 1256 1257 mutex_spin_enter(&sc->sc_intr_lock); 1258 1259 ret = 0; 1260 #ifdef DIAGNOSTIC 1261 csts = pci_conf_read(sc->sc_pc, sc->sc_pt, PCI_COMMAND_STATUS_REG); 1262 if (csts & PCI_STATUS_MASTER_ABORT) { 1263 aprint_error_dev(sc->sc_dev, "%s: PCI master abort\n", 1264 __func__); 1265 } 1266 #endif 1267 1268 gsts = bus_space_read_4(sc->iot, sc->aud_ioh, 1269 ICH_GSTS + sc->sc_modem_offset); 1270 DPRINTF(ICH_DEBUG_INTR, (sc->sc_dev, "%s: gsts=0x%x\n", 1271 __func__, gsts)); 1272 1273 if ((sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_POINT) || 1274 (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_MOINT)) { 1275 int sts; 1276 1277 sts = bus_space_read_2(sc->iot, sc->aud_ioh, 1278 ICH_PCMO + sc->sc_sts_reg); 1279 DPRINTF(ICH_DEBUG_INTR, 1280 (sc->sc_dev, "%s: osts=0x%x\n", __func__, sts)); 1281 1282 if (sts & ICH_FIFOE) 1283 aprint_error_dev(sc->sc_dev, "%s: fifo underrun\n", 1284 __func__); 1285 1286 if (sts & ICH_BCIS) 1287 auich_intr_pipe(sc, ICH_PCMO, &sc->pcmo); 1288 1289 /* int ack */ 1290 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMO + 1291 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE)); 1292 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 1293 bus_space_write_4(sc->iot, sc->aud_ioh, 1294 ICH_GSTS + sc->sc_modem_offset, ICH_POINT); 1295 else 1296 bus_space_write_4(sc->iot, sc->aud_ioh, 1297 ICH_GSTS + sc->sc_modem_offset, ICH_MOINT); 1298 ret++; 1299 } 1300 1301 if ((sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_PIINT) || 1302 (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_MIINT)) { 1303 int sts; 1304 1305 sts = bus_space_read_2(sc->iot, sc->aud_ioh, 1306 ICH_PCMI + sc->sc_sts_reg); 1307 DPRINTF(ICH_DEBUG_INTR, 1308 (sc->sc_dev, "%s: ists=0x%x\n", __func__, sts)); 1309 1310 if (sts & ICH_FIFOE) 1311 aprint_error_dev(sc->sc_dev, "%s: fifo overrun\n", 1312 __func__); 1313 1314 if (sts & ICH_BCIS) 1315 auich_intr_pipe(sc, ICH_PCMI, &sc->pcmi); 1316 1317 /* int ack */ 1318 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMI + 1319 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE)); 1320 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 1321 bus_space_write_4(sc->iot, sc->aud_ioh, 1322 ICH_GSTS + sc->sc_modem_offset, ICH_PIINT); 1323 else 1324 bus_space_write_4(sc->iot, sc->aud_ioh, 1325 ICH_GSTS + sc->sc_modem_offset, ICH_MIINT); 1326 ret++; 1327 } 1328 1329 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_MINT) { 1330 int sts; 1331 1332 sts = bus_space_read_2(sc->iot, sc->aud_ioh, 1333 ICH_MICI + sc->sc_sts_reg); 1334 DPRINTF(ICH_DEBUG_INTR, 1335 (sc->sc_dev, "%s: ists=0x%x\n", __func__, sts)); 1336 1337 if (sts & ICH_FIFOE) 1338 aprint_error_dev(sc->sc_dev, "%s: fifo overrun\n", 1339 __func__); 1340 1341 if (sts & ICH_BCIS) 1342 auich_intr_pipe(sc, ICH_MICI, &sc->mici); 1343 1344 /* int ack */ 1345 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_MICI + 1346 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE)); 1347 bus_space_write_4(sc->iot, sc->aud_ioh, 1348 ICH_GSTS + sc->sc_modem_offset, ICH_MINT); 1349 ret++; 1350 } 1351 1352 #ifdef AUICH_MODEM_DEBUG 1353 if (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_GSCI) { 1354 aprint_normal_dev(sc->sc_dev, "gsts=0x%x\n", gsts); 1355 /* int ack */ 1356 bus_space_write_4(sc->iot, sc->aud_ioh, 1357 ICH_GSTS + sc->sc_modem_offset, ICH_GSCI); 1358 ret++; 1359 } 1360 #endif 1361 1362 mutex_spin_exit(&sc->sc_intr_lock); 1363 1364 return ret; 1365 } 1366 1367 static void 1368 auich_trigger_pipe(struct auich_softc *sc, int pipe, struct auich_ring *ring) 1369 { 1370 int blksize, qptr; 1371 struct auich_dmalist *q; 1372 1373 blksize = ring->blksize; 1374 1375 for (qptr = 0; qptr < ICH_DMALIST_MAX; qptr++) { 1376 q = &ring->dmalist[qptr]; 1377 q->base = ring->p; 1378 q->len = (blksize >> sc->sc_sample_shift) | ICH_DMAF_IOC; 1379 1380 ring->p += blksize; 1381 if (ring->p >= ring->end) 1382 ring->p = ring->start; 1383 } 1384 ring->qptr = 0; 1385 1386 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_LVI, 1387 (qptr - 1) & ICH_LVI_MASK); 1388 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, 1389 ICH_IOCE | ICH_FEIE | ICH_RPBM); 1390 } 1391 1392 static void 1393 auich_intr_pipe(struct auich_softc *sc, int pipe, struct auich_ring *ring) 1394 { 1395 int blksize, qptr, nqptr; 1396 struct auich_dmalist *q; 1397 1398 blksize = ring->blksize; 1399 qptr = ring->qptr; 1400 nqptr = bus_space_read_1(sc->iot, sc->aud_ioh, pipe + ICH_CIV); 1401 1402 while (qptr != nqptr) { 1403 q = &ring->dmalist[qptr]; 1404 q->base = ring->p; 1405 q->len = (blksize >> sc->sc_sample_shift) | ICH_DMAF_IOC; 1406 1407 DPRINTF(ICH_DEBUG_INTR, 1408 (sc->sc_dev, "%s: %p, %p = %x @ 0x%x\n", __func__, 1409 &ring->dmalist[qptr], q, q->len, q->base)); 1410 1411 ring->p += blksize; 1412 if (ring->p >= ring->end) 1413 ring->p = ring->start; 1414 1415 qptr = (qptr + 1) & ICH_LVI_MASK; 1416 if (ring->intr) 1417 ring->intr(ring->arg); 1418 } 1419 ring->qptr = qptr; 1420 1421 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_LVI, 1422 (qptr - 1) & ICH_LVI_MASK); 1423 } 1424 1425 static int 1426 auich_trigger_output(void *v, void *start, void *end, int blksize, 1427 void (*intr)(void *), void *arg, const audio_params_t *param) 1428 { 1429 struct auich_softc *sc; 1430 struct auich_dma *p; 1431 size_t size; 1432 1433 sc = v; 1434 DPRINTF(ICH_DEBUG_DMA, 1435 (sc->sc_dev, "%s(%p, %p, %d, %p, %p, %p)\n", __func__, 1436 start, end, blksize, intr, arg, param)); 1437 1438 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1439 continue; 1440 if (!p) { 1441 aprint_error_dev(sc->sc_dev, "%s: bad addr %p\n", __func__, 1442 start); 1443 return EINVAL; 1444 } 1445 1446 size = (size_t)((char *)end - (char *)start); 1447 1448 sc->pcmo.intr = intr; 1449 sc->pcmo.arg = arg; 1450 sc->pcmo.start = DMAADDR(p); 1451 sc->pcmo.p = sc->pcmo.start; 1452 sc->pcmo.end = sc->pcmo.start + size; 1453 sc->pcmo.blksize = blksize; 1454 1455 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_BDBAR, 1456 sc->sc_cddma + ICH_PCMO_OFF(0)); 1457 auich_trigger_pipe(sc, ICH_PCMO, &sc->pcmo); 1458 1459 return 0; 1460 } 1461 1462 static int 1463 auich_trigger_input(void *v, void *start, void *end, int blksize, 1464 void (*intr)(void *), void *arg, const audio_params_t *param) 1465 { 1466 struct auich_softc *sc; 1467 struct auich_dma *p; 1468 size_t size; 1469 1470 sc = v; 1471 DPRINTF(ICH_DEBUG_DMA, 1472 (sc->sc_dev, "%s(%p, %p, %d, %p, %p, %p)\n", __func__, 1473 start, end, blksize, intr, arg, param)); 1474 1475 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1476 continue; 1477 if (!p) { 1478 aprint_error_dev(sc->sc_dev, "%s: bad addr %p\n", __func__, 1479 start); 1480 return EINVAL; 1481 } 1482 1483 size = (size_t)((char *)end - (char *)start); 1484 1485 sc->pcmi.intr = intr; 1486 sc->pcmi.arg = arg; 1487 sc->pcmi.start = DMAADDR(p); 1488 sc->pcmi.p = sc->pcmi.start; 1489 sc->pcmi.end = sc->pcmi.start + size; 1490 sc->pcmi.blksize = blksize; 1491 1492 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_BDBAR, 1493 sc->sc_cddma + ICH_PCMI_OFF(0)); 1494 auich_trigger_pipe(sc, ICH_PCMI, &sc->pcmi); 1495 1496 return 0; 1497 } 1498 1499 static int 1500 auich_allocmem(struct auich_softc *sc, size_t size, size_t align, 1501 struct auich_dma *p) 1502 { 1503 int error; 1504 1505 p->size = size; 1506 error = bus_dmamem_alloc(sc->dmat, p->size, align, 0, 1507 p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 1508 &p->nsegs, BUS_DMA_WAITOK); 1509 if (error) 1510 return error; 1511 1512 error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size, 1513 &p->addr, BUS_DMA_WAITOK|sc->sc_dmamap_flags); 1514 if (error) 1515 goto free; 1516 1517 error = bus_dmamap_create(sc->dmat, p->size, 1, p->size, 1518 0, BUS_DMA_WAITOK, &p->map); 1519 if (error) 1520 goto unmap; 1521 1522 error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL, 1523 BUS_DMA_WAITOK); 1524 if (error) 1525 goto destroy; 1526 return 0; 1527 1528 destroy: 1529 bus_dmamap_destroy(sc->dmat, p->map); 1530 unmap: 1531 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1532 free: 1533 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1534 return error; 1535 } 1536 1537 static int 1538 auich_freemem(struct auich_softc *sc, struct auich_dma *p) 1539 { 1540 1541 bus_dmamap_unload(sc->dmat, p->map); 1542 bus_dmamap_destroy(sc->dmat, p->map); 1543 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1544 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1545 return 0; 1546 } 1547 1548 static int 1549 auich_alloc_cdata(struct auich_softc *sc) 1550 { 1551 bus_dma_segment_t seg; 1552 int error, rseg; 1553 1554 /* 1555 * Allocate the control data structure, and create and load the 1556 * DMA map for it. 1557 */ 1558 if ((error = bus_dmamem_alloc(sc->dmat, 1559 sizeof(struct auich_cdata), 1560 PAGE_SIZE, 0, &seg, 1, &rseg, 0)) != 0) { 1561 aprint_error_dev(sc->sc_dev, "unable to allocate control data, error = %d\n", error); 1562 goto fail_0; 1563 } 1564 1565 if ((error = bus_dmamem_map(sc->dmat, &seg, rseg, 1566 sizeof(struct auich_cdata), 1567 (void **) &sc->sc_cdata, 1568 sc->sc_dmamap_flags)) != 0) { 1569 aprint_error_dev(sc->sc_dev, "unable to map control data, error = %d\n", error); 1570 goto fail_1; 1571 } 1572 1573 if ((error = bus_dmamap_create(sc->dmat, sizeof(struct auich_cdata), 1, 1574 sizeof(struct auich_cdata), 0, 0, 1575 &sc->sc_cddmamap)) != 0) { 1576 aprint_error_dev(sc->sc_dev, "unable to create control data DMA map, " 1577 "error = %d\n", error); 1578 goto fail_2; 1579 } 1580 1581 if ((error = bus_dmamap_load(sc->dmat, sc->sc_cddmamap, 1582 sc->sc_cdata, sizeof(struct auich_cdata), 1583 NULL, 0)) != 0) { 1584 aprint_error_dev(sc->sc_dev, "unable tp load control data DMA map, " 1585 "error = %d\n", error); 1586 goto fail_3; 1587 } 1588 1589 sc->pcmo.dmalist = sc->sc_cdata->ic_dmalist_pcmo; 1590 sc->pcmi.dmalist = sc->sc_cdata->ic_dmalist_pcmi; 1591 sc->mici.dmalist = sc->sc_cdata->ic_dmalist_mici; 1592 1593 return 0; 1594 1595 fail_3: 1596 bus_dmamap_destroy(sc->dmat, sc->sc_cddmamap); 1597 fail_2: 1598 bus_dmamem_unmap(sc->dmat, (void *) sc->sc_cdata, 1599 sizeof(struct auich_cdata)); 1600 fail_1: 1601 bus_dmamem_free(sc->dmat, &seg, rseg); 1602 fail_0: 1603 return error; 1604 } 1605 1606 static bool 1607 auich_resume(device_t dv, const pmf_qual_t *qual) 1608 { 1609 struct auich_softc *sc = device_private(dv); 1610 pcireg_t v; 1611 1612 mutex_enter(&sc->sc_lock); 1613 mutex_spin_enter(&sc->sc_intr_lock); 1614 1615 if (sc->sc_iose) { 1616 v = pci_conf_read(sc->sc_pc, sc->sc_pt, ICH_CFG); 1617 pci_conf_write(sc->sc_pc, sc->sc_pt, ICH_CFG, 1618 v | ICH_CFG_IOSE); 1619 } 1620 1621 auich_reset_codec(sc); 1622 mutex_spin_exit(&sc->sc_intr_lock); 1623 DELAY(1000); 1624 (sc->codec_if->vtbl->restore_ports)(sc->codec_if); 1625 mutex_exit(&sc->sc_lock); 1626 1627 return true; 1628 } 1629 1630 /* 1631 * Calibrate card (some boards are overclocked and need scaling) 1632 */ 1633 static void 1634 auich_calibrate(struct auich_softc *sc) 1635 { 1636 struct timeval t1, t2; 1637 uint8_t ociv, nciv; 1638 uint64_t wait_us; 1639 uint32_t actual_48k_rate, bytes, ac97rate; 1640 void *temp_buffer; 1641 struct auich_dma *p; 1642 u_int rate; 1643 1644 /* 1645 * Grab audio from input for fixed interval and compare how 1646 * much we actually get with what we expect. Interval needs 1647 * to be sufficiently short that no interrupts are 1648 * generated. 1649 */ 1650 1651 /* Force the codec to a known state first. */ 1652 sc->codec_if->vtbl->set_clock(sc->codec_if, 48000); 1653 rate = sc->sc_ac97_clock = 48000; 1654 sc->codec_if->vtbl->set_rate(sc->codec_if, AC97_REG_PCM_LR_ADC_RATE, 1655 &rate); 1656 1657 /* Setup a buffer */ 1658 bytes = 64000; 1659 temp_buffer = auich_allocm(sc, AUMODE_RECORD, bytes); 1660 1661 for (p = sc->sc_dmas; p && KERNADDR(p) != temp_buffer; p = p->next) 1662 continue; 1663 if (p == NULL) { 1664 aprint_error_dev(sc->sc_dev, "%s: bad address %p\n", 1665 __func__, temp_buffer); 1666 return; 1667 } 1668 sc->pcmi.dmalist[0].base = DMAADDR(p); 1669 sc->pcmi.dmalist[0].len = (bytes >> sc->sc_sample_shift); 1670 1671 /* 1672 * our data format is stereo, 16 bit so each sample is 4 bytes. 1673 * assuming we get 48000 samples per second, we get 192000 bytes/sec. 1674 * we're going to start recording with interrupts disabled and measure 1675 * the time taken for one block to complete. we know the block size, 1676 * we know the time in microseconds, we calculate the sample rate: 1677 * 1678 * actual_rate [bps] = bytes / (time [s] * 4) 1679 * actual_rate [bps] = (bytes * 1000000) / (time [us] * 4) 1680 * actual_rate [Hz] = (bytes * 250000) / time [us] 1681 */ 1682 1683 /* prepare */ 1684 ociv = bus_space_read_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CIV); 1685 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_BDBAR, 1686 sc->sc_cddma + ICH_PCMI_OFF(0)); 1687 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_LVI, 1688 (0 - 1) & ICH_LVI_MASK); 1689 1690 /* start */ 1691 kpreempt_disable(); 1692 microtime(&t1); 1693 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, ICH_RPBM); 1694 1695 /* wait */ 1696 nciv = ociv; 1697 do { 1698 microtime(&t2); 1699 if (t2.tv_sec - t1.tv_sec > 1) 1700 break; 1701 nciv = bus_space_read_1(sc->iot, sc->aud_ioh, 1702 ICH_PCMI + ICH_CIV); 1703 } while (nciv == ociv); 1704 microtime(&t2); 1705 1706 /* stop */ 1707 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, 0); 1708 kpreempt_enable(); 1709 1710 /* reset */ 1711 DELAY(100); 1712 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, ICH_RR); 1713 1714 /* turn time delta into us */ 1715 wait_us = ((t2.tv_sec - t1.tv_sec) * 1000000) + t2.tv_usec - t1.tv_usec; 1716 1717 auich_freem(sc, temp_buffer, bytes); 1718 1719 if (nciv == ociv) { 1720 aprint_error_dev(sc->sc_dev, "ac97 link rate calibration " 1721 "timed out after %" PRIu64 " us\n", wait_us); 1722 return; 1723 } 1724 1725 if (wait_us == 0) { 1726 /* Can happen with emulated hardware */ 1727 aprint_error_dev(sc->sc_dev, "abnormal zero delay during " 1728 "calibration\n"); 1729 return; 1730 } 1731 1732 rnd_add_data(NULL, &wait_us, sizeof(wait_us), 1); 1733 1734 actual_48k_rate = (bytes * UINT64_C(250000)) / wait_us; 1735 1736 if (actual_48k_rate < 50000) 1737 ac97rate = 48000; 1738 else 1739 ac97rate = ((actual_48k_rate + 500) / 1000) * 1000; 1740 1741 aprint_verbose_dev(sc->sc_dev, "measured ac97 link rate at %d Hz", 1742 actual_48k_rate); 1743 if (ac97rate != actual_48k_rate) 1744 aprint_verbose(", will use %d Hz", ac97rate); 1745 aprint_verbose("\n"); 1746 1747 sc->sc_ac97_clock = ac97rate; 1748 } 1749 1750 static void 1751 auich_clear_cas(struct auich_softc *sc) 1752 { 1753 /* Clear the codec access semaphore */ 1754 (void)bus_space_read_2(sc->iot, sc->mix_ioh, 1755 AC97_REG_RESET * (sc->sc_codecnum * ICH_CODEC_OFFSET)); 1756 1757 return; 1758 } 1759 1760 static void 1761 auich_get_locks(void *addr, kmutex_t **intr, kmutex_t **thread) 1762 { 1763 struct auich_softc *sc; 1764 1765 sc = addr; 1766 *intr = &sc->sc_intr_lock; 1767 *thread = &sc->sc_lock; 1768 } 1769
Indexes created Wed Oct 22 13:09:56 GMT 2025