auich.c revision 1.3.2.2
1 /* $NetBSD: auich.c,v 1.3.2.2 2001/11/14 19:15:07 nathanw Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 2000 Michael Shalayeff 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. The name of the author may not be used to endorse or promote products 52 * derived from this software without specific prior written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 55 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 56 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 57 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 58 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 59 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 60 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 61 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 62 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 63 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 64 * THE POSSIBILITY OF SUCH DAMAGE. 65 * 66 * from OpenBSD: ich.c,v 1.3 2000/08/11 06:17:18 mickey Exp 67 */ 68 69 /* #define ICH_DEBUG */ 70 /* 71 * AC'97 audio found on Intel 810/820/440MX chipsets. 72 * http://developer.intel.com/design/chipsets/datashts/290655.htm 73 * http://developer.intel.com/design/chipsets/manuals/298028.htm 74 * 75 * TODO: 76 * 77 * - Probe codecs for supported sample rates. 78 * 79 * - Add support for the microphone input. 80 */ 81 82 #include <sys/cdefs.h> 83 __KERNEL_RCSID(0, "$NetBSD: auich.c,v 1.3.2.2 2001/11/14 19:15:07 nathanw Exp $"); 84 85 #include <sys/param.h> 86 #include <sys/systm.h> 87 #include <sys/kernel.h> 88 #include <sys/malloc.h> 89 #include <sys/device.h> 90 #include <sys/fcntl.h> 91 #include <sys/proc.h> 92 93 #include <uvm/uvm_extern.h> /* for PAGE_SIZE */ 94 95 #include <dev/pci/pcidevs.h> 96 #include <dev/pci/pcivar.h> 97 #include <dev/pci/auichreg.h> 98 99 #include <sys/audioio.h> 100 #include <dev/audio_if.h> 101 #include <dev/mulaw.h> 102 #include <dev/auconv.h> 103 104 #include <machine/bus.h> 105 106 #include <dev/ic/ac97reg.h> 107 #include <dev/ic/ac97var.h> 108 109 struct auich_dma { 110 bus_dmamap_t map; 111 caddr_t addr; 112 bus_dma_segment_t segs[1]; 113 int nsegs; 114 size_t size; 115 struct auich_dma *next; 116 }; 117 118 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 119 #define KERNADDR(p) ((void *)((p)->addr)) 120 121 struct auich_cdata { 122 struct auich_dmalist ic_dmalist_pcmo[ICH_DMALIST_MAX]; 123 struct auich_dmalist ic_dmalist_pcmi[ICH_DMALIST_MAX]; 124 struct auich_dmalist ic_dmalist_mici[ICH_DMALIST_MAX]; 125 }; 126 127 #define ICH_CDOFF(x) offsetof(struct auich_cdata, x) 128 #define ICH_PCMO_OFF(x) ICH_CDOFF(ic_dmalist_pcmo[(x)]) 129 #define ICH_PCMI_OFF(x) ICH_CDOFF(ic_dmalist_pcmi[(x)]) 130 #define ICH_MICI_OFF(x) ICH_CDOFF(ic_dmalist_mici[(x)]) 131 132 struct auich_softc { 133 struct device sc_dev; 134 void *sc_ih; 135 136 audio_device_t sc_audev; 137 138 bus_space_tag_t iot; 139 bus_space_handle_t mix_ioh; 140 bus_space_handle_t aud_ioh; 141 bus_dma_tag_t dmat; 142 143 struct ac97_codec_if *codec_if; 144 struct ac97_host_if host_if; 145 146 /* DMA scatter-gather lists. */ 147 bus_dmamap_t sc_cddmamap; 148 #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr 149 150 struct auich_cdata *sc_cdata; 151 #define dmalist_pcmo sc_cdata->ic_dmalist_pcmo 152 #define dmalist_pcmi sc_cdata->ic_dmalist_pcmi 153 #define dmalist_mici sc_cdata->ic_dmalist_mici 154 155 int ptr_pcmo, 156 ptr_pcmi, 157 ptr_mici; 158 159 /* i/o buffer pointers */ 160 u_int32_t pcmo_start, pcmo_p, pcmo_end; 161 int pcmo_blksize, pcmo_fifoe; 162 163 u_int32_t pcmi_start, pcmi_p, pcmi_end; 164 int pcmi_blksize, pcmi_fifoe; 165 166 u_int32_t mici_start, mici_p, mici_end; 167 int mici_blksize, mici_fifoe; 168 169 struct auich_dma *sc_dmas; 170 171 void (*sc_pintr)(void *); 172 void *sc_parg; 173 174 void (*sc_rintr)(void *); 175 void *sc_rarg; 176 }; 177 178 /* Debug */ 179 #ifdef AUDIO_DEBUG 180 #define DPRINTF(l,x) do { if (auich_debug & (l)) printf x; } while(0) 181 int auich_debug = 0xfffe; 182 #define ICH_DEBUG_CODECIO 0x0001 183 #define ICH_DEBUG_DMA 0x0002 184 #define ICH_DEBUG_PARAM 0x0004 185 #else 186 #define DPRINTF(x,y) /* nothing */ 187 #endif 188 189 int auich_match(struct device *, struct cfdata *, void *); 190 void auich_attach(struct device *, struct device *, void *); 191 int auich_intr(void *); 192 193 struct cfattach auich_ca = { 194 sizeof(struct auich_softc), auich_match, auich_attach 195 }; 196 197 int auich_open(void *, int); 198 void auich_close(void *); 199 int auich_query_encoding(void *, struct audio_encoding *); 200 int auich_set_params(void *, int, int, struct audio_params *, 201 struct audio_params *); 202 int auich_round_blocksize(void *, int); 203 int auich_halt_output(void *); 204 int auich_halt_input(void *); 205 int auich_getdev(void *, struct audio_device *); 206 int auich_set_port(void *, mixer_ctrl_t *); 207 int auich_get_port(void *, mixer_ctrl_t *); 208 int auich_query_devinfo(void *, mixer_devinfo_t *); 209 void *auich_allocm(void *, int, size_t, int, int); 210 void auich_freem(void *, void *, int); 211 size_t auich_round_buffersize(void *, int, size_t); 212 paddr_t auich_mappage(void *, void *, off_t, int); 213 int auich_get_props(void *); 214 int auich_trigger_output(void *, void *, void *, int, void (*)(void *), 215 void *, struct audio_params *); 216 int auich_trigger_input(void *, void *, void *, int, void (*)(void *), 217 void *, struct audio_params *); 218 219 int auich_alloc_cdata(struct auich_softc *); 220 221 int auich_allocmem(struct auich_softc *, size_t, size_t, 222 struct auich_dma *); 223 int auich_freemem(struct auich_softc *, struct auich_dma *); 224 225 struct audio_hw_if auich_hw_if = { 226 auich_open, 227 auich_close, 228 NULL, /* drain */ 229 auich_query_encoding, 230 auich_set_params, 231 auich_round_blocksize, 232 NULL, /* commit_setting */ 233 NULL, /* init_output */ 234 NULL, /* init_input */ 235 NULL, /* start_output */ 236 NULL, /* start_input */ 237 auich_halt_output, 238 auich_halt_input, 239 NULL, /* speaker_ctl */ 240 auich_getdev, 241 NULL, /* getfd */ 242 auich_set_port, 243 auich_get_port, 244 auich_query_devinfo, 245 auich_allocm, 246 auich_freem, 247 auich_round_buffersize, 248 auich_mappage, 249 auich_get_props, 250 auich_trigger_output, 251 auich_trigger_input, 252 NULL, /* dev_ioctl */ 253 }; 254 255 int auich_attach_codec(void *, struct ac97_codec_if *); 256 int auich_read_codec(void *, u_int8_t, u_int16_t *); 257 int auich_write_codec(void *, u_int8_t, u_int16_t); 258 void auich_reset_codec(void *); 259 260 static const struct auich_devtype { 261 int product; 262 const char *name; 263 const char *shortname; 264 } auich_devices[] = { 265 { PCI_PRODUCT_INTEL_82801AA_ACA, 266 "i82801AA (ICH) AC-97 Audio", "ICH" }, 267 { PCI_PRODUCT_INTEL_82801AB_ACA, 268 "i82801AB (ICH0) AC-97 Audio", "ICH0" }, 269 { PCI_PRODUCT_INTEL_82801BA_ACA, 270 "i82801BA (ICH2) AC-97 Audio", "ICH2" }, 271 { PCI_PRODUCT_INTEL_82440MX_ACA, 272 "i82440MX AC-97 Audio", "440MX" }, 273 274 { 0, 275 NULL, NULL }, 276 }; 277 278 static const struct auich_devtype * 279 auich_lookup(struct pci_attach_args *pa) 280 { 281 const struct auich_devtype *d; 282 283 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL) 284 return (NULL); 285 286 for (d = auich_devices; d->name != NULL; d++) { 287 if (PCI_PRODUCT(pa->pa_id) == d->product) 288 return (d); 289 } 290 291 return (NULL); 292 } 293 294 int 295 auich_match(struct device *parent, struct cfdata *match, void *aux) 296 { 297 struct pci_attach_args *pa = aux; 298 299 if (auich_lookup(pa) != NULL) 300 return (1); 301 302 return (0); 303 } 304 305 void 306 auich_attach(struct device *parent, struct device *self, void *aux) 307 { 308 struct auich_softc *sc = (struct auich_softc *)self; 309 struct pci_attach_args *pa = aux; 310 pci_intr_handle_t ih; 311 bus_size_t mix_size, aud_size; 312 pcireg_t csr; 313 const char *intrstr; 314 const struct auich_devtype *d; 315 316 d = auich_lookup(pa); 317 if (d == NULL) 318 panic("auich_attach: impossible"); 319 320 printf(": %s\n", d->name); 321 322 if (pci_mapreg_map(pa, ICH_NAMBAR, PCI_MAPREG_TYPE_IO, 0, 323 &sc->iot, &sc->mix_ioh, NULL, &mix_size)) { 324 printf("%s: can't map codec i/o space\n", 325 sc->sc_dev.dv_xname); 326 return; 327 } 328 if (pci_mapreg_map(pa, ICH_NABMBAR, PCI_MAPREG_TYPE_IO, 0, 329 &sc->iot, &sc->aud_ioh, NULL, &aud_size)) { 330 printf("%s: can't map device i/o space\n", 331 sc->sc_dev.dv_xname); 332 return; 333 } 334 sc->dmat = pa->pa_dmat; 335 336 /* enable bus mastering */ 337 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 338 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 339 csr | PCI_COMMAND_MASTER_ENABLE); 340 341 /* Map and establish the interrupt. */ 342 if (pci_intr_map(pa, &ih)) { 343 printf("%s: can't map interrupt\n", sc->sc_dev.dv_xname); 344 return; 345 } 346 intrstr = pci_intr_string(pa->pa_pc, ih); 347 sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, 348 auich_intr, sc); 349 if (sc->sc_ih == NULL) { 350 printf("%s: can't establish interrupt", sc->sc_dev.dv_xname); 351 if (intrstr != NULL) 352 printf(" at %s", intrstr); 353 printf("\n"); 354 return; 355 } 356 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 357 358 sprintf(sc->sc_audev.name, "%s AC97", d->shortname); 359 sprintf(sc->sc_audev.version, "0x%02x", PCI_REVISION(pa->pa_class)); 360 strcpy(sc->sc_audev.config, sc->sc_dev.dv_xname); 361 362 /* Set up DMA lists. */ 363 sc->ptr_pcmo = sc->ptr_pcmi = sc->ptr_mici = 0; 364 auich_alloc_cdata(sc); 365 366 DPRINTF(ICH_DEBUG_DMA, ("auich_attach: lists %p %p %p\n", 367 sc->dmalist_pcmo, sc->dmalist_pcmi, sc->dmalist_mici)); 368 369 /* Reset codec and AC'97 */ 370 auich_reset_codec(sc); 371 372 sc->host_if.arg = sc; 373 sc->host_if.attach = auich_attach_codec; 374 sc->host_if.read = auich_read_codec; 375 sc->host_if.write = auich_write_codec; 376 sc->host_if.reset = auich_reset_codec; 377 378 if (ac97_attach(&sc->host_if) != 0) 379 return; 380 381 audio_attach_mi(&auich_hw_if, sc, &sc->sc_dev); 382 } 383 384 int 385 auich_read_codec(void *v, u_int8_t reg, u_int16_t *val) 386 { 387 struct auich_softc *sc = v; 388 int i; 389 390 /* wait for an access semaphore */ 391 for (i = ICH_SEMATIMO; i-- && 392 bus_space_read_1(sc->iot, sc->aud_ioh, ICH_CAS) & 1; DELAY(1)); 393 394 if (i > 0) { 395 *val = bus_space_read_2(sc->iot, sc->mix_ioh, reg); 396 DPRINTF(ICH_DEBUG_CODECIO, 397 ("auich_read_codec(%x, %x)\n", reg, *val)); 398 399 return 0; 400 } else { 401 DPRINTF(ICH_DEBUG_CODECIO, 402 ("%s: read_codec timeout\n", sc->sc_dev.dv_xname)); 403 return -1; 404 } 405 } 406 407 int 408 auich_write_codec(void *v, u_int8_t reg, u_int16_t val) 409 { 410 struct auich_softc *sc = v; 411 int i; 412 413 DPRINTF(ICH_DEBUG_CODECIO, ("auich_write_codec(%x, %x)\n", reg, val)); 414 415 /* wait for an access semaphore */ 416 for (i = ICH_SEMATIMO; i-- && 417 bus_space_read_1(sc->iot, sc->aud_ioh, ICH_CAS) & 1; DELAY(1)); 418 419 if (i > 0) { 420 bus_space_write_2(sc->iot, sc->mix_ioh, reg, val); 421 return 0; 422 } else { 423 DPRINTF(ICH_DEBUG_CODECIO, 424 ("%s: write_codec timeout\n", sc->sc_dev.dv_xname)); 425 return -1; 426 } 427 } 428 429 int 430 auich_attach_codec(void *v, struct ac97_codec_if *cif) 431 { 432 struct auich_softc *sc = v; 433 434 sc->codec_if = cif; 435 return 0; 436 } 437 438 void 439 auich_reset_codec(void *v) 440 { 441 struct auich_softc *sc = v; 442 443 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_GCTRL, 0); 444 DELAY(10); 445 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_GCTRL, ICH_CRESET); 446 } 447 448 int 449 auich_open(void *v, int flags) 450 { 451 452 return 0; 453 } 454 455 void 456 auich_close(void *v) 457 { 458 struct auich_softc *sc = v; 459 460 auich_halt_output(sc); 461 auich_halt_input(sc); 462 463 sc->sc_pintr = NULL; 464 sc->sc_rintr = NULL; 465 } 466 467 int 468 auich_query_encoding(void *v, struct audio_encoding *aep) 469 { 470 switch (aep->index) { 471 #if 0 /* XXX Not until we emulate it. */ 472 case 0: 473 strcpy(aep->name, AudioEulinear); 474 aep->encoding = AUDIO_ENCODING_ULINEAR; 475 aep->precision = 8; 476 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 477 return (0); 478 #endif 479 case 1: 480 strcpy(aep->name, AudioEmulaw); 481 aep->encoding = AUDIO_ENCODING_ULAW; 482 aep->precision = 8; 483 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 484 return (0); 485 case 2: 486 strcpy(aep->name, AudioEalaw); 487 aep->encoding = AUDIO_ENCODING_ALAW; 488 aep->precision = 8; 489 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 490 return (0); 491 case 3: 492 strcpy(aep->name, AudioEslinear); 493 aep->encoding = AUDIO_ENCODING_SLINEAR; 494 aep->precision = 8; 495 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 496 return (0); 497 case 4: 498 strcpy(aep->name, AudioEslinear_le); 499 aep->encoding = AUDIO_ENCODING_SLINEAR_LE; 500 aep->precision = 16; 501 aep->flags = 0; 502 return (0); 503 case 5: 504 strcpy(aep->name, AudioEulinear_le); 505 aep->encoding = AUDIO_ENCODING_ULINEAR_LE; 506 aep->precision = 16; 507 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 508 return (0); 509 case 6: 510 strcpy(aep->name, AudioEslinear_be); 511 aep->encoding = AUDIO_ENCODING_SLINEAR_BE; 512 aep->precision = 16; 513 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 514 return (0); 515 case 7: 516 strcpy(aep->name, AudioEulinear_be); 517 aep->encoding = AUDIO_ENCODING_ULINEAR_BE; 518 aep->precision = 16; 519 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 520 return (0); 521 default: 522 return (EINVAL); 523 } 524 } 525 526 int 527 auich_set_params(void *v, int setmode, int usemode, struct audio_params *play, 528 struct audio_params *rec) 529 { 530 struct auich_softc *sc = v; 531 struct audio_params *p; 532 int mode; 533 u_int16_t val, rate, inout; 534 535 for (mode = AUMODE_RECORD; mode != -1; 536 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 537 if ((setmode & mode) == 0) 538 continue; 539 540 p = mode == AUMODE_PLAY ? play : rec; 541 if (p == NULL) 542 continue; 543 544 inout = mode == AUMODE_PLAY ? ICH_PM_PCMO : ICH_PM_PCMI; 545 546 /* 547 * XXX NEED TO DETERMINE WHICH RATES THE CODEC SUPPORTS! 548 */ 549 if (p->sample_rate != 48000) 550 return (EINVAL); 551 552 p->factor = 1; 553 p->sw_code = NULL; 554 switch (p->encoding) { 555 case AUDIO_ENCODING_SLINEAR_BE: 556 if (p->precision == 16) 557 p->sw_code = swap_bytes; 558 else { 559 if (mode == AUMODE_PLAY) 560 p->sw_code = linear8_to_linear16_le; 561 else 562 p->sw_code = linear16_to_linear8_le; 563 } 564 break; 565 566 case AUDIO_ENCODING_SLINEAR_LE: 567 if (p->precision != 16) { 568 if (mode == AUMODE_PLAY) 569 p->sw_code = linear8_to_linear16_le; 570 else 571 p->sw_code = linear16_to_linear8_le; 572 } 573 break; 574 575 case AUDIO_ENCODING_ULINEAR_BE: 576 if (p->precision == 16) { 577 if (mode == AUMODE_PLAY) 578 p->sw_code = 579 swap_bytes_change_sign16_le; 580 else 581 p->sw_code = 582 change_sign16_swap_bytes_le; 583 } else { 584 /* 585 * XXX ulinear8_to_slinear16_le 586 */ 587 return (EINVAL); 588 } 589 break; 590 591 case AUDIO_ENCODING_ULINEAR_LE: 592 if (p->precision == 16) 593 p->sw_code = change_sign16_le; 594 else { 595 /* 596 * XXX ulinear8_to_slinear16_le 597 */ 598 return (EINVAL); 599 } 600 break; 601 602 case AUDIO_ENCODING_ULAW: 603 if (mode == AUMODE_PLAY) { 604 p->factor = 2; 605 p->sw_code = mulaw_to_slinear16_le; 606 } else { 607 /* 608 * XXX slinear16_le_to_mulaw 609 */ 610 return (EINVAL); 611 } 612 break; 613 614 case AUDIO_ENCODING_ALAW: 615 if (mode == AUMODE_PLAY) { 616 p->factor = 2; 617 p->sw_code = alaw_to_slinear16_le; 618 } else { 619 /* 620 * XXX slinear16_le_to_alaw 621 */ 622 return (EINVAL); 623 } 624 break; 625 626 default: 627 return (EINVAL); 628 } 629 630 auich_read_codec(sc, AC97_REG_POWER, &val); 631 auich_write_codec(sc, AC97_REG_POWER, val | inout); 632 633 auich_write_codec(sc, AC97_REG_PCM_FRONT_DAC_RATE, 634 p->sample_rate); 635 auich_read_codec(sc, AC97_REG_PCM_FRONT_DAC_RATE, &rate); 636 p->sample_rate = rate; 637 638 auich_write_codec(sc, AC97_REG_POWER, val); 639 } 640 641 return (0); 642 } 643 644 int 645 auich_round_blocksize(void *v, int blk) 646 { 647 648 return (blk & ~0x3f); /* keep good alignment */ 649 } 650 651 int 652 auich_halt_output(void *v) 653 { 654 struct auich_softc *sc = v; 655 656 DPRINTF(ICH_DEBUG_DMA, ("%s: halt_output\n", sc->sc_dev.dv_xname)); 657 658 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_CTRL, ICH_RR); 659 660 return (0); 661 } 662 663 int 664 auich_halt_input(void *v) 665 { 666 struct auich_softc *sc = v; 667 668 DPRINTF(ICH_DEBUG_DMA, 669 ("%s: halt_input\n", sc->sc_dev.dv_xname)); 670 671 /* XXX halt both unless known otherwise */ 672 673 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, ICH_RR); 674 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_MICI + ICH_CTRL, ICH_RR); 675 676 return (0); 677 } 678 679 int 680 auich_getdev(void *v, struct audio_device *adp) 681 { 682 struct auich_softc *sc = v; 683 684 *adp = sc->sc_audev; 685 return (0); 686 } 687 688 int 689 auich_set_port(void *v, mixer_ctrl_t *cp) 690 { 691 struct auich_softc *sc = v; 692 693 return (sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp)); 694 } 695 696 int 697 auich_get_port(void *v, mixer_ctrl_t *cp) 698 { 699 struct auich_softc *sc = v; 700 701 return (sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp)); 702 } 703 704 int 705 auich_query_devinfo(void *v, mixer_devinfo_t *dp) 706 { 707 struct auich_softc *sc = v; 708 709 return (sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp)); 710 } 711 712 void * 713 auich_allocm(void *v, int direction, size_t size, int pool, int flags) 714 { 715 struct auich_softc *sc = v; 716 struct auich_dma *p; 717 int error; 718 719 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX)) 720 return (NULL); 721 722 p = malloc(sizeof(*p), pool, flags); 723 if (p == NULL) 724 return (NULL); 725 memset(p, 0, sizeof(*p)); 726 727 error = auich_allocmem(sc, size, 0, p); 728 if (error) { 729 free(p, pool); 730 return (NULL); 731 } 732 733 p->next = sc->sc_dmas; 734 sc->sc_dmas = p; 735 736 return (KERNADDR(p)); 737 } 738 739 void 740 auich_freem(void *v, void *ptr, int pool) 741 { 742 struct auich_softc *sc = v; 743 struct auich_dma *p, **pp; 744 745 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 746 if (KERNADDR(p) == ptr) { 747 auich_freemem(sc, p); 748 *pp = p->next; 749 free(p, pool); 750 return; 751 } 752 } 753 } 754 755 size_t 756 auich_round_buffersize(void *v, int direction, size_t size) 757 { 758 759 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX)) 760 size = ICH_DMALIST_MAX * ICH_DMASEG_MAX; 761 762 return size; 763 } 764 765 paddr_t 766 auich_mappage(void *v, void *mem, off_t off, int prot) 767 { 768 struct auich_softc *sc = v; 769 struct auich_dma *p; 770 771 if (off < 0) 772 return (-1); 773 774 for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next) 775 ; 776 if (!p) 777 return (-1); 778 return (bus_dmamem_mmap(sc->dmat, p->segs, p->nsegs, 779 off, prot, BUS_DMA_WAITOK)); 780 } 781 782 int 783 auich_get_props(void *v) 784 { 785 786 return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | 787 AUDIO_PROP_FULLDUPLEX); 788 } 789 790 int 791 auich_intr(void *v) 792 { 793 struct auich_softc *sc = v; 794 int ret = 0, sts, gsts, i, qptr; 795 796 gsts = bus_space_read_2(sc->iot, sc->aud_ioh, ICH_GSTS); 797 DPRINTF(ICH_DEBUG_DMA, ("auich_intr: gsts=0x%x\n", gsts)); 798 799 if (gsts & ICH_POINT) { 800 sts = bus_space_read_2(sc->iot, sc->aud_ioh, ICH_PCMO+ICH_STS); 801 DPRINTF(ICH_DEBUG_DMA, 802 ("auich_intr: osts=0x%x\n", sts)); 803 804 if (sts & ICH_FIFOE) { 805 printf("%s: fifo underrun # %u\n", 806 sc->sc_dev.dv_xname, ++sc->pcmo_fifoe); 807 } 808 809 i = bus_space_read_1(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_CIV); 810 if (sts & (ICH_LVBCI | ICH_CELV)) { 811 struct auich_dmalist *q; 812 813 qptr = sc->ptr_pcmo; 814 815 while (qptr != i) { 816 q = &sc->dmalist_pcmo[qptr]; 817 818 q->base = sc->pcmo_p; 819 q->len = (sc->pcmo_blksize / 2) | ICH_DMAF_IOC; 820 DPRINTF(ICH_DEBUG_DMA, 821 ("auich_intr: %p, %p = %x @ 0x%x\n", 822 &sc->dmalist_pcmo[i], q, 823 sc->pcmo_blksize / 2, sc->pcmo_p)); 824 825 sc->pcmo_p += sc->pcmo_blksize; 826 if (sc->pcmo_p >= sc->pcmo_end) 827 sc->pcmo_p = sc->pcmo_start; 828 829 if (++qptr == ICH_DMALIST_MAX) 830 qptr = 0; 831 } 832 833 sc->ptr_pcmo = qptr; 834 bus_space_write_1(sc->iot, sc->aud_ioh, 835 ICH_PCMO + ICH_LVI, 836 (sc->ptr_pcmo - 1) & ICH_LVI_MASK); 837 } 838 839 if (sts & ICH_BCIS && sc->sc_pintr) 840 sc->sc_pintr(sc->sc_parg); 841 842 /* int ack */ 843 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_STS, 844 sts & (ICH_LVBCI | ICH_CELV | ICH_BCIS | ICH_FIFOE)); 845 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_GSTS, ICH_POINT); 846 ret++; 847 } 848 849 if (gsts & ICH_PIINT) { 850 sts = bus_space_read_2(sc->iot, sc->aud_ioh, ICH_PCMI+ICH_STS); 851 DPRINTF(ICH_DEBUG_DMA, 852 ("auich_intr: ists=0x%x\n", sts)); 853 854 if (sts & ICH_FIFOE) { 855 printf("%s: fifo overrun # %u\n", 856 sc->sc_dev.dv_xname, ++sc->pcmi_fifoe); 857 } 858 859 i = bus_space_read_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CIV); 860 if (sts & (ICH_LVBCI | ICH_CELV)) { 861 struct auich_dmalist *q; 862 863 qptr = sc->ptr_pcmi; 864 865 while (qptr != i) { 866 q = &sc->dmalist_pcmi[qptr]; 867 868 q->base = sc->pcmi_p; 869 q->len = (sc->pcmi_blksize / 2) | ICH_DMAF_IOC; 870 DPRINTF(ICH_DEBUG_DMA, 871 ("auich_intr: %p, %p = %x @ 0x%x\n", 872 &sc->dmalist_pcmi[i], q, 873 sc->pcmi_blksize / 2, sc->pcmi_p)); 874 875 sc->pcmi_p += sc->pcmi_blksize; 876 if (sc->pcmi_p >= sc->pcmi_end) 877 sc->pcmi_p = sc->pcmi_start; 878 879 if (++qptr == ICH_DMALIST_MAX) 880 qptr = 0; 881 } 882 883 sc->ptr_pcmi = qptr; 884 bus_space_write_1(sc->iot, sc->aud_ioh, 885 ICH_PCMI + ICH_LVI, 886 (sc->ptr_pcmi - 1) & ICH_LVI_MASK); 887 } 888 889 if (sts & ICH_BCIS && sc->sc_rintr) 890 sc->sc_rintr(sc->sc_rarg); 891 892 /* int ack */ 893 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_STS, 894 sts & (ICH_LVBCI | ICH_CELV | ICH_BCIS | ICH_FIFOE)); 895 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_GSTS, ICH_POINT); 896 ret++; 897 } 898 899 if (gsts & ICH_MIINT) { 900 sts = bus_space_read_2(sc->iot, sc->aud_ioh, ICH_MICI+ICH_STS); 901 DPRINTF(ICH_DEBUG_DMA, 902 ("auich_intr: ists=0x%x\n", sts)); 903 if (sts & ICH_FIFOE) 904 printf("%s: fifo overrun\n", sc->sc_dev.dv_xname); 905 906 /* TODO mic input dma */ 907 908 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_GSTS, ICH_MIINT); 909 } 910 911 return ret; 912 } 913 914 int 915 auich_trigger_output(void *v, void *start, void *end, int blksize, 916 void (*intr)(void *), void *arg, struct audio_params *param) 917 { 918 struct auich_softc *sc = v; 919 struct auich_dmalist *q; 920 struct auich_dma *p; 921 size_t size; 922 923 DPRINTF(ICH_DEBUG_DMA, 924 ("auich_trigger_output(%p, %p, %d, %p, %p, %p)\n", 925 start, end, blksize, intr, arg, param)); 926 927 sc->sc_pintr = intr; 928 sc->sc_parg = arg; 929 930 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 931 ; 932 if (!p) { 933 printf("auich_trigger_output: bad addr %p\n", start); 934 return (EINVAL); 935 } 936 937 size = (size_t)((caddr_t)end - (caddr_t)start); 938 939 /* 940 * The logic behind this is: 941 * setup one buffer to play, then LVI dump out the rest 942 * to the scatter-gather chain. 943 */ 944 sc->pcmo_start = DMAADDR(p); 945 sc->pcmo_p = sc->pcmo_start + blksize; 946 sc->pcmo_end = sc->pcmo_start + size; 947 sc->pcmo_blksize = blksize; 948 949 sc->ptr_pcmo = 0; 950 q = &sc->dmalist_pcmo[sc->ptr_pcmo]; 951 q->base = sc->pcmo_start; 952 q->len = (blksize / 2) | ICH_DMAF_IOC; 953 if (++sc->ptr_pcmo == ICH_DMALIST_MAX) 954 sc->ptr_pcmo = 0; 955 956 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_BDBAR, 957 sc->sc_cddma + ICH_PCMO_OFF(0)); 958 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_CTRL, 959 ICH_IOCE | ICH_FEIE | ICH_LVBIE | ICH_RPBM); 960 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_LVI, 961 (sc->ptr_pcmo - 1) & ICH_LVI_MASK); 962 963 return (0); 964 } 965 966 int 967 auich_trigger_input(v, start, end, blksize, intr, arg, param) 968 void *v; 969 void *start, *end; 970 int blksize; 971 void (*intr)(void *); 972 void *arg; 973 struct audio_params *param; 974 { 975 struct auich_softc *sc = v; 976 struct auich_dmalist *q; 977 struct auich_dma *p; 978 size_t size; 979 980 DPRINTF(ICH_DEBUG_DMA, 981 ("auich_trigger_input(%p, %p, %d, %p, %p, %p)\n", 982 start, end, blksize, intr, arg, param)); 983 984 sc->sc_rintr = intr; 985 sc->sc_rarg = arg; 986 987 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 988 ; 989 if (!p) { 990 printf("auich_trigger_input: bad addr %p\n", start); 991 return (EINVAL); 992 } 993 994 size = (size_t)((caddr_t)end - (caddr_t)start); 995 996 /* 997 * The logic behind this is: 998 * setup one buffer to play, then LVI dump out the rest 999 * to the scatter-gather chain. 1000 */ 1001 sc->pcmi_start = DMAADDR(p); 1002 sc->pcmi_p = sc->pcmi_start + blksize; 1003 sc->pcmi_end = sc->pcmi_start + size; 1004 sc->pcmi_blksize = blksize; 1005 1006 sc->ptr_pcmi = 0; 1007 q = &sc->dmalist_pcmi[sc->ptr_pcmi]; 1008 q->base = sc->pcmi_start; 1009 q->len = (blksize / 2) | ICH_DMAF_IOC; 1010 if (++sc->ptr_pcmi == ICH_DMALIST_MAX) 1011 sc->ptr_pcmi = 0; 1012 1013 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_BDBAR, 1014 sc->sc_cddma + ICH_PCMI_OFF(0)); 1015 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, 1016 ICH_IOCE | ICH_FEIE | ICH_LVBIE | ICH_RPBM); 1017 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_LVI, 1018 (sc->ptr_pcmi - 1) & ICH_LVI_MASK); 1019 1020 return (0); 1021 } 1022 1023 int 1024 auich_allocmem(struct auich_softc *sc, size_t size, size_t align, 1025 struct auich_dma *p) 1026 { 1027 int error; 1028 1029 p->size = size; 1030 error = bus_dmamem_alloc(sc->dmat, p->size, align, 0, 1031 p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 1032 &p->nsegs, BUS_DMA_NOWAIT); 1033 if (error) 1034 return (error); 1035 1036 error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size, 1037 &p->addr, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 1038 if (error) 1039 goto free; 1040 1041 error = bus_dmamap_create(sc->dmat, p->size, 1, p->size, 1042 0, BUS_DMA_NOWAIT, &p->map); 1043 if (error) 1044 goto unmap; 1045 1046 error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL, 1047 BUS_DMA_NOWAIT); 1048 if (error) 1049 goto destroy; 1050 return (0); 1051 1052 destroy: 1053 bus_dmamap_destroy(sc->dmat, p->map); 1054 unmap: 1055 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1056 free: 1057 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1058 return (error); 1059 } 1060 1061 int 1062 auich_freemem(struct auich_softc *sc, struct auich_dma *p) 1063 { 1064 1065 bus_dmamap_unload(sc->dmat, p->map); 1066 bus_dmamap_destroy(sc->dmat, p->map); 1067 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1068 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1069 return (0); 1070 } 1071 1072 int 1073 auich_alloc_cdata(struct auich_softc *sc) 1074 { 1075 bus_dma_segment_t seg; 1076 int error, rseg; 1077 1078 /* 1079 * Allocate the control data structure, and create and load the 1080 * DMA map for it. 1081 */ 1082 if ((error = bus_dmamem_alloc(sc->dmat, 1083 sizeof(struct auich_cdata), 1084 PAGE_SIZE, 0, &seg, 1, &rseg, 0)) != 0) { 1085 printf("%s: unable to allocate control data, error = %d\n", 1086 sc->sc_dev.dv_xname, error); 1087 goto fail_0; 1088 } 1089 1090 if ((error = bus_dmamem_map(sc->dmat, &seg, rseg, 1091 sizeof(struct auich_cdata), 1092 (caddr_t *) &sc->sc_cdata, 1093 BUS_DMA_COHERENT)) != 0) { 1094 printf("%s: unable to map control data, error = %d\n", 1095 sc->sc_dev.dv_xname, error); 1096 goto fail_1; 1097 } 1098 1099 if ((error = bus_dmamap_create(sc->dmat, sizeof(struct auich_cdata), 1, 1100 sizeof(struct auich_cdata), 0, 0, 1101 &sc->sc_cddmamap)) != 0) { 1102 printf("%s: unable to create control data DMA map, " 1103 "error = %d\n", sc->sc_dev.dv_xname, error); 1104 goto fail_2; 1105 } 1106 1107 if ((error = bus_dmamap_load(sc->dmat, sc->sc_cddmamap, 1108 sc->sc_cdata, sizeof(struct auich_cdata), 1109 NULL, 0)) != 0) { 1110 printf("%s: unable tp load control data DMA map, " 1111 "error = %d\n", sc->sc_dev.dv_xname, error); 1112 goto fail_3; 1113 } 1114 1115 return (0); 1116 1117 fail_3: 1118 bus_dmamap_destroy(sc->dmat, sc->sc_cddmamap); 1119 fail_2: 1120 bus_dmamem_unmap(sc->dmat, (caddr_t) sc->sc_cdata, 1121 sizeof(struct auich_cdata)); 1122 fail_1: 1123 bus_dmamem_free(sc->dmat, &seg, rseg); 1124 fail_0: 1125 return (error); 1126 } 1127
Indexes created Thu Oct 23 22:10:10 GMT 2025