auich.c revision 1.3.4.2
1 /* $NetBSD: auich.c,v 1.3.4.2 2002/02/11 20:09:55 jdolecek Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 2000 Michael Shalayeff 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. The name of the author may not be used to endorse or promote products 52 * derived from this software without specific prior written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 55 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 56 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 57 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 58 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 59 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 60 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 61 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 62 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 63 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 64 * THE POSSIBILITY OF SUCH DAMAGE. 65 * 66 * from OpenBSD: ich.c,v 1.3 2000/08/11 06:17:18 mickey Exp 67 */ 68 69 /* #define ICH_DEBUG */ 70 /* 71 * AC'97 audio found on Intel 810/820/440MX chipsets. 72 * http://developer.intel.com/design/chipsets/datashts/290655.htm 73 * http://developer.intel.com/design/chipsets/manuals/298028.htm 74 * 75 * TODO: 76 * 77 * - Probe codecs for supported sample rates. 78 * 79 * - Add support for the microphone input. 80 */ 81 82 #include <sys/cdefs.h> 83 __KERNEL_RCSID(0, "$NetBSD: auich.c,v 1.3.4.2 2002/02/11 20:09:55 jdolecek Exp $"); 84 85 #include <sys/param.h> 86 #include <sys/systm.h> 87 #include <sys/kernel.h> 88 #include <sys/malloc.h> 89 #include <sys/device.h> 90 #include <sys/fcntl.h> 91 #include <sys/proc.h> 92 93 #include <uvm/uvm_extern.h> /* for PAGE_SIZE */ 94 95 #include <dev/pci/pcidevs.h> 96 #include <dev/pci/pcivar.h> 97 #include <dev/pci/auichreg.h> 98 99 #include <sys/audioio.h> 100 #include <dev/audio_if.h> 101 #include <dev/mulaw.h> 102 #include <dev/auconv.h> 103 104 #include <machine/bus.h> 105 106 #include <dev/ic/ac97reg.h> 107 #include <dev/ic/ac97var.h> 108 109 struct auich_dma { 110 bus_dmamap_t map; 111 caddr_t addr; 112 bus_dma_segment_t segs[1]; 113 int nsegs; 114 size_t size; 115 struct auich_dma *next; 116 }; 117 118 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 119 #define KERNADDR(p) ((void *)((p)->addr)) 120 121 struct auich_cdata { 122 struct auich_dmalist ic_dmalist_pcmo[ICH_DMALIST_MAX]; 123 struct auich_dmalist ic_dmalist_pcmi[ICH_DMALIST_MAX]; 124 struct auich_dmalist ic_dmalist_mici[ICH_DMALIST_MAX]; 125 }; 126 127 #define ICH_CDOFF(x) offsetof(struct auich_cdata, x) 128 #define ICH_PCMO_OFF(x) ICH_CDOFF(ic_dmalist_pcmo[(x)]) 129 #define ICH_PCMI_OFF(x) ICH_CDOFF(ic_dmalist_pcmi[(x)]) 130 #define ICH_MICI_OFF(x) ICH_CDOFF(ic_dmalist_mici[(x)]) 131 132 struct auich_softc { 133 struct device sc_dev; 134 void *sc_ih; 135 136 audio_device_t sc_audev; 137 138 bus_space_tag_t iot; 139 bus_space_handle_t mix_ioh; 140 bus_space_handle_t aud_ioh; 141 bus_dma_tag_t dmat; 142 143 struct ac97_codec_if *codec_if; 144 struct ac97_host_if host_if; 145 146 /* DMA scatter-gather lists. */ 147 bus_dmamap_t sc_cddmamap; 148 #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr 149 150 struct auich_cdata *sc_cdata; 151 #define dmalist_pcmo sc_cdata->ic_dmalist_pcmo 152 #define dmalist_pcmi sc_cdata->ic_dmalist_pcmi 153 #define dmalist_mici sc_cdata->ic_dmalist_mici 154 155 int ptr_pcmo, 156 ptr_pcmi, 157 ptr_mici; 158 159 /* i/o buffer pointers */ 160 u_int32_t pcmo_start, pcmo_p, pcmo_end; 161 int pcmo_blksize, pcmo_fifoe; 162 163 u_int32_t pcmi_start, pcmi_p, pcmi_end; 164 int pcmi_blksize, pcmi_fifoe; 165 166 u_int32_t mici_start, mici_p, mici_end; 167 int mici_blksize, mici_fifoe; 168 169 struct auich_dma *sc_dmas; 170 171 int sc_fixed_rate; 172 173 void (*sc_pintr)(void *); 174 void *sc_parg; 175 176 void (*sc_rintr)(void *); 177 void *sc_rarg; 178 179 /* Power Management */ 180 void *sc_powerhook; 181 int sc_suspend; 182 u_int16_t ext_status; 183 }; 184 185 /* Debug */ 186 #ifdef AUDIO_DEBUG 187 #define DPRINTF(l,x) do { if (auich_debug & (l)) printf x; } while(0) 188 int auich_debug = 0xfffe; 189 #define ICH_DEBUG_CODECIO 0x0001 190 #define ICH_DEBUG_DMA 0x0002 191 #define ICH_DEBUG_PARAM 0x0004 192 #else 193 #define DPRINTF(x,y) /* nothing */ 194 #endif 195 196 int auich_match(struct device *, struct cfdata *, void *); 197 void auich_attach(struct device *, struct device *, void *); 198 int auich_intr(void *); 199 200 struct cfattach auich_ca = { 201 sizeof(struct auich_softc), auich_match, auich_attach 202 }; 203 204 int auich_open(void *, int); 205 void auich_close(void *); 206 int auich_query_encoding(void *, struct audio_encoding *); 207 int auich_set_params(void *, int, int, struct audio_params *, 208 struct audio_params *); 209 int auich_round_blocksize(void *, int); 210 int auich_halt_output(void *); 211 int auich_halt_input(void *); 212 int auich_getdev(void *, struct audio_device *); 213 int auich_set_port(void *, mixer_ctrl_t *); 214 int auich_get_port(void *, mixer_ctrl_t *); 215 int auich_query_devinfo(void *, mixer_devinfo_t *); 216 void *auich_allocm(void *, int, size_t, int, int); 217 void auich_freem(void *, void *, int); 218 size_t auich_round_buffersize(void *, int, size_t); 219 paddr_t auich_mappage(void *, void *, off_t, int); 220 int auich_get_props(void *); 221 int auich_trigger_output(void *, void *, void *, int, void (*)(void *), 222 void *, struct audio_params *); 223 int auich_trigger_input(void *, void *, void *, int, void (*)(void *), 224 void *, struct audio_params *); 225 226 int auich_alloc_cdata(struct auich_softc *); 227 228 int auich_allocmem(struct auich_softc *, size_t, size_t, 229 struct auich_dma *); 230 int auich_freemem(struct auich_softc *, struct auich_dma *); 231 232 void auich_powerhook(int, void *); 233 234 struct audio_hw_if auich_hw_if = { 235 auich_open, 236 auich_close, 237 NULL, /* drain */ 238 auich_query_encoding, 239 auich_set_params, 240 auich_round_blocksize, 241 NULL, /* commit_setting */ 242 NULL, /* init_output */ 243 NULL, /* init_input */ 244 NULL, /* start_output */ 245 NULL, /* start_input */ 246 auich_halt_output, 247 auich_halt_input, 248 NULL, /* speaker_ctl */ 249 auich_getdev, 250 NULL, /* getfd */ 251 auich_set_port, 252 auich_get_port, 253 auich_query_devinfo, 254 auich_allocm, 255 auich_freem, 256 auich_round_buffersize, 257 auich_mappage, 258 auich_get_props, 259 auich_trigger_output, 260 auich_trigger_input, 261 NULL, /* dev_ioctl */ 262 }; 263 264 int auich_attach_codec(void *, struct ac97_codec_if *); 265 int auich_read_codec(void *, u_int8_t, u_int16_t *); 266 int auich_write_codec(void *, u_int8_t, u_int16_t); 267 void auich_reset_codec(void *); 268 269 static const struct auich_devtype { 270 int product; 271 const char *name; 272 const char *shortname; 273 } auich_devices[] = { 274 { PCI_PRODUCT_INTEL_82801AA_ACA, 275 "i82801AA (ICH) AC-97 Audio", "ICH" }, 276 { PCI_PRODUCT_INTEL_82801AB_ACA, 277 "i82801AB (ICH0) AC-97 Audio", "ICH0" }, 278 { PCI_PRODUCT_INTEL_82801BA_ACA, 279 "i82801BA (ICH2) AC-97 Audio", "ICH2" }, 280 { PCI_PRODUCT_INTEL_82440MX_ACA, 281 "i82440MX AC-97 Audio", "440MX" }, 282 { PCI_PRODUCT_INTEL_82801CA_AC, 283 "i82801CA AC-97 Audio", "i830M" }, 284 285 { 0, 286 NULL, NULL }, 287 }; 288 289 static const struct auich_devtype * 290 auich_lookup(struct pci_attach_args *pa) 291 { 292 const struct auich_devtype *d; 293 294 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL) 295 return (NULL); 296 297 for (d = auich_devices; d->name != NULL; d++) { 298 if (PCI_PRODUCT(pa->pa_id) == d->product) 299 return (d); 300 } 301 302 return (NULL); 303 } 304 305 int 306 auich_match(struct device *parent, struct cfdata *match, void *aux) 307 { 308 struct pci_attach_args *pa = aux; 309 310 if (auich_lookup(pa) != NULL) 311 return (1); 312 313 return (0); 314 } 315 316 void 317 auich_attach(struct device *parent, struct device *self, void *aux) 318 { 319 struct auich_softc *sc = (struct auich_softc *)self; 320 struct pci_attach_args *pa = aux; 321 pci_intr_handle_t ih; 322 bus_size_t mix_size, aud_size; 323 pcireg_t csr; 324 const char *intrstr; 325 const struct auich_devtype *d; 326 u_int16_t ext_id, ext_status; 327 328 d = auich_lookup(pa); 329 if (d == NULL) 330 panic("auich_attach: impossible"); 331 332 printf(": %s\n", d->name); 333 334 if (pci_mapreg_map(pa, ICH_NAMBAR, PCI_MAPREG_TYPE_IO, 0, 335 &sc->iot, &sc->mix_ioh, NULL, &mix_size)) { 336 printf("%s: can't map codec i/o space\n", 337 sc->sc_dev.dv_xname); 338 return; 339 } 340 if (pci_mapreg_map(pa, ICH_NABMBAR, PCI_MAPREG_TYPE_IO, 0, 341 &sc->iot, &sc->aud_ioh, NULL, &aud_size)) { 342 printf("%s: can't map device i/o space\n", 343 sc->sc_dev.dv_xname); 344 return; 345 } 346 sc->dmat = pa->pa_dmat; 347 348 /* enable bus mastering */ 349 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 350 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 351 csr | PCI_COMMAND_MASTER_ENABLE); 352 353 /* Map and establish the interrupt. */ 354 if (pci_intr_map(pa, &ih)) { 355 printf("%s: can't map interrupt\n", sc->sc_dev.dv_xname); 356 return; 357 } 358 intrstr = pci_intr_string(pa->pa_pc, ih); 359 sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, 360 auich_intr, sc); 361 if (sc->sc_ih == NULL) { 362 printf("%s: can't establish interrupt", sc->sc_dev.dv_xname); 363 if (intrstr != NULL) 364 printf(" at %s", intrstr); 365 printf("\n"); 366 return; 367 } 368 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 369 370 sprintf(sc->sc_audev.name, "%s AC97", d->shortname); 371 sprintf(sc->sc_audev.version, "0x%02x", PCI_REVISION(pa->pa_class)); 372 strcpy(sc->sc_audev.config, sc->sc_dev.dv_xname); 373 374 /* Set up DMA lists. */ 375 sc->ptr_pcmo = sc->ptr_pcmi = sc->ptr_mici = 0; 376 auich_alloc_cdata(sc); 377 378 DPRINTF(ICH_DEBUG_DMA, ("auich_attach: lists %p %p %p\n", 379 sc->dmalist_pcmo, sc->dmalist_pcmi, sc->dmalist_mici)); 380 381 /* Reset codec and AC'97 */ 382 auich_reset_codec(sc); 383 384 sc->host_if.arg = sc; 385 sc->host_if.attach = auich_attach_codec; 386 sc->host_if.read = auich_read_codec; 387 sc->host_if.write = auich_write_codec; 388 sc->host_if.reset = auich_reset_codec; 389 390 if (ac97_attach(&sc->host_if) != 0) 391 return; 392 393 auich_read_codec(sc, AC97_REG_EXTENDED_ID, &ext_id); 394 if ((ext_id & (AC97_CODEC_DOES_VRA | AC97_CODEC_DOES_MICVRA)) != 0) { 395 auich_read_codec(sc, AC97_REG_EXTENDED_STATUS, &ext_status); 396 if ((ext_id & AC97_CODEC_DOES_VRA) !=0) 397 ext_status |= AC97_ENAB_VRA; 398 if ((ext_id & AC97_CODEC_DOES_MICVRA) !=0) 399 ext_status |= AC97_ENAB_MICVRA; 400 auich_write_codec(sc, AC97_REG_EXTENDED_STATUS, ext_status); 401 sc->sc_fixed_rate = 0; 402 } else { 403 sc->sc_fixed_rate = 48000; 404 } 405 406 audio_attach_mi(&auich_hw_if, sc, &sc->sc_dev); 407 408 /* Watch for power change */ 409 sc->sc_suspend = PWR_RESUME; 410 sc->sc_powerhook = powerhook_establish(auich_powerhook, sc); 411 } 412 413 int 414 auich_read_codec(void *v, u_int8_t reg, u_int16_t *val) 415 { 416 struct auich_softc *sc = v; 417 int i; 418 419 /* wait for an access semaphore */ 420 for (i = ICH_SEMATIMO; i-- && 421 bus_space_read_1(sc->iot, sc->aud_ioh, ICH_CAS) & 1; DELAY(1)); 422 423 if (i > 0) { 424 *val = bus_space_read_2(sc->iot, sc->mix_ioh, reg); 425 DPRINTF(ICH_DEBUG_CODECIO, 426 ("auich_read_codec(%x, %x)\n", reg, *val)); 427 428 return 0; 429 } else { 430 DPRINTF(ICH_DEBUG_CODECIO, 431 ("%s: read_codec timeout\n", sc->sc_dev.dv_xname)); 432 return -1; 433 } 434 } 435 436 int 437 auich_write_codec(void *v, u_int8_t reg, u_int16_t val) 438 { 439 struct auich_softc *sc = v; 440 int i; 441 442 DPRINTF(ICH_DEBUG_CODECIO, ("auich_write_codec(%x, %x)\n", reg, val)); 443 444 /* wait for an access semaphore */ 445 for (i = ICH_SEMATIMO; i-- && 446 bus_space_read_1(sc->iot, sc->aud_ioh, ICH_CAS) & 1; DELAY(1)); 447 448 if (i > 0) { 449 bus_space_write_2(sc->iot, sc->mix_ioh, reg, val); 450 return 0; 451 } else { 452 DPRINTF(ICH_DEBUG_CODECIO, 453 ("%s: write_codec timeout\n", sc->sc_dev.dv_xname)); 454 return -1; 455 } 456 } 457 458 int 459 auich_attach_codec(void *v, struct ac97_codec_if *cif) 460 { 461 struct auich_softc *sc = v; 462 463 sc->codec_if = cif; 464 return 0; 465 } 466 467 void 468 auich_reset_codec(void *v) 469 { 470 struct auich_softc *sc = v; 471 472 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_GCTRL, 0); 473 DELAY(10); 474 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_GCTRL, ICH_CRESET); 475 } 476 477 int 478 auich_open(void *v, int flags) 479 { 480 481 return 0; 482 } 483 484 void 485 auich_close(void *v) 486 { 487 struct auich_softc *sc = v; 488 489 auich_halt_output(sc); 490 auich_halt_input(sc); 491 492 sc->sc_pintr = NULL; 493 sc->sc_rintr = NULL; 494 } 495 496 int 497 auich_query_encoding(void *v, struct audio_encoding *aep) 498 { 499 500 #if 0 /* XXX Not until we emulate it. */ 501 switch (aep->index) { 502 case 0: 503 strcpy(aep->name, AudioEulinear); 504 aep->encoding = AUDIO_ENCODING_ULINEAR; 505 aep->precision = 8; 506 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 507 return (0); 508 #else 509 switch (aep->index + 1) { 510 #endif 511 case 1: 512 strcpy(aep->name, AudioEmulaw); 513 aep->encoding = AUDIO_ENCODING_ULAW; 514 aep->precision = 8; 515 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 516 return (0); 517 case 2: 518 strcpy(aep->name, AudioEalaw); 519 aep->encoding = AUDIO_ENCODING_ALAW; 520 aep->precision = 8; 521 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 522 return (0); 523 case 3: 524 strcpy(aep->name, AudioEslinear); 525 aep->encoding = AUDIO_ENCODING_SLINEAR; 526 aep->precision = 8; 527 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 528 return (0); 529 case 4: 530 strcpy(aep->name, AudioEslinear_le); 531 aep->encoding = AUDIO_ENCODING_SLINEAR_LE; 532 aep->precision = 16; 533 aep->flags = 0; 534 return (0); 535 case 5: 536 strcpy(aep->name, AudioEulinear_le); 537 aep->encoding = AUDIO_ENCODING_ULINEAR_LE; 538 aep->precision = 16; 539 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 540 return (0); 541 case 6: 542 strcpy(aep->name, AudioEslinear_be); 543 aep->encoding = AUDIO_ENCODING_SLINEAR_BE; 544 aep->precision = 16; 545 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 546 return (0); 547 case 7: 548 strcpy(aep->name, AudioEulinear_be); 549 aep->encoding = AUDIO_ENCODING_ULINEAR_BE; 550 aep->precision = 16; 551 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 552 return (0); 553 default: 554 return (EINVAL); 555 } 556 } 557 558 int 559 auich_set_params(void *v, int setmode, int usemode, struct audio_params *play, 560 struct audio_params *rec) 561 { 562 struct auich_softc *sc = v; 563 struct audio_params *p; 564 int mode; 565 u_int16_t val, rate, inout; 566 567 for (mode = AUMODE_RECORD; mode != -1; 568 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 569 if ((setmode & mode) == 0) 570 continue; 571 572 p = mode == AUMODE_PLAY ? play : rec; 573 if (p == NULL) 574 continue; 575 576 inout = mode == AUMODE_PLAY ? ICH_PM_PCMO : ICH_PM_PCMI; 577 578 if ((p->sample_rate != 8000) && 579 (p->sample_rate != 11025) && 580 (p->sample_rate != 16000) && 581 (p->sample_rate != 22050) && 582 (p->sample_rate != 32000) && 583 (p->sample_rate != 44100) && 584 (p->sample_rate != 48000)) 585 return (EINVAL); 586 587 p->factor = 1; 588 p->sw_code = NULL; 589 switch (p->encoding) { 590 case AUDIO_ENCODING_SLINEAR_BE: 591 if (p->precision == 16) 592 p->sw_code = swap_bytes; 593 else { 594 if (mode == AUMODE_PLAY) 595 p->sw_code = linear8_to_linear16_le; 596 else 597 p->sw_code = linear16_to_linear8_le; 598 } 599 break; 600 601 case AUDIO_ENCODING_SLINEAR_LE: 602 if (p->precision != 16) { 603 if (mode == AUMODE_PLAY) 604 p->sw_code = linear8_to_linear16_le; 605 else 606 p->sw_code = linear16_to_linear8_le; 607 } 608 break; 609 610 case AUDIO_ENCODING_ULINEAR_BE: 611 if (p->precision == 16) { 612 if (mode == AUMODE_PLAY) 613 p->sw_code = 614 swap_bytes_change_sign16_le; 615 else 616 p->sw_code = 617 change_sign16_swap_bytes_le; 618 } else { 619 /* 620 * XXX ulinear8_to_slinear16_le 621 */ 622 return (EINVAL); 623 } 624 break; 625 626 case AUDIO_ENCODING_ULINEAR_LE: 627 if (p->precision == 16) 628 p->sw_code = change_sign16_le; 629 else { 630 /* 631 * XXX ulinear8_to_slinear16_le 632 */ 633 return (EINVAL); 634 } 635 break; 636 637 case AUDIO_ENCODING_ULAW: 638 if (mode == AUMODE_PLAY) { 639 p->factor = 2; 640 p->sw_code = mulaw_to_slinear16_le; 641 } else { 642 /* 643 * XXX slinear16_le_to_mulaw 644 */ 645 return (EINVAL); 646 } 647 break; 648 649 case AUDIO_ENCODING_ALAW: 650 if (mode == AUMODE_PLAY) { 651 p->factor = 2; 652 p->sw_code = alaw_to_slinear16_le; 653 } else { 654 /* 655 * XXX slinear16_le_to_alaw 656 */ 657 return (EINVAL); 658 } 659 break; 660 661 default: 662 return (EINVAL); 663 } 664 665 auich_read_codec(sc, AC97_REG_POWER, &val); 666 auich_write_codec(sc, AC97_REG_POWER, val | inout); 667 668 auich_write_codec(sc, AC97_REG_PCM_FRONT_DAC_RATE, 669 sc->sc_fixed_rate ? sc->sc_fixed_rate : p->sample_rate); 670 auich_read_codec(sc, AC97_REG_PCM_FRONT_DAC_RATE, &rate); 671 p->sample_rate = rate; 672 673 auich_write_codec(sc, AC97_REG_POWER, val); 674 } 675 676 return (0); 677 } 678 679 int 680 auich_round_blocksize(void *v, int blk) 681 { 682 683 return (blk & ~0x3f); /* keep good alignment */ 684 } 685 686 int 687 auich_halt_output(void *v) 688 { 689 struct auich_softc *sc = v; 690 691 DPRINTF(ICH_DEBUG_DMA, ("%s: halt_output\n", sc->sc_dev.dv_xname)); 692 693 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_CTRL, ICH_RR); 694 695 return (0); 696 } 697 698 int 699 auich_halt_input(void *v) 700 { 701 struct auich_softc *sc = v; 702 703 DPRINTF(ICH_DEBUG_DMA, 704 ("%s: halt_input\n", sc->sc_dev.dv_xname)); 705 706 /* XXX halt both unless known otherwise */ 707 708 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, ICH_RR); 709 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_MICI + ICH_CTRL, ICH_RR); 710 711 return (0); 712 } 713 714 int 715 auich_getdev(void *v, struct audio_device *adp) 716 { 717 struct auich_softc *sc = v; 718 719 *adp = sc->sc_audev; 720 return (0); 721 } 722 723 int 724 auich_set_port(void *v, mixer_ctrl_t *cp) 725 { 726 struct auich_softc *sc = v; 727 728 return (sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp)); 729 } 730 731 int 732 auich_get_port(void *v, mixer_ctrl_t *cp) 733 { 734 struct auich_softc *sc = v; 735 736 return (sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp)); 737 } 738 739 int 740 auich_query_devinfo(void *v, mixer_devinfo_t *dp) 741 { 742 struct auich_softc *sc = v; 743 744 return (sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp)); 745 } 746 747 void * 748 auich_allocm(void *v, int direction, size_t size, int pool, int flags) 749 { 750 struct auich_softc *sc = v; 751 struct auich_dma *p; 752 int error; 753 754 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX)) 755 return (NULL); 756 757 p = malloc(sizeof(*p), pool, flags|M_ZERO); 758 if (p == NULL) 759 return (NULL); 760 761 error = auich_allocmem(sc, size, 0, p); 762 if (error) { 763 free(p, pool); 764 return (NULL); 765 } 766 767 p->next = sc->sc_dmas; 768 sc->sc_dmas = p; 769 770 return (KERNADDR(p)); 771 } 772 773 void 774 auich_freem(void *v, void *ptr, int pool) 775 { 776 struct auich_softc *sc = v; 777 struct auich_dma *p, **pp; 778 779 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 780 if (KERNADDR(p) == ptr) { 781 auich_freemem(sc, p); 782 *pp = p->next; 783 free(p, pool); 784 return; 785 } 786 } 787 } 788 789 size_t 790 auich_round_buffersize(void *v, int direction, size_t size) 791 { 792 793 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX)) 794 size = ICH_DMALIST_MAX * ICH_DMASEG_MAX; 795 796 return size; 797 } 798 799 paddr_t 800 auich_mappage(void *v, void *mem, off_t off, int prot) 801 { 802 struct auich_softc *sc = v; 803 struct auich_dma *p; 804 805 if (off < 0) 806 return (-1); 807 808 for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next) 809 ; 810 if (!p) 811 return (-1); 812 return (bus_dmamem_mmap(sc->dmat, p->segs, p->nsegs, 813 off, prot, BUS_DMA_WAITOK)); 814 } 815 816 int 817 auich_get_props(void *v) 818 { 819 820 return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | 821 AUDIO_PROP_FULLDUPLEX); 822 } 823 824 int 825 auich_intr(void *v) 826 { 827 struct auich_softc *sc = v; 828 int ret = 0, sts, gsts, i, qptr; 829 830 gsts = bus_space_read_2(sc->iot, sc->aud_ioh, ICH_GSTS); 831 DPRINTF(ICH_DEBUG_DMA, ("auich_intr: gsts=0x%x\n", gsts)); 832 833 if (gsts & ICH_POINT) { 834 sts = bus_space_read_2(sc->iot, sc->aud_ioh, ICH_PCMO+ICH_STS); 835 DPRINTF(ICH_DEBUG_DMA, 836 ("auich_intr: osts=0x%x\n", sts)); 837 838 if (sts & ICH_FIFOE) { 839 printf("%s: fifo underrun # %u\n", 840 sc->sc_dev.dv_xname, ++sc->pcmo_fifoe); 841 } 842 843 i = bus_space_read_1(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_CIV); 844 if (sts & (ICH_LVBCI | ICH_CELV)) { 845 struct auich_dmalist *q; 846 847 qptr = sc->ptr_pcmo; 848 849 while (qptr != i) { 850 q = &sc->dmalist_pcmo[qptr]; 851 852 q->base = sc->pcmo_p; 853 q->len = (sc->pcmo_blksize / 2) | ICH_DMAF_IOC; 854 DPRINTF(ICH_DEBUG_DMA, 855 ("auich_intr: %p, %p = %x @ 0x%x\n", 856 &sc->dmalist_pcmo[i], q, 857 sc->pcmo_blksize / 2, sc->pcmo_p)); 858 859 sc->pcmo_p += sc->pcmo_blksize; 860 if (sc->pcmo_p >= sc->pcmo_end) 861 sc->pcmo_p = sc->pcmo_start; 862 863 if (++qptr == ICH_DMALIST_MAX) 864 qptr = 0; 865 } 866 867 sc->ptr_pcmo = qptr; 868 bus_space_write_1(sc->iot, sc->aud_ioh, 869 ICH_PCMO + ICH_LVI, 870 (sc->ptr_pcmo - 1) & ICH_LVI_MASK); 871 } 872 873 if (sts & ICH_BCIS && sc->sc_pintr) 874 sc->sc_pintr(sc->sc_parg); 875 876 /* int ack */ 877 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_STS, 878 sts & (ICH_LVBCI | ICH_CELV | ICH_BCIS | ICH_FIFOE)); 879 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_GSTS, ICH_POINT); 880 ret++; 881 } 882 883 if (gsts & ICH_PIINT) { 884 sts = bus_space_read_2(sc->iot, sc->aud_ioh, ICH_PCMI+ICH_STS); 885 DPRINTF(ICH_DEBUG_DMA, 886 ("auich_intr: ists=0x%x\n", sts)); 887 888 if (sts & ICH_FIFOE) { 889 printf("%s: fifo overrun # %u\n", 890 sc->sc_dev.dv_xname, ++sc->pcmi_fifoe); 891 } 892 893 i = bus_space_read_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CIV); 894 if (sts & (ICH_LVBCI | ICH_CELV)) { 895 struct auich_dmalist *q; 896 897 qptr = sc->ptr_pcmi; 898 899 while (qptr != i) { 900 q = &sc->dmalist_pcmi[qptr]; 901 902 q->base = sc->pcmi_p; 903 q->len = (sc->pcmi_blksize / 2) | ICH_DMAF_IOC; 904 DPRINTF(ICH_DEBUG_DMA, 905 ("auich_intr: %p, %p = %x @ 0x%x\n", 906 &sc->dmalist_pcmi[i], q, 907 sc->pcmi_blksize / 2, sc->pcmi_p)); 908 909 sc->pcmi_p += sc->pcmi_blksize; 910 if (sc->pcmi_p >= sc->pcmi_end) 911 sc->pcmi_p = sc->pcmi_start; 912 913 if (++qptr == ICH_DMALIST_MAX) 914 qptr = 0; 915 } 916 917 sc->ptr_pcmi = qptr; 918 bus_space_write_1(sc->iot, sc->aud_ioh, 919 ICH_PCMI + ICH_LVI, 920 (sc->ptr_pcmi - 1) & ICH_LVI_MASK); 921 } 922 923 if (sts & ICH_BCIS && sc->sc_rintr) 924 sc->sc_rintr(sc->sc_rarg); 925 926 /* int ack */ 927 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_STS, 928 sts & (ICH_LVBCI | ICH_CELV | ICH_BCIS | ICH_FIFOE)); 929 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_GSTS, ICH_POINT); 930 ret++; 931 } 932 933 if (gsts & ICH_MIINT) { 934 sts = bus_space_read_2(sc->iot, sc->aud_ioh, ICH_MICI+ICH_STS); 935 DPRINTF(ICH_DEBUG_DMA, 936 ("auich_intr: ists=0x%x\n", sts)); 937 if (sts & ICH_FIFOE) 938 printf("%s: fifo overrun\n", sc->sc_dev.dv_xname); 939 940 /* TODO mic input dma */ 941 942 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_GSTS, ICH_MIINT); 943 } 944 945 return ret; 946 } 947 948 int 949 auich_trigger_output(void *v, void *start, void *end, int blksize, 950 void (*intr)(void *), void *arg, struct audio_params *param) 951 { 952 struct auich_softc *sc = v; 953 struct auich_dmalist *q; 954 struct auich_dma *p; 955 size_t size; 956 957 DPRINTF(ICH_DEBUG_DMA, 958 ("auich_trigger_output(%p, %p, %d, %p, %p, %p)\n", 959 start, end, blksize, intr, arg, param)); 960 961 sc->sc_pintr = intr; 962 sc->sc_parg = arg; 963 964 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 965 ; 966 if (!p) { 967 printf("auich_trigger_output: bad addr %p\n", start); 968 return (EINVAL); 969 } 970 971 size = (size_t)((caddr_t)end - (caddr_t)start); 972 973 /* 974 * The logic behind this is: 975 * setup one buffer to play, then LVI dump out the rest 976 * to the scatter-gather chain. 977 */ 978 sc->pcmo_start = DMAADDR(p); 979 sc->pcmo_p = sc->pcmo_start + blksize; 980 sc->pcmo_end = sc->pcmo_start + size; 981 sc->pcmo_blksize = blksize; 982 983 sc->ptr_pcmo = 0; 984 q = &sc->dmalist_pcmo[sc->ptr_pcmo]; 985 q->base = sc->pcmo_start; 986 q->len = (blksize / 2) | ICH_DMAF_IOC; 987 if (++sc->ptr_pcmo == ICH_DMALIST_MAX) 988 sc->ptr_pcmo = 0; 989 990 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_BDBAR, 991 sc->sc_cddma + ICH_PCMO_OFF(0)); 992 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_CTRL, 993 ICH_IOCE | ICH_FEIE | ICH_LVBIE | ICH_RPBM); 994 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_LVI, 995 (sc->ptr_pcmo - 1) & ICH_LVI_MASK); 996 997 return (0); 998 } 999 1000 int 1001 auich_trigger_input(v, start, end, blksize, intr, arg, param) 1002 void *v; 1003 void *start, *end; 1004 int blksize; 1005 void (*intr)(void *); 1006 void *arg; 1007 struct audio_params *param; 1008 { 1009 struct auich_softc *sc = v; 1010 struct auich_dmalist *q; 1011 struct auich_dma *p; 1012 size_t size; 1013 1014 DPRINTF(ICH_DEBUG_DMA, 1015 ("auich_trigger_input(%p, %p, %d, %p, %p, %p)\n", 1016 start, end, blksize, intr, arg, param)); 1017 1018 sc->sc_rintr = intr; 1019 sc->sc_rarg = arg; 1020 1021 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1022 ; 1023 if (!p) { 1024 printf("auich_trigger_input: bad addr %p\n", start); 1025 return (EINVAL); 1026 } 1027 1028 size = (size_t)((caddr_t)end - (caddr_t)start); 1029 1030 /* 1031 * The logic behind this is: 1032 * setup one buffer to play, then LVI dump out the rest 1033 * to the scatter-gather chain. 1034 */ 1035 sc->pcmi_start = DMAADDR(p); 1036 sc->pcmi_p = sc->pcmi_start + blksize; 1037 sc->pcmi_end = sc->pcmi_start + size; 1038 sc->pcmi_blksize = blksize; 1039 1040 sc->ptr_pcmi = 0; 1041 q = &sc->dmalist_pcmi[sc->ptr_pcmi]; 1042 q->base = sc->pcmi_start; 1043 q->len = (blksize / 2) | ICH_DMAF_IOC; 1044 if (++sc->ptr_pcmi == ICH_DMALIST_MAX) 1045 sc->ptr_pcmi = 0; 1046 1047 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_BDBAR, 1048 sc->sc_cddma + ICH_PCMI_OFF(0)); 1049 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, 1050 ICH_IOCE | ICH_FEIE | ICH_LVBIE | ICH_RPBM); 1051 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_LVI, 1052 (sc->ptr_pcmi - 1) & ICH_LVI_MASK); 1053 1054 return (0); 1055 } 1056 1057 int 1058 auich_allocmem(struct auich_softc *sc, size_t size, size_t align, 1059 struct auich_dma *p) 1060 { 1061 int error; 1062 1063 p->size = size; 1064 error = bus_dmamem_alloc(sc->dmat, p->size, align, 0, 1065 p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 1066 &p->nsegs, BUS_DMA_NOWAIT); 1067 if (error) 1068 return (error); 1069 1070 error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size, 1071 &p->addr, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 1072 if (error) 1073 goto free; 1074 1075 error = bus_dmamap_create(sc->dmat, p->size, 1, p->size, 1076 0, BUS_DMA_NOWAIT, &p->map); 1077 if (error) 1078 goto unmap; 1079 1080 error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL, 1081 BUS_DMA_NOWAIT); 1082 if (error) 1083 goto destroy; 1084 return (0); 1085 1086 destroy: 1087 bus_dmamap_destroy(sc->dmat, p->map); 1088 unmap: 1089 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1090 free: 1091 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1092 return (error); 1093 } 1094 1095 int 1096 auich_freemem(struct auich_softc *sc, struct auich_dma *p) 1097 { 1098 1099 bus_dmamap_unload(sc->dmat, p->map); 1100 bus_dmamap_destroy(sc->dmat, p->map); 1101 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1102 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1103 return (0); 1104 } 1105 1106 int 1107 auich_alloc_cdata(struct auich_softc *sc) 1108 { 1109 bus_dma_segment_t seg; 1110 int error, rseg; 1111 1112 /* 1113 * Allocate the control data structure, and create and load the 1114 * DMA map for it. 1115 */ 1116 if ((error = bus_dmamem_alloc(sc->dmat, 1117 sizeof(struct auich_cdata), 1118 PAGE_SIZE, 0, &seg, 1, &rseg, 0)) != 0) { 1119 printf("%s: unable to allocate control data, error = %d\n", 1120 sc->sc_dev.dv_xname, error); 1121 goto fail_0; 1122 } 1123 1124 if ((error = bus_dmamem_map(sc->dmat, &seg, rseg, 1125 sizeof(struct auich_cdata), 1126 (caddr_t *) &sc->sc_cdata, 1127 BUS_DMA_COHERENT)) != 0) { 1128 printf("%s: unable to map control data, error = %d\n", 1129 sc->sc_dev.dv_xname, error); 1130 goto fail_1; 1131 } 1132 1133 if ((error = bus_dmamap_create(sc->dmat, sizeof(struct auich_cdata), 1, 1134 sizeof(struct auich_cdata), 0, 0, 1135 &sc->sc_cddmamap)) != 0) { 1136 printf("%s: unable to create control data DMA map, " 1137 "error = %d\n", sc->sc_dev.dv_xname, error); 1138 goto fail_2; 1139 } 1140 1141 if ((error = bus_dmamap_load(sc->dmat, sc->sc_cddmamap, 1142 sc->sc_cdata, sizeof(struct auich_cdata), 1143 NULL, 0)) != 0) { 1144 printf("%s: unable tp load control data DMA map, " 1145 "error = %d\n", sc->sc_dev.dv_xname, error); 1146 goto fail_3; 1147 } 1148 1149 return (0); 1150 1151 fail_3: 1152 bus_dmamap_destroy(sc->dmat, sc->sc_cddmamap); 1153 fail_2: 1154 bus_dmamem_unmap(sc->dmat, (caddr_t) sc->sc_cdata, 1155 sizeof(struct auich_cdata)); 1156 fail_1: 1157 bus_dmamem_free(sc->dmat, &seg, rseg); 1158 fail_0: 1159 return (error); 1160 } 1161 1162 void 1163 auich_powerhook(int why, void *addr) 1164 { 1165 struct auich_softc *sc = (struct auich_softc *)addr; 1166 1167 switch (why) { 1168 case PWR_SUSPEND: 1169 case PWR_STANDBY: 1170 /* Power down */ 1171 DPRINTF(1, ("%s: power down\n", sc->sc_dev.dv_xname)); 1172 sc->sc_suspend = why; 1173 auich_read_codec(sc, AC97_REG_EXTENDED_STATUS, &sc->ext_status); 1174 break; 1175 1176 case PWR_RESUME: 1177 /* Wake up */ 1178 DPRINTF(1, ("%s: power resume\n", sc->sc_dev.dv_xname)); 1179 if (sc->sc_suspend == PWR_RESUME) { 1180 printf("%s: resume without suspend.\n", 1181 sc->sc_dev.dv_xname); 1182 sc->sc_suspend = why; 1183 return; 1184 } 1185 sc->sc_suspend = why; 1186 auich_reset_codec(sc); 1187 DELAY(1000); 1188 (sc->codec_if->vtbl->restore_ports)(sc->codec_if); 1189 auich_write_codec(sc, AC97_REG_EXTENDED_STATUS, sc->ext_status); 1190 break; 1191 1192 case PWR_SOFTSUSPEND: 1193 case PWR_SOFTSTANDBY: 1194 case PWR_SOFTRESUME: 1195 break; 1196 } 1197 } 1198
Indexes created Thu Oct 23 22:10:10 GMT 2025