auichreg.h revision 1.2.2.2
1 1.2.2.2 bouyer /* $NetBSD: auichreg.h,v 1.2.2.2 2000/12/08 09:12:30 bouyer Exp $ */ 2 1.2.2.2 bouyer 3 1.2.2.2 bouyer /* 4 1.2.2.2 bouyer * Copyright (c) 2000 Michael Shalayeff 5 1.2.2.2 bouyer * All rights reserved. 6 1.2.2.2 bouyer * 7 1.2.2.2 bouyer * Redistribution and use in source and binary forms, with or without 8 1.2.2.2 bouyer * modification, are permitted provided that the following conditions 9 1.2.2.2 bouyer * are met: 10 1.2.2.2 bouyer * 1. Redistributions of source code must retain the above copyright 11 1.2.2.2 bouyer * notice, this list of conditions and the following disclaimer. 12 1.2.2.2 bouyer * 2. Redistributions in binary form must reproduce the above copyright 13 1.2.2.2 bouyer * notice, this list of conditions and the following disclaimer in the 14 1.2.2.2 bouyer * documentation and/or other materials provided with the distribution. 15 1.2.2.2 bouyer * 3. The name of the author may not be used to endorse or promote products 16 1.2.2.2 bouyer * derived from this software without specific prior written permission. 17 1.2.2.2 bouyer * 18 1.2.2.2 bouyer * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 1.2.2.2 bouyer * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 1.2.2.2 bouyer * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 1.2.2.2 bouyer * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 22 1.2.2.2 bouyer * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 1.2.2.2 bouyer * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 24 1.2.2.2 bouyer * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 1.2.2.2 bouyer * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 26 1.2.2.2 bouyer * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 27 1.2.2.2 bouyer * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28 1.2.2.2 bouyer * THE POSSIBILITY OF SUCH DAMAGE. 29 1.2.2.2 bouyer * 30 1.2.2.2 bouyer * from OpenBSD: ich.c,v 1.3 2000/08/11 06:17:18 mickey Exp 31 1.2.2.2 bouyer */ 32 1.2.2.2 bouyer 33 1.2.2.2 bouyer #ifndef _DEV_PCI_AUICHREG_H_ 34 1.2.2.2 bouyer #define _DEV_PCI_AUICHREG_H_ 35 1.2.2.2 bouyer 36 1.2.2.2 bouyer /* 37 1.2.2.2 bouyer * AC'97 audio found on Intel 810/820/440MX chipsets. 38 1.2.2.2 bouyer * http://developer.intel.com/design/chipsets/datashts/290655.htm 39 1.2.2.2 bouyer * http://developer.intel.com/design/chipsets/manuals/298028.htm 40 1.2.2.2 bouyer */ 41 1.2.2.2 bouyer 42 1.2.2.2 bouyer /* 12.1.10 NAMBAR - native audio mixer base address register */ 43 1.2.2.2 bouyer #define ICH_NAMBAR 0x10 44 1.2.2.2 bouyer /* 12.1.11 NABMBAR - native audio bus mastering base address register */ 45 1.2.2.2 bouyer #define ICH_NABMBAR 0x14 46 1.2.2.2 bouyer 47 1.2.2.2 bouyer /* table 12-3. native audio bus master control registers */ 48 1.2.2.2 bouyer #define ICH_BDBAR 0x00 /* 8-byte aligned address */ 49 1.2.2.2 bouyer #define ICH_CIV 0x04 /* 5 bits current index value */ 50 1.2.2.2 bouyer #define ICH_LVI 0x05 /* 5 bits last valid index value */ 51 1.2.2.2 bouyer #define ICH_LVI_MASK 0x1f 52 1.2.2.2 bouyer #define ICH_STS 0x06 /* 16 bits status */ 53 1.2.2.2 bouyer #define ICH_FIFOE 0x10 /* fifo error */ 54 1.2.2.2 bouyer #define ICH_BCIS 0x08 /* r- buf cmplt int sts; wr ack */ 55 1.2.2.2 bouyer #define ICH_LVBCI 0x04 /* r- last valid bci, wr ack */ 56 1.2.2.2 bouyer #define ICH_CELV 0x02 /* current equals last valid */ 57 1.2.2.2 bouyer #define ICH_DCH 0x01 /* dma halted */ 58 1.2.2.2 bouyer #define ICH_ISTS_BITS "\020\01dch\02celv\03lvbci\04bcis\05fifoe" 59 1.2.2.2 bouyer #define ICH_PICB 0x08 /* 16 bits */ 60 1.2.2.2 bouyer #define ICH_PIV 0x0a /* 5 bits prefetched index value */ 61 1.2.2.2 bouyer #define ICH_CTRL 0x0b /* control */ 62 1.2.2.2 bouyer #define ICH_IOCE 0x10 /* int on completion enable */ 63 1.2.2.2 bouyer #define ICH_FEIE 0x08 /* fifo error int enable */ 64 1.2.2.2 bouyer #define ICH_LVBIE 0x04 /* last valid buf int enable */ 65 1.2.2.2 bouyer #define ICH_RR 0x02 /* 1 - reset regs */ 66 1.2.2.2 bouyer #define ICH_RPBM 0x01 /* 1 - run, 0 - pause */ 67 1.2.2.2 bouyer 68 1.2.2.2 bouyer #define ICH_PCMI 0x00 69 1.2.2.2 bouyer #define ICH_PCMO 0x10 70 1.2.2.2 bouyer #define ICH_MICI 0x20 71 1.2.2.2 bouyer 72 1.2.2.2 bouyer #define ICH_GCTRL 0x2c 73 1.2.2.2 bouyer #define ICH_SRIE 0x20 /* int when 2ndary codec resume */ 74 1.2.2.2 bouyer #define ICH_PRIE 0x10 /* int when primary codec resume */ 75 1.2.2.2 bouyer #define ICH_ACLSO 0x08 /* aclink shut off */ 76 1.2.2.2 bouyer #define ICH_WRESET 0x04 /* warm reset */ 77 1.2.2.2 bouyer #define ICH_CRESET 0x02 /* cold reset */ 78 1.2.2.2 bouyer #define ICH_GIE 0x01 /* gpi int enable */ 79 1.2.2.2 bouyer #define ICH_GSTS 0x30 80 1.2.2.2 bouyer #define ICH_MD3 0x20000 /* pwr-dn semaphore for modem */ 81 1.2.2.2 bouyer #define ICH_AD3 0x10000 /* pwr-dn semaphore for audio */ 82 1.2.2.2 bouyer #define ICH_RCS 0x08000 /* read completion status */ 83 1.2.2.2 bouyer #define ICH_B3S12 0x04000 /* bit 3 of slot 12 */ 84 1.2.2.2 bouyer #define ICH_B2S12 0x02000 /* bit 2 of slot 12 */ 85 1.2.2.2 bouyer #define ICH_B1S12 0x01000 /* bit 1 of slot 12 */ 86 1.2.2.2 bouyer #define ICH_SRI 0x00800 /* secondary resume int */ 87 1.2.2.2 bouyer #define ICH_PRI 0x00400 /* primary resume int */ 88 1.2.2.2 bouyer #define ICH_SCR 0x00200 /* secondary codec ready */ 89 1.2.2.2 bouyer #define ICH_PCR 0x00100 /* primary codec ready */ 90 1.2.2.2 bouyer #define ICH_MINT 0x00080 /* mic in int */ 91 1.2.2.2 bouyer #define ICH_POINT 0x00040 /* pcm out int */ 92 1.2.2.2 bouyer #define ICH_PIINT 0x00020 /* pcm in int */ 93 1.2.2.2 bouyer #define ICH_MOINT 0x00004 /* modem out int */ 94 1.2.2.2 bouyer #define ICH_MIINT 0x00002 /* modem in int */ 95 1.2.2.2 bouyer #define ICH_GSCI 0x00001 /* gpi status change */ 96 1.2.2.2 bouyer #define ICH_GSTS_BITS "\020\01gsci\02miict\03moint\06piint\07point\010mint\011pcr\012scr\013pri\014sri\015b1s12\016b2s12\017b3s12\020rcs\021ad3\022md3" 97 1.2.2.2 bouyer #define ICH_CAS 0x34 /* 1/8 bit */ 98 1.2.2.2 bouyer #define ICH_SEMATIMO 1000 /* us */ 99 1.2.2.2 bouyer 100 1.2.2.2 bouyer /* Bits in the AC97_REG_POWER register */ 101 1.2.2.2 bouyer #define ICH_PM_PCMI 0x100 102 1.2.2.2 bouyer #define ICH_PM_PCMO 0x200 103 1.2.2.2 bouyer #define ICH_PM_MICI 0x400 104 1.2.2.2 bouyer 105 1.2.2.2 bouyer /* 106 1.2.2.2 bouyer * according to the dev/audiovar.h AU_RING_SIZE is 2^16, what fits 107 1.2.2.2 bouyer * in our limits perfectly, i.e. setting it to higher value 108 1.2.2.2 bouyer * in your kernel config would improve perfomance, still 2^21 is the max 109 1.2.2.2 bouyer */ 110 1.2.2.2 bouyer #define ICH_DMALIST_MAX 32 111 1.2.2.2 bouyer #define ICH_DMASEG_MAX (65536*2) /* 64k samples, 2x16 bit samples */ 112 1.2.2.2 bouyer struct auich_dmalist { 113 1.2.2.2 bouyer u_int32_t base; 114 1.2.2.2 bouyer u_int32_t len; 115 1.2.2.2 bouyer #define ICH_DMAF_IOC 0x80000000 /* 1-int on complete */ 116 1.2.2.2 bouyer #define ICH_DMAF_BUP 0x40000000 /* 0-retrans last, 1-transmit 0 */ 117 1.2.2.2 bouyer }; 118 1.2.2.2 bouyer 119 1.2.2.2 bouyer #endif /* _DEV_PCI_AUICHREG_H_ */ 120
Indexes created Fri Oct 31 11:10:07 GMT 2025