autri.c revision 1.1
1 /* $NetBSD: autri.c,v 1.1 2001/11/18 03:16:02 someya Exp $ */ 2 3 /* 4 * Copyright (c) 2001 SOMEYA Yoshihiko and KUROSAWA Takahiro. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * Trident 4DWAVE-DX/NX, SiS 7018, ALi M5451 Sound Driver 30 * 31 * The register information is taken from the ALSA driver. 32 * 33 * Documentation links: 34 * - ftp://ftp.alsa-project.org/pub/manuals/trident/ 35 */ 36 37 #include "midi.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/fcntl.h> 43 #include <sys/malloc.h> 44 #include <sys/device.h> 45 #include <sys/proc.h> 46 47 #include <dev/pci/pcidevs.h> 48 #include <dev/pci/pcireg.h> 49 #include <dev/pci/pcivar.h> 50 51 #include <sys/audioio.h> 52 #include <dev/audio_if.h> 53 #include <dev/midi_if.h> 54 #include <dev/mulaw.h> 55 #include <dev/auconv.h> 56 #include <dev/ic/ac97reg.h> 57 #include <dev/ic/ac97var.h> 58 #include <dev/ic/mpuvar.h> 59 60 #include <machine/bus.h> 61 #include <machine/intr.h> 62 63 #include <dev/pci/autrireg.h> 64 #include <dev/pci/autrivar.h> 65 66 #ifdef AUDIO_DEBUG 67 # define DPRINTF(x) if (autridebug) printf x 68 # define DPRINTFN(n,x) if (autridebug > (n)) printf x 69 int autridebug = 0; 70 #else 71 # define DPRINTF(x) 72 # define DPRINTFN(n,x) 73 #endif 74 75 int autri_match __P((struct device *, struct cfdata *, void *)); 76 void autri_attach __P((struct device *, struct device *, void *)); 77 int autri_intr __P((void *)); 78 79 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 80 #define KERNADDR(p) ((void *)((p)->addr)) 81 82 int autri_allocmem __P((struct autri_softc *, size_t, 83 size_t, struct autri_dma *)); 84 int autri_freemem __P((struct autri_softc *, struct autri_dma *)); 85 86 #define TWRITE1(sc, r, x) bus_space_write_1((sc)->memt, (sc)->memh, (r), (x)) 87 #define TWRITE2(sc, r, x) bus_space_write_2((sc)->memt, (sc)->memh, (r), (x)) 88 #define TWRITE4(sc, r, x) bus_space_write_4((sc)->memt, (sc)->memh, (r), (x)) 89 #define TREAD1(sc, r) bus_space_read_1((sc)->memt, (sc)->memh, (r)) 90 #define TREAD2(sc, r) bus_space_read_2((sc)->memt, (sc)->memh, (r)) 91 #define TREAD4(sc, r) bus_space_read_4((sc)->memt, (sc)->memh, (r)) 92 93 static __inline void autri_reg_set_1 __P((struct autri_softc *, 94 int, uint8_t)); 95 static __inline void autri_reg_clear_1 __P((struct autri_softc *, 96 int, uint8_t)); 97 static __inline void autri_reg_set_4 __P((struct autri_softc *, 98 int, uint32_t)); 99 static __inline void autri_reg_clear_4 __P((struct autri_softc *, 100 int, uint32_t)); 101 102 int autri_attach_codec __P((void *sc, struct ac97_codec_if *)); 103 int autri_read_codec __P((void *sc, u_int8_t a, u_int16_t *d)); 104 int autri_write_codec __P((void *sc, u_int8_t a, u_int16_t d)); 105 void autri_reset_codec __P((void *sc)); 106 107 static void autri_powerhook(int why,void *addr); 108 static int autri_init __P((void *sc)); 109 static struct autri_dma *autri_find_dma __P((struct autri_softc *, void *)); 110 static void autri_setup_channel __P((struct autri_softc *sc,int mode, 111 struct audio_params *param)); 112 static void autri_enable_interrupt __P((struct autri_softc *sc, int ch)); 113 static void autri_disable_interrupt __P((struct autri_softc *sc, int ch)); 114 static void autri_startch __P((struct autri_softc *sc, int ch, int ch_intr)); 115 static void autri_stopch __P((struct autri_softc *sc, int ch, int ch_intr)); 116 static void autri_enable_loop_interrupt __P((void *sc)); 117 #if 0 118 static void autri_disable_loop_interrupt __P((void *sc)); 119 #endif 120 121 struct cfattach autri_ca = { 122 sizeof(struct autri_softc), autri_match, autri_attach 123 }; 124 125 int autri_open __P((void *, int)); 126 void autri_close __P((void *)); 127 int autri_query_encoding __P((void *, struct audio_encoding *)); 128 int autri_set_params __P((void *, int, int, 129 struct audio_params *, struct audio_params *)); 130 int autri_round_blocksize __P((void *, int)); 131 int autri_trigger_output __P((void *, void *, void *, int, void (*)(void *), 132 void *, struct audio_params *)); 133 int autri_trigger_input __P((void *, void *, void *, int, void (*)(void *), 134 void *, struct audio_params *)); 135 int autri_halt_output __P((void *)); 136 int autri_halt_input __P((void *)); 137 int autri_getdev __P((void *, struct audio_device *)); 138 int autri_mixer_set_port __P((void *, mixer_ctrl_t *)); 139 int autri_mixer_get_port __P((void *, mixer_ctrl_t *)); 140 void* autri_malloc __P((void *, int, size_t, int, int)); 141 void autri_free __P((void *, void *, int)); 142 size_t autri_round_buffersize __P((void *, int, size_t)); 143 paddr_t autri_mappage __P((void *, void *, off_t, int)); 144 int autri_get_props __P((void *)); 145 int autri_query_devinfo __P((void *addr, mixer_devinfo_t *dip)); 146 147 int autri_get_portnum_by_name __P((struct autri_softc *, char *, char *, 148 char *)); 149 150 static struct audio_hw_if autri_hw_if = { 151 autri_open, 152 autri_close, 153 NULL, /* drain */ 154 autri_query_encoding, 155 autri_set_params, 156 autri_round_blocksize, 157 NULL, /* commit_settings */ 158 NULL, /* init_output */ 159 NULL, /* init_input */ 160 NULL, /* start_output */ 161 NULL, /* start_input */ 162 autri_halt_output, 163 autri_halt_input, 164 NULL, /* speaker_ctl */ 165 autri_getdev, 166 NULL, /* setfd */ 167 autri_mixer_set_port, 168 autri_mixer_get_port, 169 autri_query_devinfo, 170 autri_malloc, 171 autri_free, 172 autri_round_buffersize, 173 autri_mappage, 174 autri_get_props, 175 autri_trigger_output, 176 autri_trigger_input, 177 NULL, /* dev_ioctl */ 178 }; 179 180 #if NMIDI > 0 181 void autri_midi_close(void *); 182 void autri_midi_getinfo(void *, struct midi_info *); 183 int autri_midi_open(void *, int, void (*)(void *, int), 184 void (*)(void *), void *); 185 int autri_midi_output(void *, int); 186 187 struct midi_hw_if autri_midi_hw_if = { 188 autri_midi_open, 189 autri_midi_close, 190 autri_midi_output, 191 autri_midi_getinfo, 192 NULL, /* ioctl */ 193 }; 194 #endif 195 196 /* 197 * register set/clear bit 198 */ 199 static __inline void 200 autri_reg_set_1(sc, no, mask) 201 struct autri_softc *sc; 202 int no; 203 uint8_t mask; 204 { 205 bus_space_write_1(sc->memt, sc->memh, no, 206 (bus_space_read_1(sc->memt, sc->memh, no) | mask)); 207 } 208 209 static __inline void 210 autri_reg_clear_1(sc, no, mask) 211 struct autri_softc *sc; 212 int no; 213 uint8_t mask; 214 { 215 bus_space_write_1(sc->memt, sc->memh, no, 216 (bus_space_read_1(sc->memt, sc->memh, no) & ~mask)); 217 } 218 219 static __inline void 220 autri_reg_set_4(sc, no, mask) 221 struct autri_softc *sc; 222 int no; 223 uint32_t mask; 224 { 225 bus_space_write_4(sc->memt, sc->memh, no, 226 (bus_space_read_4(sc->memt, sc->memh, no) | mask)); 227 } 228 229 static __inline void 230 autri_reg_clear_4(sc, no, mask) 231 struct autri_softc *sc; 232 int no; 233 uint32_t mask; 234 { 235 bus_space_write_4(sc->memt, sc->memh, no, 236 (bus_space_read_4(sc->memt, sc->memh, no) & ~mask)); 237 } 238 239 /* 240 * AC'97 codec 241 */ 242 int 243 autri_attach_codec(sc_, codec_if) 244 void *sc_; 245 struct ac97_codec_if *codec_if; 246 { 247 struct autri_codec_softc *sc = sc_; 248 249 DPRINTF(("autri_attach_codec()\n")); 250 251 sc->codec_if = codec_if; 252 return 0; 253 } 254 255 int 256 autri_read_codec(sc_, index, data) 257 void *sc_; 258 u_int8_t index; 259 u_int16_t *data; 260 { 261 struct autri_codec_softc *codec = sc_; 262 struct autri_softc *sc = codec->sc; 263 u_int32_t status, addr, cmd, busy; 264 u_int16_t count; 265 266 /*DPRINTF(("sc->sc->type : 0x%X",sc->sc->type));*/ 267 268 switch (sc->sc_devid) { 269 case AUTRI_DEVICE_ID_4DWAVE_DX: 270 addr = AUTRI_DX_ACR1; 271 cmd = AUTRI_DX_ACR1_CMD_READ; 272 busy = AUTRI_DX_ACR1_BUSY_READ; 273 break; 274 case AUTRI_DEVICE_ID_4DWAVE_NX: 275 addr = AUTRI_NX_ACR2; 276 cmd = AUTRI_NX_ACR2_CMD_READ; 277 busy = AUTRI_NX_ACR2_BUSY_READ | AUTRI_NX_ACR2_RECV_WAIT; 278 break; 279 case AUTRI_DEVICE_ID_SIS_7018: 280 addr = AUTRI_SIS_ACRD; 281 cmd = AUTRI_SIS_ACRD_CMD_READ; 282 busy = AUTRI_SIS_ACRD_BUSY_READ | AUTRI_SIS_ACRD_AUDIO_BUSY; 283 break; 284 case AUTRI_DEVICE_ID_ALI_M5451: 285 if (sc->sc_revision > 0x01) 286 addr = AUTRI_ALI_ACWR; 287 else 288 addr = AUTRI_ALI_ACRD; 289 cmd = AUTRI_ALI_ACRD_CMD_READ; 290 busy = AUTRI_ALI_ACRD_BUSY_READ; 291 break; 292 default: 293 printf("%s: autri_read_codec : unknown device\n", 294 sc->sc_dev.dv_xname); 295 return -1; 296 } 297 298 /* wait for 'Ready to Read' */ 299 for (count=0; count<0xffff; count++) { 300 if ((TREAD4(sc, addr) & busy) == 0) 301 break; 302 } 303 304 if (count == 0xffff) { 305 printf("%s: Codec timeout. Busy reading AC'97 codec.\n", 306 sc->sc_dev.dv_xname); 307 return -1; 308 } 309 310 /* send Read Command to AC'97 */ 311 TWRITE4(sc, addr, (index & 0x7f) | cmd); 312 313 /* wait for 'Returned data is avalable' */ 314 for (count=0; count<0xffff; count++) { 315 status = TREAD4(sc, addr); 316 if ((status & busy) == 0) 317 break; 318 } 319 320 if (count == 0xffff) { 321 printf("%s: Codec timeout. Busy reading AC'97 codec.\n", 322 sc->sc_dev.dv_xname); 323 return -1; 324 } 325 326 *data = (status >> 16) & 0x0000ffff; 327 /*DPRINTF(("autri_read_codec(0x%X) return 0x%X\n",reg,*data));*/ 328 return 0; 329 } 330 331 int 332 autri_write_codec(sc_, index, data) 333 void *sc_; 334 u_int8_t index; 335 u_int16_t data; 336 { 337 struct autri_codec_softc *codec = sc_; 338 struct autri_softc *sc = codec->sc; 339 u_int32_t addr, cmd, busy; 340 u_int16_t count; 341 342 /*DPRINTF(("autri_write_codec(0x%X,0x%X)\n",index,data));*/ 343 344 switch (sc->sc_devid) { 345 case AUTRI_DEVICE_ID_4DWAVE_DX: 346 addr = AUTRI_DX_ACR0; 347 cmd = AUTRI_DX_ACR0_CMD_WRITE; 348 busy = AUTRI_DX_ACR0_BUSY_WRITE; 349 break; 350 case AUTRI_DEVICE_ID_4DWAVE_NX: 351 addr = AUTRI_NX_ACR1; 352 cmd = AUTRI_NX_ACR1_CMD_WRITE; 353 busy = AUTRI_NX_ACR1_BUSY_WRITE; 354 break; 355 case AUTRI_DEVICE_ID_SIS_7018: 356 addr = AUTRI_SIS_ACWR; 357 cmd = AUTRI_SIS_ACWR_CMD_WRITE; 358 busy = AUTRI_SIS_ACWR_BUSY_WRITE | AUTRI_SIS_ACWR_AUDIO_BUSY; 359 break; 360 case AUTRI_DEVICE_ID_ALI_M5451: 361 addr = AUTRI_ALI_ACWR; 362 cmd = AUTRI_ALI_ACWR_CMD_WRITE; 363 if (sc->sc_revision > 0x01) 364 cmd |= 0x0100; 365 busy = AUTRI_ALI_ACWR_BUSY_WRITE; 366 break; 367 default: 368 printf("%s: autri_write_codec : unknown device.\n", 369 sc->sc_dev.dv_xname); 370 return -1; 371 } 372 373 /* wait for 'Ready to Write' */ 374 for (count=0; count<0xffff; count++) { 375 if ((TREAD4(sc, addr) & busy) == 0) 376 break; 377 } 378 379 if (count == 0xffff) { 380 printf("%s: Codec timeout. Busy writing AC'97 codec\n", 381 sc->sc_dev.dv_xname); 382 return -1; 383 } 384 385 /* send Write Command to AC'97 */ 386 TWRITE4(sc, addr, (data << 16) | (index & 0x7f) | cmd); 387 388 return 0; 389 } 390 391 void 392 autri_reset_codec(sc_) 393 void *sc_; 394 { 395 struct autri_codec_softc *codec = sc_; 396 struct autri_softc *sc = codec->sc; 397 u_int32_t reg, ready; 398 int addr, count = 200; 399 400 DPRINTF(("autri_reset_codec(codec=%p,sc=%p)\n",codec,sc)); 401 DPRINTF(("sc->sc_devid=%X\n",sc->sc_devid)); 402 403 switch (PCI_PRODUCT(sc->sc_devid)) { 404 case AUTRI_DEVICE_ID_4DWAVE_DX: 405 /* warm reset AC'97 codec */ 406 autri_reg_set_4(sc, AUTRI_DX_ACR2, 1); 407 delay(100); 408 /* release reset */ 409 autri_reg_clear_4(sc, AUTRI_DX_ACR2, 1); 410 delay(100); 411 412 addr = AUTRI_DX_ACR2; 413 ready = AUTRI_DX_ACR2_CODEC_READY; 414 break; 415 case AUTRI_DEVICE_ID_4DWAVE_NX: 416 /* warm reset AC'97 codec */ 417 autri_reg_set_4(sc, AUTRI_NX_ACR0, 1); 418 delay(100); 419 /* release reset */ 420 autri_reg_clear_4(sc, AUTRI_NX_ACR0, 1); 421 delay(100); 422 423 addr = AUTRI_NX_ACR0; 424 ready = AUTRI_NX_ACR0_CODEC_READY; 425 break; 426 case AUTRI_DEVICE_ID_SIS_7018: 427 /* warm reset AC'97 codec */ 428 autri_reg_set_4(sc, AUTRI_SIS_SCTRL, 1); 429 delay(100); 430 /* release reset (warm & cold) */ 431 autri_reg_clear_4(sc, AUTRI_SIS_SCTRL, 3); 432 delay(100); 433 434 addr = AUTRI_SIS_SCTRL; 435 ready = AUTRI_SIS_SCTRL_CODEC_READY; 436 break; 437 case AUTRI_DEVICE_ID_ALI_M5451: 438 /* warm reset AC'97 codec */ 439 autri_reg_set_4(sc, AUTRI_ALI_SCTRL, 1); 440 delay(100); 441 /* release reset (warm & cold) */ 442 autri_reg_clear_4(sc, AUTRI_ALI_SCTRL, 3); 443 delay(100); 444 445 addr = AUTRI_ALI_SCTRL; 446 ready = AUTRI_ALI_SCTRL_CODEC_READY; 447 break; 448 } 449 450 /* wait for 'Codec Ready' */ 451 while (count--) { 452 reg = TREAD4(sc, addr); 453 if (reg & ready) 454 break; 455 delay(1000); 456 } 457 458 if (count == 0) 459 printf("%s: Codec timeout. AC'97 is not ready for operation.\n", 460 sc->sc_dev.dv_xname); 461 } 462 463 /* 464 * 465 */ 466 467 int 468 autri_match(parent, match, aux) 469 struct device *parent; 470 struct cfdata *match; 471 void *aux; 472 { 473 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 474 475 switch (PCI_VENDOR(pa->pa_id)) { 476 case PCI_VENDOR_TRIDENT: 477 switch (PCI_PRODUCT(pa->pa_id)) { 478 case PCI_PRODUCT_TRIDENT_4DWAVE_DX: 479 case PCI_PRODUCT_TRIDENT_4DWAVE_NX: 480 return 1; 481 } 482 break; 483 case PCI_VENDOR_SIS: 484 switch (PCI_PRODUCT(pa->pa_id)) { 485 case PCI_PRODUCT_SIS_7018: 486 return 1; 487 } 488 break; 489 case PCI_VENDOR_ALI: 490 switch (PCI_PRODUCT(pa->pa_id)) { 491 case PCI_PRODUCT_ALI_M5451: 492 return 1; 493 } 494 break; 495 } 496 497 return 0; 498 } 499 500 void 501 autri_attach(parent, self, aux) 502 struct device *parent; 503 struct device *self; 504 void *aux; 505 { 506 struct autri_softc *sc = (struct autri_softc *)self; 507 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 508 pci_chipset_tag_t pc = pa->pa_pc; 509 struct autri_codec_softc *codec; 510 pci_intr_handle_t ih; 511 char const *intrstr; 512 char devinfo[256]; 513 mixer_ctrl_t ctl; 514 int i, r; 515 u_int32_t reg; 516 517 sc->sc_devid = pa->pa_id; 518 sc->sc_class = pa->pa_class; 519 520 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo); 521 sc->sc_revision = PCI_REVISION(pa->pa_class); 522 printf(": %s (rev. 0x%02x)\n", devinfo, sc->sc_revision); 523 524 /* map register to memory */ 525 if (pci_mapreg_map(pa, AUTRI_PCI_MEMORY_BASE, 526 PCI_MAPREG_TYPE_MEM, 0, &sc->memt, &sc->memh, NULL, NULL)) { 527 printf("%s: can't map memory space\n", sc->sc_dev.dv_xname); 528 return; 529 } 530 531 /* map and establish the interrupt */ 532 if (pci_intr_map(pa, &ih)) { 533 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 534 return; 535 } 536 intrstr = pci_intr_string(pc, ih); 537 sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, autri_intr, sc); 538 if (sc->sc_ih == NULL) { 539 printf("%s: couldn't establish interrupt", 540 sc->sc_dev.dv_xname); 541 if (intrstr != NULL) 542 printf(" at %s", intrstr); 543 printf("\n"); 544 return; 545 } 546 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 547 548 sc->sc_dmatag = pa->pa_dmat; 549 sc->sc_pc = pc; 550 sc->sc_pt = pa->pa_tag; 551 552 /* enable the device */ 553 reg = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 554 reg |= (PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE); 555 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg); 556 557 /* initialize the device */ 558 autri_init(sc); 559 560 /* attach AC'97 codec */ 561 codec = &sc->sc_codec; 562 memcpy(&codec->sc_dev, &sc->sc_dev, sizeof(codec->sc_dev)); 563 codec->sc = sc; 564 565 codec->host_if.arg = codec; 566 codec->host_if.attach = autri_attach_codec; 567 codec->host_if.reset = autri_reset_codec; 568 codec->host_if.read = autri_read_codec; 569 codec->host_if.write = autri_write_codec; 570 571 if ((r = ac97_attach(&codec->host_if)) != 0) { 572 printf("%s: can't attach codec (error 0x%X)\n", 573 sc->sc_dev.dv_xname, r); 574 return; 575 } 576 577 /* disable mutes */ 578 for (i = 0; i < 4; i++) { 579 static struct { 580 char *class, *device; 581 } d[] = { 582 { AudioCoutputs, AudioNmaster}, 583 { AudioCinputs, AudioNdac}, 584 { AudioCinputs, AudioNcd}, 585 { AudioCrecord, AudioNvolume}, 586 }; 587 588 ctl.type = AUDIO_MIXER_ENUM; 589 ctl.un.ord = 0; 590 591 #if 0 592 ctl.dev = sc->sc_codec.codec_if->vtbl->get_portnum_by_name(sc->sc_codec.codec_if, 593 d[i].class, d[i].device, AudioNmute); 594 #endif 595 ctl.dev = autri_get_portnum_by_name(sc,d[i].class, 596 d[i].device, AudioNmute); 597 autri_mixer_set_port(sc, &ctl); 598 } 599 600 /* set a reasonable default volume */ 601 ctl.type = AUDIO_MIXER_VALUE; 602 ctl.un.value.num_channels = 2; 603 ctl.un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 604 ctl.un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 127; 605 606 ctl.dev = autri_get_portnum_by_name(sc,AudioCoutputs,AudioNmaster,NULL); 607 autri_mixer_set_port(sc, &ctl); 608 609 audio_attach_mi(&autri_hw_if, sc, &sc->sc_dev); 610 611 #if NMIDI > 0 612 midi_attach_mi(&autri_midi_hw_if, sc, &sc->sc_dev); 613 #endif 614 615 powerhook_establish(autri_powerhook, sc); 616 } 617 618 static void 619 autri_powerhook(int why,void *addr) 620 { 621 static int old = PWR_RESUME; 622 struct autri_softc *sc = addr; 623 624 if (why == PWR_RESUME && old == PWR_SUSPEND) { 625 DPRINTF(("PWR_RESUME\n")); 626 autri_init(sc); 627 /*autri_reset_codec(&sc->sc_codec);*/ 628 (sc->sc_codec.codec_if->vtbl->restore_ports)(sc->sc_codec.codec_if); 629 } 630 old = why; 631 } 632 633 int 634 autri_init(sc_) 635 void *sc_; 636 { 637 struct autri_softc *sc = sc_; 638 u_int32_t reg; 639 640 pci_chipset_tag_t pc = sc->sc_pc; 641 pcitag_t pt = sc->sc_pt; 642 643 DPRINTF(("in autri_init()\n")); 644 DPRINTFN(5,("pci_conf_read(0x40) : 0x%X\n",pci_conf_read(pc,pt,0x40))); 645 DPRINTFN(5,("pci_conf_read(0x44) : 0x%X\n",pci_conf_read(pc,pt,0x44))); 646 647 switch (sc->sc_devid) { 648 case AUTRI_DEVICE_ID_4DWAVE_DX: 649 /* disable Legacy Control */ 650 pci_conf_write(pc, pt, AUTRI_PCI_DDMA_CFG,0); 651 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 652 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & 0xffff0000); 653 delay(100); 654 /* audio engine reset */ 655 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 656 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg | 0x00040000); 657 delay(100); 658 /* release reset */ 659 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 660 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & ~0x00040000); 661 delay(100); 662 /* DAC on */ 663 autri_reg_set_4(sc,AUTRI_DX_ACR2,0x02); 664 break; 665 case AUTRI_DEVICE_ID_4DWAVE_NX: 666 /* disable Legacy Control */ 667 pci_conf_write(pc, pt, AUTRI_PCI_DDMA_CFG,0); 668 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 669 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & 0xffff0000); 670 delay(100); 671 /* audio engine reset */ 672 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 673 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg | 0x00010000); 674 delay(100); 675 /* release reset */ 676 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 677 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & ~0x00010000); 678 delay(100); 679 /* DAC on */ 680 autri_reg_set_4(sc,AUTRI_NX_ACR0,0x02); 681 break; 682 case AUTRI_DEVICE_ID_SIS_7018: 683 /* disable Legacy Control */ 684 pci_conf_write(pc, pt, AUTRI_PCI_DDMA_CFG,0); 685 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 686 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & 0xffff0000); 687 delay(100); 688 /* reset Digital Controller */ 689 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 690 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg | 0x000c0000); 691 delay(100); 692 /* release reset */ 693 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 694 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & ~0x00040000); 695 delay(100); 696 /* disable AC97 GPIO interrupt */ 697 TWRITE1(sc, AUTRI_SIS_ACGPIO, 0); 698 /* enable 64 channel mode */ 699 autri_reg_set_4(sc, AUTRI_LFO_GC_CIR, BANK_B_EN); 700 break; 701 case AUTRI_DEVICE_ID_ALI_M5451: 702 /* disable Legacy Control */ 703 pci_conf_write(pc, pt, AUTRI_PCI_DDMA_CFG,0); 704 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 705 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & 0xffff0000); 706 delay(100); 707 /* reset Digital Controller */ 708 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 709 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg | 0x000c0000); 710 delay(100); 711 /* release reset */ 712 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 713 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & ~0x00040000); 714 delay(100); 715 /* enable PCM input */ 716 autri_reg_set_4(sc, AUTRI_ALI_GCONTROL, AUTRI_ALI_GCONTROL_PCM_IN); 717 break; 718 } 719 720 if (sc->sc_devid == AUTRI_DEVICE_ID_ALI_M5451) { 721 sc->sc_play.ch = 0; 722 sc->sc_play.ch_intr = 1; 723 sc->sc_rec.ch = 31; 724 sc->sc_rec.ch_intr = 2; 725 } else { 726 sc->sc_play.ch = 0x20; 727 sc->sc_play.ch_intr = 0x21; 728 sc->sc_rec.ch = 0x22; 729 sc->sc_rec.ch_intr = 0x23; 730 } 731 732 /* clear channel status */ 733 TWRITE4(sc, AUTRI_STOP_A, 0xffffffff); 734 TWRITE4(sc, AUTRI_STOP_B, 0xffffffff); 735 736 /* disable channel interrupt */ 737 TWRITE4(sc, AUTRI_AINTEN_A, 0); 738 TWRITE4(sc, AUTRI_AINTEN_B, 0); 739 740 #if 0 741 /* TLB */ 742 if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX) { 743 TWRITE4(sc,AUTRI_NX_TLBC,0); 744 } 745 #endif 746 747 autri_enable_loop_interrupt(sc); 748 749 DPRINTF(("out autri_init()\n")); 750 return 0; 751 } 752 753 static void 754 autri_enable_loop_interrupt(sc_) 755 void *sc_; 756 { 757 struct autri_softc *sc = sc_; 758 u_int32_t reg; 759 760 /*reg = (ENDLP_IE | MIDLP_IE);*/ 761 reg = ENDLP_IE; 762 #if 0 763 if (sc->sc_devid == AUTRI_DEVICE_ID_SIS_7018) 764 reg |= BANK_B_EN; 765 #endif 766 autri_reg_set_4(sc,AUTRI_LFO_GC_CIR,reg); 767 } 768 769 #if 0 770 static void 771 autri_disable_loop_interrupt(sc_) 772 void *sc_; 773 { 774 struct autri_softc *sc = sc_; 775 u_int32_t reg; 776 777 reg = (ENDLP_IE | MIDLP_IE); 778 autri_reg_clear_4(sc,AUTRI_LFO_GC_CIR,reg); 779 } 780 #endif 781 782 int 783 autri_intr(p) 784 void *p; 785 { 786 struct autri_softc *sc = p; 787 u_int32_t intsrc; 788 u_int32_t mask, active[2]; 789 int ch, endch; 790 /* 791 u_int32_t reg; 792 u_int32_t cso,eso; 793 */ 794 795 intsrc = TREAD4(sc,AUTRI_MISCINT); 796 if ((intsrc & (ADDRESS_IRQ|MPU401_IRQ)) == 0) 797 return 0; 798 799 if (intsrc & ADDRESS_IRQ) { 800 801 active[0] = TREAD4(sc,AUTRI_AIN_A); 802 active[1] = TREAD4(sc,AUTRI_AIN_B); 803 804 if (sc->sc_devid == AUTRI_DEVICE_ID_ALI_M5451) { 805 endch = 32; 806 } else { 807 endch = 64; 808 } 809 810 for (ch=0; ch<endch; ch++) { 811 mask = 1 << (ch & 0x1f); 812 if (active[(ch & 0x20) ? 1 : 0] & mask) { 813 814 /* clear interupt */ 815 TWRITE4(sc, (ch & 0x20) ? AUTRI_AIN_B : AUTRI_AIN_A, mask); 816 /* disable interupt */ 817 autri_reg_clear_4(sc,(ch & 0x20) ? AUTRI_AINTEN_B : AUTRI_AINTEN_A, mask); 818 #if 0 819 reg = TREAD4(sc,AUTRI_LFO_GC_CIR) & ~0x0000003f; 820 TWRITE4(sc,AUTRI_LFO_GC_CIR, reg | ch); 821 822 if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX) { 823 cso = TREAD4(sc, 0xe0) & 0x00ffffff; 824 eso = TREAD4(sc, 0xe8) & 0x00ffffff; 825 } else { 826 cso = (TREAD4(sc, 0xe0) >> 16) & 0x0000ffff; 827 eso = (TREAD4(sc, 0xe8) >> 16) & 0x0000ffff; 828 } 829 /*printf("cso=%d, eso=%d\n",cso,eso);*/ 830 #endif 831 if (ch == sc->sc_play.ch_intr) { 832 if (sc->sc_play.intr) 833 sc->sc_play.intr(sc->sc_play.intr_arg); 834 } 835 836 if (ch == sc->sc_rec.ch_intr) { 837 if (sc->sc_rec.intr) 838 sc->sc_rec.intr(sc->sc_rec.intr_arg); 839 } 840 841 /* enable interrupt */ 842 autri_reg_set_4(sc, (ch & 0x20) ? AUTRI_AINTEN_B : AUTRI_AINTEN_A, mask); 843 } 844 } 845 } 846 847 if (intsrc & MPU401_IRQ) { 848 /* XXX */ 849 } 850 851 autri_reg_set_4(sc,AUTRI_MISCINT, 852 ST_TARGET_REACHED | MIXER_OVERFLOW | MIXER_UNDERFLOW); 853 854 return 1; 855 } 856 857 /* 858 * 859 */ 860 861 int 862 autri_allocmem(sc, size, align, p) 863 struct autri_softc *sc; 864 size_t size; 865 size_t align; 866 struct autri_dma *p; 867 { 868 int error; 869 870 p->size = size; 871 error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0, 872 p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 873 &p->nsegs, BUS_DMA_NOWAIT); 874 if (error) 875 return (error); 876 877 error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size, 878 &p->addr, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 879 if (error) 880 goto free; 881 882 error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size, 883 0, BUS_DMA_NOWAIT, &p->map); 884 if (error) 885 goto unmap; 886 887 error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL, 888 BUS_DMA_NOWAIT); 889 if (error) 890 goto destroy; 891 return (0); 892 893 destroy: 894 bus_dmamap_destroy(sc->sc_dmatag, p->map); 895 unmap: 896 bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size); 897 free: 898 bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs); 899 return (error); 900 } 901 902 int 903 autri_freemem(sc, p) 904 struct autri_softc *sc; 905 struct autri_dma *p; 906 { 907 bus_dmamap_unload(sc->sc_dmatag, p->map); 908 bus_dmamap_destroy(sc->sc_dmatag, p->map); 909 bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size); 910 bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs); 911 return 0; 912 } 913 914 int 915 autri_open(addr, flags) 916 void *addr; 917 int flags; 918 { 919 DPRINTF(("autri_open()\n")); 920 DPRINTFN(5,("MISCINT : 0x%08X\n", 921 TREAD4((struct autri_softc *)addr, AUTRI_MISCINT))); 922 DPRINTFN(5,("LFO_GC_CIR : 0x%08X\n", 923 TREAD4((struct autri_softc *)addr, AUTRI_LFO_GC_CIR))); 924 return 0; 925 } 926 927 void 928 autri_close(addr) 929 void *addr; 930 { 931 DPRINTF(("autri_close()\n")); 932 } 933 934 int 935 autri_query_encoding(addr, fp) 936 void *addr; 937 struct audio_encoding *fp; 938 { 939 switch (fp->index) { 940 case 0: 941 strcpy(fp->name, AudioEulinear); 942 fp->encoding = AUDIO_ENCODING_ULINEAR; 943 fp->precision = 8; 944 fp->flags = 0; 945 break; 946 case 1: 947 strcpy(fp->name, AudioEmulaw); 948 fp->encoding = AUDIO_ENCODING_ULAW; 949 fp->precision = 8; 950 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 951 break; 952 case 2: 953 strcpy(fp->name, AudioEalaw); 954 fp->encoding = AUDIO_ENCODING_ALAW; 955 fp->precision = 8; 956 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 957 break; 958 case 3: 959 strcpy(fp->name, AudioEslinear); 960 fp->encoding = AUDIO_ENCODING_SLINEAR; 961 fp->precision = 8; 962 fp->flags = 0; 963 break; 964 case 4: 965 strcpy(fp->name, AudioEslinear_le); 966 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 967 fp->precision = 16; 968 fp->flags = 0; 969 break; 970 case 5: 971 strcpy(fp->name, AudioEulinear_le); 972 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 973 fp->precision = 16; 974 fp->flags = 0; 975 break; 976 case 6: 977 strcpy(fp->name, AudioEslinear_be); 978 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 979 fp->precision = 16; 980 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 981 break; 982 case 7: 983 strcpy(fp->name, AudioEulinear_be); 984 fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 985 fp->precision = 16; 986 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 987 break; 988 default: 989 return (EINVAL); 990 } 991 992 return 0; 993 } 994 995 int 996 autri_set_params(addr, setmode, usemode, play, rec) 997 void *addr; 998 int setmode, usemode; 999 struct audio_params *play, *rec; 1000 { 1001 struct audio_params *p; 1002 int mode; 1003 1004 for (mode = AUMODE_RECORD; mode != -1; 1005 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 1006 if ((setmode & mode) == 0) 1007 continue; 1008 1009 p = mode == AUMODE_PLAY ? play : rec; 1010 1011 if (p->sample_rate < 4000 || p->sample_rate > 48000 || 1012 (p->precision != 8 && p->precision != 16) || 1013 (p->channels != 1 && p->channels != 2)) 1014 return (EINVAL); 1015 1016 p->factor = 1; 1017 p->sw_code = 0; 1018 switch (p->encoding) { 1019 case AUDIO_ENCODING_SLINEAR_BE: 1020 case AUDIO_ENCODING_ULINEAR_BE: 1021 if (p->precision == 16) 1022 p->sw_code = swap_bytes; 1023 break; 1024 case AUDIO_ENCODING_SLINEAR_LE: 1025 case AUDIO_ENCODING_ULINEAR_LE: 1026 break; 1027 case AUDIO_ENCODING_ULAW: 1028 if (mode == AUMODE_PLAY) 1029 p->sw_code = mulaw_to_ulinear8; 1030 else 1031 p->sw_code = ulinear8_to_mulaw; 1032 1033 break; 1034 case AUDIO_ENCODING_ALAW: 1035 if (mode == AUMODE_PLAY) 1036 p->sw_code = alaw_to_ulinear8; 1037 else 1038 p->sw_code = ulinear8_to_alaw; 1039 1040 break; 1041 default: 1042 return (EINVAL); 1043 } 1044 } 1045 1046 return 0; 1047 } 1048 1049 int 1050 autri_round_blocksize(addr, block) 1051 void *addr; 1052 int block; 1053 { 1054 return (block & -4); 1055 } 1056 1057 int 1058 autri_halt_output(addr) 1059 void *addr; 1060 { 1061 struct autri_softc *sc = addr; 1062 1063 DPRINTF(("autri_halt_output()\n")); 1064 1065 sc->sc_play.intr = NULL; 1066 autri_stopch(sc, sc->sc_play.ch, sc->sc_play.ch_intr); 1067 autri_disable_interrupt(sc, sc->sc_play.ch_intr); 1068 1069 return 0; 1070 } 1071 1072 int 1073 autri_halt_input(addr) 1074 void *addr; 1075 { 1076 struct autri_softc *sc = addr; 1077 1078 DPRINTF(("autri_halt_input()\n")); 1079 1080 sc->sc_rec.intr = NULL; 1081 autri_stopch(sc, sc->sc_rec.ch, sc->sc_rec.ch_intr); 1082 autri_disable_interrupt(sc, sc->sc_rec.ch_intr); 1083 1084 return 0; 1085 } 1086 1087 int 1088 autri_getdev(addr, retp) 1089 void *addr; 1090 struct audio_device *retp; 1091 { 1092 struct autri_softc *sc = addr; 1093 1094 DPRINTF(("autri_getdev().\n")); 1095 1096 strncpy(retp->name, "Trident 4DWAVE", sizeof(retp->name)); 1097 snprintf(retp->version, sizeof(retp->version), "0x%02x", 1098 PCI_REVISION(sc->sc_class)); 1099 1100 switch (sc->sc_devid) { 1101 case AUTRI_DEVICE_ID_4DWAVE_DX: 1102 strncpy(retp->config, "4DWAVE-DX", sizeof(retp->config)); 1103 break; 1104 case AUTRI_DEVICE_ID_4DWAVE_NX: 1105 strncpy(retp->config, "4DWAVE-NX", sizeof(retp->config)); 1106 break; 1107 case AUTRI_DEVICE_ID_SIS_7018: 1108 strncpy(retp->config, "SiS 7018", sizeof(retp->config)); 1109 break; 1110 case AUTRI_DEVICE_ID_ALI_M5451: 1111 strncpy(retp->config, "ALi M5451", sizeof(retp->config)); 1112 break; 1113 default: 1114 strncpy(retp->config, "unknown", sizeof(retp->config)); 1115 } 1116 1117 return 0; 1118 } 1119 1120 int 1121 autri_mixer_set_port(addr, cp) 1122 void *addr; 1123 mixer_ctrl_t *cp; 1124 { 1125 struct autri_softc *sc = addr; 1126 1127 return (sc->sc_codec.codec_if->vtbl->mixer_set_port( 1128 sc->sc_codec.codec_if, cp)); 1129 } 1130 1131 int 1132 autri_mixer_get_port(addr, cp) 1133 void *addr; 1134 mixer_ctrl_t *cp; 1135 { 1136 struct autri_softc *sc = addr; 1137 1138 return (sc->sc_codec.codec_if->vtbl->mixer_get_port( 1139 sc->sc_codec.codec_if, cp)); 1140 } 1141 1142 int 1143 autri_query_devinfo(addr, dip) 1144 void *addr; 1145 mixer_devinfo_t *dip; 1146 { 1147 struct autri_softc *sc = addr; 1148 1149 return (sc->sc_codec.codec_if->vtbl->query_devinfo( 1150 sc->sc_codec.codec_if, dip)); 1151 } 1152 1153 int 1154 autri_get_portnum_by_name(sc, class, device, qualifier) 1155 struct autri_softc *sc; 1156 char *class, *device, *qualifier; 1157 { 1158 return (sc->sc_codec.codec_if->vtbl->get_portnum_by_name( 1159 sc->sc_codec.codec_if, class, device, qualifier)); 1160 } 1161 1162 void * 1163 autri_malloc(addr, direction, size, pool, flags) 1164 void *addr; 1165 int direction; 1166 size_t size; 1167 int pool, flags; 1168 { 1169 struct autri_softc *sc = addr; 1170 struct autri_dma *p; 1171 int error; 1172 1173 p = malloc(sizeof(*p), pool, flags); 1174 if (!p) 1175 return NULL; 1176 1177 #if 0 1178 error = autri_allocmem(sc, size, 16, p); 1179 #endif 1180 error = autri_allocmem(sc, size, 0x10000, p); 1181 if (error) { 1182 free(p, pool); 1183 return NULL; 1184 } 1185 1186 p->next = sc->sc_dmas; 1187 sc->sc_dmas = p; 1188 return KERNADDR(p); 1189 } 1190 1191 void 1192 autri_free(addr, ptr, pool) 1193 void *addr; 1194 void *ptr; 1195 int pool; 1196 { 1197 struct autri_softc *sc = addr; 1198 struct autri_dma **pp, *p; 1199 1200 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 1201 if (KERNADDR(p) == ptr) { 1202 autri_freemem(sc, p); 1203 *pp = p->next; 1204 free(p, pool); 1205 return; 1206 } 1207 } 1208 } 1209 1210 static struct autri_dma * 1211 autri_find_dma(sc, addr) 1212 struct autri_softc *sc; 1213 void *addr; 1214 { 1215 struct autri_dma *p; 1216 1217 for (p = sc->sc_dmas; p && KERNADDR(p) != addr; p = p->next) 1218 ; 1219 1220 return p; 1221 } 1222 1223 size_t 1224 autri_round_buffersize(addr, direction, size) 1225 void *addr; 1226 int direction; 1227 size_t size; 1228 { 1229 return size; 1230 } 1231 1232 paddr_t 1233 autri_mappage(addr, mem, off, prot) 1234 void *addr; 1235 void *mem; 1236 off_t off; 1237 int prot; 1238 { 1239 struct autri_softc *sc = addr; 1240 struct autri_dma *p; 1241 1242 if (off < 0) 1243 return (-1); 1244 1245 p = autri_find_dma(sc, mem); 1246 if (!p) 1247 return (-1); 1248 1249 return (bus_dmamem_mmap(sc->sc_dmatag, p->segs, p->nsegs, 1250 off, prot, BUS_DMA_WAITOK)); 1251 } 1252 1253 int 1254 autri_get_props(addr) 1255 void *addr; 1256 { 1257 return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | 1258 AUDIO_PROP_FULLDUPLEX); 1259 } 1260 1261 static void 1262 autri_setup_channel(sc, mode, param) 1263 struct autri_softc *sc; 1264 int mode; 1265 struct audio_params *param; 1266 { 1267 int i, ch, channel; 1268 u_int32_t reg, cr[5]; 1269 u_int32_t cso, eso; 1270 u_int32_t delta, dch[2], ctrl; 1271 u_int32_t alpha_fms, fm_vol, attribute; 1272 1273 u_int32_t dmaaddr, dmalen; 1274 int factor, rvol, cvol; 1275 struct autri_chstatus *chst; 1276 1277 ctrl = AUTRI_CTRL_LOOPMODE; 1278 switch (param->encoding) { 1279 case AUDIO_ENCODING_SLINEAR_BE: 1280 case AUDIO_ENCODING_SLINEAR_LE: 1281 ctrl |= AUTRI_CTRL_SIGNED; 1282 break; 1283 } 1284 1285 factor = 0; 1286 if (param->precision == 16) { 1287 ctrl |= AUTRI_CTRL_16BIT; 1288 factor++; 1289 } 1290 1291 if (param->channels == 2) { 1292 ctrl |= AUTRI_CTRL_STEREO; 1293 factor++; 1294 } 1295 1296 delta = (u_int32_t)param->sample_rate; 1297 if (delta < 4000) 1298 delta = 4000; 1299 if (delta > 48000) 1300 delta = 48000; 1301 1302 dch[1] = ((delta << 12) / 48000) & 0x0000ffff; 1303 if (mode == AUMODE_PLAY) { 1304 chst = &sc->sc_play; 1305 dch[0] = ((delta << 12) / 48000) & 0x0000ffff; 1306 if (sc->sc_devid != AUTRI_DEVICE_ID_SIS_7018) 1307 ctrl |= AUTRI_CTRL_WAVEVOL; 1308 /* 1309 if (sc->sc_devid == AUTRI_DEVICE_ID_ALI_M5451) 1310 ctrl |= 0x80000000; 1311 */ 1312 } else { 1313 chst = &sc->sc_rec; 1314 dch[0] = ((48000 << 12) / delta) & 0x0000ffff; 1315 ctrl |= AUTRI_CTRL_MUTE; 1316 } 1317 1318 dmaaddr = DMAADDR(chst->dma); 1319 cso = alpha_fms = 0; 1320 rvol = cvol = 0x7f; 1321 fm_vol = 0x0 | ((rvol & 0x7f) << 7) | (cvol & 0x7f); 1322 attribute = 0; 1323 1324 for (ch=0; ch<2; ch++) { 1325 1326 if (ch == 0) 1327 dmalen = (chst->length >> factor); 1328 else { 1329 /* channel for interrupt */ 1330 dmalen = (chst->blksize >> factor); 1331 ctrl |= AUTRI_CTRL_MUTE; 1332 } 1333 1334 eso = dmalen - 1; 1335 1336 switch (sc->sc_devid) { 1337 case AUTRI_DEVICE_ID_4DWAVE_DX: 1338 cr[0] = (cso << 16) | (alpha_fms & 0x0000ffff); 1339 cr[1] = dmaaddr; 1340 cr[2] = (eso << 16) | (dch[ch] & 0x0000ffff); 1341 cr[3] = fm_vol; 1342 cr[4] = ctrl; 1343 break; 1344 case AUTRI_DEVICE_ID_4DWAVE_NX: 1345 cr[0] = (dch[ch] << 24) | (cso & 0x00ffffff); 1346 cr[1] = dmaaddr; 1347 cr[2] = ((dch[ch] << 16) & 0xff000000) | (eso & 0x00ffffff); 1348 cr[3] = (alpha_fms << 16) | (fm_vol & 0x0000ffff); 1349 cr[4] = ctrl; 1350 break; 1351 case AUTRI_DEVICE_ID_SIS_7018: 1352 cr[0] = (cso << 16) | (alpha_fms & 0x0000ffff); 1353 cr[1] = dmaaddr; 1354 cr[2] = (eso << 16) | (dch[ch] & 0x0000ffff); 1355 cr[3] = (attribute << 16) | (fm_vol & 0x0000ffff); 1356 cr[4] = ctrl; 1357 break; 1358 case AUTRI_DEVICE_ID_ALI_M5451: 1359 cr[0] = (cso << 16) | (alpha_fms & 0x0000ffff); 1360 cr[1] = dmaaddr; 1361 cr[2] = (eso << 16) | (dch[ch] & 0x0000ffff); 1362 cr[3] = 0; 1363 cr[4] = ctrl; 1364 break; 1365 } 1366 1367 /* write channel data */ 1368 channel = (ch == 0) ? chst->ch : chst->ch_intr; 1369 1370 reg = TREAD4(sc,AUTRI_LFO_GC_CIR) & ~0x0000003f; 1371 TWRITE4(sc,AUTRI_LFO_GC_CIR, reg | channel); 1372 1373 for (i=0; i<5; i++) { 1374 TWRITE4(sc, AUTRI_ARAM_CR + i*sizeof(cr[0]), cr[i]); 1375 DPRINTFN(5,("cr[%d] : 0x%08X\n", i, cr[i])); 1376 } 1377 1378 /* Bank A only */ 1379 if (channel < 0x20) { 1380 TWRITE4(sc, AUTRI_EBUF1, AUTRI_EMOD_STILL); 1381 TWRITE4(sc, AUTRI_EBUF2, AUTRI_EMOD_STILL); 1382 } 1383 } 1384 1385 } 1386 1387 int 1388 autri_trigger_output(addr, start, end, blksize, intr, arg, param) 1389 void *addr; 1390 void *start, *end; 1391 int blksize; 1392 void (*intr) __P((void *)); 1393 void *arg; 1394 struct audio_params *param; 1395 { 1396 struct autri_softc *sc = addr; 1397 struct autri_dma *p; 1398 1399 DPRINTFN(5,("autri_trigger_output: sc=%p start=%p end=%p " 1400 "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg)); 1401 1402 sc->sc_play.intr = intr; 1403 sc->sc_play.intr_arg = arg; 1404 sc->sc_play.offset = 0; 1405 sc->sc_play.blksize = blksize; 1406 sc->sc_play.length = (char *)end - (char *)start; 1407 1408 p = autri_find_dma(sc, start); 1409 if (!p) { 1410 printf("autri_trigger_output: bad addr %p\n", start); 1411 return (EINVAL); 1412 } 1413 1414 sc->sc_play.dma = p; 1415 1416 /* */ 1417 autri_setup_channel(sc, AUMODE_PLAY, param); 1418 1419 /* volume set to no attenuation */ 1420 TWRITE4(sc, AUTRI_MUSICVOL_WAVEVOL, 0); 1421 1422 /* enable interrupt */ 1423 autri_enable_interrupt(sc, sc->sc_play.ch_intr); 1424 1425 /* start channel */ 1426 autri_startch(sc, sc->sc_play.ch, sc->sc_play.ch_intr); 1427 1428 return 0; 1429 } 1430 1431 int 1432 autri_trigger_input(addr, start, end, blksize, intr, arg, param) 1433 void *addr; 1434 void *start, *end; 1435 int blksize; 1436 void (*intr) __P((void *)); 1437 void *arg; 1438 struct audio_params *param; 1439 { 1440 struct autri_softc *sc = addr; 1441 struct autri_dma *p; 1442 1443 DPRINTFN(5,("autri_trigger_input: sc=%p start=%p end=%p " 1444 "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg)); 1445 1446 sc->sc_rec.intr = intr; 1447 sc->sc_rec.intr_arg = arg; 1448 sc->sc_rec.offset = 0; 1449 sc->sc_rec.blksize = blksize; 1450 sc->sc_rec.length = (char *)end - (char *)start; 1451 1452 /* */ 1453 p = autri_find_dma(sc, start); 1454 if (!p) { 1455 printf("autri_trigger_input: bad addr %p\n", start); 1456 return (EINVAL); 1457 } 1458 1459 sc->sc_rec.dma = p; 1460 1461 /* */ 1462 if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX) { 1463 autri_reg_set_4(sc, AUTRI_NX_ACR0, AUTRI_NX_ACR0_PSB_CAPTURE); 1464 TWRITE1(sc, AUTRI_NX_RCI3, AUTRI_NX_RCI3_ENABLE | sc->sc_rec.ch); 1465 } 1466 1467 #if 0 1468 /* 4DWAVE only allows capturing at a 48KHz rate */ 1469 if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_DX || 1470 sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX) 1471 param->sample_rate = 48000; 1472 #endif 1473 1474 autri_setup_channel(sc, AUMODE_RECORD, param); 1475 1476 /* enable interrupt */ 1477 autri_enable_interrupt(sc, sc->sc_rec.ch_intr); 1478 1479 /* start channel */ 1480 autri_startch(sc, sc->sc_rec.ch, sc->sc_rec.ch_intr); 1481 1482 return 0; 1483 } 1484 1485 #if 0 1486 static int 1487 autri_halt(sc) 1488 struct autri_softc *sc; 1489 { 1490 DPRINTF(("autri_halt().\n")); 1491 /*autri_stopch(sc);*/ 1492 autri_disable_interrupt(sc, sc->sc_play.channel); 1493 autri_disable_interrupt(sc, sc->sc_rec.channel); 1494 return 0; 1495 } 1496 #endif 1497 1498 static void 1499 autri_enable_interrupt(sc, ch) 1500 struct autri_softc *sc; 1501 int ch; 1502 { 1503 int reg; 1504 1505 reg = (ch & 0x20) ? AUTRI_AINTEN_B : AUTRI_AINTEN_A; 1506 ch &= 0x1f; 1507 1508 autri_reg_set_4(sc, reg, 1 << ch); 1509 } 1510 1511 static void 1512 autri_disable_interrupt(sc, ch) 1513 struct autri_softc *sc; 1514 int ch; 1515 { 1516 int reg; 1517 1518 reg = (ch & 0x20) ? AUTRI_AINTEN_B : AUTRI_AINTEN_A; 1519 ch &= 0x1f; 1520 1521 autri_reg_clear_4(sc, reg, 1 << ch); 1522 } 1523 1524 static void 1525 autri_startch(sc, ch, ch_intr) 1526 struct autri_softc *sc; 1527 int ch, ch_intr; 1528 { 1529 int reg; 1530 u_int32_t chmask; 1531 1532 reg = (ch & 0x20) ? AUTRI_START_B : AUTRI_START_A; 1533 ch &= 0x1f; 1534 chmask = (1 << ch) | (1 << ch_intr); 1535 1536 autri_reg_set_4(sc, reg, chmask); 1537 } 1538 1539 static void 1540 autri_stopch(sc, ch, ch_intr) 1541 struct autri_softc *sc; 1542 int ch, ch_intr; 1543 { 1544 int reg; 1545 u_int32_t chmask; 1546 1547 reg = (ch & 0x20) ? AUTRI_STOP_B : AUTRI_STOP_A; 1548 ch &= 0x1f; 1549 chmask = (1 << ch) | (1 << ch_intr); 1550 1551 autri_reg_set_4(sc, reg, chmask); 1552 } 1553 1554 #if NMIDI > 0 1555 int 1556 autri_midi_open(void *addr, int flags, 1557 void (*iintr)(void *, int), 1558 void (*ointr)(void *), 1559 void *arg) 1560 { 1561 struct autri_softc *sc = addr; 1562 1563 DPRINTF(("autri_midi_open()\n")); 1564 1565 DPRINTFN(5,("MPUR1 : 0x%02X\n",TREAD1(sc,AUTRI_MPUR1))); 1566 DPRINTFN(5,("MPUR2 : 0x%02X\n",TREAD1(sc,AUTRI_MPUR2))); 1567 1568 sc->sc_iintr = iintr; 1569 sc->sc_ointr = ointr; 1570 sc->sc_arg = arg; 1571 1572 if (flags & FREAD) 1573 autri_reg_clear_1(sc, AUTRI_MPUR2, AUTRI_MIDIIN_ENABLE_INTR); 1574 1575 if (flags & FWRITE) 1576 autri_reg_set_1(sc, AUTRI_MPUR2, AUTRI_MIDIOUT_CONNECT); 1577 1578 return (0); 1579 } 1580 1581 void 1582 autri_midi_close(void *addr) 1583 { 1584 struct autri_softc *sc = addr; 1585 1586 DPRINTF(("autri_midi_close()\n")); 1587 1588 tsleep(sc, PWAIT, "autri", hz/10); /* give uart a chance to drain */ 1589 1590 sc->sc_iintr = NULL; 1591 sc->sc_ointr = NULL; 1592 } 1593 1594 int 1595 autri_midi_output(void *addr, int d) 1596 { 1597 struct autri_softc *sc = addr; 1598 int x; 1599 1600 for (x = 0; x != MIDI_BUSY_WAIT; x++) { 1601 if ((TREAD1(sc, AUTRI_MPUR1) & AUTRI_MIDIOUT_READY) == 0) { 1602 TWRITE1(sc, AUTRI_MPUR0, d); 1603 return (0); 1604 } 1605 delay(MIDI_BUSY_DELAY); 1606 } 1607 return (EIO); 1608 } 1609 1610 void 1611 autri_midi_getinfo(void *addr, struct midi_info *mi) 1612 { 1613 mi->name = "4DWAVE MIDI UART"; 1614 mi->props = MIDI_PROP_CAN_INPUT; 1615 } 1616 1617 #endif 1618
Indexes created Sun Sep 21 14:09:52 GMT 2025