autri.c revision 1.19 1 /* $NetBSD: autri.c,v 1.19 2004/04/23 21:13:06 itojun Exp $ */
2
3 /*
4 * Copyright (c) 2001 SOMEYA Yoshihiko and KUROSAWA Takahiro.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */
27
28 /*
29 * Trident 4DWAVE-DX/NX, SiS 7018, ALi M5451 Sound Driver
30 *
31 * The register information is taken from the ALSA driver.
32 *
33 * Documentation links:
34 * - ftp://ftp.alsa-project.org/pub/manuals/trident/
35 */
36
37 #include <sys/cdefs.h>
38 __KERNEL_RCSID(0, "$NetBSD: autri.c,v 1.19 2004/04/23 21:13:06 itojun Exp $");
39
40 #include "midi.h"
41
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/kernel.h>
45 #include <sys/fcntl.h>
46 #include <sys/malloc.h>
47 #include <sys/device.h>
48 #include <sys/proc.h>
49
50 #include <dev/pci/pcidevs.h>
51 #include <dev/pci/pcireg.h>
52 #include <dev/pci/pcivar.h>
53
54 #include <sys/audioio.h>
55 #include <dev/audio_if.h>
56 #include <dev/midi_if.h>
57 #include <dev/mulaw.h>
58 #include <dev/auconv.h>
59 #include <dev/ic/ac97reg.h>
60 #include <dev/ic/ac97var.h>
61 #include <dev/ic/mpuvar.h>
62
63 #include <machine/bus.h>
64 #include <machine/intr.h>
65
66 #include <dev/pci/autrireg.h>
67 #include <dev/pci/autrivar.h>
68
69 #ifdef AUDIO_DEBUG
70 # define DPRINTF(x) if (autridebug) printf x
71 # define DPRINTFN(n,x) if (autridebug > (n)) printf x
72 int autridebug = 0;
73 #else
74 # define DPRINTF(x)
75 # define DPRINTFN(n,x)
76 #endif
77
78 int autri_match(struct device *, struct cfdata *, void *);
79 void autri_attach(struct device *, struct device *, void *);
80 int autri_intr(void *);
81
82 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr)
83 #define KERNADDR(p) ((void *)((p)->addr))
84
85 int autri_allocmem(struct autri_softc *, size_t,
86 size_t, struct autri_dma *);
87 int autri_freemem(struct autri_softc *, struct autri_dma *);
88
89 #define TWRITE1(sc, r, x) bus_space_write_1((sc)->memt, (sc)->memh, (r), (x))
90 #define TWRITE2(sc, r, x) bus_space_write_2((sc)->memt, (sc)->memh, (r), (x))
91 #define TWRITE4(sc, r, x) bus_space_write_4((sc)->memt, (sc)->memh, (r), (x))
92 #define TREAD1(sc, r) bus_space_read_1((sc)->memt, (sc)->memh, (r))
93 #define TREAD2(sc, r) bus_space_read_2((sc)->memt, (sc)->memh, (r))
94 #define TREAD4(sc, r) bus_space_read_4((sc)->memt, (sc)->memh, (r))
95
96 static __inline void autri_reg_set_1(struct autri_softc *, int, uint8_t);
97 static __inline void autri_reg_clear_1(struct autri_softc *, int, uint8_t);
98 static __inline void autri_reg_set_4(struct autri_softc *, int, uint32_t);
99 static __inline void autri_reg_clear_4(struct autri_softc *, int, uint32_t);
100
101 int autri_attach_codec(void *sc, struct ac97_codec_if *);
102 int autri_read_codec(void *sc, u_int8_t a, u_int16_t *d);
103 int autri_write_codec(void *sc, u_int8_t a, u_int16_t d);
104 void autri_reset_codec(void *sc);
105 enum ac97_host_flags autri_flags_codec(void *sc);
106
107 static void autri_powerhook(int why,void *addr);
108 static int autri_init(void *sc);
109 static struct autri_dma *autri_find_dma(struct autri_softc *, void *);
110 static void autri_setup_channel(struct autri_softc *sc,int mode,
111 struct audio_params *param);
112 static void autri_enable_interrupt(struct autri_softc *sc, int ch);
113 static void autri_disable_interrupt(struct autri_softc *sc, int ch);
114 static void autri_startch(struct autri_softc *sc, int ch, int ch_intr);
115 static void autri_stopch(struct autri_softc *sc, int ch, int ch_intr);
116 static void autri_enable_loop_interrupt(void *sc);
117 #if 0
118 static void autri_disable_loop_interrupt(void *sc);
119 #endif
120
121 CFATTACH_DECL(autri, sizeof(struct autri_softc),
122 autri_match, autri_attach, NULL, NULL);
123
124 int autri_open(void *, int);
125 void autri_close(void *);
126 int autri_query_encoding(void *, struct audio_encoding *);
127 int autri_set_params(void *, int, int,
128 struct audio_params *, struct audio_params *);
129 int autri_round_blocksize(void *, int);
130 int autri_trigger_output(void *, void *, void *, int, void (*)(void *),
131 void *, struct audio_params *);
132 int autri_trigger_input(void *, void *, void *, int, void (*)(void *),
133 void *, struct audio_params *);
134 int autri_halt_output(void *);
135 int autri_halt_input(void *);
136 int autri_getdev(void *, struct audio_device *);
137 int autri_mixer_set_port(void *, mixer_ctrl_t *);
138 int autri_mixer_get_port(void *, mixer_ctrl_t *);
139 void* autri_malloc(void *, int, size_t, struct malloc_type *, int);
140 void autri_free(void *, void *, struct malloc_type *);
141 size_t autri_round_buffersize(void *, int, size_t);
142 paddr_t autri_mappage(void *, void *, off_t, int);
143 int autri_get_props(void *);
144 int autri_query_devinfo(void *addr, mixer_devinfo_t *dip);
145
146 int autri_get_portnum_by_name(struct autri_softc *, char *, char *, char *);
147
148 static struct audio_hw_if autri_hw_if = {
149 autri_open,
150 autri_close,
151 NULL, /* drain */
152 autri_query_encoding,
153 autri_set_params,
154 autri_round_blocksize,
155 NULL, /* commit_settings */
156 NULL, /* init_output */
157 NULL, /* init_input */
158 NULL, /* start_output */
159 NULL, /* start_input */
160 autri_halt_output,
161 autri_halt_input,
162 NULL, /* speaker_ctl */
163 autri_getdev,
164 NULL, /* setfd */
165 autri_mixer_set_port,
166 autri_mixer_get_port,
167 autri_query_devinfo,
168 autri_malloc,
169 autri_free,
170 autri_round_buffersize,
171 autri_mappage,
172 autri_get_props,
173 autri_trigger_output,
174 autri_trigger_input,
175 NULL, /* dev_ioctl */
176 };
177
178 #if NMIDI > 0
179 void autri_midi_close(void *);
180 void autri_midi_getinfo(void *, struct midi_info *);
181 int autri_midi_open(void *, int, void (*)(void *, int),
182 void (*)(void *), void *);
183 int autri_midi_output(void *, int);
184
185 struct midi_hw_if autri_midi_hw_if = {
186 autri_midi_open,
187 autri_midi_close,
188 autri_midi_output,
189 autri_midi_getinfo,
190 NULL, /* ioctl */
191 };
192 #endif
193
194 /*
195 * register set/clear bit
196 */
197 static __inline void
198 autri_reg_set_1(struct autri_softc *sc, int no, uint8_t mask)
199 {
200 bus_space_write_1(sc->memt, sc->memh, no,
201 (bus_space_read_1(sc->memt, sc->memh, no) | mask));
202 }
203
204 static __inline void
205 autri_reg_clear_1(struct autri_softc *sc, int no, uint8_t mask)
206 {
207 bus_space_write_1(sc->memt, sc->memh, no,
208 (bus_space_read_1(sc->memt, sc->memh, no) & ~mask));
209 }
210
211 static __inline void
212 autri_reg_set_4(struct autri_softc *sc, int no, uint32_t mask)
213 {
214 bus_space_write_4(sc->memt, sc->memh, no,
215 (bus_space_read_4(sc->memt, sc->memh, no) | mask));
216 }
217
218 static __inline void
219 autri_reg_clear_4(struct autri_softc *sc, int no, uint32_t mask)
220 {
221 bus_space_write_4(sc->memt, sc->memh, no,
222 (bus_space_read_4(sc->memt, sc->memh, no) & ~mask));
223 }
224
225 /*
226 * AC'97 codec
227 */
228 int
229 autri_attach_codec(void *sc_, struct ac97_codec_if *codec_if)
230 {
231 struct autri_codec_softc *sc = sc_;
232
233 DPRINTF(("autri_attach_codec()\n"));
234
235 sc->codec_if = codec_if;
236 return 0;
237 }
238
239 int
240 autri_read_codec(void *sc_, u_int8_t index, u_int16_t *data)
241 {
242 struct autri_codec_softc *codec = sc_;
243 struct autri_softc *sc = codec->sc;
244 u_int32_t status, addr, cmd, busy;
245 u_int16_t count;
246
247 /*DPRINTF(("sc->sc->type : 0x%X",sc->sc->type));*/
248
249 switch (sc->sc_devid) {
250 case AUTRI_DEVICE_ID_4DWAVE_DX:
251 addr = AUTRI_DX_ACR1;
252 cmd = AUTRI_DX_ACR1_CMD_READ;
253 busy = AUTRI_DX_ACR1_BUSY_READ;
254 break;
255 case AUTRI_DEVICE_ID_4DWAVE_NX:
256 addr = AUTRI_NX_ACR2;
257 cmd = AUTRI_NX_ACR2_CMD_READ;
258 busy = AUTRI_NX_ACR2_BUSY_READ | AUTRI_NX_ACR2_RECV_WAIT;
259 break;
260 case AUTRI_DEVICE_ID_SIS_7018:
261 addr = AUTRI_SIS_ACRD;
262 cmd = AUTRI_SIS_ACRD_CMD_READ;
263 busy = AUTRI_SIS_ACRD_BUSY_READ | AUTRI_SIS_ACRD_AUDIO_BUSY;
264 break;
265 case AUTRI_DEVICE_ID_ALI_M5451:
266 if (sc->sc_revision > 0x01)
267 addr = AUTRI_ALI_ACWR;
268 else
269 addr = AUTRI_ALI_ACRD;
270 cmd = AUTRI_ALI_ACRD_CMD_READ;
271 busy = AUTRI_ALI_ACRD_BUSY_READ;
272 break;
273 default:
274 printf("%s: autri_read_codec : unknown device\n",
275 sc->sc_dev.dv_xname);
276 return -1;
277 }
278
279 /* wait for 'Ready to Read' */
280 for (count=0; count<0xffff; count++) {
281 if ((TREAD4(sc, addr) & busy) == 0)
282 break;
283 }
284
285 if (count == 0xffff) {
286 printf("%s: Codec timeout. Busy reading AC'97 codec.\n",
287 sc->sc_dev.dv_xname);
288 return -1;
289 }
290
291 /* send Read Command to AC'97 */
292 TWRITE4(sc, addr, (index & 0x7f) | cmd);
293
294 /* wait for 'Returned data is avalable' */
295 for (count=0; count<0xffff; count++) {
296 status = TREAD4(sc, addr);
297 if ((status & busy) == 0)
298 break;
299 }
300
301 if (count == 0xffff) {
302 printf("%s: Codec timeout. Busy reading AC'97 codec.\n",
303 sc->sc_dev.dv_xname);
304 return -1;
305 }
306
307 *data = (status >> 16) & 0x0000ffff;
308 /*DPRINTF(("autri_read_codec(0x%X) return 0x%X\n",reg,*data));*/
309 return 0;
310 }
311
312 int
313 autri_write_codec(void *sc_, u_int8_t index, u_int16_t data)
314 {
315 struct autri_codec_softc *codec = sc_;
316 struct autri_softc *sc = codec->sc;
317 u_int32_t addr, cmd, busy;
318 u_int16_t count;
319
320 /*DPRINTF(("autri_write_codec(0x%X,0x%X)\n",index,data));*/
321
322 switch (sc->sc_devid) {
323 case AUTRI_DEVICE_ID_4DWAVE_DX:
324 addr = AUTRI_DX_ACR0;
325 cmd = AUTRI_DX_ACR0_CMD_WRITE;
326 busy = AUTRI_DX_ACR0_BUSY_WRITE;
327 break;
328 case AUTRI_DEVICE_ID_4DWAVE_NX:
329 addr = AUTRI_NX_ACR1;
330 cmd = AUTRI_NX_ACR1_CMD_WRITE;
331 busy = AUTRI_NX_ACR1_BUSY_WRITE;
332 break;
333 case AUTRI_DEVICE_ID_SIS_7018:
334 addr = AUTRI_SIS_ACWR;
335 cmd = AUTRI_SIS_ACWR_CMD_WRITE;
336 busy = AUTRI_SIS_ACWR_BUSY_WRITE | AUTRI_SIS_ACWR_AUDIO_BUSY;
337 break;
338 case AUTRI_DEVICE_ID_ALI_M5451:
339 addr = AUTRI_ALI_ACWR;
340 cmd = AUTRI_ALI_ACWR_CMD_WRITE;
341 if (sc->sc_revision > 0x01)
342 cmd |= 0x0100;
343 busy = AUTRI_ALI_ACWR_BUSY_WRITE;
344 break;
345 default:
346 printf("%s: autri_write_codec : unknown device.\n",
347 sc->sc_dev.dv_xname);
348 return -1;
349 }
350
351 /* wait for 'Ready to Write' */
352 for (count=0; count<0xffff; count++) {
353 if ((TREAD4(sc, addr) & busy) == 0)
354 break;
355 }
356
357 if (count == 0xffff) {
358 printf("%s: Codec timeout. Busy writing AC'97 codec\n",
359 sc->sc_dev.dv_xname);
360 return -1;
361 }
362
363 /* send Write Command to AC'97 */
364 TWRITE4(sc, addr, (data << 16) | (index & 0x7f) | cmd);
365
366 return 0;
367 }
368
369 void
370 autri_reset_codec(void *sc_)
371 {
372 struct autri_codec_softc *codec = sc_;
373 struct autri_softc *sc = codec->sc;
374 u_int32_t reg, ready;
375 int addr, count = 200;
376
377 DPRINTF(("autri_reset_codec(codec=%p,sc=%p)\n",codec,sc));
378 DPRINTF(("sc->sc_devid=%X\n",sc->sc_devid));
379
380 switch (sc->sc_devid) {
381 case AUTRI_DEVICE_ID_4DWAVE_DX:
382 /* warm reset AC'97 codec */
383 autri_reg_set_4(sc, AUTRI_DX_ACR2, 1);
384 delay(100);
385 /* release reset */
386 autri_reg_clear_4(sc, AUTRI_DX_ACR2, 1);
387 delay(100);
388
389 addr = AUTRI_DX_ACR2;
390 ready = AUTRI_DX_ACR2_CODEC_READY;
391 break;
392 case AUTRI_DEVICE_ID_4DWAVE_NX:
393 /* warm reset AC'97 codec */
394 autri_reg_set_4(sc, AUTRI_NX_ACR0, 1);
395 delay(100);
396 /* release reset */
397 autri_reg_clear_4(sc, AUTRI_NX_ACR0, 1);
398 delay(100);
399
400 addr = AUTRI_NX_ACR0;
401 ready = AUTRI_NX_ACR0_CODEC_READY;
402 break;
403 case AUTRI_DEVICE_ID_SIS_7018:
404 /* cold reset AC'97 codec */
405 autri_reg_set_4(sc, AUTRI_SIS_SCTRL, 2);
406 delay(1000);
407 /* release reset (warm & cold) */
408 autri_reg_clear_4(sc, AUTRI_SIS_SCTRL, 3);
409 delay(2000);
410
411 addr = AUTRI_SIS_SCTRL;
412 ready = AUTRI_SIS_SCTRL_CODEC_READY;
413 break;
414 case AUTRI_DEVICE_ID_ALI_M5451:
415 /* warm reset AC'97 codec */
416 autri_reg_set_4(sc, AUTRI_ALI_SCTRL, 1);
417 delay(100);
418 /* release reset (warm & cold) */
419 autri_reg_clear_4(sc, AUTRI_ALI_SCTRL, 3);
420 delay(100);
421
422 addr = AUTRI_ALI_SCTRL;
423 ready = AUTRI_ALI_SCTRL_CODEC_READY;
424 break;
425 default:
426 printf("%s: autri_reset_codec : unknown device\n",
427 sc->sc_dev.dv_xname);
428 return;
429 }
430
431 /* wait for 'Codec Ready' */
432 while (count--) {
433 reg = TREAD4(sc, addr);
434 if (reg & ready)
435 break;
436 delay(1000);
437 }
438
439 if (count == 0)
440 printf("%s: Codec timeout. AC'97 is not ready for operation.\n",
441 sc->sc_dev.dv_xname);
442 }
443
444 enum ac97_host_flags
445 autri_flags_codec(void *sc_)
446 {
447 return AC97_HOST_DONT_READ;
448 }
449
450 /*
451 *
452 */
453
454 int
455 autri_match(struct device *parent, struct cfdata *match, void *aux)
456 {
457 struct pci_attach_args *pa = (struct pci_attach_args *) aux;
458
459 switch (PCI_VENDOR(pa->pa_id)) {
460 case PCI_VENDOR_TRIDENT:
461 switch (PCI_PRODUCT(pa->pa_id)) {
462 case PCI_PRODUCT_TRIDENT_4DWAVE_DX:
463 case PCI_PRODUCT_TRIDENT_4DWAVE_NX:
464 return 1;
465 }
466 break;
467 case PCI_VENDOR_SIS:
468 switch (PCI_PRODUCT(pa->pa_id)) {
469 case PCI_PRODUCT_SIS_7018:
470 return 1;
471 }
472 break;
473 case PCI_VENDOR_ALI:
474 switch (PCI_PRODUCT(pa->pa_id)) {
475 case PCI_PRODUCT_ALI_M5451:
476 return 1;
477 }
478 break;
479 }
480
481 return 0;
482 }
483
484 void
485 autri_attach(struct device *parent, struct device *self, void *aux)
486 {
487 struct autri_softc *sc = (struct autri_softc *)self;
488 struct pci_attach_args *pa = (struct pci_attach_args *)aux;
489 pci_chipset_tag_t pc = pa->pa_pc;
490 struct autri_codec_softc *codec;
491 pci_intr_handle_t ih;
492 char const *intrstr;
493 char devinfo[256];
494 mixer_ctrl_t ctl;
495 int i, r;
496 u_int32_t reg;
497
498 aprint_naive(": Audio controller\n");
499
500 sc->sc_devid = pa->pa_id;
501 sc->sc_class = pa->pa_class;
502
503 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
504 sc->sc_revision = PCI_REVISION(pa->pa_class);
505 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, sc->sc_revision);
506
507 /* map register to memory */
508 if (pci_mapreg_map(pa, AUTRI_PCI_MEMORY_BASE,
509 PCI_MAPREG_TYPE_MEM, 0, &sc->memt, &sc->memh, NULL, NULL)) {
510 aprint_error("%s: can't map memory space\n",
511 sc->sc_dev.dv_xname);
512 return;
513 }
514
515 /* map and establish the interrupt */
516 if (pci_intr_map(pa, &ih)) {
517 aprint_error("%s: couldn't map interrupt\n",
518 sc->sc_dev.dv_xname);
519 return;
520 }
521 intrstr = pci_intr_string(pc, ih);
522 sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, autri_intr, sc);
523 if (sc->sc_ih == NULL) {
524 aprint_error("%s: couldn't establish interrupt",
525 sc->sc_dev.dv_xname);
526 if (intrstr != NULL)
527 aprint_normal(" at %s", intrstr);
528 aprint_normal("\n");
529 return;
530 }
531 aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
532
533 sc->sc_dmatag = pa->pa_dmat;
534 sc->sc_pc = pc;
535 sc->sc_pt = pa->pa_tag;
536
537 /* enable the device */
538 reg = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
539 reg |= (PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE);
540 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg);
541
542 /* initialize the device */
543 autri_init(sc);
544
545 /* attach AC'97 codec */
546 codec = &sc->sc_codec;
547 memcpy(&codec->sc_dev, &sc->sc_dev, sizeof(codec->sc_dev));
548 codec->sc = sc;
549
550 codec->host_if.arg = codec;
551 codec->host_if.attach = autri_attach_codec;
552 codec->host_if.reset = autri_reset_codec;
553 codec->host_if.read = autri_read_codec;
554 codec->host_if.write = autri_write_codec;
555 codec->host_if.flags = autri_flags_codec;
556
557 if ((r = ac97_attach(&codec->host_if)) != 0) {
558 aprint_error("%s: can't attach codec (error 0x%X)\n",
559 sc->sc_dev.dv_xname, r);
560 return;
561 }
562
563 /* disable mutes */
564 for (i = 0; i < 4; i++) {
565 static struct {
566 char *class, *device;
567 } d[] = {
568 { AudioCoutputs, AudioNmaster},
569 { AudioCinputs, AudioNdac},
570 { AudioCinputs, AudioNcd},
571 { AudioCrecord, AudioNvolume},
572 };
573
574 ctl.type = AUDIO_MIXER_ENUM;
575 ctl.un.ord = 0;
576
577 #if 0
578 ctl.dev = sc->sc_codec.codec_if->vtbl->get_portnum_by_name(sc->sc_codec.codec_if,
579 d[i].class, d[i].device, AudioNmute);
580 #endif
581 ctl.dev = autri_get_portnum_by_name(sc,d[i].class,
582 d[i].device, AudioNmute);
583 autri_mixer_set_port(sc, &ctl);
584 }
585
586 /* set a reasonable default volume */
587 ctl.type = AUDIO_MIXER_VALUE;
588 ctl.un.value.num_channels = 2;
589 ctl.un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
590 ctl.un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 127;
591
592 ctl.dev = autri_get_portnum_by_name(sc,AudioCoutputs,AudioNmaster,NULL);
593 autri_mixer_set_port(sc, &ctl);
594
595 audio_attach_mi(&autri_hw_if, sc, &sc->sc_dev);
596
597 #if NMIDI > 0
598 midi_attach_mi(&autri_midi_hw_if, sc, &sc->sc_dev);
599 #endif
600
601 sc->sc_old_power = PWR_RESUME;
602 powerhook_establish(autri_powerhook, sc);
603 }
604
605 static void
606 autri_powerhook(int why, void *addr)
607 {
608 struct autri_softc *sc = addr;
609
610 if (why == PWR_RESUME && sc->sc_old_power == PWR_SUSPEND) {
611 DPRINTF(("PWR_RESUME\n"));
612 autri_init(sc);
613 /*autri_reset_codec(&sc->sc_codec);*/
614 (sc->sc_codec.codec_if->vtbl->restore_ports)(sc->sc_codec.codec_if);
615 }
616 sc->sc_old_power = why;
617 }
618
619 int
620 autri_init(void *sc_)
621 {
622 struct autri_softc *sc = sc_;
623 u_int32_t reg;
624
625 pci_chipset_tag_t pc = sc->sc_pc;
626 pcitag_t pt = sc->sc_pt;
627
628 DPRINTF(("in autri_init()\n"));
629 DPRINTFN(5,("pci_conf_read(0x40) : 0x%X\n",pci_conf_read(pc,pt,0x40)));
630 DPRINTFN(5,("pci_conf_read(0x44) : 0x%X\n",pci_conf_read(pc,pt,0x44)));
631
632 switch (sc->sc_devid) {
633 case AUTRI_DEVICE_ID_4DWAVE_DX:
634 /* disable Legacy Control */
635 pci_conf_write(pc, pt, AUTRI_PCI_DDMA_CFG,0);
636 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
637 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & 0xffff0000);
638 delay(100);
639 /* audio engine reset */
640 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
641 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg | 0x00040000);
642 delay(100);
643 /* release reset */
644 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
645 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & ~0x00040000);
646 delay(100);
647 /* DAC on */
648 autri_reg_set_4(sc,AUTRI_DX_ACR2,0x02);
649 break;
650 case AUTRI_DEVICE_ID_4DWAVE_NX:
651 /* disable Legacy Control */
652 pci_conf_write(pc, pt, AUTRI_PCI_DDMA_CFG,0);
653 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
654 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & 0xffff0000);
655 delay(100);
656 /* audio engine reset */
657 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
658 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg | 0x00010000);
659 delay(100);
660 /* release reset */
661 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
662 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & ~0x00010000);
663 delay(100);
664 /* DAC on */
665 autri_reg_set_4(sc,AUTRI_NX_ACR0,0x02);
666 break;
667 case AUTRI_DEVICE_ID_SIS_7018:
668 /* disable Legacy Control */
669 pci_conf_write(pc, pt, AUTRI_PCI_DDMA_CFG,0);
670 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
671 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & 0xffff0000);
672 delay(100);
673 /* reset Digital Controller */
674 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
675 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg | 0x000c0000);
676 delay(100);
677 /* release reset */
678 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
679 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & ~0x00040000);
680 delay(100);
681 /* disable AC97 GPIO interrupt */
682 TWRITE1(sc, AUTRI_SIS_ACGPIO, 0);
683 /* enable 64 channel mode */
684 autri_reg_set_4(sc, AUTRI_LFO_GC_CIR, BANK_B_EN);
685 break;
686 case AUTRI_DEVICE_ID_ALI_M5451:
687 /* disable Legacy Control */
688 pci_conf_write(pc, pt, AUTRI_PCI_DDMA_CFG,0);
689 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
690 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & 0xffff0000);
691 delay(100);
692 /* reset Digital Controller */
693 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
694 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg | 0x000c0000);
695 delay(100);
696 /* release reset */
697 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
698 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & ~0x00040000);
699 delay(100);
700 /* enable PCM input */
701 autri_reg_set_4(sc, AUTRI_ALI_GCONTROL, AUTRI_ALI_GCONTROL_PCM_IN);
702 break;
703 }
704
705 if (sc->sc_devid == AUTRI_DEVICE_ID_ALI_M5451) {
706 sc->sc_play.ch = 0;
707 sc->sc_play.ch_intr = 1;
708 sc->sc_rec.ch = 31;
709 sc->sc_rec.ch_intr = 2;
710 } else {
711 sc->sc_play.ch = 0x20;
712 sc->sc_play.ch_intr = 0x21;
713 sc->sc_rec.ch = 0x22;
714 sc->sc_rec.ch_intr = 0x23;
715 }
716
717 /* clear channel status */
718 TWRITE4(sc, AUTRI_STOP_A, 0xffffffff);
719 TWRITE4(sc, AUTRI_STOP_B, 0xffffffff);
720
721 /* disable channel interrupt */
722 TWRITE4(sc, AUTRI_AINTEN_A, 0);
723 TWRITE4(sc, AUTRI_AINTEN_B, 0);
724
725 #if 0
726 /* TLB */
727 if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX) {
728 TWRITE4(sc,AUTRI_NX_TLBC,0);
729 }
730 #endif
731
732 autri_enable_loop_interrupt(sc);
733
734 DPRINTF(("out autri_init()\n"));
735 return 0;
736 }
737
738 static void
739 autri_enable_loop_interrupt(void *sc_)
740 {
741 struct autri_softc *sc = sc_;
742 u_int32_t reg;
743
744 /*reg = (ENDLP_IE | MIDLP_IE);*/
745 reg = ENDLP_IE;
746
747 if (sc->sc_devid == AUTRI_DEVICE_ID_SIS_7018)
748 reg |= BANK_B_EN;
749
750 autri_reg_set_4(sc,AUTRI_LFO_GC_CIR,reg);
751 }
752
753 #if 0
754 static void
755 autri_disable_loop_interrupt(void *sc_)
756 {
757 struct autri_softc *sc = sc_;
758 u_int32_t reg;
759
760 reg = (ENDLP_IE | MIDLP_IE);
761 autri_reg_clear_4(sc,AUTRI_LFO_GC_CIR,reg);
762 }
763 #endif
764
765 int
766 autri_intr(void *p)
767 {
768 struct autri_softc *sc = p;
769 u_int32_t intsrc;
770 u_int32_t mask, active[2];
771 int ch, endch;
772 /*
773 u_int32_t reg;
774 u_int32_t cso,eso;
775 */
776
777 intsrc = TREAD4(sc,AUTRI_MISCINT);
778 if ((intsrc & (ADDRESS_IRQ|MPU401_IRQ)) == 0)
779 return 0;
780
781 if (intsrc & ADDRESS_IRQ) {
782
783 active[0] = TREAD4(sc,AUTRI_AIN_A);
784 active[1] = TREAD4(sc,AUTRI_AIN_B);
785
786 if (sc->sc_devid == AUTRI_DEVICE_ID_ALI_M5451) {
787 endch = 32;
788 } else {
789 endch = 64;
790 }
791
792 for (ch=0; ch<endch; ch++) {
793 mask = 1 << (ch & 0x1f);
794 if (active[(ch & 0x20) ? 1 : 0] & mask) {
795
796 /* clear interrupt */
797 TWRITE4(sc, (ch & 0x20) ? AUTRI_AIN_B : AUTRI_AIN_A, mask);
798 /* disable interrupt */
799 autri_reg_clear_4(sc,(ch & 0x20) ? AUTRI_AINTEN_B : AUTRI_AINTEN_A, mask);
800 #if 0
801 reg = TREAD4(sc,AUTRI_LFO_GC_CIR) & ~0x0000003f;
802 TWRITE4(sc,AUTRI_LFO_GC_CIR, reg | ch);
803
804 if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX) {
805 cso = TREAD4(sc, 0xe0) & 0x00ffffff;
806 eso = TREAD4(sc, 0xe8) & 0x00ffffff;
807 } else {
808 cso = (TREAD4(sc, 0xe0) >> 16) & 0x0000ffff;
809 eso = (TREAD4(sc, 0xe8) >> 16) & 0x0000ffff;
810 }
811 /*printf("cso=%d, eso=%d\n",cso,eso);*/
812 #endif
813 if (ch == sc->sc_play.ch_intr) {
814 if (sc->sc_play.intr)
815 sc->sc_play.intr(sc->sc_play.intr_arg);
816 }
817
818 if (ch == sc->sc_rec.ch_intr) {
819 if (sc->sc_rec.intr)
820 sc->sc_rec.intr(sc->sc_rec.intr_arg);
821 }
822
823 /* enable interrupt */
824 autri_reg_set_4(sc, (ch & 0x20) ? AUTRI_AINTEN_B : AUTRI_AINTEN_A, mask);
825 }
826 }
827 }
828
829 if (intsrc & MPU401_IRQ) {
830 /* XXX */
831 }
832
833 autri_reg_set_4(sc,AUTRI_MISCINT,
834 ST_TARGET_REACHED | MIXER_OVERFLOW | MIXER_UNDERFLOW);
835
836 return 1;
837 }
838
839 /*
840 *
841 */
842
843 int
844 autri_allocmem(struct autri_softc *sc, size_t size, size_t align,
845 struct autri_dma *p)
846 {
847 int error;
848
849 p->size = size;
850 error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0,
851 p->segs, sizeof(p->segs)/sizeof(p->segs[0]),
852 &p->nsegs, BUS_DMA_NOWAIT);
853 if (error)
854 return (error);
855
856 error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size,
857 &p->addr, BUS_DMA_NOWAIT|BUS_DMA_COHERENT);
858 if (error)
859 goto free;
860
861 error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size,
862 0, BUS_DMA_NOWAIT, &p->map);
863 if (error)
864 goto unmap;
865
866 error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL,
867 BUS_DMA_NOWAIT);
868 if (error)
869 goto destroy;
870 return (0);
871
872 destroy:
873 bus_dmamap_destroy(sc->sc_dmatag, p->map);
874 unmap:
875 bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
876 free:
877 bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
878 return (error);
879 }
880
881 int
882 autri_freemem(struct autri_softc *sc, struct autri_dma *p)
883 {
884 bus_dmamap_unload(sc->sc_dmatag, p->map);
885 bus_dmamap_destroy(sc->sc_dmatag, p->map);
886 bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
887 bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
888 return 0;
889 }
890
891 int
892 autri_open(void *addr, int flags)
893 {
894 DPRINTF(("autri_open()\n"));
895 DPRINTFN(5,("MISCINT : 0x%08X\n",
896 TREAD4((struct autri_softc *)addr, AUTRI_MISCINT)));
897 DPRINTFN(5,("LFO_GC_CIR : 0x%08X\n",
898 TREAD4((struct autri_softc *)addr, AUTRI_LFO_GC_CIR)));
899 return 0;
900 }
901
902 void
903 autri_close(void *addr)
904 {
905 DPRINTF(("autri_close()\n"));
906 }
907
908 int
909 autri_query_encoding(void *addr, struct audio_encoding *fp)
910 {
911 switch (fp->index) {
912 case 0:
913 strcpy(fp->name, AudioEulinear);
914 fp->encoding = AUDIO_ENCODING_ULINEAR;
915 fp->precision = 8;
916 fp->flags = 0;
917 break;
918 case 1:
919 strcpy(fp->name, AudioEmulaw);
920 fp->encoding = AUDIO_ENCODING_ULAW;
921 fp->precision = 8;
922 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
923 break;
924 case 2:
925 strcpy(fp->name, AudioEalaw);
926 fp->encoding = AUDIO_ENCODING_ALAW;
927 fp->precision = 8;
928 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
929 break;
930 case 3:
931 strcpy(fp->name, AudioEslinear);
932 fp->encoding = AUDIO_ENCODING_SLINEAR;
933 fp->precision = 8;
934 fp->flags = 0;
935 break;
936 case 4:
937 strcpy(fp->name, AudioEslinear_le);
938 fp->encoding = AUDIO_ENCODING_SLINEAR_LE;
939 fp->precision = 16;
940 fp->flags = 0;
941 break;
942 case 5:
943 strcpy(fp->name, AudioEulinear_le);
944 fp->encoding = AUDIO_ENCODING_ULINEAR_LE;
945 fp->precision = 16;
946 fp->flags = 0;
947 break;
948 case 6:
949 strcpy(fp->name, AudioEslinear_be);
950 fp->encoding = AUDIO_ENCODING_SLINEAR_BE;
951 fp->precision = 16;
952 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
953 break;
954 case 7:
955 strcpy(fp->name, AudioEulinear_be);
956 fp->encoding = AUDIO_ENCODING_ULINEAR_BE;
957 fp->precision = 16;
958 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
959 break;
960 default:
961 return (EINVAL);
962 }
963
964 return 0;
965 }
966
967 int
968 autri_set_params(void *addr, int setmode, int usemode,
969 struct audio_params *play, struct audio_params *rec)
970 {
971 struct audio_params *p;
972 int mode;
973
974 for (mode = AUMODE_RECORD; mode != -1;
975 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) {
976 if ((setmode & mode) == 0)
977 continue;
978
979 p = mode == AUMODE_PLAY ? play : rec;
980
981 if (p->sample_rate < 4000 || p->sample_rate > 48000 ||
982 (p->precision != 8 && p->precision != 16) ||
983 (p->channels != 1 && p->channels != 2))
984 return (EINVAL);
985
986 p->factor = 1;
987 p->sw_code = 0;
988 switch (p->encoding) {
989 case AUDIO_ENCODING_SLINEAR_BE:
990 case AUDIO_ENCODING_ULINEAR_BE:
991 if (p->precision == 16)
992 p->sw_code = swap_bytes;
993 break;
994 case AUDIO_ENCODING_SLINEAR_LE:
995 case AUDIO_ENCODING_ULINEAR_LE:
996 break;
997 case AUDIO_ENCODING_ULAW:
998 if (mode == AUMODE_PLAY)
999 p->sw_code = mulaw_to_ulinear8;
1000 else
1001 p->sw_code = ulinear8_to_mulaw;
1002
1003 break;
1004 case AUDIO_ENCODING_ALAW:
1005 if (mode == AUMODE_PLAY)
1006 p->sw_code = alaw_to_ulinear8;
1007 else
1008 p->sw_code = ulinear8_to_alaw;
1009
1010 break;
1011 default:
1012 return (EINVAL);
1013 }
1014 }
1015
1016 return 0;
1017 }
1018
1019 int
1020 autri_round_blocksize(void *addr, int block)
1021 {
1022 return (block & -4);
1023 }
1024
1025 int
1026 autri_halt_output(void *addr)
1027 {
1028 struct autri_softc *sc = addr;
1029
1030 DPRINTF(("autri_halt_output()\n"));
1031
1032 sc->sc_play.intr = NULL;
1033 autri_stopch(sc, sc->sc_play.ch, sc->sc_play.ch_intr);
1034 autri_disable_interrupt(sc, sc->sc_play.ch_intr);
1035
1036 return 0;
1037 }
1038
1039 int
1040 autri_halt_input(void *addr)
1041 {
1042 struct autri_softc *sc = addr;
1043
1044 DPRINTF(("autri_halt_input()\n"));
1045
1046 sc->sc_rec.intr = NULL;
1047 autri_stopch(sc, sc->sc_rec.ch, sc->sc_rec.ch_intr);
1048 autri_disable_interrupt(sc, sc->sc_rec.ch_intr);
1049
1050 return 0;
1051 }
1052
1053 int
1054 autri_getdev(void *addr, struct audio_device *retp)
1055 {
1056 struct autri_softc *sc = addr;
1057
1058 DPRINTF(("autri_getdev().\n"));
1059
1060 strncpy(retp->name, "Trident 4DWAVE", sizeof(retp->name));
1061 snprintf(retp->version, sizeof(retp->version), "0x%02x",
1062 PCI_REVISION(sc->sc_class));
1063
1064 switch (sc->sc_devid) {
1065 case AUTRI_DEVICE_ID_4DWAVE_DX:
1066 strncpy(retp->config, "4DWAVE-DX", sizeof(retp->config));
1067 break;
1068 case AUTRI_DEVICE_ID_4DWAVE_NX:
1069 strncpy(retp->config, "4DWAVE-NX", sizeof(retp->config));
1070 break;
1071 case AUTRI_DEVICE_ID_SIS_7018:
1072 strncpy(retp->config, "SiS 7018", sizeof(retp->config));
1073 break;
1074 case AUTRI_DEVICE_ID_ALI_M5451:
1075 strncpy(retp->config, "ALi M5451", sizeof(retp->config));
1076 break;
1077 default:
1078 strncpy(retp->config, "unknown", sizeof(retp->config));
1079 }
1080
1081 return 0;
1082 }
1083
1084 int
1085 autri_mixer_set_port(void *addr, mixer_ctrl_t *cp)
1086 {
1087 struct autri_softc *sc = addr;
1088
1089 return (sc->sc_codec.codec_if->vtbl->mixer_set_port(
1090 sc->sc_codec.codec_if, cp));
1091 }
1092
1093 int
1094 autri_mixer_get_port(void *addr, mixer_ctrl_t *cp)
1095 {
1096 struct autri_softc *sc = addr;
1097
1098 return (sc->sc_codec.codec_if->vtbl->mixer_get_port(
1099 sc->sc_codec.codec_if, cp));
1100 }
1101
1102 int
1103 autri_query_devinfo(void *addr, mixer_devinfo_t *dip)
1104 {
1105 struct autri_softc *sc = addr;
1106
1107 return (sc->sc_codec.codec_if->vtbl->query_devinfo(
1108 sc->sc_codec.codec_if, dip));
1109 }
1110
1111 int
1112 autri_get_portnum_by_name(struct autri_softc *sc, char *class,
1113 char *device, char *qualifier)
1114 {
1115 return (sc->sc_codec.codec_if->vtbl->get_portnum_by_name(
1116 sc->sc_codec.codec_if, class, device, qualifier));
1117 }
1118
1119 void *
1120 autri_malloc(void *addr, int direction, size_t size,
1121 struct malloc_type *pool, int flags)
1122 {
1123 struct autri_softc *sc = addr;
1124 struct autri_dma *p;
1125 int error;
1126
1127 p = malloc(sizeof(*p), pool, flags);
1128 if (!p)
1129 return NULL;
1130
1131 #if 0
1132 error = autri_allocmem(sc, size, 16, p);
1133 #endif
1134 error = autri_allocmem(sc, size, 0x10000, p);
1135 if (error) {
1136 free(p, pool);
1137 return NULL;
1138 }
1139
1140 p->next = sc->sc_dmas;
1141 sc->sc_dmas = p;
1142 return KERNADDR(p);
1143 }
1144
1145 void
1146 autri_free(void *addr, void *ptr, struct malloc_type *pool)
1147 {
1148 struct autri_softc *sc = addr;
1149 struct autri_dma **pp, *p;
1150
1151 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) {
1152 if (KERNADDR(p) == ptr) {
1153 autri_freemem(sc, p);
1154 *pp = p->next;
1155 free(p, pool);
1156 return;
1157 }
1158 }
1159 }
1160
1161 static struct autri_dma *
1162 autri_find_dma(struct autri_softc *sc, void *addr)
1163 {
1164 struct autri_dma *p;
1165
1166 for (p = sc->sc_dmas; p && KERNADDR(p) != addr; p = p->next)
1167 ;
1168
1169 return p;
1170 }
1171
1172 size_t
1173 autri_round_buffersize(void *addr, int direction, size_t size)
1174 {
1175 return size;
1176 }
1177
1178 paddr_t
1179 autri_mappage(void *addr, void *mem, off_t off, int prot)
1180 {
1181 struct autri_softc *sc = addr;
1182 struct autri_dma *p;
1183
1184 if (off < 0)
1185 return (-1);
1186
1187 p = autri_find_dma(sc, mem);
1188 if (!p)
1189 return (-1);
1190
1191 return (bus_dmamem_mmap(sc->sc_dmatag, p->segs, p->nsegs,
1192 off, prot, BUS_DMA_WAITOK));
1193 }
1194
1195 int
1196 autri_get_props(void *addr)
1197 {
1198 return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT |
1199 AUDIO_PROP_FULLDUPLEX);
1200 }
1201
1202 static void
1203 autri_setup_channel(struct autri_softc *sc, int mode,
1204 struct audio_params *param)
1205 {
1206 int i, ch, channel;
1207 u_int32_t reg, cr[5];
1208 u_int32_t cso, eso;
1209 u_int32_t delta, dch[2], ctrl;
1210 u_int32_t alpha_fms, fm_vol, attribute;
1211
1212 u_int32_t dmaaddr, dmalen;
1213 int factor, rvol, cvol;
1214 struct autri_chstatus *chst;
1215
1216 ctrl = AUTRI_CTRL_LOOPMODE;
1217 switch (param->encoding) {
1218 case AUDIO_ENCODING_SLINEAR_BE:
1219 case AUDIO_ENCODING_SLINEAR_LE:
1220 ctrl |= AUTRI_CTRL_SIGNED;
1221 break;
1222 }
1223
1224 factor = 0;
1225 if (param->precision == 16) {
1226 ctrl |= AUTRI_CTRL_16BIT;
1227 factor++;
1228 }
1229
1230 if (param->channels == 2) {
1231 ctrl |= AUTRI_CTRL_STEREO;
1232 factor++;
1233 }
1234
1235 delta = (u_int32_t)param->sample_rate;
1236 if (delta < 4000)
1237 delta = 4000;
1238 if (delta > 48000)
1239 delta = 48000;
1240
1241 attribute = 0;
1242
1243 dch[1] = ((delta << 12) / 48000) & 0x0000ffff;
1244 if (mode == AUMODE_PLAY) {
1245 chst = &sc->sc_play;
1246 dch[0] = ((delta << 12) / 48000) & 0x0000ffff;
1247 ctrl |= AUTRI_CTRL_WAVEVOL;
1248 } else {
1249 chst = &sc->sc_rec;
1250 dch[0] = ((48000 << 12) / delta) & 0x0000ffff;
1251 if (sc->sc_devid == AUTRI_DEVICE_ID_SIS_7018) {
1252 ctrl |= AUTRI_CTRL_MUTEVOL_SIS;
1253 attribute = AUTRI_ATTR_PCMREC_SIS;
1254 if (delta != 48000)
1255 attribute |= AUTRI_ATTR_ENASRC_SIS;
1256 } else
1257 ctrl |= AUTRI_CTRL_MUTEVOL;
1258 }
1259
1260 dmaaddr = DMAADDR(chst->dma);
1261 cso = alpha_fms = 0;
1262 rvol = cvol = 0x7f;
1263 fm_vol = 0x0 | ((rvol & 0x7f) << 7) | (cvol & 0x7f);
1264
1265 for (ch=0; ch<2; ch++) {
1266
1267 if (ch == 0)
1268 dmalen = (chst->length >> factor);
1269 else {
1270 /* channel for interrupt */
1271 dmalen = (chst->blksize >> factor);
1272 if (sc->sc_devid == AUTRI_DEVICE_ID_SIS_7018)
1273 ctrl |= AUTRI_CTRL_MUTEVOL_SIS;
1274 else
1275 ctrl |= AUTRI_CTRL_MUTEVOL;
1276 attribute = 0;
1277 }
1278
1279 eso = dmalen - 1;
1280
1281 switch (sc->sc_devid) {
1282 case AUTRI_DEVICE_ID_4DWAVE_DX:
1283 cr[0] = (cso << 16) | (alpha_fms & 0x0000ffff);
1284 cr[1] = dmaaddr;
1285 cr[2] = (eso << 16) | (dch[ch] & 0x0000ffff);
1286 cr[3] = fm_vol;
1287 cr[4] = ctrl;
1288 break;
1289 case AUTRI_DEVICE_ID_4DWAVE_NX:
1290 cr[0] = (dch[ch] << 24) | (cso & 0x00ffffff);
1291 cr[1] = dmaaddr;
1292 cr[2] = ((dch[ch] << 16) & 0xff000000) | (eso & 0x00ffffff);
1293 cr[3] = (alpha_fms << 16) | (fm_vol & 0x0000ffff);
1294 cr[4] = ctrl;
1295 break;
1296 case AUTRI_DEVICE_ID_SIS_7018:
1297 cr[0] = (cso << 16) | (alpha_fms & 0x0000ffff);
1298 cr[1] = dmaaddr;
1299 cr[2] = (eso << 16) | (dch[ch] & 0x0000ffff);
1300 cr[3] = attribute;
1301 cr[4] = ctrl;
1302 break;
1303 case AUTRI_DEVICE_ID_ALI_M5451:
1304 cr[0] = (cso << 16) | (alpha_fms & 0x0000ffff);
1305 cr[1] = dmaaddr;
1306 cr[2] = (eso << 16) | (dch[ch] & 0x0000ffff);
1307 cr[3] = 0;
1308 cr[4] = ctrl;
1309 break;
1310 }
1311
1312 /* write channel data */
1313 channel = (ch == 0) ? chst->ch : chst->ch_intr;
1314
1315 reg = TREAD4(sc,AUTRI_LFO_GC_CIR) & ~0x0000003f;
1316 TWRITE4(sc,AUTRI_LFO_GC_CIR, reg | channel);
1317
1318 for (i=0; i<5; i++) {
1319 TWRITE4(sc, AUTRI_ARAM_CR + i*sizeof(cr[0]), cr[i]);
1320 DPRINTFN(5,("cr[%d] : 0x%08X\n", i, cr[i]));
1321 }
1322
1323 /* Bank A only */
1324 if (channel < 0x20) {
1325 TWRITE4(sc, AUTRI_EBUF1, AUTRI_EMOD_STILL);
1326 TWRITE4(sc, AUTRI_EBUF2, AUTRI_EMOD_STILL);
1327 }
1328 }
1329
1330 }
1331
1332 int
1333 autri_trigger_output(void *addr, void *start, void *end, int blksize,
1334 void (*intr)(void *), void *arg,
1335 struct audio_params *param)
1336 {
1337 struct autri_softc *sc = addr;
1338 struct autri_dma *p;
1339
1340 DPRINTFN(5,("autri_trigger_output: sc=%p start=%p end=%p "
1341 "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg));
1342
1343 sc->sc_play.intr = intr;
1344 sc->sc_play.intr_arg = arg;
1345 sc->sc_play.offset = 0;
1346 sc->sc_play.blksize = blksize;
1347 sc->sc_play.length = (char *)end - (char *)start;
1348
1349 p = autri_find_dma(sc, start);
1350 if (!p) {
1351 printf("autri_trigger_output: bad addr %p\n", start);
1352 return (EINVAL);
1353 }
1354
1355 sc->sc_play.dma = p;
1356
1357 /* */
1358 autri_setup_channel(sc, AUMODE_PLAY, param);
1359
1360 /* volume set to no attenuation */
1361 TWRITE4(sc, AUTRI_MUSICVOL_WAVEVOL, 0);
1362
1363 /* enable interrupt */
1364 autri_enable_interrupt(sc, sc->sc_play.ch_intr);
1365
1366 /* start channel */
1367 autri_startch(sc, sc->sc_play.ch, sc->sc_play.ch_intr);
1368
1369 return 0;
1370 }
1371
1372 int
1373 autri_trigger_input(void *addr, void *start, void *end, int blksize,
1374 void (*intr)(void *), void *arg,
1375 struct audio_params *param)
1376 {
1377 struct autri_softc *sc = addr;
1378 struct autri_dma *p;
1379
1380 DPRINTFN(5,("autri_trigger_input: sc=%p start=%p end=%p "
1381 "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg));
1382
1383 sc->sc_rec.intr = intr;
1384 sc->sc_rec.intr_arg = arg;
1385 sc->sc_rec.offset = 0;
1386 sc->sc_rec.blksize = blksize;
1387 sc->sc_rec.length = (char *)end - (char *)start;
1388
1389 /* */
1390 p = autri_find_dma(sc, start);
1391 if (!p) {
1392 printf("autri_trigger_input: bad addr %p\n", start);
1393 return (EINVAL);
1394 }
1395
1396 sc->sc_rec.dma = p;
1397
1398 /* */
1399 if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX) {
1400 autri_reg_set_4(sc, AUTRI_NX_ACR0, AUTRI_NX_ACR0_PSB_CAPTURE);
1401 TWRITE1(sc, AUTRI_NX_RCI3, AUTRI_NX_RCI3_ENABLE | sc->sc_rec.ch);
1402 }
1403
1404 #if 0
1405 /* 4DWAVE only allows capturing at a 48KHz rate */
1406 if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_DX ||
1407 sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX)
1408 param->sample_rate = 48000;
1409 #endif
1410
1411 autri_setup_channel(sc, AUMODE_RECORD, param);
1412
1413 /* enable interrupt */
1414 autri_enable_interrupt(sc, sc->sc_rec.ch_intr);
1415
1416 /* start channel */
1417 autri_startch(sc, sc->sc_rec.ch, sc->sc_rec.ch_intr);
1418
1419 return 0;
1420 }
1421
1422 #if 0
1423 static int
1424 autri_halt(struct autri_softc *sc)
1425 {
1426 DPRINTF(("autri_halt().\n"));
1427 /*autri_stopch(sc);*/
1428 autri_disable_interrupt(sc, sc->sc_play.channel);
1429 autri_disable_interrupt(sc, sc->sc_rec.channel);
1430 return 0;
1431 }
1432 #endif
1433
1434 static void
1435 autri_enable_interrupt(struct autri_softc *sc, int ch)
1436 {
1437 int reg;
1438
1439 reg = (ch & 0x20) ? AUTRI_AINTEN_B : AUTRI_AINTEN_A;
1440 ch &= 0x1f;
1441
1442 autri_reg_set_4(sc, reg, 1 << ch);
1443 }
1444
1445 static void
1446 autri_disable_interrupt(struct autri_softc *sc, int ch)
1447 {
1448 int reg;
1449
1450 reg = (ch & 0x20) ? AUTRI_AINTEN_B : AUTRI_AINTEN_A;
1451 ch &= 0x1f;
1452
1453 autri_reg_clear_4(sc, reg, 1 << ch);
1454 }
1455
1456 static void
1457 autri_startch(struct autri_softc *sc, int ch, int ch_intr)
1458 {
1459 int reg;
1460 u_int32_t chmask;
1461
1462 reg = (ch & 0x20) ? AUTRI_START_B : AUTRI_START_A;
1463 ch &= 0x1f;
1464 ch_intr &= 0x1f;
1465 chmask = (1 << ch) | (1 << ch_intr);
1466
1467 autri_reg_set_4(sc, reg, chmask);
1468 }
1469
1470 static void
1471 autri_stopch(struct autri_softc *sc, int ch, int ch_intr)
1472 {
1473 int reg;
1474 u_int32_t chmask;
1475
1476 reg = (ch & 0x20) ? AUTRI_STOP_B : AUTRI_STOP_A;
1477 ch &= 0x1f;
1478 ch_intr &= 0x1f;
1479 chmask = (1 << ch) | (1 << ch_intr);
1480
1481 autri_reg_set_4(sc, reg, chmask);
1482 }
1483
1484 #if NMIDI > 0
1485 int
1486 autri_midi_open(void *addr, int flags, void (*iintr)(void *, int),
1487 void (*ointr)(void *), void *arg)
1488 {
1489 struct autri_softc *sc = addr;
1490
1491 DPRINTF(("autri_midi_open()\n"));
1492
1493 DPRINTFN(5,("MPUR1 : 0x%02X\n",TREAD1(sc,AUTRI_MPUR1)));
1494 DPRINTFN(5,("MPUR2 : 0x%02X\n",TREAD1(sc,AUTRI_MPUR2)));
1495
1496 sc->sc_iintr = iintr;
1497 sc->sc_ointr = ointr;
1498 sc->sc_arg = arg;
1499
1500 if (flags & FREAD)
1501 autri_reg_clear_1(sc, AUTRI_MPUR2, AUTRI_MIDIIN_ENABLE_INTR);
1502
1503 if (flags & FWRITE)
1504 autri_reg_set_1(sc, AUTRI_MPUR2, AUTRI_MIDIOUT_CONNECT);
1505
1506 return (0);
1507 }
1508
1509 void
1510 autri_midi_close(void *addr)
1511 {
1512 struct autri_softc *sc = addr;
1513
1514 DPRINTF(("autri_midi_close()\n"));
1515
1516 tsleep(sc, PWAIT, "autri", hz/10); /* give uart a chance to drain */
1517
1518 sc->sc_iintr = NULL;
1519 sc->sc_ointr = NULL;
1520 }
1521
1522 int
1523 autri_midi_output(void *addr, int d)
1524 {
1525 struct autri_softc *sc = addr;
1526 int x;
1527
1528 for (x = 0; x != MIDI_BUSY_WAIT; x++) {
1529 if ((TREAD1(sc, AUTRI_MPUR1) & AUTRI_MIDIOUT_READY) == 0) {
1530 TWRITE1(sc, AUTRI_MPUR0, d);
1531 return (0);
1532 }
1533 delay(MIDI_BUSY_DELAY);
1534 }
1535 return (EIO);
1536 }
1537
1538 void
1539 autri_midi_getinfo(void *addr, struct midi_info *mi)
1540 {
1541 mi->name = "4DWAVE MIDI UART";
1542 mi->props = MIDI_PROP_CAN_INPUT;
1543 }
1544
1545 #endif
1546