auvia.c revision 1.79 1 1.79 riastrad /* $NetBSD: auvia.c,v 1.79 2018/09/03 16:29:32 riastradh Exp $ */
2 1.1 tsarna
3 1.1 tsarna /*-
4 1.74 jmcneill * Copyright (c) 2000, 2008 The NetBSD Foundation, Inc.
5 1.1 tsarna * All rights reserved.
6 1.1 tsarna *
7 1.1 tsarna * This code is derived from software contributed to The NetBSD Foundation
8 1.74 jmcneill * by Tyler C. Sarna.
9 1.1 tsarna *
10 1.1 tsarna * Redistribution and use in source and binary forms, with or without
11 1.1 tsarna * modification, are permitted provided that the following conditions
12 1.1 tsarna * are met:
13 1.1 tsarna * 1. Redistributions of source code must retain the above copyright
14 1.1 tsarna * notice, this list of conditions and the following disclaimer.
15 1.1 tsarna * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 tsarna * notice, this list of conditions and the following disclaimer in the
17 1.1 tsarna * documentation and/or other materials provided with the distribution.
18 1.1 tsarna *
19 1.1 tsarna * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 tsarna * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 tsarna * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 tsarna * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 tsarna * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 tsarna * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 tsarna * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 tsarna * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 tsarna * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 tsarna * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 tsarna * POSSIBILITY OF SUCH DAMAGE.
30 1.1 tsarna */
31 1.1 tsarna
32 1.1 tsarna /*
33 1.22 kent * VIA Technologies VT82C686A / VT8233 / VT8235 Southbridge Audio Driver
34 1.1 tsarna *
35 1.1 tsarna * Documentation links:
36 1.1 tsarna *
37 1.1 tsarna * ftp://ftp.alsa-project.org/pub/manuals/via/686a.pdf
38 1.1 tsarna * ftp://ftp.alsa-project.org/pub/manuals/general/ac97r21.pdf
39 1.1 tsarna * ftp://ftp.alsa-project.org/pub/manuals/ad/AD1881_0.pdf (example AC'97 codec)
40 1.1 tsarna */
41 1.14 lukem
42 1.14 lukem #include <sys/cdefs.h>
43 1.79 riastrad __KERNEL_RCSID(0, "$NetBSD: auvia.c,v 1.79 2018/09/03 16:29:32 riastradh Exp $");
44 1.1 tsarna
45 1.1 tsarna #include <sys/param.h>
46 1.1 tsarna #include <sys/systm.h>
47 1.74 jmcneill #include <sys/kmem.h>
48 1.1 tsarna #include <sys/device.h>
49 1.1 tsarna #include <sys/audioio.h>
50 1.1 tsarna
51 1.1 tsarna #include <dev/pci/pcidevs.h>
52 1.1 tsarna #include <dev/pci/pcivar.h>
53 1.1 tsarna
54 1.1 tsarna #include <dev/audio_if.h>
55 1.1 tsarna #include <dev/mulaw.h>
56 1.1 tsarna #include <dev/auconv.h>
57 1.1 tsarna
58 1.10 augustss #include <dev/ic/ac97reg.h>
59 1.3 thorpej #include <dev/ic/ac97var.h>
60 1.1 tsarna
61 1.1 tsarna #include <dev/pci/auviavar.h>
62 1.1 tsarna
63 1.74 jmcneill #define AUVIA_MINBLKSZ 512
64 1.74 jmcneill
65 1.1 tsarna struct auvia_dma {
66 1.1 tsarna struct auvia_dma *next;
67 1.60 christos void *addr;
68 1.1 tsarna size_t size;
69 1.1 tsarna bus_dmamap_t map;
70 1.1 tsarna bus_dma_segment_t seg;
71 1.1 tsarna };
72 1.1 tsarna
73 1.1 tsarna struct auvia_dma_op {
74 1.51 kent uint32_t ptr;
75 1.51 kent uint32_t flags;
76 1.1 tsarna #define AUVIA_DMAOP_EOL 0x80000000
77 1.1 tsarna #define AUVIA_DMAOP_FLAG 0x40000000
78 1.1 tsarna #define AUVIA_DMAOP_STOP 0x20000000
79 1.1 tsarna #define AUVIA_DMAOP_COUNT(x) ((x)&0x00FFFFFF)
80 1.1 tsarna };
81 1.1 tsarna
82 1.68 cegger static int auvia_match(device_t, cfdata_t, void *);
83 1.63 dyoung static void auvia_attach(device_t, device_t, void *);
84 1.63 dyoung static int auvia_detach(device_t, int);
85 1.63 dyoung static void auvia_childdet(device_t, device_t);
86 1.54 kent static int auvia_open(void *, int);
87 1.54 kent static void auvia_close(void *);
88 1.52 thorpej static int auvia_query_encoding(void *, struct audio_encoding *);
89 1.52 thorpej static void auvia_set_params_sub(struct auvia_softc *,
90 1.52 thorpej struct auvia_softc_chan *,
91 1.52 thorpej const audio_params_t *);
92 1.52 thorpej static int auvia_set_params(void *, int, int, audio_params_t *,
93 1.52 thorpej audio_params_t *, stream_filter_list_t *,
94 1.52 thorpej stream_filter_list_t *);
95 1.52 thorpej static int auvia_round_blocksize(void *, int, int, const audio_params_t *);
96 1.52 thorpej static int auvia_halt_output(void *);
97 1.52 thorpej static int auvia_halt_input(void *);
98 1.52 thorpej static int auvia_getdev(void *, struct audio_device *);
99 1.52 thorpej static int auvia_set_port(void *, mixer_ctrl_t *);
100 1.52 thorpej static int auvia_get_port(void *, mixer_ctrl_t *);
101 1.52 thorpej static int auvia_query_devinfo(void *, mixer_devinfo_t *);
102 1.74 jmcneill static void * auvia_malloc(void *, int, size_t);
103 1.74 jmcneill static void auvia_free(void *, void *, size_t);
104 1.52 thorpej static size_t auvia_round_buffersize(void *, int, size_t);
105 1.52 thorpej static paddr_t auvia_mappage(void *, void *, off_t, int);
106 1.52 thorpej static int auvia_get_props(void *);
107 1.52 thorpej static int auvia_build_dma_ops(struct auvia_softc *,
108 1.52 thorpej struct auvia_softc_chan *,
109 1.52 thorpej struct auvia_dma *, void *, void *, int);
110 1.52 thorpej static int auvia_trigger_output(void *, void *, void *, int,
111 1.52 thorpej void (*)(void *), void *,
112 1.52 thorpej const audio_params_t *);
113 1.52 thorpej static int auvia_trigger_input(void *, void *, void *, int,
114 1.52 thorpej void (*)(void *), void *,
115 1.52 thorpej const audio_params_t *);
116 1.74 jmcneill static void auvia_get_locks(void *, kmutex_t **, kmutex_t **);
117 1.72 dyoung static bool auvia_resume(device_t, const pmf_qual_t *);
118 1.74 jmcneill
119 1.52 thorpej static int auvia_intr(void *);
120 1.74 jmcneill static void * auvia_malloc_dmamem(void *, int, size_t);
121 1.74 jmcneill static int auvia_malloc_channel(struct auvia_softc *, struct auvia_softc_chan *,
122 1.74 jmcneill size_t);
123 1.54 kent static int auvia_attach_codec(void *, struct ac97_codec_if *);
124 1.54 kent static int auvia_write_codec(void *, uint8_t, uint16_t);
125 1.54 kent static int auvia_read_codec(void *, uint8_t, uint16_t *);
126 1.54 kent static int auvia_reset_codec(void *);
127 1.54 kent static int auvia_waitready_codec(struct auvia_softc *);
128 1.54 kent static int auvia_waitvalid_codec(struct auvia_softc *);
129 1.59 thorpej static void auvia_spdif_event(void *, bool);
130 1.54 kent
131 1.69 cegger CFATTACH_DECL2_NEW(auvia, sizeof (struct auvia_softc),
132 1.63 dyoung auvia_match, auvia_attach, auvia_detach, NULL, NULL, auvia_childdet);
133 1.1 tsarna
134 1.34 martin /* VIA VT823xx revision number */
135 1.53 rpaulo #define VIA_REV_8233PRE 0x10
136 1.34 martin #define VIA_REV_8233C 0x20
137 1.34 martin #define VIA_REV_8233 0x30
138 1.34 martin #define VIA_REV_8233A 0x40
139 1.34 martin #define VIA_REV_8235 0x50
140 1.45 kent #define VIA_REV_8237 0x60
141 1.34 martin
142 1.1 tsarna #define AUVIA_PCICONF_JUNK 0x40
143 1.1 tsarna #define AUVIA_PCICONF_ENABLES 0x00FF0000 /* reg 42 mask */
144 1.1 tsarna #define AUVIA_PCICONF_ACLINKENAB 0x00008000 /* ac link enab */
145 1.1 tsarna #define AUVIA_PCICONF_ACNOTRST 0x00004000 /* ~(ac reset) */
146 1.1 tsarna #define AUVIA_PCICONF_ACSYNC 0x00002000 /* ac sync */
147 1.1 tsarna #define AUVIA_PCICONF_ACVSR 0x00000800 /* var. samp. rate */
148 1.1 tsarna #define AUVIA_PCICONF_ACSGD 0x00000400 /* SGD enab */
149 1.1 tsarna #define AUVIA_PCICONF_ACFM 0x00000200 /* FM enab */
150 1.1 tsarna #define AUVIA_PCICONF_ACSB 0x00000100 /* SB enab */
151 1.32 jmmv #define AUVIA_PCICONF_PRIVALID 0x00000001 /* primary codec rdy */
152 1.1 tsarna
153 1.24 kent #define AUVIA_PLAY_BASE 0x00
154 1.24 kent #define AUVIA_RECORD_BASE 0x10
155 1.22 kent
156 1.27 kent /* *_RP_* are offsets from AUVIA_PLAY_BASE or AUVIA_RECORD_BASE */
157 1.24 kent #define AUVIA_RP_STAT 0x00
158 1.1 tsarna #define AUVIA_RPSTAT_INTR 0x03
159 1.24 kent #define AUVIA_RP_CONTROL 0x01
160 1.1 tsarna #define AUVIA_RPCTRL_START 0x80
161 1.1 tsarna #define AUVIA_RPCTRL_TERMINATE 0x40
162 1.22 kent #define AUVIA_RPCTRL_AUTOSTART 0x20
163 1.22 kent /* The following are 8233 specific */
164 1.22 kent #define AUVIA_RPCTRL_STOP 0x04
165 1.22 kent #define AUVIA_RPCTRL_EOL 0x02
166 1.22 kent #define AUVIA_RPCTRL_FLAG 0x01
167 1.27 kent #define AUVIA_RP_MODE 0x02 /* 82c686 specific */
168 1.1 tsarna #define AUVIA_RPMODE_INTR_FLAG 0x01
169 1.1 tsarna #define AUVIA_RPMODE_INTR_EOL 0x02
170 1.1 tsarna #define AUVIA_RPMODE_STEREO 0x10
171 1.1 tsarna #define AUVIA_RPMODE_16BIT 0x20
172 1.1 tsarna #define AUVIA_RPMODE_AUTOSTART 0x80
173 1.24 kent #define AUVIA_RP_DMAOPS_BASE 0x04
174 1.22 kent
175 1.24 kent #define VIA8233_RP_DXS_LVOL 0x02
176 1.24 kent #define VIA8233_RP_DXS_RVOL 0x03
177 1.24 kent #define VIA8233_RP_RATEFMT 0x08
178 1.22 kent #define VIA8233_RATEFMT_48K 0xfffff
179 1.22 kent #define VIA8233_RATEFMT_STEREO 0x00100000
180 1.22 kent #define VIA8233_RATEFMT_16BIT 0x00200000
181 1.22 kent
182 1.24 kent #define VIA_RP_DMAOPS_COUNT 0x0c
183 1.1 tsarna
184 1.27 kent #define VIA8233_MP_BASE 0x40
185 1.27 kent /* STAT, CONTROL, DMAOPS_BASE, DMAOPS_COUNT are valid */
186 1.27 kent #define VIA8233_OFF_MP_FORMAT 0x02
187 1.27 kent #define VIA8233_MP_FORMAT_8BIT 0x00
188 1.27 kent #define VIA8233_MP_FORMAT_16BIT 0x80
189 1.27 kent #define VIA8233_MP_FORMAT_CHANNLE_MASK 0x70 /* 1, 2, 4, 6 */
190 1.27 kent #define VIA8233_OFF_MP_SCRATCH 0x03
191 1.27 kent #define VIA8233_OFF_MP_STOP 0x08
192 1.27 kent
193 1.66 jmcneill #define VIA8233_WR_BASE 0x60
194 1.66 jmcneill
195 1.1 tsarna #define AUVIA_CODEC_CTL 0x80
196 1.1 tsarna #define AUVIA_CODEC_READ 0x00800000
197 1.1 tsarna #define AUVIA_CODEC_BUSY 0x01000000
198 1.1 tsarna #define AUVIA_CODEC_PRIVALID 0x02000000
199 1.1 tsarna #define AUVIA_CODEC_INDEX(x) ((x)<<16)
200 1.1 tsarna
201 1.27 kent #define CH_WRITE1(sc, ch, off, v) \
202 1.27 kent bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (ch)->sc_base + (off), v)
203 1.27 kent #define CH_WRITE4(sc, ch, off, v) \
204 1.27 kent bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (ch)->sc_base + (off), v)
205 1.27 kent #define CH_READ1(sc, ch, off) \
206 1.27 kent bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (ch)->sc_base + (off))
207 1.27 kent #define CH_READ4(sc, ch, off) \
208 1.27 kent bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (ch)->sc_base + (off))
209 1.27 kent
210 1.1 tsarna #define TIMEOUT 50
211 1.1 tsarna
212 1.52 thorpej static const struct audio_hw_if auvia_hw_if = {
213 1.54 kent auvia_open,
214 1.54 kent auvia_close,
215 1.1 tsarna NULL, /* drain */
216 1.1 tsarna auvia_query_encoding,
217 1.1 tsarna auvia_set_params,
218 1.1 tsarna auvia_round_blocksize,
219 1.1 tsarna NULL, /* commit_settings */
220 1.1 tsarna NULL, /* init_output */
221 1.1 tsarna NULL, /* init_input */
222 1.1 tsarna NULL, /* start_output */
223 1.1 tsarna NULL, /* start_input */
224 1.1 tsarna auvia_halt_output,
225 1.1 tsarna auvia_halt_input,
226 1.1 tsarna NULL, /* speaker_ctl */
227 1.1 tsarna auvia_getdev,
228 1.1 tsarna NULL, /* setfd */
229 1.1 tsarna auvia_set_port,
230 1.1 tsarna auvia_get_port,
231 1.1 tsarna auvia_query_devinfo,
232 1.1 tsarna auvia_malloc,
233 1.1 tsarna auvia_free,
234 1.1 tsarna auvia_round_buffersize,
235 1.1 tsarna auvia_mappage,
236 1.1 tsarna auvia_get_props,
237 1.1 tsarna auvia_trigger_output,
238 1.1 tsarna auvia_trigger_input,
239 1.13 augustss NULL, /* dev_ioctl */
240 1.74 jmcneill auvia_get_locks,
241 1.1 tsarna };
242 1.1 tsarna
243 1.48 kent #define AUVIA_FORMATS_4CH_16 2
244 1.48 kent #define AUVIA_FORMATS_6CH_16 3
245 1.48 kent #define AUVIA_FORMATS_4CH_8 6
246 1.48 kent #define AUVIA_FORMATS_6CH_8 7
247 1.48 kent static const struct audio_format auvia_formats[AUVIA_NFORMATS] = {
248 1.48 kent {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
249 1.48 kent 1, AUFMT_MONAURAL, 0, {8000, 48000}},
250 1.48 kent {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
251 1.48 kent 2, AUFMT_STEREO, 0, {8000, 48000}},
252 1.48 kent {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
253 1.48 kent 4, AUFMT_SURROUND4, 0, {8000, 48000}},
254 1.48 kent {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
255 1.48 kent 6, AUFMT_DOLBY_5_1, 0, {8000, 48000}},
256 1.48 kent {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
257 1.48 kent 1, AUFMT_MONAURAL, 0, {8000, 48000}},
258 1.48 kent {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
259 1.48 kent 2, AUFMT_STEREO, 0, {8000, 48000}},
260 1.48 kent {NULL, AUMODE_PLAY, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
261 1.48 kent 4, AUFMT_SURROUND4, 0, {8000, 48000}},
262 1.48 kent {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 8, 8,
263 1.48 kent 6, AUFMT_DOLBY_5_1, 0, {8000, 48000}},
264 1.48 kent };
265 1.48 kent
266 1.54 kent #define AUVIA_SPDIF_NFORMATS 1
267 1.54 kent static const struct audio_format auvia_spdif_formats[AUVIA_SPDIF_NFORMATS] = {
268 1.54 kent {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
269 1.54 kent 2, AUFMT_STEREO, 1, {48000}},
270 1.54 kent };
271 1.1 tsarna
272 1.1 tsarna
273 1.52 thorpej static int
274 1.68 cegger auvia_match(device_t parent, cfdata_t match, void *aux)
275 1.1 tsarna {
276 1.51 kent struct pci_attach_args *pa;
277 1.1 tsarna
278 1.51 kent pa = (struct pci_attach_args *) aux;
279 1.1 tsarna if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_VIATECH)
280 1.1 tsarna return 0;
281 1.15 jmcneill switch (PCI_PRODUCT(pa->pa_id)) {
282 1.15 jmcneill case PCI_PRODUCT_VIATECH_VT82C686A_AC97:
283 1.22 kent case PCI_PRODUCT_VIATECH_VT8233_AC97:
284 1.15 jmcneill break;
285 1.15 jmcneill default:
286 1.1 tsarna return 0;
287 1.15 jmcneill }
288 1.1 tsarna
289 1.1 tsarna return 1;
290 1.1 tsarna }
291 1.1 tsarna
292 1.52 thorpej static void
293 1.63 dyoung auvia_childdet(device_t self, device_t child)
294 1.63 dyoung {
295 1.63 dyoung /* we hold no child references, so do nothing */
296 1.63 dyoung }
297 1.63 dyoung
298 1.63 dyoung static int
299 1.63 dyoung auvia_detach(device_t self, int flags)
300 1.63 dyoung {
301 1.63 dyoung int rc;
302 1.63 dyoung struct auvia_softc *sc = device_private(self);
303 1.63 dyoung
304 1.63 dyoung if ((rc = config_detach_children(self, flags)) != 0)
305 1.63 dyoung return rc;
306 1.63 dyoung pmf_device_deregister(self);
307 1.63 dyoung
308 1.74 jmcneill mutex_enter(&sc->sc_lock);
309 1.63 dyoung auconv_delete_encodings(sc->sc_encodings);
310 1.63 dyoung auconv_delete_encodings(sc->sc_spdif_encodings);
311 1.63 dyoung if (sc->codec_if != NULL)
312 1.63 dyoung sc->codec_if->vtbl->detach(sc->codec_if);
313 1.74 jmcneill mutex_exit(&sc->sc_lock);
314 1.63 dyoung
315 1.63 dyoung /* XXX restore compatibility? */
316 1.63 dyoung if (sc->sc_ih != NULL)
317 1.63 dyoung pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
318 1.63 dyoung
319 1.63 dyoung bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_iosize);
320 1.74 jmcneill if (sc->sc_play.sc_dma_ops != NULL) {
321 1.74 jmcneill auvia_free(sc, sc->sc_play.sc_dma_ops,
322 1.74 jmcneill sc->sc_play.sc_dma_op_count *
323 1.74 jmcneill sizeof(struct auvia_dma_op));
324 1.74 jmcneill }
325 1.74 jmcneill if (sc->sc_record.sc_dma_ops != NULL) {
326 1.74 jmcneill auvia_free(sc, sc->sc_record.sc_dma_ops,
327 1.74 jmcneill sc->sc_play.sc_dma_op_count *
328 1.74 jmcneill sizeof(struct auvia_dma_op));
329 1.74 jmcneill }
330 1.74 jmcneill mutex_destroy(&sc->sc_lock);
331 1.74 jmcneill mutex_destroy(&sc->sc_intr_lock);
332 1.63 dyoung
333 1.63 dyoung return 0;
334 1.63 dyoung }
335 1.63 dyoung
336 1.63 dyoung static void
337 1.63 dyoung auvia_attach(device_t parent, device_t self, void *aux)
338 1.1 tsarna {
339 1.51 kent struct pci_attach_args *pa;
340 1.51 kent struct auvia_softc *sc;
341 1.51 kent const char *intrstr;
342 1.51 kent pci_chipset_tag_t pc;
343 1.51 kent pcitag_t pt;
344 1.22 kent pci_intr_handle_t ih;
345 1.1 tsarna pcireg_t pr;
346 1.27 kent int r;
347 1.51 kent const char *revnum; /* VT823xx revision number */
348 1.77 christos char intrbuf[PCI_INTRSTR_LEN];
349 1.51 kent
350 1.51 kent pa = aux;
351 1.63 dyoung sc = device_private(self);
352 1.69 cegger sc->sc_dev = self;
353 1.51 kent intrstr = NULL;
354 1.51 kent pc = pa->pa_pc;
355 1.51 kent pt = pa->pa_tag;
356 1.51 kent revnum = NULL;
357 1.22 kent
358 1.29 thorpej aprint_naive(": Audio controller\n");
359 1.29 thorpej
360 1.27 kent sc->sc_play.sc_base = AUVIA_PLAY_BASE;
361 1.27 kent sc->sc_record.sc_base = AUVIA_RECORD_BASE;
362 1.27 kent if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_VIATECH_VT8233_AC97) {
363 1.22 kent sc->sc_flags |= AUVIA_FLAGS_VT8233;
364 1.27 kent sc->sc_play.sc_base = VIA8233_MP_BASE;
365 1.66 jmcneill sc->sc_record.sc_base = VIA8233_WR_BASE;
366 1.27 kent }
367 1.22 kent
368 1.22 kent if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_IO, 0, &sc->sc_iot,
369 1.63 dyoung &sc->sc_ioh, NULL, &sc->sc_iosize)) {
370 1.29 thorpej aprint_error(": can't map i/o space\n");
371 1.22 kent return;
372 1.22 kent }
373 1.22 kent
374 1.22 kent sc->sc_dmat = pa->pa_dmat;
375 1.22 kent sc->sc_pc = pc;
376 1.22 kent sc->sc_pt = pt;
377 1.1 tsarna
378 1.1 tsarna r = PCI_REVISION(pa->pa_class);
379 1.22 kent if (sc->sc_flags & AUVIA_FLAGS_VT8233) {
380 1.39 itojun snprintf(sc->sc_revision, sizeof(sc->sc_revision), "0x%02X", r);
381 1.34 martin switch(r) {
382 1.53 rpaulo case VIA_REV_8233PRE:
383 1.53 rpaulo /* same as 8233, but should not be in the market */
384 1.53 rpaulo revnum = "3-Pre";
385 1.53 rpaulo break;
386 1.34 martin case VIA_REV_8233C:
387 1.34 martin /* 2 rec, 4 pb, 1 multi-pb */
388 1.34 martin revnum = "3C";
389 1.34 martin break;
390 1.34 martin case VIA_REV_8233:
391 1.34 martin /* 2 rec, 4 pb, 1 multi-pb, spdif */
392 1.34 martin revnum = "3";
393 1.34 martin break;
394 1.34 martin case VIA_REV_8233A:
395 1.34 martin /* 1 rec, 1 multi-pb, spdif */
396 1.34 martin revnum = "3A";
397 1.34 martin break;
398 1.34 martin default:
399 1.36 xtraeme break;
400 1.22 kent }
401 1.49 xtraeme if (r >= VIA_REV_8237)
402 1.45 kent revnum = "7";
403 1.45 kent else if (r >= VIA_REV_8235) /* 2 rec, 4 pb, 1 multi-pb, spdif */
404 1.35 xtraeme revnum = "5";
405 1.38 jmmv aprint_normal(": VIA Technologies VT823%s AC'97 Audio "
406 1.38 jmmv "(rev %s)\n", revnum, sc->sc_revision);
407 1.1 tsarna } else {
408 1.22 kent sc->sc_revision[1] = '\0';
409 1.22 kent if (r == 0x20) {
410 1.22 kent sc->sc_revision[0] = 'H';
411 1.22 kent } else if ((r >= 0x10) && (r <= 0x14)) {
412 1.22 kent sc->sc_revision[0] = 'A' + (r - 0x10);
413 1.22 kent } else {
414 1.39 itojun snprintf(sc->sc_revision, sizeof(sc->sc_revision),
415 1.39 itojun "0x%02X", r);
416 1.22 kent }
417 1.22 kent
418 1.38 jmmv aprint_normal(": VIA Technologies VT82C686A AC'97 Audio "
419 1.38 jmmv "(rev %s)\n", sc->sc_revision);
420 1.1 tsarna }
421 1.1 tsarna
422 1.9 sommerfe if (pci_intr_map(pa, &ih)) {
423 1.29 thorpej aprint_error(": couldn't map interrupt\n");
424 1.63 dyoung bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_iosize);
425 1.1 tsarna return;
426 1.1 tsarna }
427 1.77 christos intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
428 1.1 tsarna
429 1.74 jmcneill mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
430 1.75 mrg mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO);
431 1.74 jmcneill
432 1.75 mrg sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, auvia_intr, sc);
433 1.1 tsarna if (sc->sc_ih == NULL) {
434 1.69 cegger aprint_error_dev(sc->sc_dev, "couldn't establish interrupt");
435 1.1 tsarna if (intrstr != NULL)
436 1.70 njoly aprint_error(" at %s", intrstr);
437 1.70 njoly aprint_error("\n");
438 1.63 dyoung bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_iosize);
439 1.74 jmcneill mutex_destroy(&sc->sc_lock);
440 1.74 jmcneill mutex_destroy(&sc->sc_intr_lock);
441 1.1 tsarna return;
442 1.1 tsarna }
443 1.1 tsarna
444 1.69 cegger aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", intrstr);
445 1.1 tsarna
446 1.1 tsarna /* disable SBPro compat & others */
447 1.1 tsarna pr = pci_conf_read(pc, pt, AUVIA_PCICONF_JUNK);
448 1.1 tsarna
449 1.1 tsarna pr &= ~AUVIA_PCICONF_ENABLES; /* clear compat function enables */
450 1.1 tsarna /* XXX what to do about MIDI, FM, joystick? */
451 1.1 tsarna
452 1.1 tsarna pr |= (AUVIA_PCICONF_ACLINKENAB | AUVIA_PCICONF_ACNOTRST
453 1.1 tsarna | AUVIA_PCICONF_ACVSR | AUVIA_PCICONF_ACSGD);
454 1.1 tsarna
455 1.1 tsarna pr &= ~(AUVIA_PCICONF_ACFM | AUVIA_PCICONF_ACSB);
456 1.1 tsarna
457 1.1 tsarna pci_conf_write(pc, pt, AUVIA_PCICONF_JUNK, pr);
458 1.1 tsarna
459 1.1 tsarna sc->host_if.arg = sc;
460 1.1 tsarna sc->host_if.attach = auvia_attach_codec;
461 1.1 tsarna sc->host_if.read = auvia_read_codec;
462 1.1 tsarna sc->host_if.write = auvia_write_codec;
463 1.1 tsarna sc->host_if.reset = auvia_reset_codec;
464 1.54 kent sc->host_if.spdif_event = auvia_spdif_event;
465 1.1 tsarna
466 1.74 jmcneill if ((r = ac97_attach(&sc->host_if, self, &sc->sc_lock)) != 0) {
467 1.69 cegger aprint_error_dev(sc->sc_dev, "can't attach codec (error 0x%X)\n", r);
468 1.22 kent pci_intr_disestablish(pc, sc->sc_ih);
469 1.63 dyoung bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_iosize);
470 1.74 jmcneill mutex_destroy(&sc->sc_lock);
471 1.74 jmcneill mutex_destroy(&sc->sc_intr_lock);
472 1.1 tsarna return;
473 1.1 tsarna }
474 1.1 tsarna
475 1.48 kent /* setup audio_format */
476 1.48 kent memcpy(sc->sc_formats, auvia_formats, sizeof(auvia_formats));
477 1.74 jmcneill mutex_enter(&sc->sc_lock);
478 1.48 kent if (sc->sc_play.sc_base != VIA8233_MP_BASE || !AC97_IS_4CH(sc->codec_if)) {
479 1.48 kent AUFMT_INVALIDATE(&sc->sc_formats[AUVIA_FORMATS_4CH_8]);
480 1.48 kent AUFMT_INVALIDATE(&sc->sc_formats[AUVIA_FORMATS_4CH_16]);
481 1.48 kent }
482 1.48 kent if (sc->sc_play.sc_base != VIA8233_MP_BASE || !AC97_IS_6CH(sc->codec_if)) {
483 1.48 kent AUFMT_INVALIDATE(&sc->sc_formats[AUVIA_FORMATS_6CH_8]);
484 1.48 kent AUFMT_INVALIDATE(&sc->sc_formats[AUVIA_FORMATS_6CH_16]);
485 1.48 kent }
486 1.48 kent if (AC97_IS_FIXED_RATE(sc->codec_if)) {
487 1.48 kent for (r = 0; r < AUVIA_NFORMATS; r++) {
488 1.48 kent sc->sc_formats[r].frequency_type = 1;
489 1.48 kent sc->sc_formats[r].frequency[0] = 48000;
490 1.48 kent }
491 1.48 kent }
492 1.74 jmcneill mutex_exit(&sc->sc_lock);
493 1.48 kent
494 1.48 kent if (0 != auconv_create_encodings(sc->sc_formats, AUVIA_NFORMATS,
495 1.48 kent &sc->sc_encodings)) {
496 1.74 jmcneill mutex_enter(&sc->sc_lock);
497 1.48 kent sc->codec_if->vtbl->detach(sc->codec_if);
498 1.74 jmcneill mutex_exit(&sc->sc_lock);
499 1.48 kent pci_intr_disestablish(pc, sc->sc_ih);
500 1.63 dyoung bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_iosize);
501 1.74 jmcneill mutex_destroy(&sc->sc_lock);
502 1.74 jmcneill mutex_destroy(&sc->sc_intr_lock);
503 1.69 cegger aprint_error_dev(sc->sc_dev, "can't create encodings\n");
504 1.48 kent return;
505 1.48 kent }
506 1.54 kent if (0 != auconv_create_encodings(auvia_spdif_formats,
507 1.54 kent AUVIA_SPDIF_NFORMATS, &sc->sc_spdif_encodings)) {
508 1.74 jmcneill mutex_enter(&sc->sc_lock);
509 1.54 kent sc->codec_if->vtbl->detach(sc->codec_if);
510 1.74 jmcneill mutex_exit(&sc->sc_lock);
511 1.54 kent pci_intr_disestablish(pc, sc->sc_ih);
512 1.63 dyoung bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_iosize);
513 1.74 jmcneill mutex_destroy(&sc->sc_lock);
514 1.74 jmcneill mutex_destroy(&sc->sc_intr_lock);
515 1.69 cegger aprint_error_dev(sc->sc_dev, "can't create spdif encodings\n");
516 1.54 kent return;
517 1.54 kent }
518 1.48 kent
519 1.61 jmcneill if (!pmf_device_register(self, NULL, auvia_resume))
520 1.61 jmcneill aprint_error_dev(self, "couldn't establish power handler\n");
521 1.43 kent
522 1.69 cegger audio_attach_mi(&auvia_hw_if, sc, sc->sc_dev);
523 1.74 jmcneill mutex_enter(&sc->sc_lock);
524 1.54 kent sc->codec_if->vtbl->unlock(sc->codec_if);
525 1.74 jmcneill mutex_exit(&sc->sc_lock);
526 1.48 kent return;
527 1.1 tsarna }
528 1.1 tsarna
529 1.52 thorpej static int
530 1.1 tsarna auvia_attach_codec(void *addr, struct ac97_codec_if *cif)
531 1.1 tsarna {
532 1.51 kent struct auvia_softc *sc;
533 1.1 tsarna
534 1.51 kent sc = addr;
535 1.1 tsarna sc->codec_if = cif;
536 1.1 tsarna return 0;
537 1.1 tsarna }
538 1.1 tsarna
539 1.52 thorpej static int
540 1.1 tsarna auvia_reset_codec(void *addr)
541 1.1 tsarna {
542 1.51 kent struct auvia_softc *sc;
543 1.51 kent pcireg_t r;
544 1.32 jmmv int i;
545 1.1 tsarna
546 1.1 tsarna /* perform a codec cold reset */
547 1.51 kent sc = addr;
548 1.1 tsarna r = pci_conf_read(sc->sc_pc, sc->sc_pt, AUVIA_PCICONF_JUNK);
549 1.1 tsarna
550 1.1 tsarna r &= ~AUVIA_PCICONF_ACNOTRST; /* enable RESET (active low) */
551 1.1 tsarna pci_conf_write(sc->sc_pc, sc->sc_pt, AUVIA_PCICONF_JUNK, r);
552 1.1 tsarna delay(2);
553 1.1 tsarna
554 1.22 kent r |= AUVIA_PCICONF_ACNOTRST; /* disable RESET (inactive high) */
555 1.1 tsarna pci_conf_write(sc->sc_pc, sc->sc_pt, AUVIA_PCICONF_JUNK, r);
556 1.1 tsarna delay(200);
557 1.1 tsarna
558 1.32 jmmv for (i = 500000; i != 0 && !(pci_conf_read(sc->sc_pc, sc->sc_pt,
559 1.32 jmmv AUVIA_PCICONF_JUNK) & AUVIA_PCICONF_PRIVALID); i--)
560 1.32 jmmv DELAY(1);
561 1.42 kent if (i == 0) {
562 1.69 cegger printf("%s: codec reset timed out\n", device_xname(sc->sc_dev));
563 1.42 kent return ETIMEDOUT;
564 1.42 kent }
565 1.42 kent return 0;
566 1.1 tsarna }
567 1.1 tsarna
568 1.52 thorpej static int
569 1.1 tsarna auvia_waitready_codec(struct auvia_softc *sc)
570 1.1 tsarna {
571 1.1 tsarna int i;
572 1.1 tsarna
573 1.1 tsarna /* poll until codec not busy */
574 1.1 tsarna for (i = 0; (i < TIMEOUT) && (bus_space_read_4(sc->sc_iot, sc->sc_ioh,
575 1.1 tsarna AUVIA_CODEC_CTL) & AUVIA_CODEC_BUSY); i++)
576 1.1 tsarna delay(1);
577 1.1 tsarna if (i >= TIMEOUT) {
578 1.69 cegger printf("%s: codec busy\n", device_xname(sc->sc_dev));
579 1.1 tsarna return 1;
580 1.1 tsarna }
581 1.1 tsarna
582 1.1 tsarna return 0;
583 1.1 tsarna }
584 1.1 tsarna
585 1.52 thorpej static int
586 1.1 tsarna auvia_waitvalid_codec(struct auvia_softc *sc)
587 1.1 tsarna {
588 1.1 tsarna int i;
589 1.1 tsarna
590 1.1 tsarna /* poll until codec valid */
591 1.1 tsarna for (i = 0; (i < TIMEOUT) && !(bus_space_read_4(sc->sc_iot, sc->sc_ioh,
592 1.1 tsarna AUVIA_CODEC_CTL) & AUVIA_CODEC_PRIVALID); i++)
593 1.1 tsarna delay(1);
594 1.1 tsarna if (i >= TIMEOUT) {
595 1.69 cegger printf("%s: codec invalid\n", device_xname(sc->sc_dev));
596 1.1 tsarna return 1;
597 1.1 tsarna }
598 1.1 tsarna
599 1.1 tsarna return 0;
600 1.1 tsarna }
601 1.1 tsarna
602 1.52 thorpej static int
603 1.1 tsarna auvia_write_codec(void *addr, u_int8_t reg, u_int16_t val)
604 1.1 tsarna {
605 1.51 kent struct auvia_softc *sc;
606 1.1 tsarna
607 1.51 kent sc = addr;
608 1.1 tsarna if (auvia_waitready_codec(sc))
609 1.1 tsarna return 1;
610 1.1 tsarna
611 1.1 tsarna bus_space_write_4(sc->sc_iot, sc->sc_ioh, AUVIA_CODEC_CTL,
612 1.1 tsarna AUVIA_CODEC_PRIVALID | AUVIA_CODEC_INDEX(reg) | val);
613 1.1 tsarna
614 1.1 tsarna return 0;
615 1.1 tsarna }
616 1.1 tsarna
617 1.52 thorpej static int
618 1.1 tsarna auvia_read_codec(void *addr, u_int8_t reg, u_int16_t *val)
619 1.1 tsarna {
620 1.51 kent struct auvia_softc *sc;
621 1.1 tsarna
622 1.51 kent sc = addr;
623 1.1 tsarna if (auvia_waitready_codec(sc))
624 1.1 tsarna return 1;
625 1.1 tsarna
626 1.1 tsarna bus_space_write_4(sc->sc_iot, sc->sc_ioh, AUVIA_CODEC_CTL,
627 1.1 tsarna AUVIA_CODEC_PRIVALID | AUVIA_CODEC_READ | AUVIA_CODEC_INDEX(reg));
628 1.1 tsarna
629 1.1 tsarna if (auvia_waitready_codec(sc))
630 1.1 tsarna return 1;
631 1.1 tsarna
632 1.1 tsarna if (auvia_waitvalid_codec(sc))
633 1.1 tsarna return 1;
634 1.1 tsarna
635 1.1 tsarna *val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, AUVIA_CODEC_CTL);
636 1.1 tsarna
637 1.1 tsarna return 0;
638 1.1 tsarna }
639 1.1 tsarna
640 1.54 kent static void
641 1.59 thorpej auvia_spdif_event(void *addr, bool flag)
642 1.54 kent {
643 1.54 kent struct auvia_softc *sc;
644 1.54 kent
645 1.54 kent sc = addr;
646 1.54 kent sc->sc_spdif = flag;
647 1.54 kent }
648 1.54 kent
649 1.54 kent static int
650 1.58 christos auvia_open(void *addr, int flags)
651 1.54 kent {
652 1.54 kent struct auvia_softc *sc;
653 1.54 kent
654 1.54 kent sc = (struct auvia_softc *)addr;
655 1.74 jmcneill mutex_spin_exit(&sc->sc_intr_lock);
656 1.54 kent sc->codec_if->vtbl->lock(sc->codec_if);
657 1.74 jmcneill mutex_spin_enter(&sc->sc_intr_lock);
658 1.54 kent return 0;
659 1.54 kent }
660 1.54 kent
661 1.54 kent static void
662 1.54 kent auvia_close(void *addr)
663 1.54 kent {
664 1.54 kent struct auvia_softc *sc;
665 1.54 kent
666 1.54 kent sc = (struct auvia_softc *)addr;
667 1.74 jmcneill mutex_spin_exit(&sc->sc_intr_lock);
668 1.54 kent sc->codec_if->vtbl->unlock(sc->codec_if);
669 1.74 jmcneill mutex_spin_enter(&sc->sc_intr_lock);
670 1.54 kent }
671 1.54 kent
672 1.52 thorpej static int
673 1.1 tsarna auvia_query_encoding(void *addr, struct audio_encoding *fp)
674 1.1 tsarna {
675 1.48 kent struct auvia_softc *sc;
676 1.48 kent
677 1.48 kent sc = (struct auvia_softc *)addr;
678 1.54 kent return auconv_query_encoding(
679 1.54 kent sc->sc_spdif ? sc->sc_spdif_encodings : sc->sc_encodings, fp);
680 1.1 tsarna }
681 1.1 tsarna
682 1.52 thorpej static void
683 1.27 kent auvia_set_params_sub(struct auvia_softc *sc, struct auvia_softc_chan *ch,
684 1.50 kent const audio_params_t *p)
685 1.27 kent {
686 1.51 kent uint32_t v;
687 1.51 kent uint16_t regval;
688 1.27 kent
689 1.27 kent if (!(sc->sc_flags & AUVIA_FLAGS_VT8233)) {
690 1.50 kent regval = (p->channels == 2 ? AUVIA_RPMODE_STEREO : 0)
691 1.50 kent | (p->precision == 16 ?
692 1.27 kent AUVIA_RPMODE_16BIT : 0)
693 1.27 kent | AUVIA_RPMODE_INTR_FLAG | AUVIA_RPMODE_INTR_EOL
694 1.27 kent | AUVIA_RPMODE_AUTOSTART;
695 1.27 kent ch->sc_reg = regval;
696 1.27 kent } else if (ch->sc_base != VIA8233_MP_BASE) {
697 1.27 kent v = CH_READ4(sc, ch, VIA8233_RP_RATEFMT);
698 1.27 kent v &= ~(VIA8233_RATEFMT_48K | VIA8233_RATEFMT_STEREO
699 1.27 kent | VIA8233_RATEFMT_16BIT);
700 1.27 kent
701 1.50 kent v |= VIA8233_RATEFMT_48K * (p->sample_rate / 20)
702 1.27 kent / (48000 / 20);
703 1.50 kent if (p->channels == 2)
704 1.27 kent v |= VIA8233_RATEFMT_STEREO;
705 1.50 kent if (p->precision == 16)
706 1.27 kent v |= VIA8233_RATEFMT_16BIT;
707 1.27 kent
708 1.27 kent CH_WRITE4(sc, ch, VIA8233_RP_RATEFMT, v);
709 1.27 kent } else {
710 1.27 kent static const u_int32_t slottab[7] =
711 1.27 kent { 0, 0xff000011, 0xff000021, 0,
712 1.27 kent 0xff004321, 0, 0xff436521};
713 1.27 kent
714 1.50 kent regval = (p->precision == 16
715 1.27 kent ? VIA8233_MP_FORMAT_16BIT : VIA8233_MP_FORMAT_8BIT)
716 1.50 kent | (p->channels << 4);
717 1.27 kent CH_WRITE1(sc, ch, VIA8233_OFF_MP_FORMAT, regval);
718 1.50 kent CH_WRITE4(sc, ch, VIA8233_OFF_MP_STOP, slottab[p->channels]);
719 1.27 kent }
720 1.27 kent }
721 1.1 tsarna
722 1.52 thorpej static int
723 1.58 christos auvia_set_params(void *addr, int setmode, int usemode,
724 1.57 christos audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil,
725 1.57 christos stream_filter_list_t *rfil)
726 1.1 tsarna {
727 1.51 kent struct auvia_softc *sc;
728 1.27 kent struct auvia_softc_chan *ch;
729 1.1 tsarna struct audio_params *p;
730 1.27 kent struct ac97_codec_if* codec;
731 1.50 kent stream_filter_list_t *fil;
732 1.27 kent int reg, mode;
733 1.48 kent int index;
734 1.1 tsarna
735 1.51 kent sc = addr;
736 1.27 kent codec = sc->codec_if;
737 1.1 tsarna /* for mode in (RECORD, PLAY) */
738 1.22 kent for (mode = AUMODE_RECORD; mode != -1;
739 1.1 tsarna mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) {
740 1.1 tsarna if ((setmode & mode) == 0)
741 1.1 tsarna continue;
742 1.1 tsarna
743 1.22 kent if (mode == AUMODE_PLAY ) {
744 1.22 kent p = play;
745 1.27 kent ch = &sc->sc_play;
746 1.28 kent reg = AC97_REG_PCM_FRONT_DAC_RATE;
747 1.50 kent fil = pfil;
748 1.22 kent } else {
749 1.22 kent p = rec;
750 1.27 kent ch = &sc->sc_record;
751 1.28 kent reg = AC97_REG_PCM_LR_ADC_RATE;
752 1.50 kent fil = rfil;
753 1.22 kent }
754 1.22 kent
755 1.1 tsarna if (p->sample_rate < 4000 || p->sample_rate > 48000 ||
756 1.27 kent (p->precision != 8 && p->precision != 16))
757 1.1 tsarna return (EINVAL);
758 1.54 kent if (sc->sc_spdif)
759 1.54 kent index = auconv_set_converter(auvia_spdif_formats,
760 1.54 kent AUVIA_SPDIF_NFORMATS, mode, p, TRUE, fil);
761 1.54 kent else
762 1.54 kent index = auconv_set_converter(sc->sc_formats,
763 1.54 kent AUVIA_NFORMATS, mode, p, TRUE, fil);
764 1.48 kent if (index < 0)
765 1.48 kent return EINVAL;
766 1.50 kent if (fil->req_size > 0)
767 1.50 kent p = &fil->filters[0].param;
768 1.48 kent if (!AC97_IS_FIXED_RATE(codec)) {
769 1.50 kent if (codec->vtbl->set_rate(codec, reg, &p->sample_rate))
770 1.48 kent return EINVAL;
771 1.27 kent reg = AC97_REG_PCM_SURR_DAC_RATE;
772 1.50 kent if (p->channels >= 4
773 1.27 kent && codec->vtbl->set_rate(codec, reg,
774 1.50 kent &p->sample_rate))
775 1.48 kent return EINVAL;
776 1.27 kent reg = AC97_REG_PCM_LFE_DAC_RATE;
777 1.50 kent if (p->channels == 6
778 1.27 kent && codec->vtbl->set_rate(codec, reg,
779 1.50 kent &p->sample_rate))
780 1.48 kent return EINVAL;
781 1.1 tsarna }
782 1.27 kent auvia_set_params_sub(sc, ch, p);
783 1.1 tsarna }
784 1.1 tsarna
785 1.1 tsarna return 0;
786 1.1 tsarna }
787 1.1 tsarna
788 1.52 thorpej static int
789 1.50 kent auvia_round_blocksize(void *addr, int blk,
790 1.58 christos int mode, const audio_params_t *param)
791 1.1 tsarna {
792 1.51 kent struct auvia_softc *sc;
793 1.37 jmcneill
794 1.51 kent sc = addr;
795 1.74 jmcneill
796 1.37 jmcneill /* XXX VT823x might have the limitation of dma_ops size */
797 1.37 jmcneill if (sc->sc_flags & AUVIA_FLAGS_VT8233 && blk < 288)
798 1.37 jmcneill blk = 288;
799 1.37 jmcneill
800 1.74 jmcneill /* Avoid too many dma_ops. */
801 1.79 riastrad return uimin((blk & -32), AUVIA_MINBLKSZ);
802 1.1 tsarna }
803 1.1 tsarna
804 1.52 thorpej static int
805 1.1 tsarna auvia_halt_output(void *addr)
806 1.1 tsarna {
807 1.51 kent struct auvia_softc *sc;
808 1.51 kent struct auvia_softc_chan *ch;
809 1.1 tsarna
810 1.51 kent sc = addr;
811 1.51 kent ch = &(sc->sc_play);
812 1.27 kent CH_WRITE1(sc, ch, AUVIA_RP_CONTROL, AUVIA_RPCTRL_TERMINATE);
813 1.41 mycroft ch->sc_intr = NULL;
814 1.1 tsarna return 0;
815 1.1 tsarna }
816 1.1 tsarna
817 1.52 thorpej static int
818 1.1 tsarna auvia_halt_input(void *addr)
819 1.1 tsarna {
820 1.51 kent struct auvia_softc *sc;
821 1.51 kent struct auvia_softc_chan *ch;
822 1.1 tsarna
823 1.51 kent sc = addr;
824 1.51 kent ch = &(sc->sc_record);
825 1.27 kent CH_WRITE1(sc, ch, AUVIA_RP_CONTROL, AUVIA_RPCTRL_TERMINATE);
826 1.41 mycroft ch->sc_intr = NULL;
827 1.1 tsarna return 0;
828 1.1 tsarna }
829 1.1 tsarna
830 1.52 thorpej static int
831 1.1 tsarna auvia_getdev(void *addr, struct audio_device *retp)
832 1.1 tsarna {
833 1.51 kent struct auvia_softc *sc;
834 1.1 tsarna
835 1.1 tsarna if (retp) {
836 1.51 kent sc = addr;
837 1.22 kent if (sc->sc_flags & AUVIA_FLAGS_VT8233) {
838 1.45 kent strncpy(retp->name, "VIA VT823x",
839 1.22 kent sizeof(retp->name));
840 1.22 kent } else {
841 1.22 kent strncpy(retp->name, "VIA VT82C686A",
842 1.22 kent sizeof(retp->name));
843 1.22 kent }
844 1.1 tsarna strncpy(retp->version, sc->sc_revision, sizeof(retp->version));
845 1.1 tsarna strncpy(retp->config, "auvia", sizeof(retp->config));
846 1.1 tsarna }
847 1.1 tsarna
848 1.1 tsarna return 0;
849 1.1 tsarna }
850 1.1 tsarna
851 1.52 thorpej static int
852 1.1 tsarna auvia_set_port(void *addr, mixer_ctrl_t *cp)
853 1.1 tsarna {
854 1.51 kent struct auvia_softc *sc;
855 1.1 tsarna
856 1.51 kent sc = addr;
857 1.51 kent return sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp);
858 1.1 tsarna }
859 1.1 tsarna
860 1.52 thorpej static int
861 1.1 tsarna auvia_get_port(void *addr, mixer_ctrl_t *cp)
862 1.1 tsarna {
863 1.51 kent struct auvia_softc *sc;
864 1.1 tsarna
865 1.51 kent sc = addr;
866 1.51 kent return sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp);
867 1.1 tsarna }
868 1.1 tsarna
869 1.52 thorpej static int
870 1.1 tsarna auvia_query_devinfo(void *addr, mixer_devinfo_t *dip)
871 1.1 tsarna {
872 1.51 kent struct auvia_softc *sc;
873 1.1 tsarna
874 1.51 kent sc = addr;
875 1.51 kent return sc->codec_if->vtbl->query_devinfo(sc->codec_if, dip);
876 1.1 tsarna }
877 1.1 tsarna
878 1.74 jmcneill static int
879 1.74 jmcneill auvia_malloc_channel(struct auvia_softc *sc, struct auvia_softc_chan *ch,
880 1.74 jmcneill size_t size)
881 1.74 jmcneill {
882 1.74 jmcneill struct auvia_dma *dp;
883 1.74 jmcneill int segs;
884 1.74 jmcneill
885 1.74 jmcneill /* if old list is large enough, nothing to do */
886 1.74 jmcneill segs = (size + AUVIA_MINBLKSZ - 1) / AUVIA_MINBLKSZ;
887 1.74 jmcneill if (segs <= ch->sc_dma_op_count) {
888 1.74 jmcneill return 0;
889 1.74 jmcneill }
890 1.74 jmcneill
891 1.74 jmcneill if (ch->sc_dma_ops) {
892 1.74 jmcneill auvia_free(sc, ch->sc_dma_ops,
893 1.74 jmcneill ch->sc_dma_op_count * sizeof(*dp));
894 1.74 jmcneill }
895 1.74 jmcneill
896 1.74 jmcneill ch->sc_dma_ops = auvia_malloc_dmamem(sc, 0,
897 1.74 jmcneill sizeof(struct auvia_dma_op) * segs);
898 1.74 jmcneill
899 1.74 jmcneill if (ch->sc_dma_ops == NULL) {
900 1.74 jmcneill aprint_error_dev(sc->sc_dev, "couldn't build dmaops\n");
901 1.74 jmcneill return ENOMEM;
902 1.74 jmcneill }
903 1.74 jmcneill
904 1.74 jmcneill for (dp = sc->sc_dmas;
905 1.74 jmcneill dp && dp->addr != (void *)(ch->sc_dma_ops);
906 1.74 jmcneill dp = dp->next)
907 1.74 jmcneill continue;
908 1.74 jmcneill
909 1.74 jmcneill if (!dp)
910 1.74 jmcneill panic("%s: build_dma_ops: where'd my memory go??? "
911 1.74 jmcneill "address (%p)\n", device_xname(sc->sc_dev),
912 1.74 jmcneill ch->sc_dma_ops);
913 1.74 jmcneill
914 1.74 jmcneill ch->sc_dma_op_count = segs;
915 1.74 jmcneill ch->sc_dma_ops_dma = dp;
916 1.74 jmcneill
917 1.74 jmcneill return 0;
918 1.74 jmcneill }
919 1.74 jmcneill
920 1.52 thorpej static void *
921 1.74 jmcneill auvia_malloc_dmamem(void *addr, int direction, size_t size)
922 1.1 tsarna {
923 1.51 kent struct auvia_softc *sc;
924 1.1 tsarna struct auvia_dma *p;
925 1.1 tsarna int error;
926 1.1 tsarna int rseg;
927 1.1 tsarna
928 1.74 jmcneill p = kmem_alloc(sizeof(*p), KM_SLEEP);
929 1.51 kent sc = addr;
930 1.2 tsarna p->size = size;
931 1.6 thorpej if ((error = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &p->seg,
932 1.74 jmcneill 1, &rseg, BUS_DMA_WAITOK)) != 0) {
933 1.69 cegger aprint_error_dev(sc->sc_dev, "unable to allocate DMA, error = %d\n", error);
934 1.1 tsarna goto fail_alloc;
935 1.1 tsarna }
936 1.1 tsarna
937 1.1 tsarna if ((error = bus_dmamem_map(sc->sc_dmat, &p->seg, rseg, size, &p->addr,
938 1.74 jmcneill BUS_DMA_WAITOK | BUS_DMA_COHERENT)) != 0) {
939 1.69 cegger aprint_error_dev(sc->sc_dev, "unable to map DMA, error = %d\n",
940 1.64 cegger error);
941 1.1 tsarna goto fail_map;
942 1.1 tsarna }
943 1.1 tsarna
944 1.22 kent if ((error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
945 1.74 jmcneill BUS_DMA_WAITOK, &p->map)) != 0) {
946 1.69 cegger aprint_error_dev(sc->sc_dev, "unable to create DMA map, error = %d\n",
947 1.64 cegger error);
948 1.1 tsarna goto fail_create;
949 1.1 tsarna }
950 1.1 tsarna
951 1.1 tsarna if ((error = bus_dmamap_load(sc->sc_dmat, p->map, p->addr, size, NULL,
952 1.74 jmcneill BUS_DMA_WAITOK)) != 0) {
953 1.69 cegger aprint_error_dev(sc->sc_dev, "unable to load DMA map, error = %d\n",
954 1.64 cegger error);
955 1.1 tsarna goto fail_load;
956 1.1 tsarna }
957 1.1 tsarna
958 1.1 tsarna p->next = sc->sc_dmas;
959 1.1 tsarna sc->sc_dmas = p;
960 1.1 tsarna
961 1.1 tsarna return p->addr;
962 1.1 tsarna
963 1.1 tsarna fail_load:
964 1.1 tsarna bus_dmamap_destroy(sc->sc_dmat, p->map);
965 1.1 tsarna fail_create:
966 1.1 tsarna bus_dmamem_unmap(sc->sc_dmat, p->addr, size);
967 1.1 tsarna fail_map:
968 1.1 tsarna bus_dmamem_free(sc->sc_dmat, &p->seg, 1);
969 1.1 tsarna fail_alloc:
970 1.74 jmcneill kmem_free(p, sizeof(*p));
971 1.51 kent return NULL;
972 1.1 tsarna }
973 1.1 tsarna
974 1.74 jmcneill static void *
975 1.74 jmcneill auvia_malloc(void *addr, int direction, size_t size)
976 1.74 jmcneill {
977 1.74 jmcneill struct auvia_softc *sc;
978 1.74 jmcneill void *p;
979 1.74 jmcneill
980 1.74 jmcneill sc = addr;
981 1.74 jmcneill
982 1.74 jmcneill p = auvia_malloc_dmamem(addr, direction, size);
983 1.74 jmcneill if (p == NULL) {
984 1.74 jmcneill return NULL;
985 1.74 jmcneill }
986 1.74 jmcneill if (auvia_malloc_channel(sc, &sc->sc_play, size) != 0) {
987 1.74 jmcneill auvia_free(addr, p, size);
988 1.74 jmcneill return NULL;
989 1.74 jmcneill }
990 1.74 jmcneill if (auvia_malloc_channel(sc, &sc->sc_record, size) != 0) {
991 1.74 jmcneill auvia_free(addr, p, size);
992 1.74 jmcneill return NULL;
993 1.74 jmcneill }
994 1.74 jmcneill return p;
995 1.74 jmcneill }
996 1.74 jmcneill
997 1.52 thorpej static void
998 1.74 jmcneill auvia_free(void *addr, void *ptr, size_t size)
999 1.1 tsarna {
1000 1.51 kent struct auvia_softc *sc;
1001 1.2 tsarna struct auvia_dma **pp, *p;
1002 1.1 tsarna
1003 1.51 kent sc = addr;
1004 1.2 tsarna for (pp = &(sc->sc_dmas); (p = *pp) != NULL; pp = &p->next)
1005 1.2 tsarna if (p->addr == ptr) {
1006 1.2 tsarna bus_dmamap_unload(sc->sc_dmat, p->map);
1007 1.2 tsarna bus_dmamap_destroy(sc->sc_dmat, p->map);
1008 1.2 tsarna bus_dmamem_unmap(sc->sc_dmat, p->addr, p->size);
1009 1.2 tsarna bus_dmamem_free(sc->sc_dmat, &p->seg, 1);
1010 1.22 kent
1011 1.2 tsarna *pp = p->next;
1012 1.74 jmcneill kmem_free(p, sizeof(*p));
1013 1.2 tsarna return;
1014 1.2 tsarna }
1015 1.1 tsarna
1016 1.2 tsarna panic("auvia_free: trying to free unallocated memory");
1017 1.1 tsarna }
1018 1.1 tsarna
1019 1.52 thorpej static size_t
1020 1.58 christos auvia_round_buffersize(void *addr, int direction, size_t size)
1021 1.1 tsarna {
1022 1.51 kent
1023 1.1 tsarna return size;
1024 1.1 tsarna }
1025 1.1 tsarna
1026 1.52 thorpej static paddr_t
1027 1.4 simonb auvia_mappage(void *addr, void *mem, off_t off, int prot)
1028 1.1 tsarna {
1029 1.51 kent struct auvia_softc *sc;
1030 1.1 tsarna struct auvia_dma *p;
1031 1.1 tsarna
1032 1.1 tsarna if (off < 0)
1033 1.1 tsarna return -1;
1034 1.51 kent sc = addr;
1035 1.1 tsarna for (p = sc->sc_dmas; p && p->addr != mem; p = p->next)
1036 1.51 kent continue;
1037 1.1 tsarna
1038 1.1 tsarna if (!p)
1039 1.1 tsarna return -1;
1040 1.1 tsarna
1041 1.22 kent return bus_dmamem_mmap(sc->sc_dmat, &p->seg, 1, off, prot,
1042 1.51 kent BUS_DMA_WAITOK);
1043 1.1 tsarna }
1044 1.1 tsarna
1045 1.52 thorpej static int
1046 1.1 tsarna auvia_get_props(void *addr)
1047 1.1 tsarna {
1048 1.51 kent struct auvia_softc *sc;
1049 1.26 kent int props;
1050 1.26 kent
1051 1.26 kent props = AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX;
1052 1.51 kent sc = addr;
1053 1.26 kent /*
1054 1.26 kent * Even if the codec is fixed-rate, set_param() succeeds for any sample
1055 1.26 kent * rate because of aurateconv. Applications can't know what rate the
1056 1.26 kent * device can process in the case of mmap().
1057 1.26 kent */
1058 1.46 kent if (!AC97_IS_FIXED_RATE(sc->codec_if))
1059 1.26 kent props |= AUDIO_PROP_MMAP;
1060 1.26 kent return props;
1061 1.1 tsarna }
1062 1.1 tsarna
1063 1.74 jmcneill static void
1064 1.74 jmcneill auvia_get_locks(void *addr, kmutex_t **intr, kmutex_t **thread)
1065 1.74 jmcneill {
1066 1.74 jmcneill struct auvia_softc *sc;
1067 1.74 jmcneill
1068 1.74 jmcneill sc = addr;
1069 1.74 jmcneill *intr = &sc->sc_intr_lock;
1070 1.74 jmcneill *thread = &sc->sc_lock;
1071 1.74 jmcneill }
1072 1.74 jmcneill
1073 1.52 thorpej static int
1074 1.1 tsarna auvia_build_dma_ops(struct auvia_softc *sc, struct auvia_softc_chan *ch,
1075 1.1 tsarna struct auvia_dma *p, void *start, void *end, int blksize)
1076 1.1 tsarna {
1077 1.1 tsarna struct auvia_dma_op *op;
1078 1.33 simonb bus_addr_t s;
1079 1.1 tsarna size_t l;
1080 1.1 tsarna
1081 1.74 jmcneill op = ch->sc_dma_ops;
1082 1.1 tsarna s = p->map->dm_segs[0].ds_addr;
1083 1.1 tsarna l = ((char *)end - (char *)start);
1084 1.1 tsarna
1085 1.1 tsarna while (l) {
1086 1.62 tsutsui op->ptr = htole32(s);
1087 1.1 tsarna l = l - blksize;
1088 1.1 tsarna if (!l) {
1089 1.1 tsarna /* if last block */
1090 1.62 tsutsui op->flags = htole32(AUVIA_DMAOP_EOL | blksize);
1091 1.1 tsarna } else {
1092 1.62 tsutsui op->flags = htole32(AUVIA_DMAOP_FLAG | blksize);
1093 1.1 tsarna }
1094 1.1 tsarna s += blksize;
1095 1.1 tsarna op++;
1096 1.1 tsarna }
1097 1.1 tsarna
1098 1.1 tsarna return 0;
1099 1.1 tsarna }
1100 1.1 tsarna
1101 1.1 tsarna
1102 1.52 thorpej static int
1103 1.57 christos auvia_trigger_output(void *addr, void *start, void *end, int blksize,
1104 1.58 christos void (*intr)(void *), void *arg, const audio_params_t *param)
1105 1.1 tsarna {
1106 1.51 kent struct auvia_softc *sc;
1107 1.51 kent struct auvia_softc_chan *ch;
1108 1.1 tsarna struct auvia_dma *p;
1109 1.1 tsarna
1110 1.51 kent sc = addr;
1111 1.51 kent ch = &(sc->sc_play);
1112 1.1 tsarna for (p = sc->sc_dmas; p && p->addr != start; p = p->next)
1113 1.51 kent continue;
1114 1.1 tsarna
1115 1.1 tsarna if (!p)
1116 1.1 tsarna panic("auvia_trigger_output: request with bad start "
1117 1.18 provos "address (%p)", start);
1118 1.1 tsarna
1119 1.1 tsarna if (auvia_build_dma_ops(sc, ch, p, start, end, blksize)) {
1120 1.1 tsarna return 1;
1121 1.1 tsarna }
1122 1.1 tsarna
1123 1.1 tsarna ch->sc_intr = intr;
1124 1.1 tsarna ch->sc_arg = arg;
1125 1.1 tsarna
1126 1.27 kent CH_WRITE4(sc, ch, AUVIA_RP_DMAOPS_BASE,
1127 1.1 tsarna ch->sc_dma_ops_dma->map->dm_segs[0].ds_addr);
1128 1.1 tsarna
1129 1.22 kent if (sc->sc_flags & AUVIA_FLAGS_VT8233) {
1130 1.27 kent if (ch->sc_base != VIA8233_MP_BASE) {
1131 1.27 kent CH_WRITE1(sc, ch, VIA8233_RP_DXS_LVOL, 0);
1132 1.27 kent CH_WRITE1(sc, ch, VIA8233_RP_DXS_RVOL, 0);
1133 1.27 kent }
1134 1.27 kent CH_WRITE1(sc, ch, AUVIA_RP_CONTROL,
1135 1.22 kent AUVIA_RPCTRL_START | AUVIA_RPCTRL_AUTOSTART |
1136 1.22 kent AUVIA_RPCTRL_STOP | AUVIA_RPCTRL_EOL | AUVIA_RPCTRL_FLAG);
1137 1.24 kent } else {
1138 1.27 kent CH_WRITE1(sc, ch, AUVIA_RP_MODE, ch->sc_reg);
1139 1.27 kent CH_WRITE1(sc, ch, AUVIA_RP_CONTROL, AUVIA_RPCTRL_START);
1140 1.24 kent }
1141 1.1 tsarna
1142 1.1 tsarna return 0;
1143 1.1 tsarna }
1144 1.1 tsarna
1145 1.52 thorpej static int
1146 1.57 christos auvia_trigger_input(void *addr, void *start, void *end, int blksize,
1147 1.58 christos void (*intr)(void *), void *arg, const audio_params_t *param)
1148 1.1 tsarna {
1149 1.51 kent struct auvia_softc *sc;
1150 1.51 kent struct auvia_softc_chan *ch;
1151 1.1 tsarna struct auvia_dma *p;
1152 1.1 tsarna
1153 1.51 kent sc = addr;
1154 1.51 kent ch = &(sc->sc_record);
1155 1.1 tsarna for (p = sc->sc_dmas; p && p->addr != start; p = p->next)
1156 1.51 kent continue;
1157 1.1 tsarna
1158 1.1 tsarna if (!p)
1159 1.1 tsarna panic("auvia_trigger_input: request with bad start "
1160 1.18 provos "address (%p)", start);
1161 1.1 tsarna
1162 1.1 tsarna if (auvia_build_dma_ops(sc, ch, p, start, end, blksize)) {
1163 1.1 tsarna return 1;
1164 1.1 tsarna }
1165 1.1 tsarna
1166 1.1 tsarna ch->sc_intr = intr;
1167 1.1 tsarna ch->sc_arg = arg;
1168 1.1 tsarna
1169 1.27 kent CH_WRITE4(sc, ch, AUVIA_RP_DMAOPS_BASE,
1170 1.27 kent ch->sc_dma_ops_dma->map->dm_segs[0].ds_addr);
1171 1.1 tsarna
1172 1.24 kent if (sc->sc_flags & AUVIA_FLAGS_VT8233) {
1173 1.27 kent CH_WRITE1(sc, ch, VIA8233_RP_DXS_LVOL, 0);
1174 1.27 kent CH_WRITE1(sc, ch, VIA8233_RP_DXS_RVOL, 0);
1175 1.27 kent CH_WRITE1(sc, ch, AUVIA_RP_CONTROL,
1176 1.22 kent AUVIA_RPCTRL_START | AUVIA_RPCTRL_AUTOSTART |
1177 1.22 kent AUVIA_RPCTRL_STOP | AUVIA_RPCTRL_EOL | AUVIA_RPCTRL_FLAG);
1178 1.24 kent } else {
1179 1.27 kent CH_WRITE1(sc, ch, AUVIA_RP_MODE, ch->sc_reg);
1180 1.27 kent CH_WRITE1(sc, ch, AUVIA_RP_CONTROL, AUVIA_RPCTRL_START);
1181 1.24 kent }
1182 1.1 tsarna
1183 1.1 tsarna return 0;
1184 1.1 tsarna }
1185 1.1 tsarna
1186 1.52 thorpej static int
1187 1.1 tsarna auvia_intr(void *arg)
1188 1.1 tsarna {
1189 1.51 kent struct auvia_softc *sc;
1190 1.27 kent struct auvia_softc_chan *ch;
1191 1.1 tsarna u_int8_t r;
1192 1.17 fvdl int rval;
1193 1.17 fvdl
1194 1.51 kent sc = arg;
1195 1.17 fvdl rval = 0;
1196 1.74 jmcneill ch = &sc->sc_record;
1197 1.1 tsarna
1198 1.74 jmcneill mutex_spin_enter(&sc->sc_intr_lock);
1199 1.27 kent r = CH_READ1(sc, ch, AUVIA_RP_STAT);
1200 1.1 tsarna if (r & AUVIA_RPSTAT_INTR) {
1201 1.2 tsarna if (sc->sc_record.sc_intr)
1202 1.2 tsarna sc->sc_record.sc_intr(sc->sc_record.sc_arg);
1203 1.1 tsarna
1204 1.1 tsarna /* clear interrupts */
1205 1.27 kent CH_WRITE1(sc, ch, AUVIA_RP_STAT, AUVIA_RPSTAT_INTR);
1206 1.17 fvdl rval = 1;
1207 1.1 tsarna }
1208 1.22 kent
1209 1.27 kent ch = &sc->sc_play;
1210 1.27 kent r = CH_READ1(sc, ch, AUVIA_RP_STAT);
1211 1.1 tsarna if (r & AUVIA_RPSTAT_INTR) {
1212 1.2 tsarna if (sc->sc_play.sc_intr)
1213 1.2 tsarna sc->sc_play.sc_intr(sc->sc_play.sc_arg);
1214 1.1 tsarna
1215 1.1 tsarna /* clear interrupts */
1216 1.27 kent CH_WRITE1(sc, ch, AUVIA_RP_STAT, AUVIA_RPSTAT_INTR);
1217 1.17 fvdl rval = 1;
1218 1.1 tsarna }
1219 1.74 jmcneill mutex_spin_exit(&sc->sc_intr_lock);
1220 1.1 tsarna
1221 1.17 fvdl return rval;
1222 1.1 tsarna }
1223 1.43 kent
1224 1.61 jmcneill static bool
1225 1.72 dyoung auvia_resume(device_t dv, const pmf_qual_t *qual)
1226 1.43 kent {
1227 1.61 jmcneill struct auvia_softc *sc = device_private(dv);
1228 1.43 kent
1229 1.74 jmcneill mutex_enter(&sc->sc_lock);
1230 1.74 jmcneill mutex_spin_enter(&sc->sc_intr_lock);
1231 1.61 jmcneill auvia_reset_codec(sc);
1232 1.61 jmcneill DELAY(1000);
1233 1.74 jmcneill mutex_spin_exit(&sc->sc_intr_lock);
1234 1.61 jmcneill (sc->codec_if->vtbl->restore_ports)(sc->codec_if);
1235 1.74 jmcneill mutex_exit(&sc->sc_lock);
1236 1.43 kent
1237 1.61 jmcneill return true;
1238 1.43 kent }
1239