auvia.c revision 1.49
1 /* $NetBSD: auvia.c,v 1.49 2004/11/16 17:15:01 xtraeme Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Tyler C. Sarna 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * VIA Technologies VT82C686A / VT8233 / VT8235 Southbridge Audio Driver 41 * 42 * Documentation links: 43 * 44 * ftp://ftp.alsa-project.org/pub/manuals/via/686a.pdf 45 * ftp://ftp.alsa-project.org/pub/manuals/general/ac97r21.pdf 46 * ftp://ftp.alsa-project.org/pub/manuals/ad/AD1881_0.pdf (example AC'97 codec) 47 */ 48 49 #include <sys/cdefs.h> 50 __KERNEL_RCSID(0, "$NetBSD: auvia.c,v 1.49 2004/11/16 17:15:01 xtraeme Exp $"); 51 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/malloc.h> 55 #include <sys/device.h> 56 #include <sys/audioio.h> 57 58 #include <uvm/uvm_extern.h> 59 60 #include <dev/pci/pcidevs.h> 61 #include <dev/pci/pcivar.h> 62 63 #include <dev/audio_if.h> 64 #include <dev/mulaw.h> 65 #include <dev/auconv.h> 66 67 #include <dev/ic/ac97reg.h> 68 #include <dev/ic/ac97var.h> 69 70 #include <dev/pci/auviavar.h> 71 72 struct auvia_dma { 73 struct auvia_dma *next; 74 caddr_t addr; 75 size_t size; 76 bus_dmamap_t map; 77 bus_dma_segment_t seg; 78 }; 79 80 struct auvia_dma_op { 81 u_int32_t ptr; 82 u_int32_t flags; 83 #define AUVIA_DMAOP_EOL 0x80000000 84 #define AUVIA_DMAOP_FLAG 0x40000000 85 #define AUVIA_DMAOP_STOP 0x20000000 86 #define AUVIA_DMAOP_COUNT(x) ((x)&0x00FFFFFF) 87 }; 88 89 int auvia_match(struct device *, struct cfdata *, void *); 90 void auvia_attach(struct device *, struct device *, void *); 91 int auvia_open(void *, int); 92 void auvia_close(void *); 93 int auvia_query_encoding(void *, struct audio_encoding *); 94 void auvia_set_params_sub(struct auvia_softc *, struct auvia_softc_chan *, 95 struct audio_params *); 96 int auvia_set_params(void *, int, int, struct audio_params *, 97 struct audio_params *); 98 int auvia_round_blocksize(void *, int); 99 int auvia_halt_output(void *); 100 int auvia_halt_input(void *); 101 int auvia_getdev(void *, struct audio_device *); 102 int auvia_set_port(void *, mixer_ctrl_t *); 103 int auvia_get_port(void *, mixer_ctrl_t *); 104 int auvia_query_devinfo(void *, mixer_devinfo_t *); 105 void * auvia_malloc(void *, int, size_t, struct malloc_type *, int); 106 void auvia_free(void *, void *, struct malloc_type *); 107 size_t auvia_round_buffersize(void *, int, size_t); 108 paddr_t auvia_mappage(void *, void *, off_t, int); 109 int auvia_get_props(void *); 110 int auvia_build_dma_ops(struct auvia_softc *, struct auvia_softc_chan *, 111 struct auvia_dma *, void *, void *, int); 112 int auvia_trigger_output(void *, void *, void *, int, void (*)(void *), 113 void *, struct audio_params *); 114 int auvia_trigger_input(void *, void *, void *, int, void (*)(void *), 115 void *, struct audio_params *); 116 void auvia_powerhook(int, void *); 117 int auvia_intr(void *); 118 119 CFATTACH_DECL(auvia, sizeof (struct auvia_softc), 120 auvia_match, auvia_attach, NULL, NULL); 121 122 /* VIA VT823xx revision number */ 123 #define VIA_REV_8233C 0x20 124 #define VIA_REV_8233 0x30 125 #define VIA_REV_8233A 0x40 126 #define VIA_REV_8235 0x50 127 #define VIA_REV_8237 0x60 128 129 #define AUVIA_PCICONF_JUNK 0x40 130 #define AUVIA_PCICONF_ENABLES 0x00FF0000 /* reg 42 mask */ 131 #define AUVIA_PCICONF_ACLINKENAB 0x00008000 /* ac link enab */ 132 #define AUVIA_PCICONF_ACNOTRST 0x00004000 /* ~(ac reset) */ 133 #define AUVIA_PCICONF_ACSYNC 0x00002000 /* ac sync */ 134 #define AUVIA_PCICONF_ACVSR 0x00000800 /* var. samp. rate */ 135 #define AUVIA_PCICONF_ACSGD 0x00000400 /* SGD enab */ 136 #define AUVIA_PCICONF_ACFM 0x00000200 /* FM enab */ 137 #define AUVIA_PCICONF_ACSB 0x00000100 /* SB enab */ 138 #define AUVIA_PCICONF_PRIVALID 0x00000001 /* primary codec rdy */ 139 140 #define AUVIA_PLAY_BASE 0x00 141 #define AUVIA_RECORD_BASE 0x10 142 143 /* *_RP_* are offsets from AUVIA_PLAY_BASE or AUVIA_RECORD_BASE */ 144 #define AUVIA_RP_STAT 0x00 145 #define AUVIA_RPSTAT_INTR 0x03 146 #define AUVIA_RP_CONTROL 0x01 147 #define AUVIA_RPCTRL_START 0x80 148 #define AUVIA_RPCTRL_TERMINATE 0x40 149 #define AUVIA_RPCTRL_AUTOSTART 0x20 150 /* The following are 8233 specific */ 151 #define AUVIA_RPCTRL_STOP 0x04 152 #define AUVIA_RPCTRL_EOL 0x02 153 #define AUVIA_RPCTRL_FLAG 0x01 154 #define AUVIA_RP_MODE 0x02 /* 82c686 specific */ 155 #define AUVIA_RPMODE_INTR_FLAG 0x01 156 #define AUVIA_RPMODE_INTR_EOL 0x02 157 #define AUVIA_RPMODE_STEREO 0x10 158 #define AUVIA_RPMODE_16BIT 0x20 159 #define AUVIA_RPMODE_AUTOSTART 0x80 160 #define AUVIA_RP_DMAOPS_BASE 0x04 161 162 #define VIA8233_RP_DXS_LVOL 0x02 163 #define VIA8233_RP_DXS_RVOL 0x03 164 #define VIA8233_RP_RATEFMT 0x08 165 #define VIA8233_RATEFMT_48K 0xfffff 166 #define VIA8233_RATEFMT_STEREO 0x00100000 167 #define VIA8233_RATEFMT_16BIT 0x00200000 168 169 #define VIA_RP_DMAOPS_COUNT 0x0c 170 171 #define VIA8233_MP_BASE 0x40 172 /* STAT, CONTROL, DMAOPS_BASE, DMAOPS_COUNT are valid */ 173 #define VIA8233_OFF_MP_FORMAT 0x02 174 #define VIA8233_MP_FORMAT_8BIT 0x00 175 #define VIA8233_MP_FORMAT_16BIT 0x80 176 #define VIA8233_MP_FORMAT_CHANNLE_MASK 0x70 /* 1, 2, 4, 6 */ 177 #define VIA8233_OFF_MP_SCRATCH 0x03 178 #define VIA8233_OFF_MP_STOP 0x08 179 180 #define AUVIA_CODEC_CTL 0x80 181 #define AUVIA_CODEC_READ 0x00800000 182 #define AUVIA_CODEC_BUSY 0x01000000 183 #define AUVIA_CODEC_PRIVALID 0x02000000 184 #define AUVIA_CODEC_INDEX(x) ((x)<<16) 185 186 #define CH_WRITE1(sc, ch, off, v) \ 187 bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (ch)->sc_base + (off), v) 188 #define CH_WRITE4(sc, ch, off, v) \ 189 bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (ch)->sc_base + (off), v) 190 #define CH_READ1(sc, ch, off) \ 191 bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (ch)->sc_base + (off)) 192 #define CH_READ4(sc, ch, off) \ 193 bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (ch)->sc_base + (off)) 194 195 #define TIMEOUT 50 196 197 const struct audio_hw_if auvia_hw_if = { 198 auvia_open, 199 auvia_close, 200 NULL, /* drain */ 201 auvia_query_encoding, 202 auvia_set_params, 203 auvia_round_blocksize, 204 NULL, /* commit_settings */ 205 NULL, /* init_output */ 206 NULL, /* init_input */ 207 NULL, /* start_output */ 208 NULL, /* start_input */ 209 auvia_halt_output, 210 auvia_halt_input, 211 NULL, /* speaker_ctl */ 212 auvia_getdev, 213 NULL, /* setfd */ 214 auvia_set_port, 215 auvia_get_port, 216 auvia_query_devinfo, 217 auvia_malloc, 218 auvia_free, 219 auvia_round_buffersize, 220 auvia_mappage, 221 auvia_get_props, 222 auvia_trigger_output, 223 auvia_trigger_input, 224 NULL, /* dev_ioctl */ 225 }; 226 227 #define AUVIA_FORMATS_4CH_16 2 228 #define AUVIA_FORMATS_6CH_16 3 229 #define AUVIA_FORMATS_4CH_8 6 230 #define AUVIA_FORMATS_6CH_8 7 231 static const struct audio_format auvia_formats[AUVIA_NFORMATS] = { 232 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 233 1, AUFMT_MONAURAL, 0, {8000, 48000}}, 234 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 235 2, AUFMT_STEREO, 0, {8000, 48000}}, 236 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 237 4, AUFMT_SURROUND4, 0, {8000, 48000}}, 238 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 239 6, AUFMT_DOLBY_5_1, 0, {8000, 48000}}, 240 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8, 241 1, AUFMT_MONAURAL, 0, {8000, 48000}}, 242 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8, 243 2, AUFMT_STEREO, 0, {8000, 48000}}, 244 {NULL, AUMODE_PLAY, AUDIO_ENCODING_ULINEAR_LE, 8, 8, 245 4, AUFMT_SURROUND4, 0, {8000, 48000}}, 246 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 8, 8, 247 6, AUFMT_DOLBY_5_1, 0, {8000, 48000}}, 248 }; 249 250 int auvia_attach_codec(void *, struct ac97_codec_if *); 251 int auvia_write_codec(void *, u_int8_t, u_int16_t); 252 int auvia_read_codec(void *, u_int8_t, u_int16_t *); 253 int auvia_reset_codec(void *); 254 int auvia_waitready_codec(struct auvia_softc *sc); 255 int auvia_waitvalid_codec(struct auvia_softc *sc); 256 257 258 int 259 auvia_match(struct device *parent, struct cfdata *match, void *aux) 260 { 261 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 262 263 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_VIATECH) 264 return 0; 265 switch (PCI_PRODUCT(pa->pa_id)) { 266 case PCI_PRODUCT_VIATECH_VT82C686A_AC97: 267 case PCI_PRODUCT_VIATECH_VT8233_AC97: 268 break; 269 default: 270 return 0; 271 } 272 273 return 1; 274 } 275 276 277 void 278 auvia_attach(struct device *parent, struct device *self, void *aux) 279 { 280 struct pci_attach_args *pa = aux; 281 struct auvia_softc *sc = (struct auvia_softc *) self; 282 const char *intrstr = NULL; 283 pci_chipset_tag_t pc = pa->pa_pc; 284 pcitag_t pt = pa->pa_tag; 285 pci_intr_handle_t ih; 286 bus_size_t iosize; 287 pcireg_t pr; 288 int r; 289 const char *revnum = NULL; /* VT823xx revision number */ 290 291 aprint_naive(": Audio controller\n"); 292 293 sc->sc_play.sc_base = AUVIA_PLAY_BASE; 294 sc->sc_record.sc_base = AUVIA_RECORD_BASE; 295 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_VIATECH_VT8233_AC97) { 296 sc->sc_flags |= AUVIA_FLAGS_VT8233; 297 sc->sc_play.sc_base = VIA8233_MP_BASE; 298 } 299 300 if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_IO, 0, &sc->sc_iot, 301 &sc->sc_ioh, NULL, &iosize)) { 302 aprint_error(": can't map i/o space\n"); 303 return; 304 } 305 306 sc->sc_dmat = pa->pa_dmat; 307 sc->sc_pc = pc; 308 sc->sc_pt = pt; 309 310 r = PCI_REVISION(pa->pa_class); 311 if (sc->sc_flags & AUVIA_FLAGS_VT8233) { 312 snprintf(sc->sc_revision, sizeof(sc->sc_revision), "0x%02X", r); 313 switch(r) { 314 case VIA_REV_8233C: 315 /* 2 rec, 4 pb, 1 multi-pb */ 316 revnum = "3C"; 317 break; 318 case VIA_REV_8233: 319 /* 2 rec, 4 pb, 1 multi-pb, spdif */ 320 revnum = "3"; 321 break; 322 case VIA_REV_8233A: 323 /* 1 rec, 1 multi-pb, spdif */ 324 revnum = "3A"; 325 break; 326 default: 327 break; 328 } 329 if (r >= VIA_REV_8237) 330 revnum = "7"; 331 else if (r >= VIA_REV_8235) /* 2 rec, 4 pb, 1 multi-pb, spdif */ 332 revnum = "5"; 333 aprint_normal(": VIA Technologies VT823%s AC'97 Audio " 334 "(rev %s)\n", revnum, sc->sc_revision); 335 } else { 336 sc->sc_revision[1] = '\0'; 337 if (r == 0x20) { 338 sc->sc_revision[0] = 'H'; 339 } else if ((r >= 0x10) && (r <= 0x14)) { 340 sc->sc_revision[0] = 'A' + (r - 0x10); 341 } else { 342 snprintf(sc->sc_revision, sizeof(sc->sc_revision), 343 "0x%02X", r); 344 } 345 346 aprint_normal(": VIA Technologies VT82C686A AC'97 Audio " 347 "(rev %s)\n", sc->sc_revision); 348 } 349 350 if (pci_intr_map(pa, &ih)) { 351 aprint_error(": couldn't map interrupt\n"); 352 bus_space_unmap(sc->sc_iot, sc->sc_ioh, iosize); 353 return; 354 } 355 intrstr = pci_intr_string(pc, ih); 356 357 sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, auvia_intr, sc); 358 if (sc->sc_ih == NULL) { 359 aprint_error("%s: couldn't establish interrupt", 360 sc->sc_dev.dv_xname); 361 if (intrstr != NULL) 362 aprint_normal(" at %s", intrstr); 363 aprint_normal("\n"); 364 bus_space_unmap(sc->sc_iot, sc->sc_ioh, iosize); 365 return; 366 } 367 368 aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 369 370 /* disable SBPro compat & others */ 371 pr = pci_conf_read(pc, pt, AUVIA_PCICONF_JUNK); 372 373 pr &= ~AUVIA_PCICONF_ENABLES; /* clear compat function enables */ 374 /* XXX what to do about MIDI, FM, joystick? */ 375 376 pr |= (AUVIA_PCICONF_ACLINKENAB | AUVIA_PCICONF_ACNOTRST 377 | AUVIA_PCICONF_ACVSR | AUVIA_PCICONF_ACSGD); 378 379 pr &= ~(AUVIA_PCICONF_ACFM | AUVIA_PCICONF_ACSB); 380 381 pci_conf_write(pc, pt, AUVIA_PCICONF_JUNK, pr); 382 383 sc->host_if.arg = sc; 384 sc->host_if.attach = auvia_attach_codec; 385 sc->host_if.read = auvia_read_codec; 386 sc->host_if.write = auvia_write_codec; 387 sc->host_if.reset = auvia_reset_codec; 388 389 if ((r = ac97_attach(&sc->host_if)) != 0) { 390 aprint_error("%s: can't attach codec (error 0x%X)\n", 391 sc->sc_dev.dv_xname, r); 392 pci_intr_disestablish(pc, sc->sc_ih); 393 bus_space_unmap(sc->sc_iot, sc->sc_ioh, iosize); 394 return; 395 } 396 397 /* setup audio_format */ 398 memcpy(sc->sc_formats, auvia_formats, sizeof(auvia_formats)); 399 if (sc->sc_play.sc_base != VIA8233_MP_BASE || !AC97_IS_4CH(sc->codec_if)) { 400 AUFMT_INVALIDATE(&sc->sc_formats[AUVIA_FORMATS_4CH_8]); 401 AUFMT_INVALIDATE(&sc->sc_formats[AUVIA_FORMATS_4CH_16]); 402 } 403 if (sc->sc_play.sc_base != VIA8233_MP_BASE || !AC97_IS_6CH(sc->codec_if)) { 404 AUFMT_INVALIDATE(&sc->sc_formats[AUVIA_FORMATS_6CH_8]); 405 AUFMT_INVALIDATE(&sc->sc_formats[AUVIA_FORMATS_6CH_16]); 406 } 407 if (AC97_IS_FIXED_RATE(sc->codec_if)) { 408 for (r = 0; r < AUVIA_NFORMATS; r++) { 409 sc->sc_formats[r].frequency_type = 1; 410 sc->sc_formats[r].frequency[0] = 48000; 411 } 412 } 413 414 if (0 != auconv_create_encodings(sc->sc_formats, AUVIA_NFORMATS, 415 &sc->sc_encodings)) { 416 sc->codec_if->vtbl->detach(sc->codec_if); 417 pci_intr_disestablish(pc, sc->sc_ih); 418 bus_space_unmap(sc->sc_iot, sc->sc_ioh, iosize); 419 return; 420 } 421 422 /* Watch for power change */ 423 sc->sc_suspend = PWR_RESUME; 424 sc->sc_powerhook = powerhook_establish(auvia_powerhook, sc); 425 426 audio_attach_mi(&auvia_hw_if, sc, &sc->sc_dev); 427 return; 428 } 429 430 431 int 432 auvia_attach_codec(void *addr, struct ac97_codec_if *cif) 433 { 434 struct auvia_softc *sc = addr; 435 436 sc->codec_if = cif; 437 438 return 0; 439 } 440 441 442 int 443 auvia_reset_codec(void *addr) 444 { 445 int i; 446 struct auvia_softc *sc = addr; 447 pcireg_t r; 448 449 /* perform a codec cold reset */ 450 451 r = pci_conf_read(sc->sc_pc, sc->sc_pt, AUVIA_PCICONF_JUNK); 452 453 r &= ~AUVIA_PCICONF_ACNOTRST; /* enable RESET (active low) */ 454 pci_conf_write(sc->sc_pc, sc->sc_pt, AUVIA_PCICONF_JUNK, r); 455 delay(2); 456 457 r |= AUVIA_PCICONF_ACNOTRST; /* disable RESET (inactive high) */ 458 pci_conf_write(sc->sc_pc, sc->sc_pt, AUVIA_PCICONF_JUNK, r); 459 delay(200); 460 461 for (i = 500000; i != 0 && !(pci_conf_read(sc->sc_pc, sc->sc_pt, 462 AUVIA_PCICONF_JUNK) & AUVIA_PCICONF_PRIVALID); i--) 463 DELAY(1); 464 if (i == 0) { 465 printf("%s: codec reset timed out\n", sc->sc_dev.dv_xname); 466 return ETIMEDOUT; 467 } 468 return 0; 469 } 470 471 472 int 473 auvia_waitready_codec(struct auvia_softc *sc) 474 { 475 int i; 476 477 /* poll until codec not busy */ 478 for (i = 0; (i < TIMEOUT) && (bus_space_read_4(sc->sc_iot, sc->sc_ioh, 479 AUVIA_CODEC_CTL) & AUVIA_CODEC_BUSY); i++) 480 delay(1); 481 if (i >= TIMEOUT) { 482 printf("%s: codec busy\n", sc->sc_dev.dv_xname); 483 return 1; 484 } 485 486 return 0; 487 } 488 489 490 int 491 auvia_waitvalid_codec(struct auvia_softc *sc) 492 { 493 int i; 494 495 /* poll until codec valid */ 496 for (i = 0; (i < TIMEOUT) && !(bus_space_read_4(sc->sc_iot, sc->sc_ioh, 497 AUVIA_CODEC_CTL) & AUVIA_CODEC_PRIVALID); i++) 498 delay(1); 499 if (i >= TIMEOUT) { 500 printf("%s: codec invalid\n", sc->sc_dev.dv_xname); 501 return 1; 502 } 503 504 return 0; 505 } 506 507 508 int 509 auvia_write_codec(void *addr, u_int8_t reg, u_int16_t val) 510 { 511 struct auvia_softc *sc = addr; 512 513 if (auvia_waitready_codec(sc)) 514 return 1; 515 516 bus_space_write_4(sc->sc_iot, sc->sc_ioh, AUVIA_CODEC_CTL, 517 AUVIA_CODEC_PRIVALID | AUVIA_CODEC_INDEX(reg) | val); 518 519 return 0; 520 } 521 522 523 int 524 auvia_read_codec(void *addr, u_int8_t reg, u_int16_t *val) 525 { 526 struct auvia_softc *sc = addr; 527 528 if (auvia_waitready_codec(sc)) 529 return 1; 530 531 bus_space_write_4(sc->sc_iot, sc->sc_ioh, AUVIA_CODEC_CTL, 532 AUVIA_CODEC_PRIVALID | AUVIA_CODEC_READ | AUVIA_CODEC_INDEX(reg)); 533 534 if (auvia_waitready_codec(sc)) 535 return 1; 536 537 if (auvia_waitvalid_codec(sc)) 538 return 1; 539 540 *val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, AUVIA_CODEC_CTL); 541 542 return 0; 543 } 544 545 546 int 547 auvia_open(void *addr, int flags) 548 { 549 return 0; 550 } 551 552 553 void 554 auvia_close(void *addr) 555 { 556 } 557 558 559 int 560 auvia_query_encoding(void *addr, struct audio_encoding *fp) 561 { 562 struct auvia_softc *sc; 563 564 sc = (struct auvia_softc *)addr; 565 return auconv_query_encoding(sc->sc_encodings, fp); 566 } 567 568 void 569 auvia_set_params_sub(struct auvia_softc *sc, struct auvia_softc_chan *ch, 570 struct audio_params *p) 571 { 572 u_int32_t v; 573 u_int16_t regval; 574 575 if (!(sc->sc_flags & AUVIA_FLAGS_VT8233)) { 576 regval = (p->hw_channels == 2 ? AUVIA_RPMODE_STEREO : 0) 577 | (p->hw_precision * p->factor == 16 ? 578 AUVIA_RPMODE_16BIT : 0) 579 | AUVIA_RPMODE_INTR_FLAG | AUVIA_RPMODE_INTR_EOL 580 | AUVIA_RPMODE_AUTOSTART; 581 ch->sc_reg = regval; 582 } else if (ch->sc_base != VIA8233_MP_BASE) { 583 v = CH_READ4(sc, ch, VIA8233_RP_RATEFMT); 584 v &= ~(VIA8233_RATEFMT_48K | VIA8233_RATEFMT_STEREO 585 | VIA8233_RATEFMT_16BIT); 586 587 v |= VIA8233_RATEFMT_48K * (p->hw_sample_rate / 20) 588 / (48000 / 20); 589 if (p->hw_channels == 2) 590 v |= VIA8233_RATEFMT_STEREO; 591 if (p->hw_precision == 16) 592 v |= VIA8233_RATEFMT_16BIT; 593 594 CH_WRITE4(sc, ch, VIA8233_RP_RATEFMT, v); 595 } else { 596 static const u_int32_t slottab[7] = 597 { 0, 0xff000011, 0xff000021, 0, 598 0xff004321, 0, 0xff436521}; 599 600 regval = (p->hw_precision == 16 601 ? VIA8233_MP_FORMAT_16BIT : VIA8233_MP_FORMAT_8BIT) 602 | (p->hw_channels << 4); 603 CH_WRITE1(sc, ch, VIA8233_OFF_MP_FORMAT, regval); 604 CH_WRITE4(sc, ch, VIA8233_OFF_MP_STOP, slottab[p->hw_channels]); 605 } 606 } 607 608 int 609 auvia_set_params(void *addr, int setmode, int usemode, 610 struct audio_params *play, struct audio_params *rec) 611 { 612 struct auvia_softc *sc = addr; 613 struct auvia_softc_chan *ch; 614 struct audio_params *p; 615 struct ac97_codec_if* codec; 616 int reg, mode; 617 int index; 618 619 codec = sc->codec_if; 620 /* for mode in (RECORD, PLAY) */ 621 for (mode = AUMODE_RECORD; mode != -1; 622 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 623 if ((setmode & mode) == 0) 624 continue; 625 626 if (mode == AUMODE_PLAY ) { 627 p = play; 628 ch = &sc->sc_play; 629 reg = AC97_REG_PCM_FRONT_DAC_RATE; 630 } else { 631 p = rec; 632 ch = &sc->sc_record; 633 reg = AC97_REG_PCM_LR_ADC_RATE; 634 } 635 636 if (p->sample_rate < 4000 || p->sample_rate > 48000 || 637 (p->precision != 8 && p->precision != 16)) 638 return (EINVAL); 639 index = auconv_set_converter(sc->sc_formats, AUVIA_NFORMATS, 640 mode, p, TRUE); 641 if (index < 0) 642 return EINVAL; 643 if (!AC97_IS_FIXED_RATE(codec)) { 644 if (codec->vtbl->set_rate(codec, reg, &p->hw_sample_rate)) 645 return EINVAL; 646 reg = AC97_REG_PCM_SURR_DAC_RATE; 647 if (p->hw_channels >= 4 648 && codec->vtbl->set_rate(codec, reg, 649 &p->hw_sample_rate)) 650 return EINVAL; 651 reg = AC97_REG_PCM_LFE_DAC_RATE; 652 if (p->hw_channels == 6 653 && codec->vtbl->set_rate(codec, reg, 654 &p->hw_sample_rate)) 655 return EINVAL; 656 } 657 auvia_set_params_sub(sc, ch, p); 658 } 659 660 return 0; 661 } 662 663 664 int 665 auvia_round_blocksize(void *addr, int blk) 666 { 667 struct auvia_softc *sc = addr; 668 669 /* XXX VT823x might have the limitation of dma_ops size */ 670 if (sc->sc_flags & AUVIA_FLAGS_VT8233 && blk < 288) 671 blk = 288; 672 673 return (blk & -32); 674 } 675 676 677 int 678 auvia_halt_output(void *addr) 679 { 680 struct auvia_softc *sc = addr; 681 struct auvia_softc_chan *ch = &(sc->sc_play); 682 683 CH_WRITE1(sc, ch, AUVIA_RP_CONTROL, AUVIA_RPCTRL_TERMINATE); 684 ch->sc_intr = NULL; 685 return 0; 686 } 687 688 689 int 690 auvia_halt_input(void *addr) 691 { 692 struct auvia_softc *sc = addr; 693 struct auvia_softc_chan *ch = &(sc->sc_record); 694 695 CH_WRITE1(sc, ch, AUVIA_RP_CONTROL, AUVIA_RPCTRL_TERMINATE); 696 ch->sc_intr = NULL; 697 return 0; 698 } 699 700 701 int 702 auvia_getdev(void *addr, struct audio_device *retp) 703 { 704 struct auvia_softc *sc = addr; 705 706 if (retp) { 707 if (sc->sc_flags & AUVIA_FLAGS_VT8233) { 708 strncpy(retp->name, "VIA VT823x", 709 sizeof(retp->name)); 710 } else { 711 strncpy(retp->name, "VIA VT82C686A", 712 sizeof(retp->name)); 713 } 714 strncpy(retp->version, sc->sc_revision, sizeof(retp->version)); 715 strncpy(retp->config, "auvia", sizeof(retp->config)); 716 } 717 718 return 0; 719 } 720 721 722 int 723 auvia_set_port(void *addr, mixer_ctrl_t *cp) 724 { 725 struct auvia_softc *sc = addr; 726 727 return (sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp)); 728 } 729 730 731 int 732 auvia_get_port(void *addr, mixer_ctrl_t *cp) 733 { 734 struct auvia_softc *sc = addr; 735 736 return (sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp)); 737 } 738 739 740 int 741 auvia_query_devinfo(void *addr, mixer_devinfo_t *dip) 742 { 743 struct auvia_softc *sc = addr; 744 745 return (sc->codec_if->vtbl->query_devinfo(sc->codec_if, dip)); 746 } 747 748 749 void * 750 auvia_malloc(void *addr, int direction, size_t size, struct malloc_type * pool, 751 int flags) 752 { 753 struct auvia_softc *sc = addr; 754 struct auvia_dma *p; 755 int error; 756 int rseg; 757 758 p = malloc(sizeof(*p), pool, flags); 759 if (!p) 760 return 0; 761 762 p->size = size; 763 if ((error = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &p->seg, 764 1, &rseg, BUS_DMA_NOWAIT)) != 0) { 765 printf("%s: unable to allocate DMA, error = %d\n", 766 sc->sc_dev.dv_xname, error); 767 goto fail_alloc; 768 } 769 770 if ((error = bus_dmamem_map(sc->sc_dmat, &p->seg, rseg, size, &p->addr, 771 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 772 printf("%s: unable to map DMA, error = %d\n", 773 sc->sc_dev.dv_xname, error); 774 goto fail_map; 775 } 776 777 if ((error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0, 778 BUS_DMA_NOWAIT, &p->map)) != 0) { 779 printf("%s: unable to create DMA map, error = %d\n", 780 sc->sc_dev.dv_xname, error); 781 goto fail_create; 782 } 783 784 if ((error = bus_dmamap_load(sc->sc_dmat, p->map, p->addr, size, NULL, 785 BUS_DMA_NOWAIT)) != 0) { 786 printf("%s: unable to load DMA map, error = %d\n", 787 sc->sc_dev.dv_xname, error); 788 goto fail_load; 789 } 790 791 p->next = sc->sc_dmas; 792 sc->sc_dmas = p; 793 794 return p->addr; 795 796 797 fail_load: 798 bus_dmamap_destroy(sc->sc_dmat, p->map); 799 fail_create: 800 bus_dmamem_unmap(sc->sc_dmat, p->addr, size); 801 fail_map: 802 bus_dmamem_free(sc->sc_dmat, &p->seg, 1); 803 fail_alloc: 804 free(p, pool); 805 return 0; 806 } 807 808 809 void 810 auvia_free(void *addr, void *ptr, struct malloc_type *pool) 811 { 812 struct auvia_softc *sc = addr; 813 struct auvia_dma **pp, *p; 814 815 for (pp = &(sc->sc_dmas); (p = *pp) != NULL; pp = &p->next) 816 if (p->addr == ptr) { 817 bus_dmamap_unload(sc->sc_dmat, p->map); 818 bus_dmamap_destroy(sc->sc_dmat, p->map); 819 bus_dmamem_unmap(sc->sc_dmat, p->addr, p->size); 820 bus_dmamem_free(sc->sc_dmat, &p->seg, 1); 821 822 *pp = p->next; 823 free(p, pool); 824 return; 825 } 826 827 panic("auvia_free: trying to free unallocated memory"); 828 } 829 830 831 size_t 832 auvia_round_buffersize(void *addr, int direction, size_t size) 833 { 834 return size; 835 } 836 837 838 paddr_t 839 auvia_mappage(void *addr, void *mem, off_t off, int prot) 840 { 841 struct auvia_softc *sc = addr; 842 struct auvia_dma *p; 843 844 if (off < 0) 845 return -1; 846 847 for (p = sc->sc_dmas; p && p->addr != mem; p = p->next) 848 ; 849 850 if (!p) 851 return -1; 852 853 return bus_dmamem_mmap(sc->sc_dmat, &p->seg, 1, off, prot, 854 BUS_DMA_WAITOK); 855 } 856 857 858 int 859 auvia_get_props(void *addr) 860 { 861 struct auvia_softc *sc = addr; 862 int props; 863 864 props = AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 865 /* 866 * Even if the codec is fixed-rate, set_param() succeeds for any sample 867 * rate because of aurateconv. Applications can't know what rate the 868 * device can process in the case of mmap(). 869 */ 870 if (!AC97_IS_FIXED_RATE(sc->codec_if)) 871 props |= AUDIO_PROP_MMAP; 872 return props; 873 } 874 875 876 int 877 auvia_build_dma_ops(struct auvia_softc *sc, struct auvia_softc_chan *ch, 878 struct auvia_dma *p, void *start, void *end, int blksize) 879 { 880 struct auvia_dma_op *op; 881 struct auvia_dma *dp; 882 bus_addr_t s; 883 size_t l; 884 int segs; 885 886 s = p->map->dm_segs[0].ds_addr; 887 l = ((char *)end - (char *)start); 888 segs = (l + blksize - 1) / blksize; 889 890 if (segs > (ch->sc_dma_op_count)) { 891 /* if old list was too small, free it */ 892 if (ch->sc_dma_ops) { 893 auvia_free(sc, ch->sc_dma_ops, M_DEVBUF); 894 } 895 896 ch->sc_dma_ops = auvia_malloc(sc, 0, 897 sizeof(struct auvia_dma_op) * segs, M_DEVBUF, M_WAITOK); 898 899 if (ch->sc_dma_ops == NULL) { 900 printf("%s: couldn't build dmaops\n", sc->sc_dev.dv_xname); 901 return 1; 902 } 903 904 for (dp = sc->sc_dmas; 905 dp && dp->addr != (void *)(ch->sc_dma_ops); 906 dp = dp->next) 907 ; 908 909 if (!dp) 910 panic("%s: build_dma_ops: where'd my memory go??? " 911 "address (%p)\n", sc->sc_dev.dv_xname, 912 ch->sc_dma_ops); 913 914 ch->sc_dma_op_count = segs; 915 ch->sc_dma_ops_dma = dp; 916 } 917 918 dp = ch->sc_dma_ops_dma; 919 op = ch->sc_dma_ops; 920 921 while (l) { 922 op->ptr = s; 923 l = l - blksize; 924 if (!l) { 925 /* if last block */ 926 op->flags = AUVIA_DMAOP_EOL | blksize; 927 } else { 928 op->flags = AUVIA_DMAOP_FLAG | blksize; 929 } 930 s += blksize; 931 op++; 932 } 933 934 return 0; 935 } 936 937 938 int 939 auvia_trigger_output(void *addr, void *start, void *end, 940 int blksize, void (*intr)(void *), void *arg, 941 struct audio_params *param) 942 { 943 struct auvia_softc *sc = addr; 944 struct auvia_softc_chan *ch = &(sc->sc_play); 945 struct auvia_dma *p; 946 947 for (p = sc->sc_dmas; p && p->addr != start; p = p->next) 948 ; 949 950 if (!p) 951 panic("auvia_trigger_output: request with bad start " 952 "address (%p)", start); 953 954 if (auvia_build_dma_ops(sc, ch, p, start, end, blksize)) { 955 return 1; 956 } 957 958 ch->sc_intr = intr; 959 ch->sc_arg = arg; 960 961 CH_WRITE4(sc, ch, AUVIA_RP_DMAOPS_BASE, 962 ch->sc_dma_ops_dma->map->dm_segs[0].ds_addr); 963 964 if (sc->sc_flags & AUVIA_FLAGS_VT8233) { 965 if (ch->sc_base != VIA8233_MP_BASE) { 966 CH_WRITE1(sc, ch, VIA8233_RP_DXS_LVOL, 0); 967 CH_WRITE1(sc, ch, VIA8233_RP_DXS_RVOL, 0); 968 } 969 CH_WRITE1(sc, ch, AUVIA_RP_CONTROL, 970 AUVIA_RPCTRL_START | AUVIA_RPCTRL_AUTOSTART | 971 AUVIA_RPCTRL_STOP | AUVIA_RPCTRL_EOL | AUVIA_RPCTRL_FLAG); 972 } else { 973 CH_WRITE1(sc, ch, AUVIA_RP_MODE, ch->sc_reg); 974 CH_WRITE1(sc, ch, AUVIA_RP_CONTROL, AUVIA_RPCTRL_START); 975 } 976 977 return 0; 978 } 979 980 981 int 982 auvia_trigger_input(void *addr, void *start, void *end, 983 int blksize, void (*intr)(void *), void *arg, 984 struct audio_params *param) 985 { 986 struct auvia_softc *sc = addr; 987 struct auvia_softc_chan *ch = &(sc->sc_record); 988 struct auvia_dma *p; 989 990 for (p = sc->sc_dmas; p && p->addr != start; p = p->next) 991 ; 992 993 if (!p) 994 panic("auvia_trigger_input: request with bad start " 995 "address (%p)", start); 996 997 if (auvia_build_dma_ops(sc, ch, p, start, end, blksize)) { 998 return 1; 999 } 1000 1001 ch->sc_intr = intr; 1002 ch->sc_arg = arg; 1003 1004 CH_WRITE4(sc, ch, AUVIA_RP_DMAOPS_BASE, 1005 ch->sc_dma_ops_dma->map->dm_segs[0].ds_addr); 1006 1007 if (sc->sc_flags & AUVIA_FLAGS_VT8233) { 1008 CH_WRITE1(sc, ch, VIA8233_RP_DXS_LVOL, 0); 1009 CH_WRITE1(sc, ch, VIA8233_RP_DXS_RVOL, 0); 1010 CH_WRITE1(sc, ch, AUVIA_RP_CONTROL, 1011 AUVIA_RPCTRL_START | AUVIA_RPCTRL_AUTOSTART | 1012 AUVIA_RPCTRL_STOP | AUVIA_RPCTRL_EOL | AUVIA_RPCTRL_FLAG); 1013 } else { 1014 CH_WRITE1(sc, ch, AUVIA_RP_MODE, ch->sc_reg); 1015 CH_WRITE1(sc, ch, AUVIA_RP_CONTROL, AUVIA_RPCTRL_START); 1016 } 1017 1018 return 0; 1019 } 1020 1021 1022 int 1023 auvia_intr(void *arg) 1024 { 1025 struct auvia_softc *sc = arg; 1026 struct auvia_softc_chan *ch; 1027 u_int8_t r; 1028 int rval; 1029 1030 rval = 0; 1031 1032 ch = &sc->sc_record; 1033 r = CH_READ1(sc, ch, AUVIA_RP_STAT); 1034 if (r & AUVIA_RPSTAT_INTR) { 1035 if (sc->sc_record.sc_intr) 1036 sc->sc_record.sc_intr(sc->sc_record.sc_arg); 1037 1038 /* clear interrupts */ 1039 CH_WRITE1(sc, ch, AUVIA_RP_STAT, AUVIA_RPSTAT_INTR); 1040 rval = 1; 1041 } 1042 1043 ch = &sc->sc_play; 1044 r = CH_READ1(sc, ch, AUVIA_RP_STAT); 1045 if (r & AUVIA_RPSTAT_INTR) { 1046 if (sc->sc_play.sc_intr) 1047 sc->sc_play.sc_intr(sc->sc_play.sc_arg); 1048 1049 /* clear interrupts */ 1050 CH_WRITE1(sc, ch, AUVIA_RP_STAT, AUVIA_RPSTAT_INTR); 1051 rval = 1; 1052 } 1053 1054 return rval; 1055 } 1056 1057 void 1058 auvia_powerhook(int why, void *addr) 1059 { 1060 struct auvia_softc *sc = (struct auvia_softc *)addr; 1061 1062 switch (why) { 1063 case PWR_SUSPEND: 1064 case PWR_STANDBY: 1065 /* Power down */ 1066 sc->sc_suspend = why; 1067 break; 1068 1069 case PWR_RESUME: 1070 /* Wake up */ 1071 if (sc->sc_suspend == PWR_RESUME) { 1072 printf("%s: resume without suspend.\n", 1073 sc->sc_dev.dv_xname); 1074 sc->sc_suspend = why; 1075 return; 1076 } 1077 sc->sc_suspend = why; 1078 auvia_reset_codec(sc); 1079 DELAY(1000); 1080 (sc->codec_if->vtbl->restore_ports)(sc->codec_if); 1081 break; 1082 1083 case PWR_SOFTSUSPEND: 1084 case PWR_SOFTSTANDBY: 1085 case PWR_SOFTRESUME: 1086 break; 1087 } 1088 } 1089
Indexes created Mon Sep 29 21:09:56 GMT 2025