bktr_reg.h revision 1.1 1 1.1 wiz /* $NetBSD: bktr_reg.h,v 1.1 2000/05/07 00:16:18 wiz Exp $ */
2 1.1 wiz
3 1.1 wiz /*
4 1.1 wiz * FreeBSD: src/sys/dev/bktr/bktr_reg.h,v 1.36 1999/10/28 13:58:17 roger Exp
5 1.1 wiz *
6 1.1 wiz * Copyright (c) 1999 Roger Hardiman
7 1.1 wiz * Copyright (c) 1998 Amancio Hasty
8 1.1 wiz * Copyright (c) 1995 Mark Tinguely and Jim Lowe
9 1.1 wiz * All rights reserved.
10 1.1 wiz *
11 1.1 wiz * Redistribution and use in source and binary forms, with or without
12 1.1 wiz * modification, are permitted provided that the following conditions
13 1.1 wiz * are met:
14 1.1 wiz * 1. Redistributions of source code must retain the above copyright
15 1.1 wiz * notice, this list of conditions and the following disclaimer.
16 1.1 wiz * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 wiz * notice, this list of conditions and the following disclaimer in the
18 1.1 wiz * documentation and/or other materials provided with the distribution.
19 1.1 wiz * 3. All advertising materials mentioning features or use of this software
20 1.1 wiz * must display the following acknowledgement:
21 1.1 wiz * This product includes software developed by Mark Tinguely and Jim Lowe
22 1.1 wiz * 4. The name of the author may not be used to endorse or promote products
23 1.1 wiz * derived from this software without specific prior written permission.
24 1.1 wiz *
25 1.1 wiz * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
26 1.1 wiz * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
27 1.1 wiz * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
28 1.1 wiz * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
29 1.1 wiz * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30 1.1 wiz * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31 1.1 wiz * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 1.1 wiz * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
33 1.1 wiz * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
34 1.1 wiz * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1 wiz * POSSIBILITY OF SUCH DAMAGE.
36 1.1 wiz *
37 1.1 wiz */
38 1.1 wiz
39 1.1 wiz #ifdef __FreeBSD__
40 1.1 wiz # if (__FreeBSD_version >= 310000)
41 1.1 wiz # include <sys/bus.h>
42 1.1 wiz # include "smbus.h"
43 1.1 wiz # else
44 1.1 wiz # define NSMBUS 0 /* FreeBSD before 3.1 does not have SMBUS */
45 1.1 wiz # endif
46 1.1 wiz #else
47 1.1 wiz # define NSMBUS 0 /* Non FreeBSD systems do not have SMBUS */
48 1.1 wiz #endif
49 1.1 wiz
50 1.1 wiz #ifdef __NetBSD__
51 1.1 wiz #include <machine/bus.h> /* struct device */
52 1.1 wiz #include <sys/device.h>
53 1.1 wiz #include <sys/select.h> /* struct selinfo */
54 1.1 wiz #endif
55 1.1 wiz
56 1.1 wiz #ifndef PCI_LATENCY_TIMER
57 1.1 wiz #define PCI_LATENCY_TIMER 0x0c /* pci timer register */
58 1.1 wiz #endif
59 1.1 wiz
60 1.1 wiz /*
61 1.1 wiz * Definitions for the Brooktree 848/878 video capture to pci interface.
62 1.1 wiz */
63 1.1 wiz #define BROOKTREE_848_PCI_ID 0x0350109E
64 1.1 wiz #define BROOKTREE_849_PCI_ID 0x0351109E
65 1.1 wiz #define BROOKTREE_878_PCI_ID 0x036E109E
66 1.1 wiz #define BROOKTREE_879_PCI_ID 0x036F109E
67 1.1 wiz
68 1.1 wiz #define BROOKTREE_848 1
69 1.1 wiz #define BROOKTREE_848A 2
70 1.1 wiz #define BROOKTREE_849A 3
71 1.1 wiz #define BROOKTREE_878 4
72 1.1 wiz #define BROOKTREE_879 5
73 1.1 wiz
74 1.1 wiz typedef volatile u_int bregister_t;
75 1.1 wiz /*
76 1.1 wiz * if other persuasion endian, then compiler will probably require that
77 1.1 wiz * these next
78 1.1 wiz * macros be reversed
79 1.1 wiz */
80 1.1 wiz #define BTBYTE(what) bregister_t what:8; int :24
81 1.1 wiz #define BTWORD(what) bregister_t what:16; int: 16
82 1.1 wiz #define BTLONG(what) bregister_t what:32
83 1.1 wiz
84 1.1 wiz struct bt848_registers {
85 1.1 wiz BTBYTE (dstatus); /* 0, 1,2,3 */
86 1.1 wiz #define BT848_DSTATUS_PRES (1<<7)
87 1.1 wiz #define BT848_DSTATUS_HLOC (1<<6)
88 1.1 wiz #define BT848_DSTATUS_FIELD (1<<5)
89 1.1 wiz #define BT848_DSTATUS_NUML (1<<4)
90 1.1 wiz #define BT848_DSTATUS_CSEL (1<<3)
91 1.1 wiz #define BT848_DSTATUS_PLOCK (1<<2)
92 1.1 wiz #define BT848_DSTATUS_LOF (1<<1)
93 1.1 wiz #define BT848_DSTATUS_COF (1<<0)
94 1.1 wiz BTBYTE (iform); /* 4, 5,6,7 */
95 1.1 wiz #define BT848_IFORM_MUXSEL (0x3<<5)
96 1.1 wiz # define BT848_IFORM_M_MUX1 (0x03<<5)
97 1.1 wiz # define BT848_IFORM_M_MUX0 (0x02<<5)
98 1.1 wiz # define BT848_IFORM_M_MUX2 (0x01<<5)
99 1.1 wiz # define BT848_IFORM_M_MUX3 (0x0)
100 1.1 wiz # define BT848_IFORM_M_RSVD (0x00<<5)
101 1.1 wiz #define BT848_IFORM_XTSEL (0x3<<3)
102 1.1 wiz # define BT848_IFORM_X_AUTO (0x03<<3)
103 1.1 wiz # define BT848_IFORM_X_XT1 (0x02<<3)
104 1.1 wiz # define BT848_IFORM_X_XT0 (0x01<<3)
105 1.1 wiz # define BT848_IFORM_X_RSVD (0x00<<3)
106 1.1 wiz BTBYTE (tdec); /* 8, 9,a,b */
107 1.1 wiz BTBYTE (e_crop); /* c, d,e,f */
108 1.1 wiz BTBYTE (e_vdelay_lo); /* 10, 11,12,13 */
109 1.1 wiz BTBYTE (e_vactive_lo); /* 14, 15,16,17 */
110 1.1 wiz BTBYTE (e_delay_lo); /* 18, 19,1a,1b */
111 1.1 wiz BTBYTE (e_hactive_lo); /* 1c, 1d,1e,1f */
112 1.1 wiz BTBYTE (e_hscale_hi); /* 20, 21,22,23 */
113 1.1 wiz BTBYTE (e_hscale_lo); /* 24, 25,26,27 */
114 1.1 wiz BTBYTE (bright); /* 28, 29,2a,2b */
115 1.1 wiz BTBYTE (e_control); /* 2c, 2d,2e,2f */
116 1.1 wiz #define BT848_E_CONTROL_LNOTCH (1<<7)
117 1.1 wiz #define BT848_E_CONTROL_COMP (1<<6)
118 1.1 wiz #define BT848_E_CONTROL_LDEC (1<<5)
119 1.1 wiz #define BT848_E_CONTROL_CBSENSE (1<<4)
120 1.1 wiz #define BT848_E_CONTROL_RSVD (1<<3)
121 1.1 wiz #define BT848_E_CONTROL_CON_MSB (1<<2)
122 1.1 wiz #define BT848_E_CONTROL_SAT_U_MSB (1<<1)
123 1.1 wiz #define BT848_E_CONTROL_SAT_V_MSB (1<<0)
124 1.1 wiz BTBYTE (contrast_lo); /* 30, 31,32,33 */
125 1.1 wiz BTBYTE (sat_u_lo); /* 34, 35,36,37 */
126 1.1 wiz BTBYTE (sat_v_lo); /* 38, 39,3a,3b */
127 1.1 wiz BTBYTE (hue); /* 3c, 3d,3e,3f */
128 1.1 wiz BTBYTE (e_scloop); /* 40, 41,42,43 */
129 1.1 wiz #define BT848_E_SCLOOP_RSVD1 (1<<7)
130 1.1 wiz #define BT848_E_SCLOOP_CAGC (1<<6)
131 1.1 wiz #define BT848_E_SCLOOP_CKILL (1<<5)
132 1.1 wiz #define BT848_E_SCLOOP_HFILT (0x3<<3)
133 1.1 wiz # define BT848_E_SCLOOP_HFILT_ICON (0x3<<3)
134 1.1 wiz # define BT848_E_SCLOOP_HFILT_QCIF (0x2<<3)
135 1.1 wiz # define BT848_E_SCLOOP_HFILT_CIF (0x1<<3)
136 1.1 wiz # define BT848_E_SCLOOP_HFILT_AUTO (0x0<<3)
137 1.1 wiz #define BT848_E_SCLOOP_RSVD0 (0x7<<0)
138 1.1 wiz int :32; /* 44, 45,46,47 */
139 1.1 wiz BTBYTE (oform); /* 48, 49,4a,4b */
140 1.1 wiz BTBYTE (e_vscale_hi); /* 4c, 4d,4e,4f */
141 1.1 wiz BTBYTE (e_vscale_lo); /* 50, 51,52,53 */
142 1.1 wiz BTBYTE (test); /* 54, 55,56,57 */
143 1.1 wiz int :32; /* 58, 59,5a,5b */
144 1.1 wiz int :32; /* 5c, 5d,5e,5f */
145 1.1 wiz BTLONG (adelay); /* 60, 61,62,63 */
146 1.1 wiz BTBYTE (bdelay); /* 64, 65,66,67 */
147 1.1 wiz BTBYTE (adc); /* 68, 69,6a,6b */
148 1.1 wiz #define BT848_ADC_RESERVED (0x80) /* required pattern */
149 1.1 wiz #define BT848_ADC_SYNC_T (1<<5)
150 1.1 wiz #define BT848_ADC_AGC_EN (1<<4)
151 1.1 wiz #define BT848_ADC_CLK_SLEEP (1<<3)
152 1.1 wiz #define BT848_ADC_Y_SLEEP (1<<2)
153 1.1 wiz #define BT848_ADC_C_SLEEP (1<<1)
154 1.1 wiz #define BT848_ADC_CRUSH (1<<0)
155 1.1 wiz BTBYTE (e_vtc); /* 6c, 6d,6e,6f */
156 1.1 wiz int :32; /* 70, 71,72,73 */
157 1.1 wiz int :32; /* 74, 75,76,77 */
158 1.1 wiz int :32; /* 78, 79,7a,7b */
159 1.1 wiz BTLONG (sreset); /* 7c, 7d,7e,7f */
160 1.1 wiz u_char filler1[0x84-0x80];
161 1.1 wiz BTBYTE (tgctrl); /* 84, 85,86,87 */
162 1.1 wiz #define BT848_TGCTRL_TGCKI (3<<3)
163 1.1 wiz #define BT848_TGCTRL_TGCKI_XTAL (0<<3)
164 1.1 wiz #define BT848_TGCTRL_TGCKI_PLL (1<<3)
165 1.1 wiz #define BT848_TGCTRL_TGCKI_GPCLK (2<<3)
166 1.1 wiz #define BT848_TGCTRL_TGCKI_GPCLK_I (3<<3)
167 1.1 wiz u_char filler[0x8c-0x88];
168 1.1 wiz BTBYTE (o_crop); /* 8c, 8d,8e,8f */
169 1.1 wiz BTBYTE (o_vdelay_lo); /* 90, 91,92,93 */
170 1.1 wiz BTBYTE (o_vactive_lo); /* 94, 95,96,97 */
171 1.1 wiz BTBYTE (o_delay_lo); /* 98, 99,9a,9b */
172 1.1 wiz BTBYTE (o_hactive_lo); /* 9c, 9d,9e,9f */
173 1.1 wiz BTBYTE (o_hscale_hi); /* a0, a1,a2,a3 */
174 1.1 wiz BTBYTE (o_hscale_lo); /* a4, a5,a6,a7 */
175 1.1 wiz int :32; /* a8, a9,aa,ab */
176 1.1 wiz BTBYTE (o_control); /* ac, ad,ae,af */
177 1.1 wiz #define BT848_O_CONTROL_LNOTCH (1<<7)
178 1.1 wiz #define BT848_O_CONTROL_COMP (1<<6)
179 1.1 wiz #define BT848_O_CONTROL_LDEC (1<<5)
180 1.1 wiz #define BT848_O_CONTROL_CBSENSE (1<<4)
181 1.1 wiz #define BT848_O_CONTROL_RSVD (1<<3)
182 1.1 wiz #define BT848_O_CONTROL_CON_MSB (1<<2)
183 1.1 wiz #define BT848_O_CONTROL_SAT_U_MSB (1<<1)
184 1.1 wiz #define BT848_O_CONTROL_SAT_V_MSB (1<<0)
185 1.1 wiz u_char fillter4[16];
186 1.1 wiz BTBYTE (o_scloop); /* c0, c1,c2,c3 */
187 1.1 wiz #define BT848_O_SCLOOP_RSVD1 (1<<7)
188 1.1 wiz #define BT848_O_SCLOOP_CAGC (1<<6)
189 1.1 wiz #define BT848_O_SCLOOP_CKILL (1<<5)
190 1.1 wiz #define BT848_O_SCLOOP_HFILT (0x3<<3)
191 1.1 wiz #define BT848_O_SCLOOP_HFILT_ICON (0x3<<3)
192 1.1 wiz #define BT848_O_SCLOOP_HFILT_QCIF (0x2<<3)
193 1.1 wiz #define BT848_O_SCLOOP_HFILT_CIF (0x1<<3)
194 1.1 wiz #define BT848_O_SCLOOP_HFILT_AUTO (0x0<<3)
195 1.1 wiz #define BT848_O_SCLOOP_RSVD0 (0x7<<0)
196 1.1 wiz int :32; /* c4, c5,c6,c7 */
197 1.1 wiz int :32; /* c8, c9,ca,cb */
198 1.1 wiz BTBYTE (o_vscale_hi); /* cc, cd,ce,cf */
199 1.1 wiz BTBYTE (o_vscale_lo); /* d0, d1,d2,d3 */
200 1.1 wiz BTBYTE (color_fmt); /* d4, d5,d6,d7 */
201 1.1 wiz bregister_t color_ctl_swap :4; /* d8 */
202 1.1 wiz #define BT848_COLOR_CTL_WSWAP_ODD (1<<3)
203 1.1 wiz #define BT848_COLOR_CTL_WSWAP_EVEN (1<<2)
204 1.1 wiz #define BT848_COLOR_CTL_BSWAP_ODD (1<<1)
205 1.1 wiz #define BT848_COLOR_CTL_BSWAP_EVEN (1<<0)
206 1.1 wiz bregister_t color_ctl_gamma :1;
207 1.1 wiz bregister_t color_ctl_rgb_ded :1;
208 1.1 wiz bregister_t color_ctl_color_bars :1;
209 1.1 wiz bregister_t color_ctl_ext_frmrate :1;
210 1.1 wiz #define BT848_COLOR_CTL_GAMMA (1<<4)
211 1.1 wiz #define BT848_COLOR_CTL_RGB_DED (1<<5)
212 1.1 wiz #define BT848_COLOR_CTL_COLOR_BARS (1<<6)
213 1.1 wiz #define BT848_COLOR_CTL_EXT_FRMRATE (1<<7)
214 1.1 wiz int :24; /* d9,da,db */
215 1.1 wiz BTBYTE (cap_ctl); /* dc, dd,de,df */
216 1.1 wiz #define BT848_CAP_CTL_DITH_FRAME (1<<4)
217 1.1 wiz #define BT848_CAP_CTL_VBI_ODD (1<<3)
218 1.1 wiz #define BT848_CAP_CTL_VBI_EVEN (1<<2)
219 1.1 wiz #define BT848_CAP_CTL_ODD (1<<1)
220 1.1 wiz #define BT848_CAP_CTL_EVEN (1<<0)
221 1.1 wiz BTBYTE (vbi_pack_size); /* e0, e1,e2,e3 */
222 1.1 wiz BTBYTE (vbi_pack_del); /* e4, e5,e6,e7 */
223 1.1 wiz int :32; /* e8, e9,ea,eb */
224 1.1 wiz BTBYTE (o_vtc); /* ec, ed,ee,ef */
225 1.1 wiz BTBYTE (pll_f_lo); /* f0, f1,f2,f3 */
226 1.1 wiz BTBYTE (pll_f_hi); /* f4, f5,f6,f7 */
227 1.1 wiz BTBYTE (pll_f_xci); /* f8, f9,fa,fb */
228 1.1 wiz #define BT848_PLL_F_C (1<<6)
229 1.1 wiz #define BT848_PLL_F_X (1<<7)
230 1.1 wiz u_char filler2[0x100-0xfc];
231 1.1 wiz BTLONG (int_stat); /* 100, 101,102,103 */
232 1.1 wiz BTLONG (int_mask); /* 104, 105,106,107 */
233 1.1 wiz #define BT848_INT_RISCS (0xf<<28)
234 1.1 wiz #define BT848_INT_RISC_EN (1<<27)
235 1.1 wiz #define BT848_INT_RACK (1<<25)
236 1.1 wiz #define BT848_INT_FIELD (1<<24)
237 1.1 wiz #define BT848_INT_MYSTERYBIT (1<<23)
238 1.1 wiz #define BT848_INT_SCERR (1<<19)
239 1.1 wiz #define BT848_INT_OCERR (1<<18)
240 1.1 wiz #define BT848_INT_PABORT (1<<17)
241 1.1 wiz #define BT848_INT_RIPERR (1<<16)
242 1.1 wiz #define BT848_INT_PPERR (1<<15)
243 1.1 wiz #define BT848_INT_FDSR (1<<14)
244 1.1 wiz #define BT848_INT_FTRGT (1<<13)
245 1.1 wiz #define BT848_INT_FBUS (1<<12)
246 1.1 wiz #define BT848_INT_RISCI (1<<11)
247 1.1 wiz #define BT848_INT_GPINT (1<<9)
248 1.1 wiz #define BT848_INT_I2CDONE (1<<8)
249 1.1 wiz #define BT848_INT_RSV1 (1<<7)
250 1.1 wiz #define BT848_INT_RSV0 (1<<6)
251 1.1 wiz #define BT848_INT_VPRES (1<<5)
252 1.1 wiz #define BT848_INT_HLOCK (1<<4)
253 1.1 wiz #define BT848_INT_OFLOW (1<<3)
254 1.1 wiz #define BT848_INT_HSYNC (1<<2)
255 1.1 wiz #define BT848_INT_VSYNC (1<<1)
256 1.1 wiz #define BT848_INT_FMTCHG (1<<0)
257 1.1 wiz int :32; /* 108, 109,10a,10b */
258 1.1 wiz BTWORD (gpio_dma_ctl); /* 10c, 10d,10e,10f */
259 1.1 wiz #define BT848_DMA_CTL_PL23TP4 (0<<6) /* planar1 trigger 4 */
260 1.1 wiz #define BT848_DMA_CTL_PL23TP8 (1<<6) /* planar1 trigger 8 */
261 1.1 wiz #define BT848_DMA_CTL_PL23TP16 (2<<6) /* planar1 trigger 16 */
262 1.1 wiz #define BT848_DMA_CTL_PL23TP32 (3<<6) /* planar1 trigger 32 */
263 1.1 wiz #define BT848_DMA_CTL_PL1TP4 (0<<4) /* planar1 trigger 4 */
264 1.1 wiz #define BT848_DMA_CTL_PL1TP8 (1<<4) /* planar1 trigger 8 */
265 1.1 wiz #define BT848_DMA_CTL_PL1TP16 (2<<4) /* planar1 trigger 16 */
266 1.1 wiz #define BT848_DMA_CTL_PL1TP32 (3<<4) /* planar1 trigger 32 */
267 1.1 wiz #define BT848_DMA_CTL_PKTP4 (0<<2) /* packed trigger 4 */
268 1.1 wiz #define BT848_DMA_CTL_PKTP8 (1<<2) /* packed trigger 8 */
269 1.1 wiz #define BT848_DMA_CTL_PKTP16 (2<<2) /* packed trigger 16 */
270 1.1 wiz #define BT848_DMA_CTL_PKTP32 (3<<2) /* packed trigger 32 */
271 1.1 wiz #define BT848_DMA_CTL_RISC_EN (1<<1)
272 1.1 wiz #define BT848_DMA_CTL_FIFO_EN (1<<0)
273 1.1 wiz BTLONG (i2c_data_ctl); /* 110, 111,112,113 */
274 1.1 wiz #define BT848_DATA_CTL_I2CDIV (0xf<<4)
275 1.1 wiz #define BT848_DATA_CTL_I2CSYNC (1<<3)
276 1.1 wiz #define BT848_DATA_CTL_I2CW3B (1<<2)
277 1.1 wiz #define BT848_DATA_CTL_I2CSCL (1<<1)
278 1.1 wiz #define BT848_DATA_CTL_I2CSDA (1<<0)
279 1.1 wiz BTLONG (risc_strt_add); /* 114, 115,116,117 */
280 1.1 wiz BTLONG (gpio_out_en); /* 118, 119,11a,11b */ /* really 24 bits */
281 1.1 wiz BTLONG (gpio_reg_inp); /* 11c, 11d,11e,11f */ /* really 24 bits */
282 1.1 wiz BTLONG (risc_count); /* 120, 121,122,123 */
283 1.1 wiz u_char filler3[0x200-0x124];
284 1.1 wiz BTLONG (gpio_data); /* 200, 201,202,203 */ /* really 24 bits */
285 1.1 wiz };
286 1.1 wiz
287 1.1 wiz
288 1.1 wiz #define BKTR_DSTATUS 0x000
289 1.1 wiz #define BKTR_IFORM 0x004
290 1.1 wiz #define BKTR_TDEC 0x008
291 1.1 wiz #define BKTR_E_CROP 0x00C
292 1.1 wiz #define BKTR_O_CROP 0x08C
293 1.1 wiz #define BKTR_E_VDELAY_LO 0x010
294 1.1 wiz #define BKTR_O_VDELAY_LO 0x090
295 1.1 wiz #define BKTR_E_VACTIVE_LO 0x014
296 1.1 wiz #define BKTR_O_VACTIVE_LO 0x094
297 1.1 wiz #define BKTR_E_DELAY_LO 0x018
298 1.1 wiz #define BKTR_O_DELAY_LO 0x098
299 1.1 wiz #define BKTR_E_HACTIVE_LO 0x01C
300 1.1 wiz #define BKTR_O_HACTIVE_LO 0x09C
301 1.1 wiz #define BKTR_E_HSCALE_HI 0x020
302 1.1 wiz #define BKTR_O_HSCALE_HI 0x0A0
303 1.1 wiz #define BKTR_E_HSCALE_LO 0x024
304 1.1 wiz #define BKTR_O_HSCALE_LO 0x0A4
305 1.1 wiz #define BKTR_BRIGHT 0x028
306 1.1 wiz #define BKTR_E_CONTROL 0x02C
307 1.1 wiz #define BKTR_O_CONTROL 0x0AC
308 1.1 wiz #define BKTR_CONTRAST_LO 0x030
309 1.1 wiz #define BKTR_SAT_U_LO 0x034
310 1.1 wiz #define BKTR_SAT_V_LO 0x038
311 1.1 wiz #define BKTR_HUE 0x03C
312 1.1 wiz #define BKTR_E_SCLOOP 0x040
313 1.1 wiz #define BKTR_O_SCLOOP 0x0C0
314 1.1 wiz #define BKTR_OFORM 0x048
315 1.1 wiz #define BKTR_E_VSCALE_HI 0x04C
316 1.1 wiz #define BKTR_O_VSCALE_HI 0x0CC
317 1.1 wiz #define BKTR_E_VSCALE_LO 0x050
318 1.1 wiz #define BKTR_O_VSCALE_LO 0x0D0
319 1.1 wiz #define BKTR_TEST 0x054
320 1.1 wiz #define BKTR_ADELAY 0x060
321 1.1 wiz #define BKTR_BDELAY 0x064
322 1.1 wiz #define BKTR_ADC 0x068
323 1.1 wiz #define BKTR_E_VTC 0x06C
324 1.1 wiz #define BKTR_O_VTC 0x0EC
325 1.1 wiz #define BKTR_SRESET 0x07C
326 1.1 wiz #define BKTR_COLOR_FMT 0x0D4
327 1.1 wiz #define BKTR_COLOR_CTL 0x0D8
328 1.1 wiz #define BKTR_CAP_CTL 0x0DC
329 1.1 wiz #define BKTR_VBI_PACK_SIZE 0x0E0
330 1.1 wiz #define BKTR_VBI_PACK_DEL 0x0E4
331 1.1 wiz #define BKTR_INT_STAT 0x100
332 1.1 wiz #define BKTR_INT_MASK 0x104
333 1.1 wiz #define BKTR_RISC_COUNT 0x120
334 1.1 wiz #define BKTR_RISC_STRT_ADD 0x114
335 1.1 wiz #define BKTR_GPIO_DMA_CTL 0x10C
336 1.1 wiz #define BKTR_GPIO_OUT_EN 0x118
337 1.1 wiz #define BKTR_GPIO_REG_INP 0x11C
338 1.1 wiz #define BKTR_GPIO_DATA 0x200
339 1.1 wiz #define BKTR_I2C_DATA_CTL 0x110
340 1.1 wiz #define BKTR_TGCTRL 0x084
341 1.1 wiz #define BKTR_PLL_F_LO 0x0F0
342 1.1 wiz #define BKTR_PLL_F_HI 0x0F4
343 1.1 wiz #define BKTR_PLL_F_XCI 0x0F8
344 1.1 wiz
345 1.1 wiz /*
346 1.1 wiz * device support for onboard tv tuners
347 1.1 wiz */
348 1.1 wiz
349 1.1 wiz /* description of the LOGICAL tuner */
350 1.1 wiz struct TVTUNER {
351 1.1 wiz int frequency;
352 1.1 wiz u_char chnlset;
353 1.1 wiz u_char channel;
354 1.1 wiz u_char band;
355 1.1 wiz u_char afc;
356 1.1 wiz u_char radio_mode; /* current mode of the radio mode */
357 1.1 wiz };
358 1.1 wiz
359 1.1 wiz /* description of the PHYSICAL tuner */
360 1.1 wiz struct TUNER {
361 1.1 wiz char* name;
362 1.1 wiz u_char type;
363 1.1 wiz u_char pllControl[4];
364 1.1 wiz u_char bandLimits[ 2 ];
365 1.1 wiz u_char bandAddrs[ 4 ]; /* 3 first for the 3 TV
366 1.1 wiz ** bands. Last for radio
367 1.1 wiz ** band (0x00=NoRadio).
368 1.1 wiz */
369 1.1 wiz
370 1.1 wiz };
371 1.1 wiz
372 1.1 wiz /* description of the card */
373 1.1 wiz #define EEPROMBLOCKSIZE 32
374 1.1 wiz struct CARDTYPE {
375 1.1 wiz unsigned int card_id; /* card id (from #define's) */
376 1.1 wiz char* name;
377 1.1 wiz const struct TUNER* tuner; /* Tuner details */
378 1.1 wiz u_char tuner_pllAddr; /* Tuner i2c address */
379 1.1 wiz u_char dbx; /* Has DBX chip? */
380 1.1 wiz u_char msp3400c; /* Has msp3400c chip? */
381 1.1 wiz u_char dpl3518a; /* Has dpl3518a chip? */
382 1.1 wiz u_char eepromAddr;
383 1.1 wiz u_char eepromSize; /* bytes / EEPROMBLOCKSIZE */
384 1.1 wiz u_int audiomuxs[ 5 ]; /* tuner, ext (line-in) */
385 1.1 wiz /* int/unused (radio) */
386 1.1 wiz /* mute, present */
387 1.1 wiz u_int gpio_mux_bits; /* GPIO mask for audio mux */
388 1.1 wiz };
389 1.1 wiz
390 1.1 wiz struct format_params {
391 1.1 wiz /* Total lines, lines before image, image lines */
392 1.1 wiz int vtotal, vdelay, vactive;
393 1.1 wiz /* Total unscaled horizontal pixels, pixels before image, image pixels */
394 1.1 wiz int htotal, hdelay, hactive;
395 1.1 wiz /* Scaled horizontal image pixels, Total Scaled horizontal pixels */
396 1.1 wiz int scaled_hactive, scaled_htotal;
397 1.1 wiz /* frame rate . for ntsc is 30 frames per second */
398 1.1 wiz int frame_rate;
399 1.1 wiz /* A-delay and B-delay */
400 1.1 wiz u_char adelay, bdelay;
401 1.1 wiz /* Iform XTSEL value */
402 1.1 wiz int iform_xtsel;
403 1.1 wiz /* VBI number of lines per field, and number of samples per line */
404 1.1 wiz int vbi_num_lines, vbi_num_samples;
405 1.1 wiz };
406 1.1 wiz
407 1.1 wiz #if ((defined(__FreeBSD__)) && (NSMBUS > 0))
408 1.1 wiz struct bktr_i2c_softc {
409 1.1 wiz device_t iicbus;
410 1.1 wiz device_t smbus;
411 1.1 wiz };
412 1.1 wiz #endif
413 1.1 wiz
414 1.1 wiz
415 1.1 wiz /* Bt848/878 register access
416 1.1 wiz * The registers can either be access via a memory mapped structure
417 1.1 wiz * or accessed via bus_space.
418 1.1 wiz * bus_0pace access allows cross platform support, where as the
419 1.1 wiz * memory mapped structure method only works on 32 bit processors
420 1.1 wiz * with the right type of endianness.
421 1.1 wiz */
422 1.1 wiz #if defined(__NetBSD__) || ( defined(__FreeBSD__) && (__FreeBSD_version >=300000) )
423 1.1 wiz #define INB(bktr,offset) bus_space_read_1((bktr)->memt,(bktr)->memh,(offset))
424 1.1 wiz #define INW(bktr,offset) bus_space_read_2((bktr)->memt,(bktr)->memh,(offset))
425 1.1 wiz #define INL(bktr,offset) bus_space_read_4((bktr)->memt,(bktr)->memh,(offset))
426 1.1 wiz #define OUTB(bktr,offset,value) bus_space_write_1((bktr)->memt,(bktr)->memh,(offset),(value))
427 1.1 wiz #define OUTW(bktr,offset,value) bus_space_write_2((bktr)->memt,(bktr)->memh,(offset),(value))
428 1.1 wiz #define OUTL(bktr,offset,value) bus_space_write_4((bktr)->memt,(bktr)->memh,(offset),(value))
429 1.1 wiz #else
430 1.1 wiz #define INB(bktr,offset) *(volatile unsigned char*) ((int)((bktr)->memh)+(offset))
431 1.1 wiz #define INW(bktr,offset) *(volatile unsigned short*)((int)((bktr)->memh)+(offset))
432 1.1 wiz #define INL(bktr,offset) *(volatile unsigned int*) ((int)((bktr)->memh)+(offset))
433 1.1 wiz #define OUTB(bktr,offset,value) *(volatile unsigned char*) ((int)((bktr)->memh)+(offset)) = (value)
434 1.1 wiz #define OUTW(bktr,offset,value) *(volatile unsigned short*)((int)((bktr)->memh)+(offset)) = (value)
435 1.1 wiz #define OUTL(bktr,offset,value) *(volatile unsigned int*) ((int)((bktr)->memh)+(offset)) = (value)
436 1.1 wiz #endif
437 1.1 wiz
438 1.1 wiz
439 1.1 wiz typedef struct bktr_clip bktr_clip_t;
440 1.1 wiz
441 1.1 wiz /*
442 1.1 wiz * NetBSD >= 1.3H uses vaddr_t instead of vm_offset_t
443 1.1 wiz */
444 1.1 wiz #if defined(__NetBSD__) && __NetBSD_Version__ >= 103080000
445 1.1 wiz typedef vaddr_t vm_offset_t;
446 1.1 wiz #endif
447 1.1 wiz
448 1.1 wiz /*
449 1.1 wiz * BrookTree 848 info structure, one per bt848 card installed.
450 1.1 wiz */
451 1.1 wiz struct bktr_softc {
452 1.1 wiz
453 1.1 wiz #if defined (__bsdi__)
454 1.1 wiz struct device bktr_dev; /* base device */
455 1.1 wiz struct isadev bktr_id; /* ISA device */
456 1.1 wiz struct intrhand bktr_ih; /* interrupt vectoring */
457 1.1 wiz #define pcici_t pci_devaddr_t
458 1.1 wiz #endif
459 1.1 wiz
460 1.1 wiz #if defined(__NetBSD__)
461 1.1 wiz struct device bktr_dev; /* base device */
462 1.1 wiz bus_dma_tag_t dmat; /* DMA tag */
463 1.1 wiz bus_space_tag_t memt;
464 1.1 wiz bus_space_handle_t memh;
465 1.1 wiz bus_size_t obmemsz; /* size of en card (bytes) */
466 1.1 wiz void *ih;
467 1.1 wiz bus_dmamap_t dm_prog;
468 1.1 wiz bus_dmamap_t dm_oprog;
469 1.1 wiz bus_dmamap_t dm_mem;
470 1.1 wiz bus_dmamap_t dm_vbidata;
471 1.1 wiz bus_dmamap_t dm_vbibuffer;
472 1.1 wiz #if __NetBSD_Version__ >= 103080000
473 1.1 wiz paddr_t phys_base; /* Bt848 register physical address */
474 1.1 wiz #else
475 1.1 wiz vm_offset_t phys_base; /* Bt848 register physical address */
476 1.1 wiz #endif
477 1.1 wiz #endif
478 1.1 wiz
479 1.1 wiz #if defined(__OpenBSD__)
480 1.1 wiz struct device bktr_dev; /* base device */
481 1.1 wiz bus_dma_tag_t dmat; /* DMA tag */
482 1.1 wiz bus_space_tag_t memt;
483 1.1 wiz bus_space_handle_t memh;
484 1.1 wiz bus_size_t obmemsz; /* size of en card (bytes) */
485 1.1 wiz void *ih;
486 1.1 wiz bus_dmamap_t dm_prog;
487 1.1 wiz bus_dmamap_t dm_oprog;
488 1.1 wiz bus_dmamap_t dm_mem;
489 1.1 wiz bus_dmamap_t dm_vbidata;
490 1.1 wiz bus_dmamap_t dm_vbibuffer;
491 1.1 wiz size_t dm_mapsize;
492 1.1 wiz pci_chipset_tag_t pc; /* Opaque PCI chipset tag */
493 1.1 wiz pcitag_t tag; /* PCI tag, for doing PCI commands */
494 1.1 wiz vm_offset_t phys_base; /* Bt848 register physical address */
495 1.1 wiz #endif
496 1.1 wiz
497 1.1 wiz #if defined (__FreeBSD__)
498 1.1 wiz #if (__FreeBSD_version < 400000)
499 1.1 wiz vm_offset_t phys_base; /* 2.x Bt848 register physical address */
500 1.1 wiz pcici_t tag; /* 2.x PCI tag, for doing PCI commands */
501 1.1 wiz #endif
502 1.1 wiz #if (__FreeBSD_version >= 400000)
503 1.1 wiz struct resource *res_mem; /* 4.x resource descriptor for registers */
504 1.1 wiz struct resource *res_irq; /* 4.x resource descriptor for interrupt */
505 1.1 wiz void *res_ih; /* 4.x newbus interrupt handler cookie */
506 1.1 wiz #endif
507 1.1 wiz #if (__FreeBSD_version >= 310000)
508 1.1 wiz bus_space_tag_t memt; /* Bus space register access functions */
509 1.1 wiz bus_space_handle_t memh; /* Bus space register access functions */
510 1.1 wiz bus_size_t obmemsz;/* Size of card (bytes) */
511 1.1 wiz #endif
512 1.1 wiz #if (NSMBUS > 0)
513 1.1 wiz struct bktr_i2c_softc i2c_sc; /* bt848_i2c device */
514 1.1 wiz #endif
515 1.1 wiz #endif
516 1.1 wiz
517 1.1 wiz /* the following definitions are common over all platforms */
518 1.1 wiz vm_offset_t bigbuf; /* buffer that holds the captured image */
519 1.1 wiz int alloc_pages; /* number of pages in bigbuf */
520 1.1 wiz
521 1.1 wiz vm_offset_t vbidata; /* RISC program puts VBI data from the current frame here */
522 1.1 wiz vm_offset_t vbibuffer; /* Circular buffer holding VBI data for the user */
523 1.1 wiz int vbiinsert; /* Position for next write into circular buffer */
524 1.1 wiz int vbistart; /* Position of last read from circular buffer */
525 1.1 wiz int vbisize; /* Number of bytes in the circular buffer */
526 1.1 wiz u_long vbi_sequence_number; /* sequence number for VBI */
527 1.1 wiz int vbi_read_blocked; /* user process blocked on read() from /dev/vbi */
528 1.1 wiz struct selinfo vbi_select; /* Data used by select() on /dev/vbi */
529 1.1 wiz
530 1.1 wiz
531 1.1 wiz struct proc *proc; /* process to receive raised signal */
532 1.1 wiz int signal; /* signal to send to process */
533 1.1 wiz int clr_on_start; /* clear cap buf on capture start? */
534 1.1 wiz #define METEOR_SIG_MODE_MASK 0xffff0000
535 1.1 wiz #define METEOR_SIG_FIELD_MODE 0x00010000
536 1.1 wiz #define METEOR_SIG_FRAME_MODE 0x00000000
537 1.1 wiz vm_offset_t dma_prog;
538 1.1 wiz vm_offset_t odd_dma_prog;
539 1.1 wiz char dma_prog_loaded;
540 1.1 wiz struct meteor_mem *mem; /* used to control sync. multi-frame output */
541 1.1 wiz u_long synch_wait; /* wait for free buffer before continuing */
542 1.1 wiz short current; /* frame number in buffer (1-frames) */
543 1.1 wiz short rows; /* number of rows in a frame */
544 1.1 wiz short cols; /* number of columns in a frame */
545 1.1 wiz int capture_area_x_offset; /* Usually the full 640x480(NTSC) image is */
546 1.1 wiz int capture_area_y_offset; /* captured. The capture area allows for */
547 1.1 wiz int capture_area_x_size; /* example 320x200 pixels from the centre */
548 1.1 wiz int capture_area_y_size; /* of the video image to be captured. */
549 1.1 wiz char capture_area_enabled; /* When TRUE use user's capture area. */
550 1.1 wiz int pixfmt; /* active pixel format (idx into fmt tbl) */
551 1.1 wiz int pixfmt_compat; /* Y/N - in meteor pix fmt compat mode */
552 1.1 wiz u_long format; /* frame format rgb, yuv, etc.. */
553 1.1 wiz short frames; /* number of frames allocated */
554 1.1 wiz int frame_size; /* number of bytes in a frame */
555 1.1 wiz u_long fifo_errors; /* number of fifo capture errors since open */
556 1.1 wiz u_long dma_errors; /* number of DMA capture errors since open */
557 1.1 wiz u_long frames_captured;/* number of frames captured since open */
558 1.1 wiz u_long even_fields_captured; /* number of even fields captured */
559 1.1 wiz u_long odd_fields_captured; /* number of odd fields captured */
560 1.1 wiz u_long range_enable; /* enable range checking ?? */
561 1.1 wiz u_short capcontrol; /* reg 0xdc capture control */
562 1.1 wiz u_short bktr_cap_ctl;
563 1.1 wiz volatile u_int flags;
564 1.1 wiz #define METEOR_INITALIZED 0x00000001
565 1.1 wiz #define METEOR_OPEN 0x00000002
566 1.1 wiz #define METEOR_MMAP 0x00000004
567 1.1 wiz #define METEOR_INTR 0x00000008
568 1.1 wiz #define METEOR_READ 0x00000010 /* XXX never gets referenced */
569 1.1 wiz #define METEOR_SINGLE 0x00000020 /* get single frame */
570 1.1 wiz #define METEOR_CONTIN 0x00000040 /* continuously get frames */
571 1.1 wiz #define METEOR_SYNCAP 0x00000080 /* synchronously get frames */
572 1.1 wiz #define METEOR_CAP_MASK 0x000000f0
573 1.1 wiz #define METEOR_NTSC 0x00000100
574 1.1 wiz #define METEOR_PAL 0x00000200
575 1.1 wiz #define METEOR_SECAM 0x00000400
576 1.1 wiz #define BROOKTREE_NTSC 0x00000100 /* used in video open() and */
577 1.1 wiz #define BROOKTREE_PAL 0x00000200 /* in the kernel config */
578 1.1 wiz #define BROOKTREE_SECAM 0x00000400 /* file */
579 1.1 wiz #define METEOR_AUTOMODE 0x00000800
580 1.1 wiz #define METEOR_FORM_MASK 0x00000f00
581 1.1 wiz #define METEOR_DEV0 0x00001000
582 1.1 wiz #define METEOR_DEV1 0x00002000
583 1.1 wiz #define METEOR_DEV2 0x00004000
584 1.1 wiz #define METEOR_DEV3 0x00008000
585 1.1 wiz #define METEOR_DEV_SVIDEO 0x00006000
586 1.1 wiz #define METEOR_DEV_RGB 0x0000a000
587 1.1 wiz #define METEOR_DEV_MASK 0x0000f000
588 1.1 wiz #define METEOR_RGB16 0x00010000
589 1.1 wiz #define METEOR_RGB24 0x00020000
590 1.1 wiz #define METEOR_YUV_PACKED 0x00040000
591 1.1 wiz #define METEOR_YUV_PLANAR 0x00080000
592 1.1 wiz #define METEOR_WANT_EVEN 0x00100000 /* want even frame */
593 1.1 wiz #define METEOR_WANT_ODD 0x00200000 /* want odd frame */
594 1.1 wiz #define METEOR_WANT_MASK 0x00300000
595 1.1 wiz #define METEOR_ONLY_EVEN_FIELDS 0x01000000
596 1.1 wiz #define METEOR_ONLY_ODD_FIELDS 0x02000000
597 1.1 wiz #define METEOR_ONLY_FIELDS_MASK 0x03000000
598 1.1 wiz #define METEOR_YUV_422 0x04000000
599 1.1 wiz #define METEOR_OUTPUT_FMT_MASK 0x040f0000
600 1.1 wiz #define METEOR_WANT_TS 0x08000000 /* time-stamp a frame */
601 1.1 wiz #define METEOR_RGB 0x20000000 /* meteor rgb unit */
602 1.1 wiz #define METEOR_FIELD_MODE 0x80000000
603 1.1 wiz u_char tflags; /* Tuner flags (/dev/tuner) */
604 1.1 wiz #define TUNER_INITALIZED 0x00000001
605 1.1 wiz #define TUNER_OPEN 0x00000002
606 1.1 wiz u_char vbiflags; /* VBI flags (/dev/vbi) */
607 1.1 wiz #define VBI_INITALIZED 0x00000001
608 1.1 wiz #define VBI_OPEN 0x00000002
609 1.1 wiz #define VBI_CAPTURE 0x00000004
610 1.1 wiz u_short fps; /* frames per second */
611 1.1 wiz struct meteor_video video;
612 1.1 wiz struct TVTUNER tuner;
613 1.1 wiz struct CARDTYPE card;
614 1.1 wiz u_char audio_mux_select; /* current mode of the audio */
615 1.1 wiz u_char audio_mute_state; /* mute state of the audio */
616 1.1 wiz u_char format_params;
617 1.1 wiz u_long current_sol;
618 1.1 wiz u_long current_col;
619 1.1 wiz int clip_start;
620 1.1 wiz int line_length;
621 1.1 wiz int last_y;
622 1.1 wiz int y;
623 1.1 wiz int y2;
624 1.1 wiz int yclip;
625 1.1 wiz int yclip2;
626 1.1 wiz int max_clip_node;
627 1.1 wiz bktr_clip_t clip_list[100];
628 1.1 wiz int reverse_mute; /* Swap the GPIO values for Mute and TV Audio */
629 1.1 wiz int bt848_tuner;
630 1.1 wiz int bt848_card;
631 1.1 wiz u_long id;
632 1.1 wiz #define BT848_USE_XTALS 0
633 1.1 wiz #define BT848_USE_PLL 1
634 1.1 wiz int xtal_pll_mode; /* Use XTAL or PLL mode for PAL/SECAM */
635 1.1 wiz int remote_control; /* remote control detected */
636 1.1 wiz int remote_control_addr; /* remote control i2c address */
637 1.1 wiz char msp_version_string[9]; /* MSP version string 34xxx-xx */
638 1.1 wiz int msp_addr; /* MSP i2c address */
639 1.1 wiz char dpl_version_string[9]; /* DPL version string 35xxx-xx */
640 1.1 wiz int dpl_addr; /* DPL i2c address */
641 1.1 wiz int slow_msp_audio; /* 0 = use fast MSP3410/3415 programming sequence */
642 1.1 wiz /* 1 = use slow MSP3410/3415 programming sequence */
643 1.1 wiz
644 1.1 wiz };
645 1.1 wiz
646 1.1 wiz typedef struct bktr_softc bktr_reg_t;
647 1.1 wiz typedef struct bktr_softc* bktr_ptr_t;
648 1.1 wiz
649 1.1 wiz #define Bt848_MAX_SIGN 16
650 1.1 wiz
651 1.1 wiz struct bt848_card_sig {
652 1.1 wiz int card;
653 1.1 wiz int tuner;
654 1.1 wiz u_char signature[Bt848_MAX_SIGN];
655 1.1 wiz };
656 1.1 wiz
657 1.1 wiz
658 1.1 wiz /***********************************************************/
659 1.1 wiz /* ioctl_cmd_t int on old versions, u_long on new versions */
660 1.1 wiz /***********************************************************/
661 1.1 wiz
662 1.1 wiz #if (__FreeBSD__ == 2)
663 1.1 wiz typedef int ioctl_cmd_t;
664 1.1 wiz #endif
665 1.1 wiz
666 1.1 wiz #if defined(__FreeBSD__)
667 1.1 wiz #if (__FreeBSD_version >= 300000)
668 1.1 wiz typedef u_long ioctl_cmd_t;
669 1.1 wiz #endif
670 1.1 wiz #endif
671 1.1 wiz
672 1.1 wiz #if defined(__NetBSD__) || defined(__OpenBSD__)
673 1.1 wiz typedef u_long ioctl_cmd_t;
674 1.1 wiz #endif
675 1.1 wiz
676 1.1 wiz
677