bktr_reg.h revision 1.13 1 1.13 wiz /* $SourceForge: bktr_reg.h,v 1.3 2003/03/11 23:11:27 thomasklausner Exp $ */
2 1.1 wiz
3 1.13 wiz /* $NetBSD: bktr_reg.h,v 1.13 2003/03/12 00:14:41 wiz Exp $ */
4 1.1 wiz /*
5 1.13 wiz * $FreeBSD: src/sys/dev/bktr/bktr_reg.h,v 1.42 2000/10/31 13:09:56 roger Exp$
6 1.1 wiz *
7 1.1 wiz * Copyright (c) 1999 Roger Hardiman
8 1.1 wiz * Copyright (c) 1998 Amancio Hasty
9 1.1 wiz * Copyright (c) 1995 Mark Tinguely and Jim Lowe
10 1.1 wiz * All rights reserved.
11 1.1 wiz *
12 1.1 wiz * Redistribution and use in source and binary forms, with or without
13 1.1 wiz * modification, are permitted provided that the following conditions
14 1.1 wiz * are met:
15 1.1 wiz * 1. Redistributions of source code must retain the above copyright
16 1.1 wiz * notice, this list of conditions and the following disclaimer.
17 1.1 wiz * 2. Redistributions in binary form must reproduce the above copyright
18 1.1 wiz * notice, this list of conditions and the following disclaimer in the
19 1.1 wiz * documentation and/or other materials provided with the distribution.
20 1.1 wiz * 3. All advertising materials mentioning features or use of this software
21 1.1 wiz * must display the following acknowledgement:
22 1.1 wiz * This product includes software developed by Mark Tinguely and Jim Lowe
23 1.13 wiz * 4. The name of the author may not be used to endorse or promote products
24 1.1 wiz * derived from this software without specific prior written permission.
25 1.1 wiz *
26 1.1 wiz * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
27 1.1 wiz * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
28 1.1 wiz * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
29 1.1 wiz * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
30 1.1 wiz * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
31 1.1 wiz * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
32 1.1 wiz * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 1.1 wiz * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
34 1.1 wiz * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
35 1.1 wiz * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 wiz * POSSIBILITY OF SUCH DAMAGE.
37 1.1 wiz *
38 1.1 wiz */
39 1.1 wiz
40 1.1 wiz #ifdef __FreeBSD__
41 1.1 wiz # if (__FreeBSD_version >= 310000)
42 1.1 wiz # include "smbus.h"
43 1.1 wiz # else
44 1.1 wiz # define NSMBUS 0 /* FreeBSD before 3.1 does not have SMBUS */
45 1.1 wiz # endif
46 1.8 wiz # if (NSMBUS > 0)
47 1.8 wiz # define BKTR_USE_FREEBSD_SMBUS
48 1.8 wiz # endif
49 1.1 wiz #endif
50 1.1 wiz
51 1.1 wiz #ifdef __NetBSD__
52 1.1 wiz #include <machine/bus.h> /* struct device */
53 1.1 wiz #include <sys/device.h>
54 1.1 wiz #include <sys/select.h> /* struct selinfo */
55 1.7 jdolecek #include <sys/reboot.h> /* AB_* for bootverbose */
56 1.1 wiz #endif
57 1.1 wiz
58 1.5 wiz /*
59 1.5 wiz * The kernel options for the driver now all begin with BKTR.
60 1.5 wiz * Support the older kernel options on FreeBSD and OpenBSD.
61 1.5 wiz *
62 1.5 wiz */
63 1.5 wiz #if defined(__FreeBSD__) || defined(__OpenBSD__)
64 1.8 wiz #if defined(BROOKTREE_ALLOC_PAGES)
65 1.8 wiz #define BKTR_ALLOC_PAGES BROOKTREE_ALLOC_PAGES
66 1.8 wiz #endif
67 1.8 wiz
68 1.5 wiz #if defined(BROOKTREE_SYSTEM_DEFAULT)
69 1.5 wiz #define BKTR_SYSTEM_DEFAULT BROOKTREE_SYSTEM_DEFAULT
70 1.5 wiz #endif
71 1.5 wiz
72 1.5 wiz #if defined(OVERRIDE_CARD)
73 1.5 wiz #define BKTR_OVERRIDE_CARD OVERRIDE_CARD
74 1.5 wiz #endif
75 1.5 wiz
76 1.5 wiz #if defined(OVERRIDE_TUNER)
77 1.5 wiz #define BKTR_OVERRIDE_TUNER OVERRIDE_TUNER
78 1.5 wiz #endif
79 1.5 wiz
80 1.5 wiz #if defined(OVERRIDE_DBX)
81 1.5 wiz #define BKTR_OVERRIDE_DBX OVERRIDE_DBX
82 1.5 wiz #endif
83 1.5 wiz
84 1.5 wiz #if defined(OVERRIDE_MSP)
85 1.5 wiz #define BKTR_OVERRIDE_MSP OVERRIDE_MSP
86 1.5 wiz #endif
87 1.5 wiz
88 1.5 wiz #endif
89 1.5 wiz
90 1.5 wiz
91 1.1 wiz #ifndef PCI_LATENCY_TIMER
92 1.1 wiz #define PCI_LATENCY_TIMER 0x0c /* pci timer register */
93 1.1 wiz #endif
94 1.1 wiz
95 1.1 wiz /*
96 1.1 wiz * Definitions for the Brooktree 848/878 video capture to pci interface.
97 1.1 wiz */
98 1.8 wiz #ifndef __NetBSD__
99 1.6 wiz #define PCI_VENDOR_SHIFT 0
100 1.6 wiz #define PCI_VENDOR_MASK 0xffff
101 1.6 wiz #define PCI_VENDOR(id) \
102 1.6 wiz (((id) >> PCI_VENDOR_SHIFT) & PCI_VENDOR_MASK)
103 1.6 wiz
104 1.6 wiz #define PCI_PRODUCT_SHIFT 16
105 1.6 wiz #define PCI_PRODUCT_MASK 0xffff
106 1.6 wiz #define PCI_PRODUCT(id) \
107 1.6 wiz (((id) >> PCI_PRODUCT_SHIFT) & PCI_PRODUCT_MASK)
108 1.6 wiz
109 1.8 wiz /* PCI vendor ID */
110 1.8 wiz #define PCI_VENDOR_BROOKTREE 0x109e /* Brooktree */
111 1.6 wiz /* Brooktree products */
112 1.8 wiz #define PCI_PRODUCT_BROOKTREE_BT848 0x0350 /* Bt848 Video Capture */
113 1.8 wiz #define PCI_PRODUCT_BROOKTREE_BT849 0x0351 /* Bt849 Video Capture */
114 1.8 wiz #define PCI_PRODUCT_BROOKTREE_BT878 0x036e /* Bt878 Video Capture */
115 1.8 wiz #define PCI_PRODUCT_BROOKTREE_BT879 0x036f /* Bt879 Video Capture */
116 1.6 wiz #endif
117 1.1 wiz
118 1.1 wiz #define BROOKTREE_848 1
119 1.1 wiz #define BROOKTREE_848A 2
120 1.1 wiz #define BROOKTREE_849A 3
121 1.1 wiz #define BROOKTREE_878 4
122 1.1 wiz #define BROOKTREE_879 5
123 1.1 wiz
124 1.1 wiz typedef volatile u_int bregister_t;
125 1.1 wiz /*
126 1.1 wiz * if other persuasion endian, then compiler will probably require that
127 1.1 wiz * these next
128 1.1 wiz * macros be reversed
129 1.1 wiz */
130 1.1 wiz #define BTBYTE(what) bregister_t what:8; int :24
131 1.1 wiz #define BTWORD(what) bregister_t what:16; int: 16
132 1.1 wiz #define BTLONG(what) bregister_t what:32
133 1.1 wiz
134 1.1 wiz struct bt848_registers {
135 1.1 wiz BTBYTE (dstatus); /* 0, 1,2,3 */
136 1.1 wiz #define BT848_DSTATUS_PRES (1<<7)
137 1.1 wiz #define BT848_DSTATUS_HLOC (1<<6)
138 1.1 wiz #define BT848_DSTATUS_FIELD (1<<5)
139 1.1 wiz #define BT848_DSTATUS_NUML (1<<4)
140 1.1 wiz #define BT848_DSTATUS_CSEL (1<<3)
141 1.1 wiz #define BT848_DSTATUS_PLOCK (1<<2)
142 1.1 wiz #define BT848_DSTATUS_LOF (1<<1)
143 1.1 wiz #define BT848_DSTATUS_COF (1<<0)
144 1.1 wiz BTBYTE (iform); /* 4, 5,6,7 */
145 1.1 wiz #define BT848_IFORM_MUXSEL (0x3<<5)
146 1.1 wiz # define BT848_IFORM_M_MUX1 (0x03<<5)
147 1.1 wiz # define BT848_IFORM_M_MUX0 (0x02<<5)
148 1.1 wiz # define BT848_IFORM_M_MUX2 (0x01<<5)
149 1.1 wiz # define BT848_IFORM_M_MUX3 (0x0)
150 1.1 wiz # define BT848_IFORM_M_RSVD (0x00<<5)
151 1.1 wiz #define BT848_IFORM_XTSEL (0x3<<3)
152 1.1 wiz # define BT848_IFORM_X_AUTO (0x03<<3)
153 1.1 wiz # define BT848_IFORM_X_XT1 (0x02<<3)
154 1.1 wiz # define BT848_IFORM_X_XT0 (0x01<<3)
155 1.1 wiz # define BT848_IFORM_X_RSVD (0x00<<3)
156 1.1 wiz BTBYTE (tdec); /* 8, 9,a,b */
157 1.1 wiz BTBYTE (e_crop); /* c, d,e,f */
158 1.1 wiz BTBYTE (e_vdelay_lo); /* 10, 11,12,13 */
159 1.1 wiz BTBYTE (e_vactive_lo); /* 14, 15,16,17 */
160 1.1 wiz BTBYTE (e_delay_lo); /* 18, 19,1a,1b */
161 1.1 wiz BTBYTE (e_hactive_lo); /* 1c, 1d,1e,1f */
162 1.1 wiz BTBYTE (e_hscale_hi); /* 20, 21,22,23 */
163 1.1 wiz BTBYTE (e_hscale_lo); /* 24, 25,26,27 */
164 1.1 wiz BTBYTE (bright); /* 28, 29,2a,2b */
165 1.1 wiz BTBYTE (e_control); /* 2c, 2d,2e,2f */
166 1.1 wiz #define BT848_E_CONTROL_LNOTCH (1<<7)
167 1.1 wiz #define BT848_E_CONTROL_COMP (1<<6)
168 1.1 wiz #define BT848_E_CONTROL_LDEC (1<<5)
169 1.1 wiz #define BT848_E_CONTROL_CBSENSE (1<<4)
170 1.1 wiz #define BT848_E_CONTROL_RSVD (1<<3)
171 1.1 wiz #define BT848_E_CONTROL_CON_MSB (1<<2)
172 1.1 wiz #define BT848_E_CONTROL_SAT_U_MSB (1<<1)
173 1.1 wiz #define BT848_E_CONTROL_SAT_V_MSB (1<<0)
174 1.1 wiz BTBYTE (contrast_lo); /* 30, 31,32,33 */
175 1.1 wiz BTBYTE (sat_u_lo); /* 34, 35,36,37 */
176 1.1 wiz BTBYTE (sat_v_lo); /* 38, 39,3a,3b */
177 1.1 wiz BTBYTE (hue); /* 3c, 3d,3e,3f */
178 1.1 wiz BTBYTE (e_scloop); /* 40, 41,42,43 */
179 1.1 wiz #define BT848_E_SCLOOP_RSVD1 (1<<7)
180 1.1 wiz #define BT848_E_SCLOOP_CAGC (1<<6)
181 1.1 wiz #define BT848_E_SCLOOP_CKILL (1<<5)
182 1.1 wiz #define BT848_E_SCLOOP_HFILT (0x3<<3)
183 1.1 wiz # define BT848_E_SCLOOP_HFILT_ICON (0x3<<3)
184 1.1 wiz # define BT848_E_SCLOOP_HFILT_QCIF (0x2<<3)
185 1.1 wiz # define BT848_E_SCLOOP_HFILT_CIF (0x1<<3)
186 1.1 wiz # define BT848_E_SCLOOP_HFILT_AUTO (0x0<<3)
187 1.1 wiz #define BT848_E_SCLOOP_RSVD0 (0x7<<0)
188 1.1 wiz int :32; /* 44, 45,46,47 */
189 1.1 wiz BTBYTE (oform); /* 48, 49,4a,4b */
190 1.1 wiz BTBYTE (e_vscale_hi); /* 4c, 4d,4e,4f */
191 1.1 wiz BTBYTE (e_vscale_lo); /* 50, 51,52,53 */
192 1.1 wiz BTBYTE (test); /* 54, 55,56,57 */
193 1.1 wiz int :32; /* 58, 59,5a,5b */
194 1.1 wiz int :32; /* 5c, 5d,5e,5f */
195 1.1 wiz BTLONG (adelay); /* 60, 61,62,63 */
196 1.1 wiz BTBYTE (bdelay); /* 64, 65,66,67 */
197 1.1 wiz BTBYTE (adc); /* 68, 69,6a,6b */
198 1.1 wiz #define BT848_ADC_RESERVED (0x80) /* required pattern */
199 1.1 wiz #define BT848_ADC_SYNC_T (1<<5)
200 1.1 wiz #define BT848_ADC_AGC_EN (1<<4)
201 1.1 wiz #define BT848_ADC_CLK_SLEEP (1<<3)
202 1.1 wiz #define BT848_ADC_Y_SLEEP (1<<2)
203 1.1 wiz #define BT848_ADC_C_SLEEP (1<<1)
204 1.1 wiz #define BT848_ADC_CRUSH (1<<0)
205 1.1 wiz BTBYTE (e_vtc); /* 6c, 6d,6e,6f */
206 1.1 wiz int :32; /* 70, 71,72,73 */
207 1.1 wiz int :32; /* 74, 75,76,77 */
208 1.1 wiz int :32; /* 78, 79,7a,7b */
209 1.1 wiz BTLONG (sreset); /* 7c, 7d,7e,7f */
210 1.1 wiz u_char filler1[0x84-0x80];
211 1.1 wiz BTBYTE (tgctrl); /* 84, 85,86,87 */
212 1.1 wiz #define BT848_TGCTRL_TGCKI (3<<3)
213 1.1 wiz #define BT848_TGCTRL_TGCKI_XTAL (0<<3)
214 1.1 wiz #define BT848_TGCTRL_TGCKI_PLL (1<<3)
215 1.1 wiz #define BT848_TGCTRL_TGCKI_GPCLK (2<<3)
216 1.1 wiz #define BT848_TGCTRL_TGCKI_GPCLK_I (3<<3)
217 1.1 wiz u_char filler[0x8c-0x88];
218 1.1 wiz BTBYTE (o_crop); /* 8c, 8d,8e,8f */
219 1.1 wiz BTBYTE (o_vdelay_lo); /* 90, 91,92,93 */
220 1.1 wiz BTBYTE (o_vactive_lo); /* 94, 95,96,97 */
221 1.1 wiz BTBYTE (o_delay_lo); /* 98, 99,9a,9b */
222 1.1 wiz BTBYTE (o_hactive_lo); /* 9c, 9d,9e,9f */
223 1.1 wiz BTBYTE (o_hscale_hi); /* a0, a1,a2,a3 */
224 1.1 wiz BTBYTE (o_hscale_lo); /* a4, a5,a6,a7 */
225 1.1 wiz int :32; /* a8, a9,aa,ab */
226 1.1 wiz BTBYTE (o_control); /* ac, ad,ae,af */
227 1.1 wiz #define BT848_O_CONTROL_LNOTCH (1<<7)
228 1.1 wiz #define BT848_O_CONTROL_COMP (1<<6)
229 1.1 wiz #define BT848_O_CONTROL_LDEC (1<<5)
230 1.1 wiz #define BT848_O_CONTROL_CBSENSE (1<<4)
231 1.1 wiz #define BT848_O_CONTROL_RSVD (1<<3)
232 1.1 wiz #define BT848_O_CONTROL_CON_MSB (1<<2)
233 1.1 wiz #define BT848_O_CONTROL_SAT_U_MSB (1<<1)
234 1.1 wiz #define BT848_O_CONTROL_SAT_V_MSB (1<<0)
235 1.1 wiz u_char fillter4[16];
236 1.1 wiz BTBYTE (o_scloop); /* c0, c1,c2,c3 */
237 1.1 wiz #define BT848_O_SCLOOP_RSVD1 (1<<7)
238 1.1 wiz #define BT848_O_SCLOOP_CAGC (1<<6)
239 1.1 wiz #define BT848_O_SCLOOP_CKILL (1<<5)
240 1.1 wiz #define BT848_O_SCLOOP_HFILT (0x3<<3)
241 1.1 wiz #define BT848_O_SCLOOP_HFILT_ICON (0x3<<3)
242 1.1 wiz #define BT848_O_SCLOOP_HFILT_QCIF (0x2<<3)
243 1.1 wiz #define BT848_O_SCLOOP_HFILT_CIF (0x1<<3)
244 1.1 wiz #define BT848_O_SCLOOP_HFILT_AUTO (0x0<<3)
245 1.1 wiz #define BT848_O_SCLOOP_RSVD0 (0x7<<0)
246 1.1 wiz int :32; /* c4, c5,c6,c7 */
247 1.1 wiz int :32; /* c8, c9,ca,cb */
248 1.1 wiz BTBYTE (o_vscale_hi); /* cc, cd,ce,cf */
249 1.1 wiz BTBYTE (o_vscale_lo); /* d0, d1,d2,d3 */
250 1.1 wiz BTBYTE (color_fmt); /* d4, d5,d6,d7 */
251 1.1 wiz bregister_t color_ctl_swap :4; /* d8 */
252 1.1 wiz #define BT848_COLOR_CTL_WSWAP_ODD (1<<3)
253 1.1 wiz #define BT848_COLOR_CTL_WSWAP_EVEN (1<<2)
254 1.1 wiz #define BT848_COLOR_CTL_BSWAP_ODD (1<<1)
255 1.1 wiz #define BT848_COLOR_CTL_BSWAP_EVEN (1<<0)
256 1.1 wiz bregister_t color_ctl_gamma :1;
257 1.1 wiz bregister_t color_ctl_rgb_ded :1;
258 1.1 wiz bregister_t color_ctl_color_bars :1;
259 1.1 wiz bregister_t color_ctl_ext_frmrate :1;
260 1.1 wiz #define BT848_COLOR_CTL_GAMMA (1<<4)
261 1.1 wiz #define BT848_COLOR_CTL_RGB_DED (1<<5)
262 1.1 wiz #define BT848_COLOR_CTL_COLOR_BARS (1<<6)
263 1.1 wiz #define BT848_COLOR_CTL_EXT_FRMRATE (1<<7)
264 1.1 wiz int :24; /* d9,da,db */
265 1.1 wiz BTBYTE (cap_ctl); /* dc, dd,de,df */
266 1.1 wiz #define BT848_CAP_CTL_DITH_FRAME (1<<4)
267 1.1 wiz #define BT848_CAP_CTL_VBI_ODD (1<<3)
268 1.1 wiz #define BT848_CAP_CTL_VBI_EVEN (1<<2)
269 1.1 wiz #define BT848_CAP_CTL_ODD (1<<1)
270 1.1 wiz #define BT848_CAP_CTL_EVEN (1<<0)
271 1.1 wiz BTBYTE (vbi_pack_size); /* e0, e1,e2,e3 */
272 1.1 wiz BTBYTE (vbi_pack_del); /* e4, e5,e6,e7 */
273 1.1 wiz int :32; /* e8, e9,ea,eb */
274 1.1 wiz BTBYTE (o_vtc); /* ec, ed,ee,ef */
275 1.1 wiz BTBYTE (pll_f_lo); /* f0, f1,f2,f3 */
276 1.1 wiz BTBYTE (pll_f_hi); /* f4, f5,f6,f7 */
277 1.1 wiz BTBYTE (pll_f_xci); /* f8, f9,fa,fb */
278 1.1 wiz #define BT848_PLL_F_C (1<<6)
279 1.1 wiz #define BT848_PLL_F_X (1<<7)
280 1.1 wiz u_char filler2[0x100-0xfc];
281 1.1 wiz BTLONG (int_stat); /* 100, 101,102,103 */
282 1.1 wiz BTLONG (int_mask); /* 104, 105,106,107 */
283 1.1 wiz #define BT848_INT_RISCS (0xf<<28)
284 1.1 wiz #define BT848_INT_RISC_EN (1<<27)
285 1.1 wiz #define BT848_INT_RACK (1<<25)
286 1.1 wiz #define BT848_INT_FIELD (1<<24)
287 1.1 wiz #define BT848_INT_MYSTERYBIT (1<<23)
288 1.1 wiz #define BT848_INT_SCERR (1<<19)
289 1.1 wiz #define BT848_INT_OCERR (1<<18)
290 1.1 wiz #define BT848_INT_PABORT (1<<17)
291 1.1 wiz #define BT848_INT_RIPERR (1<<16)
292 1.1 wiz #define BT848_INT_PPERR (1<<15)
293 1.1 wiz #define BT848_INT_FDSR (1<<14)
294 1.1 wiz #define BT848_INT_FTRGT (1<<13)
295 1.1 wiz #define BT848_INT_FBUS (1<<12)
296 1.1 wiz #define BT848_INT_RISCI (1<<11)
297 1.1 wiz #define BT848_INT_GPINT (1<<9)
298 1.1 wiz #define BT848_INT_I2CDONE (1<<8)
299 1.1 wiz #define BT848_INT_RSV1 (1<<7)
300 1.1 wiz #define BT848_INT_RSV0 (1<<6)
301 1.1 wiz #define BT848_INT_VPRES (1<<5)
302 1.1 wiz #define BT848_INT_HLOCK (1<<4)
303 1.1 wiz #define BT848_INT_OFLOW (1<<3)
304 1.1 wiz #define BT848_INT_HSYNC (1<<2)
305 1.1 wiz #define BT848_INT_VSYNC (1<<1)
306 1.1 wiz #define BT848_INT_FMTCHG (1<<0)
307 1.1 wiz int :32; /* 108, 109,10a,10b */
308 1.1 wiz BTWORD (gpio_dma_ctl); /* 10c, 10d,10e,10f */
309 1.1 wiz #define BT848_DMA_CTL_PL23TP4 (0<<6) /* planar1 trigger 4 */
310 1.1 wiz #define BT848_DMA_CTL_PL23TP8 (1<<6) /* planar1 trigger 8 */
311 1.1 wiz #define BT848_DMA_CTL_PL23TP16 (2<<6) /* planar1 trigger 16 */
312 1.1 wiz #define BT848_DMA_CTL_PL23TP32 (3<<6) /* planar1 trigger 32 */
313 1.1 wiz #define BT848_DMA_CTL_PL1TP4 (0<<4) /* planar1 trigger 4 */
314 1.1 wiz #define BT848_DMA_CTL_PL1TP8 (1<<4) /* planar1 trigger 8 */
315 1.1 wiz #define BT848_DMA_CTL_PL1TP16 (2<<4) /* planar1 trigger 16 */
316 1.1 wiz #define BT848_DMA_CTL_PL1TP32 (3<<4) /* planar1 trigger 32 */
317 1.1 wiz #define BT848_DMA_CTL_PKTP4 (0<<2) /* packed trigger 4 */
318 1.1 wiz #define BT848_DMA_CTL_PKTP8 (1<<2) /* packed trigger 8 */
319 1.1 wiz #define BT848_DMA_CTL_PKTP16 (2<<2) /* packed trigger 16 */
320 1.1 wiz #define BT848_DMA_CTL_PKTP32 (3<<2) /* packed trigger 32 */
321 1.1 wiz #define BT848_DMA_CTL_RISC_EN (1<<1)
322 1.1 wiz #define BT848_DMA_CTL_FIFO_EN (1<<0)
323 1.1 wiz BTLONG (i2c_data_ctl); /* 110, 111,112,113 */
324 1.1 wiz #define BT848_DATA_CTL_I2CDIV (0xf<<4)
325 1.1 wiz #define BT848_DATA_CTL_I2CSYNC (1<<3)
326 1.1 wiz #define BT848_DATA_CTL_I2CW3B (1<<2)
327 1.1 wiz #define BT848_DATA_CTL_I2CSCL (1<<1)
328 1.1 wiz #define BT848_DATA_CTL_I2CSDA (1<<0)
329 1.1 wiz BTLONG (risc_strt_add); /* 114, 115,116,117 */
330 1.1 wiz BTLONG (gpio_out_en); /* 118, 119,11a,11b */ /* really 24 bits */
331 1.1 wiz BTLONG (gpio_reg_inp); /* 11c, 11d,11e,11f */ /* really 24 bits */
332 1.1 wiz BTLONG (risc_count); /* 120, 121,122,123 */
333 1.1 wiz u_char filler3[0x200-0x124];
334 1.1 wiz BTLONG (gpio_data); /* 200, 201,202,203 */ /* really 24 bits */
335 1.1 wiz };
336 1.1 wiz
337 1.1 wiz
338 1.1 wiz #define BKTR_DSTATUS 0x000
339 1.1 wiz #define BKTR_IFORM 0x004
340 1.1 wiz #define BKTR_TDEC 0x008
341 1.1 wiz #define BKTR_E_CROP 0x00C
342 1.1 wiz #define BKTR_O_CROP 0x08C
343 1.1 wiz #define BKTR_E_VDELAY_LO 0x010
344 1.1 wiz #define BKTR_O_VDELAY_LO 0x090
345 1.1 wiz #define BKTR_E_VACTIVE_LO 0x014
346 1.1 wiz #define BKTR_O_VACTIVE_LO 0x094
347 1.1 wiz #define BKTR_E_DELAY_LO 0x018
348 1.1 wiz #define BKTR_O_DELAY_LO 0x098
349 1.1 wiz #define BKTR_E_HACTIVE_LO 0x01C
350 1.1 wiz #define BKTR_O_HACTIVE_LO 0x09C
351 1.1 wiz #define BKTR_E_HSCALE_HI 0x020
352 1.1 wiz #define BKTR_O_HSCALE_HI 0x0A0
353 1.1 wiz #define BKTR_E_HSCALE_LO 0x024
354 1.1 wiz #define BKTR_O_HSCALE_LO 0x0A4
355 1.1 wiz #define BKTR_BRIGHT 0x028
356 1.1 wiz #define BKTR_E_CONTROL 0x02C
357 1.1 wiz #define BKTR_O_CONTROL 0x0AC
358 1.1 wiz #define BKTR_CONTRAST_LO 0x030
359 1.1 wiz #define BKTR_SAT_U_LO 0x034
360 1.1 wiz #define BKTR_SAT_V_LO 0x038
361 1.1 wiz #define BKTR_HUE 0x03C
362 1.1 wiz #define BKTR_E_SCLOOP 0x040
363 1.1 wiz #define BKTR_O_SCLOOP 0x0C0
364 1.1 wiz #define BKTR_OFORM 0x048
365 1.1 wiz #define BKTR_E_VSCALE_HI 0x04C
366 1.1 wiz #define BKTR_O_VSCALE_HI 0x0CC
367 1.1 wiz #define BKTR_E_VSCALE_LO 0x050
368 1.1 wiz #define BKTR_O_VSCALE_LO 0x0D0
369 1.1 wiz #define BKTR_TEST 0x054
370 1.1 wiz #define BKTR_ADELAY 0x060
371 1.1 wiz #define BKTR_BDELAY 0x064
372 1.1 wiz #define BKTR_ADC 0x068
373 1.1 wiz #define BKTR_E_VTC 0x06C
374 1.1 wiz #define BKTR_O_VTC 0x0EC
375 1.1 wiz #define BKTR_SRESET 0x07C
376 1.1 wiz #define BKTR_COLOR_FMT 0x0D4
377 1.1 wiz #define BKTR_COLOR_CTL 0x0D8
378 1.1 wiz #define BKTR_CAP_CTL 0x0DC
379 1.1 wiz #define BKTR_VBI_PACK_SIZE 0x0E0
380 1.1 wiz #define BKTR_VBI_PACK_DEL 0x0E4
381 1.1 wiz #define BKTR_INT_STAT 0x100
382 1.1 wiz #define BKTR_INT_MASK 0x104
383 1.1 wiz #define BKTR_RISC_COUNT 0x120
384 1.1 wiz #define BKTR_RISC_STRT_ADD 0x114
385 1.1 wiz #define BKTR_GPIO_DMA_CTL 0x10C
386 1.1 wiz #define BKTR_GPIO_OUT_EN 0x118
387 1.1 wiz #define BKTR_GPIO_REG_INP 0x11C
388 1.1 wiz #define BKTR_GPIO_DATA 0x200
389 1.1 wiz #define BKTR_I2C_DATA_CTL 0x110
390 1.1 wiz #define BKTR_TGCTRL 0x084
391 1.13 wiz #define BKTR_PLL_F_LO 0x0F0
392 1.13 wiz #define BKTR_PLL_F_HI 0x0F4
393 1.1 wiz #define BKTR_PLL_F_XCI 0x0F8
394 1.1 wiz
395 1.1 wiz /*
396 1.1 wiz * device support for onboard tv tuners
397 1.1 wiz */
398 1.1 wiz
399 1.1 wiz /* description of the LOGICAL tuner */
400 1.1 wiz struct TVTUNER {
401 1.1 wiz int frequency;
402 1.1 wiz u_char chnlset;
403 1.1 wiz u_char channel;
404 1.1 wiz u_char band;
405 1.1 wiz u_char afc;
406 1.1 wiz u_char radio_mode; /* current mode of the radio mode */
407 1.1 wiz };
408 1.1 wiz
409 1.1 wiz /* description of the PHYSICAL tuner */
410 1.1 wiz struct TUNER {
411 1.1 wiz char* name;
412 1.1 wiz u_char type;
413 1.1 wiz u_char pllControl[4];
414 1.13 wiz u_char bandLimits[2];
415 1.13 wiz u_char bandAddrs[4]; /* 3 first for the 3 TV
416 1.13 wiz ** bands. Last for radio
417 1.1 wiz ** band (0x00=NoRadio).
418 1.1 wiz */
419 1.1 wiz
420 1.1 wiz };
421 1.1 wiz
422 1.1 wiz /* description of the card */
423 1.1 wiz #define EEPROMBLOCKSIZE 32
424 1.1 wiz struct CARDTYPE {
425 1.1 wiz unsigned int card_id; /* card id (from #define's) */
426 1.1 wiz char* name;
427 1.1 wiz const struct TUNER* tuner; /* Tuner details */
428 1.1 wiz u_char tuner_pllAddr; /* Tuner i2c address */
429 1.1 wiz u_char dbx; /* Has DBX chip? */
430 1.1 wiz u_char msp3400c; /* Has msp3400c chip? */
431 1.1 wiz u_char dpl3518a; /* Has dpl3518a chip? */
432 1.1 wiz u_char eepromAddr;
433 1.1 wiz u_char eepromSize; /* bytes / EEPROMBLOCKSIZE */
434 1.13 wiz u_int audiomuxs[5]; /* tuner, ext (line-in) */
435 1.1 wiz /* int/unused (radio) */
436 1.1 wiz /* mute, present */
437 1.1 wiz u_int gpio_mux_bits; /* GPIO mask for audio mux */
438 1.1 wiz };
439 1.1 wiz
440 1.1 wiz struct format_params {
441 1.1 wiz /* Total lines, lines before image, image lines */
442 1.1 wiz int vtotal, vdelay, vactive;
443 1.1 wiz /* Total unscaled horizontal pixels, pixels before image, image pixels */
444 1.1 wiz int htotal, hdelay, hactive;
445 1.1 wiz /* Scaled horizontal image pixels, Total Scaled horizontal pixels */
446 1.1 wiz int scaled_hactive, scaled_htotal;
447 1.1 wiz /* frame rate . for ntsc is 30 frames per second */
448 1.1 wiz int frame_rate;
449 1.1 wiz /* A-delay and B-delay */
450 1.1 wiz u_char adelay, bdelay;
451 1.1 wiz /* Iform XTSEL value */
452 1.1 wiz int iform_xtsel;
453 1.1 wiz /* VBI number of lines per field, and number of samples per line */
454 1.1 wiz int vbi_num_lines, vbi_num_samples;
455 1.1 wiz };
456 1.1 wiz
457 1.8 wiz #if defined(BKTR_USE_FREEBSD_SMBUS)
458 1.1 wiz struct bktr_i2c_softc {
459 1.1 wiz device_t iicbus;
460 1.1 wiz device_t smbus;
461 1.1 wiz };
462 1.1 wiz #endif
463 1.1 wiz
464 1.1 wiz
465 1.1 wiz /* Bt848/878 register access
466 1.1 wiz * The registers can either be access via a memory mapped structure
467 1.1 wiz * or accessed via bus_space.
468 1.12 mjl * bus_space access allows cross platform support, where as the
469 1.1 wiz * memory mapped structure method only works on 32 bit processors
470 1.1 wiz * with the right type of endianness.
471 1.1 wiz */
472 1.13 wiz #if defined(__NetBSD__) || (defined(__FreeBSD__) && (__FreeBSD_version >=300000))
473 1.12 mjl
474 1.12 mjl #if defined(__NetBSD__)
475 1.12 mjl
476 1.12 mjl struct bktr_softc;
477 1.12 mjl
478 1.12 mjl u_int8_t bktr_INB(struct bktr_softc *, int);
479 1.12 mjl u_int16_t bktr_INW(struct bktr_softc *, int);
480 1.12 mjl u_int32_t bktr_INL(struct bktr_softc *, int);
481 1.12 mjl void bktr_OUTB(struct bktr_softc *, int, u_int8_t);
482 1.12 mjl void bktr_OUTW(struct bktr_softc *, int, u_int16_t);
483 1.12 mjl void bktr_OUTL(struct bktr_softc *, int, u_int32_t);
484 1.12 mjl
485 1.12 mjl #define INB(bktr,offset) bktr_INB(bktr,offset)
486 1.12 mjl #define INW(bktr,offset) bktr_INW(bktr,offset)
487 1.12 mjl #define INL(bktr,offset) bktr_INL(bktr,offset)
488 1.12 mjl #define OUTB(bktr,offset,value) bktr_OUTB(bktr,offset,value)
489 1.12 mjl #define OUTW(bktr,offset,value) bktr_OUTW(bktr,offset,value)
490 1.12 mjl #define OUTL(bktr,offset,value) bktr_OUTL(bktr,offset,value)
491 1.12 mjl
492 1.12 mjl #else
493 1.12 mjl
494 1.1 wiz #define INB(bktr,offset) bus_space_read_1((bktr)->memt,(bktr)->memh,(offset))
495 1.1 wiz #define INW(bktr,offset) bus_space_read_2((bktr)->memt,(bktr)->memh,(offset))
496 1.1 wiz #define INL(bktr,offset) bus_space_read_4((bktr)->memt,(bktr)->memh,(offset))
497 1.1 wiz #define OUTB(bktr,offset,value) bus_space_write_1((bktr)->memt,(bktr)->memh,(offset),(value))
498 1.1 wiz #define OUTW(bktr,offset,value) bus_space_write_2((bktr)->memt,(bktr)->memh,(offset),(value))
499 1.1 wiz #define OUTL(bktr,offset,value) bus_space_write_4((bktr)->memt,(bktr)->memh,(offset),(value))
500 1.12 mjl
501 1.12 mjl #endif /* __NetBSD__ */
502 1.12 mjl
503 1.1 wiz #else
504 1.1 wiz #define INB(bktr,offset) *(volatile unsigned char*) ((int)((bktr)->memh)+(offset))
505 1.1 wiz #define INW(bktr,offset) *(volatile unsigned short*)((int)((bktr)->memh)+(offset))
506 1.1 wiz #define INL(bktr,offset) *(volatile unsigned int*) ((int)((bktr)->memh)+(offset))
507 1.1 wiz #define OUTB(bktr,offset,value) *(volatile unsigned char*) ((int)((bktr)->memh)+(offset)) = (value)
508 1.1 wiz #define OUTW(bktr,offset,value) *(volatile unsigned short*)((int)((bktr)->memh)+(offset)) = (value)
509 1.1 wiz #define OUTL(bktr,offset,value) *(volatile unsigned int*) ((int)((bktr)->memh)+(offset)) = (value)
510 1.1 wiz #endif
511 1.1 wiz
512 1.1 wiz
513 1.1 wiz typedef struct bktr_clip bktr_clip_t;
514 1.1 wiz
515 1.1 wiz /*
516 1.1 wiz * BrookTree 848 info structure, one per bt848 card installed.
517 1.1 wiz */
518 1.1 wiz struct bktr_softc {
519 1.1 wiz
520 1.1 wiz #if defined (__bsdi__)
521 1.1 wiz struct device bktr_dev; /* base device */
522 1.1 wiz struct isadev bktr_id; /* ISA device */
523 1.1 wiz struct intrhand bktr_ih; /* interrupt vectoring */
524 1.1 wiz #define pcici_t pci_devaddr_t
525 1.1 wiz #endif
526 1.1 wiz
527 1.1 wiz #if defined(__NetBSD__)
528 1.1 wiz struct device bktr_dev; /* base device */
529 1.1 wiz bus_dma_tag_t dmat; /* DMA tag */
530 1.1 wiz bus_space_tag_t memt;
531 1.1 wiz bus_space_handle_t memh;
532 1.1 wiz bus_size_t obmemsz; /* size of en card (bytes) */
533 1.1 wiz void *ih;
534 1.1 wiz bus_dmamap_t dm_prog;
535 1.1 wiz bus_dmamap_t dm_oprog;
536 1.1 wiz bus_dmamap_t dm_mem;
537 1.1 wiz bus_dmamap_t dm_vbidata;
538 1.1 wiz bus_dmamap_t dm_vbibuffer;
539 1.1 wiz #endif
540 1.1 wiz
541 1.1 wiz #if defined(__OpenBSD__)
542 1.1 wiz struct device bktr_dev; /* base device */
543 1.1 wiz bus_dma_tag_t dmat; /* DMA tag */
544 1.1 wiz bus_space_tag_t memt;
545 1.1 wiz bus_space_handle_t memh;
546 1.1 wiz bus_size_t obmemsz; /* size of en card (bytes) */
547 1.1 wiz void *ih;
548 1.1 wiz bus_dmamap_t dm_prog;
549 1.1 wiz bus_dmamap_t dm_oprog;
550 1.1 wiz bus_dmamap_t dm_mem;
551 1.1 wiz bus_dmamap_t dm_vbidata;
552 1.1 wiz bus_dmamap_t dm_vbibuffer;
553 1.1 wiz size_t dm_mapsize;
554 1.1 wiz pci_chipset_tag_t pc; /* Opaque PCI chipset tag */
555 1.1 wiz pcitag_t tag; /* PCI tag, for doing PCI commands */
556 1.1 wiz vm_offset_t phys_base; /* Bt848 register physical address */
557 1.1 wiz #endif
558 1.1 wiz
559 1.1 wiz #if defined (__FreeBSD__)
560 1.1 wiz #if (__FreeBSD_version < 400000)
561 1.1 wiz vm_offset_t phys_base; /* 2.x Bt848 register physical address */
562 1.1 wiz pcici_t tag; /* 2.x PCI tag, for doing PCI commands */
563 1.1 wiz #endif
564 1.1 wiz #if (__FreeBSD_version >= 400000)
565 1.8 wiz int mem_rid; /* 4.x resource id */
566 1.1 wiz struct resource *res_mem; /* 4.x resource descriptor for registers */
567 1.8 wiz int irq_rid; /* 4.x resource id */
568 1.1 wiz struct resource *res_irq; /* 4.x resource descriptor for interrupt */
569 1.1 wiz void *res_ih; /* 4.x newbus interrupt handler cookie */
570 1.8 wiz dev_t bktrdev; /* 4.x device entry for /dev/bktrN */
571 1.8 wiz dev_t tunerdev; /* 4.x device entry for /dev/tunerN */
572 1.8 wiz dev_t vbidev; /* 4.x device entry for /dev/vbiN */
573 1.8 wiz dev_t bktrdev_alias; /* alias /dev/bktr to /dev/bktr0 */
574 1.8 wiz dev_t tunerdev_alias; /* alias /dev/tuner to /dev/tuner0 */
575 1.8 wiz dev_t vbidev_alias; /* alias /dev/vbi to /dev/vbi0 */
576 1.1 wiz #endif
577 1.1 wiz #if (__FreeBSD_version >= 310000)
578 1.1 wiz bus_space_tag_t memt; /* Bus space register access functions */
579 1.1 wiz bus_space_handle_t memh; /* Bus space register access functions */
580 1.1 wiz bus_size_t obmemsz;/* Size of card (bytes) */
581 1.1 wiz #endif
582 1.1 wiz #if (NSMBUS > 0)
583 1.1 wiz struct bktr_i2c_softc i2c_sc; /* bt848_i2c device */
584 1.1 wiz #endif
585 1.5 wiz char bktr_xname[7]; /* device name and unit number */
586 1.1 wiz #endif
587 1.1 wiz
588 1.8 wiz
589 1.8 wiz /* The following definitions are for the contiguous memory */
590 1.8 wiz #ifdef __NetBSD__
591 1.8 wiz vaddr_t bigbuf; /* buffer that holds the captured image */
592 1.8 wiz vaddr_t vbidata; /* RISC program puts VBI data from the current frame here */
593 1.8 wiz vaddr_t vbibuffer; /* Circular buffer holding VBI data for the user */
594 1.8 wiz vaddr_t dma_prog; /* RISC prog for single and/or even field capture*/
595 1.8 wiz vaddr_t odd_dma_prog; /* RISC program for Odd field capture */
596 1.8 wiz #else
597 1.8 wiz vm_offset_t bigbuf; /* buffer that holds the captured image */
598 1.8 wiz vm_offset_t vbidata; /* RISC program puts VBI data from the current frame here */
599 1.8 wiz vm_offset_t vbibuffer; /* Circular buffer holding VBI data for the user */
600 1.8 wiz vm_offset_t dma_prog; /* RISC prog for single and/or even field capture*/
601 1.8 wiz vm_offset_t odd_dma_prog;/* RISC program for Odd field capture */
602 1.8 wiz #endif
603 1.8 wiz
604 1.8 wiz
605 1.1 wiz /* the following definitions are common over all platforms */
606 1.1 wiz int alloc_pages; /* number of pages in bigbuf */
607 1.1 wiz int vbiinsert; /* Position for next write into circular buffer */
608 1.1 wiz int vbistart; /* Position of last read from circular buffer */
609 1.1 wiz int vbisize; /* Number of bytes in the circular buffer */
610 1.1 wiz u_long vbi_sequence_number; /* sequence number for VBI */
611 1.1 wiz int vbi_read_blocked; /* user process blocked on read() from /dev/vbi */
612 1.1 wiz struct selinfo vbi_select; /* Data used by select() on /dev/vbi */
613 1.13 wiz
614 1.1 wiz
615 1.1 wiz struct proc *proc; /* process to receive raised signal */
616 1.1 wiz int signal; /* signal to send to process */
617 1.1 wiz int clr_on_start; /* clear cap buf on capture start? */
618 1.1 wiz #define METEOR_SIG_MODE_MASK 0xffff0000
619 1.1 wiz #define METEOR_SIG_FIELD_MODE 0x00010000
620 1.1 wiz #define METEOR_SIG_FRAME_MODE 0x00000000
621 1.1 wiz char dma_prog_loaded;
622 1.1 wiz struct meteor_mem *mem; /* used to control sync. multi-frame output */
623 1.1 wiz u_long synch_wait; /* wait for free buffer before continuing */
624 1.1 wiz short current; /* frame number in buffer (1-frames) */
625 1.1 wiz short rows; /* number of rows in a frame */
626 1.1 wiz short cols; /* number of columns in a frame */
627 1.1 wiz int capture_area_x_offset; /* Usually the full 640x480(NTSC) image is */
628 1.1 wiz int capture_area_y_offset; /* captured. The capture area allows for */
629 1.1 wiz int capture_area_x_size; /* example 320x200 pixels from the centre */
630 1.1 wiz int capture_area_y_size; /* of the video image to be captured. */
631 1.1 wiz char capture_area_enabled; /* When TRUE use user's capture area. */
632 1.1 wiz int pixfmt; /* active pixel format (idx into fmt tbl) */
633 1.1 wiz int pixfmt_compat; /* Y/N - in meteor pix fmt compat mode */
634 1.1 wiz u_long format; /* frame format rgb, yuv, etc.. */
635 1.1 wiz short frames; /* number of frames allocated */
636 1.1 wiz int frame_size; /* number of bytes in a frame */
637 1.1 wiz u_long fifo_errors; /* number of fifo capture errors since open */
638 1.1 wiz u_long dma_errors; /* number of DMA capture errors since open */
639 1.1 wiz u_long frames_captured;/* number of frames captured since open */
640 1.1 wiz u_long even_fields_captured; /* number of even fields captured */
641 1.1 wiz u_long odd_fields_captured; /* number of odd fields captured */
642 1.1 wiz u_long range_enable; /* enable range checking ?? */
643 1.1 wiz u_short capcontrol; /* reg 0xdc capture control */
644 1.1 wiz u_short bktr_cap_ctl;
645 1.1 wiz volatile u_int flags;
646 1.10 wiz #define METEOR_INITIALIZED 0x00000001
647 1.13 wiz #define METEOR_OPEN 0x00000002
648 1.1 wiz #define METEOR_MMAP 0x00000004
649 1.1 wiz #define METEOR_INTR 0x00000008
650 1.1 wiz #define METEOR_READ 0x00000010 /* XXX never gets referenced */
651 1.1 wiz #define METEOR_SINGLE 0x00000020 /* get single frame */
652 1.1 wiz #define METEOR_CONTIN 0x00000040 /* continuously get frames */
653 1.1 wiz #define METEOR_SYNCAP 0x00000080 /* synchronously get frames */
654 1.1 wiz #define METEOR_CAP_MASK 0x000000f0
655 1.1 wiz #define METEOR_NTSC 0x00000100
656 1.1 wiz #define METEOR_PAL 0x00000200
657 1.1 wiz #define METEOR_SECAM 0x00000400
658 1.1 wiz #define BROOKTREE_NTSC 0x00000100 /* used in video open() and */
659 1.1 wiz #define BROOKTREE_PAL 0x00000200 /* in the kernel config */
660 1.1 wiz #define BROOKTREE_SECAM 0x00000400 /* file */
661 1.1 wiz #define METEOR_AUTOMODE 0x00000800
662 1.1 wiz #define METEOR_FORM_MASK 0x00000f00
663 1.1 wiz #define METEOR_DEV0 0x00001000
664 1.1 wiz #define METEOR_DEV1 0x00002000
665 1.1 wiz #define METEOR_DEV2 0x00004000
666 1.1 wiz #define METEOR_DEV3 0x00008000
667 1.1 wiz #define METEOR_DEV_SVIDEO 0x00006000
668 1.1 wiz #define METEOR_DEV_RGB 0x0000a000
669 1.1 wiz #define METEOR_DEV_MASK 0x0000f000
670 1.1 wiz #define METEOR_RGB16 0x00010000
671 1.1 wiz #define METEOR_RGB24 0x00020000
672 1.1 wiz #define METEOR_YUV_PACKED 0x00040000
673 1.1 wiz #define METEOR_YUV_PLANAR 0x00080000
674 1.1 wiz #define METEOR_WANT_EVEN 0x00100000 /* want even frame */
675 1.1 wiz #define METEOR_WANT_ODD 0x00200000 /* want odd frame */
676 1.1 wiz #define METEOR_WANT_MASK 0x00300000
677 1.1 wiz #define METEOR_ONLY_EVEN_FIELDS 0x01000000
678 1.1 wiz #define METEOR_ONLY_ODD_FIELDS 0x02000000
679 1.1 wiz #define METEOR_ONLY_FIELDS_MASK 0x03000000
680 1.1 wiz #define METEOR_YUV_422 0x04000000
681 1.1 wiz #define METEOR_OUTPUT_FMT_MASK 0x040f0000
682 1.1 wiz #define METEOR_WANT_TS 0x08000000 /* time-stamp a frame */
683 1.1 wiz #define METEOR_RGB 0x20000000 /* meteor rgb unit */
684 1.1 wiz u_char tflags; /* Tuner flags (/dev/tuner) */
685 1.10 wiz #define TUNER_INITIALIZED 0x00000001
686 1.13 wiz #define TUNER_OPEN 0x00000002
687 1.1 wiz u_char vbiflags; /* VBI flags (/dev/vbi) */
688 1.10 wiz #define VBI_INITIALIZED 0x00000001
689 1.1 wiz #define VBI_OPEN 0x00000002
690 1.1 wiz #define VBI_CAPTURE 0x00000004
691 1.1 wiz u_short fps; /* frames per second */
692 1.1 wiz struct meteor_video video;
693 1.1 wiz struct TVTUNER tuner;
694 1.1 wiz struct CARDTYPE card;
695 1.1 wiz u_char audio_mux_select; /* current mode of the audio */
696 1.1 wiz u_char audio_mute_state; /* mute state of the audio */
697 1.1 wiz u_char format_params;
698 1.1 wiz u_long current_sol;
699 1.1 wiz u_long current_col;
700 1.1 wiz int clip_start;
701 1.1 wiz int line_length;
702 1.1 wiz int last_y;
703 1.1 wiz int y;
704 1.1 wiz int y2;
705 1.1 wiz int yclip;
706 1.1 wiz int yclip2;
707 1.1 wiz int max_clip_node;
708 1.1 wiz bktr_clip_t clip_list[100];
709 1.1 wiz int reverse_mute; /* Swap the GPIO values for Mute and TV Audio */
710 1.1 wiz int bt848_tuner;
711 1.1 wiz int bt848_card;
712 1.1 wiz u_long id;
713 1.1 wiz #define BT848_USE_XTALS 0
714 1.1 wiz #define BT848_USE_PLL 1
715 1.1 wiz int xtal_pll_mode; /* Use XTAL or PLL mode for PAL/SECAM */
716 1.1 wiz int remote_control; /* remote control detected */
717 1.1 wiz int remote_control_addr; /* remote control i2c address */
718 1.1 wiz char msp_version_string[9]; /* MSP version string 34xxx-xx */
719 1.1 wiz int msp_addr; /* MSP i2c address */
720 1.1 wiz char dpl_version_string[9]; /* DPL version string 35xxx-xx */
721 1.1 wiz int dpl_addr; /* DPL i2c address */
722 1.1 wiz int slow_msp_audio; /* 0 = use fast MSP3410/3415 programming sequence */
723 1.1 wiz /* 1 = use slow MSP3410/3415 programming sequence */
724 1.9 wiz /* 2 = use Tuner's Mono audio output via the MSP chip */
725 1.9 wiz int msp_use_mono_source; /* use Tuner's Mono audio output via the MSP chip */
726 1.9 wiz int audio_mux_present; /* 1 = has audio mux on GPIO lines, 0 = no audio mux */
727 1.9 wiz int msp_source_selected; /* 0 = TV source, 1 = Line In source, 2 = FM Radio Source */
728 1.1 wiz
729 1.1 wiz };
730 1.1 wiz
731 1.1 wiz typedef struct bktr_softc bktr_reg_t;
732 1.1 wiz typedef struct bktr_softc* bktr_ptr_t;
733 1.1 wiz
734 1.1 wiz #define Bt848_MAX_SIGN 16
735 1.1 wiz
736 1.1 wiz struct bt848_card_sig {
737 1.1 wiz int card;
738 1.1 wiz int tuner;
739 1.1 wiz u_char signature[Bt848_MAX_SIGN];
740 1.1 wiz };
741 1.1 wiz
742 1.1 wiz
743 1.1 wiz /***********************************************************/
744 1.1 wiz /* ioctl_cmd_t int on old versions, u_long on new versions */
745 1.1 wiz /***********************************************************/
746 1.1 wiz
747 1.1 wiz #if (__FreeBSD__ == 2)
748 1.1 wiz typedef int ioctl_cmd_t;
749 1.1 wiz #endif
750 1.1 wiz
751 1.1 wiz #if defined(__FreeBSD__)
752 1.1 wiz #if (__FreeBSD_version >= 300000)
753 1.1 wiz typedef u_long ioctl_cmd_t;
754 1.1 wiz #endif
755 1.1 wiz #endif
756 1.1 wiz
757 1.1 wiz #if defined(__NetBSD__) || defined(__OpenBSD__)
758 1.1 wiz typedef u_long ioctl_cmd_t;
759 1.1 wiz #endif
760 1.1 wiz
761 1.1 wiz
762