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bktr_reg.h revision 1.21.14.1
      1       1.13       wiz /* $SourceForge: bktr_reg.h,v 1.3 2003/03/11 23:11:27 thomasklausner Exp $ */
      2        1.1       wiz 
      3  1.21.14.1       tls /*	$NetBSD: bktr_reg.h,v 1.21.14.1 2012/11/20 03:02:30 tls Exp $	*/
      4        1.1       wiz /*
      5       1.13       wiz  * $FreeBSD: src/sys/dev/bktr/bktr_reg.h,v 1.42 2000/10/31 13:09:56 roger Exp$
      6        1.1       wiz  *
      7        1.1       wiz  * Copyright (c) 1999 Roger Hardiman
      8        1.1       wiz  * Copyright (c) 1998 Amancio Hasty
      9        1.1       wiz  * Copyright (c) 1995 Mark Tinguely and Jim Lowe
     10        1.1       wiz  * All rights reserved.
     11        1.1       wiz  *
     12        1.1       wiz  * Redistribution and use in source and binary forms, with or without
     13        1.1       wiz  * modification, are permitted provided that the following conditions
     14        1.1       wiz  * are met:
     15        1.1       wiz  * 1. Redistributions of source code must retain the above copyright
     16        1.1       wiz  *    notice, this list of conditions and the following disclaimer.
     17        1.1       wiz  * 2. Redistributions in binary form must reproduce the above copyright
     18        1.1       wiz  *    notice, this list of conditions and the following disclaimer in the
     19        1.1       wiz  *    documentation and/or other materials provided with the distribution.
     20        1.1       wiz  * 3. All advertising materials mentioning features or use of this software
     21        1.1       wiz  *    must display the following acknowledgement:
     22        1.1       wiz  *	This product includes software developed by Mark Tinguely and Jim Lowe
     23       1.13       wiz  * 4. The name of the author may not be used to endorse or promote products
     24        1.1       wiz  *    derived from this software without specific prior written permission.
     25        1.1       wiz  *
     26        1.1       wiz  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     27        1.1       wiz  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     28        1.1       wiz  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     29        1.1       wiz  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
     30        1.1       wiz  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     31        1.1       wiz  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     32        1.1       wiz  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     33        1.1       wiz  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
     34        1.1       wiz  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
     35        1.1       wiz  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36        1.1       wiz  * POSSIBILITY OF SUCH DAMAGE.
     37        1.1       wiz  *
     38        1.1       wiz  */
     39        1.1       wiz 
     40        1.1       wiz 
     41       1.20    cegger #include <sys/bus.h>
     42       1.20    cegger #include <sys/device.h>			/* device_t */
     43        1.1       wiz #include <sys/select.h>			/* struct selinfo */
     44        1.7  jdolecek #include <sys/reboot.h>			/* AB_* for bootverbose */
     45        1.1       wiz 
     46        1.5       wiz /*
     47        1.5       wiz  * The kernel options for the driver now all begin with BKTR.
     48        1.5       wiz  * Support the older kernel options on FreeBSD and OpenBSD.
     49        1.5       wiz  *
     50        1.5       wiz  */
     51        1.5       wiz 
     52        1.5       wiz 
     53        1.1       wiz #ifndef PCI_LATENCY_TIMER
     54        1.1       wiz #define	PCI_LATENCY_TIMER		0x0c	/* pci timer register */
     55        1.1       wiz #endif
     56        1.1       wiz 
     57        1.1       wiz /*
     58        1.1       wiz  * Definitions for the Brooktree 848/878 video capture to pci interface.
     59        1.1       wiz  */
     60        1.1       wiz 
     61        1.1       wiz #define BROOKTREE_848                   1
     62        1.1       wiz #define BROOKTREE_848A                  2
     63        1.1       wiz #define BROOKTREE_849A                  3
     64        1.1       wiz #define BROOKTREE_878                   4
     65        1.1       wiz #define BROOKTREE_879                   5
     66        1.1       wiz 
     67        1.1       wiz typedef volatile u_int 	bregister_t;
     68        1.1       wiz /*
     69        1.1       wiz  * if other persuasion endian, then compiler will probably require that
     70        1.1       wiz  * these next
     71        1.1       wiz  * macros be reversed
     72        1.1       wiz  */
     73        1.1       wiz #define	BTBYTE(what)	bregister_t  what:8; int :24
     74        1.1       wiz #define	BTWORD(what)	bregister_t  what:16; int: 16
     75        1.1       wiz #define BTLONG(what)	bregister_t  what:32
     76        1.1       wiz 
     77        1.1       wiz struct bt848_registers {
     78        1.1       wiz     BTBYTE (dstatus);		/* 0, 1,2,3 */
     79        1.1       wiz #define BT848_DSTATUS_PRES		(1<<7)
     80        1.1       wiz #define BT848_DSTATUS_HLOC		(1<<6)
     81        1.1       wiz #define BT848_DSTATUS_FIELD		(1<<5)
     82        1.1       wiz #define BT848_DSTATUS_NUML		(1<<4)
     83        1.1       wiz #define BT848_DSTATUS_CSEL		(1<<3)
     84        1.1       wiz #define BT848_DSTATUS_PLOCK		(1<<2)
     85        1.1       wiz #define BT848_DSTATUS_LOF		(1<<1)
     86        1.1       wiz #define BT848_DSTATUS_COF		(1<<0)
     87        1.1       wiz     BTBYTE (iform);		/* 4, 5,6,7 */
     88        1.1       wiz #define BT848_IFORM_MUXSEL		(0x3<<5)
     89        1.1       wiz # define BT848_IFORM_M_MUX1		(0x03<<5)
     90        1.1       wiz # define BT848_IFORM_M_MUX0		(0x02<<5)
     91        1.1       wiz # define BT848_IFORM_M_MUX2		(0x01<<5)
     92        1.1       wiz # define BT848_IFORM_M_MUX3		(0x0)
     93        1.1       wiz # define BT848_IFORM_M_RSVD		(0x00<<5)
     94        1.1       wiz #define BT848_IFORM_XTSEL		(0x3<<3)
     95        1.1       wiz # define BT848_IFORM_X_AUTO		(0x03<<3)
     96        1.1       wiz # define BT848_IFORM_X_XT1		(0x02<<3)
     97        1.1       wiz # define BT848_IFORM_X_XT0		(0x01<<3)
     98        1.1       wiz # define BT848_IFORM_X_RSVD		(0x00<<3)
     99        1.1       wiz     BTBYTE (tdec);		/* 8, 9,a,b */
    100        1.1       wiz     BTBYTE (e_crop);		/* c, d,e,f */
    101        1.1       wiz     BTBYTE (e_vdelay_lo);	/* 10, 11,12,13 */
    102        1.1       wiz     BTBYTE (e_vactive_lo);	/* 14, 15,16,17 */
    103        1.1       wiz     BTBYTE (e_delay_lo);	/* 18, 19,1a,1b */
    104        1.1       wiz     BTBYTE (e_hactive_lo);	/* 1c, 1d,1e,1f */
    105        1.1       wiz     BTBYTE (e_hscale_hi);	/* 20, 21,22,23 */
    106        1.1       wiz     BTBYTE (e_hscale_lo);	/* 24, 25,26,27 */
    107        1.1       wiz     BTBYTE (bright);		/* 28, 29,2a,2b */
    108        1.1       wiz     BTBYTE (e_control);		/* 2c, 2d,2e,2f */
    109        1.1       wiz #define BT848_E_CONTROL_LNOTCH		(1<<7)
    110        1.1       wiz #define BT848_E_CONTROL_COMP		(1<<6)
    111        1.1       wiz #define BT848_E_CONTROL_LDEC		(1<<5)
    112        1.1       wiz #define BT848_E_CONTROL_CBSENSE		(1<<4)
    113        1.1       wiz #define BT848_E_CONTROL_RSVD		(1<<3)
    114        1.1       wiz #define BT848_E_CONTROL_CON_MSB		(1<<2)
    115        1.1       wiz #define BT848_E_CONTROL_SAT_U_MSB	(1<<1)
    116        1.1       wiz #define BT848_E_CONTROL_SAT_V_MSB	(1<<0)
    117        1.1       wiz     BTBYTE (contrast_lo);	/* 30, 31,32,33 */
    118        1.1       wiz     BTBYTE (sat_u_lo);		/* 34, 35,36,37 */
    119        1.1       wiz     BTBYTE (sat_v_lo);		/* 38, 39,3a,3b */
    120        1.1       wiz     BTBYTE (hue);		/* 3c, 3d,3e,3f */
    121        1.1       wiz     BTBYTE (e_scloop);		/* 40, 41,42,43 */
    122        1.1       wiz #define BT848_E_SCLOOP_RSVD1		(1<<7)
    123        1.1       wiz #define BT848_E_SCLOOP_CAGC		(1<<6)
    124        1.1       wiz #define BT848_E_SCLOOP_CKILL		(1<<5)
    125        1.1       wiz #define BT848_E_SCLOOP_HFILT		(0x3<<3)
    126        1.1       wiz # define BT848_E_SCLOOP_HFILT_ICON	(0x3<<3)
    127        1.1       wiz # define BT848_E_SCLOOP_HFILT_QCIF	(0x2<<3)
    128        1.1       wiz # define BT848_E_SCLOOP_HFILT_CIF	(0x1<<3)
    129        1.1       wiz # define BT848_E_SCLOOP_HFILT_AUTO	(0x0<<3)
    130        1.1       wiz #define BT848_E_SCLOOP_RSVD0		(0x7<<0)
    131        1.1       wiz     int		:32;		/* 44, 45,46,47 */
    132        1.1       wiz     BTBYTE (oform);		/* 48, 49,4a,4b */
    133        1.1       wiz     BTBYTE (e_vscale_hi);	/* 4c, 4d,4e,4f */
    134        1.1       wiz     BTBYTE (e_vscale_lo);	/* 50, 51,52,53 */
    135        1.1       wiz     BTBYTE (test);		/* 54, 55,56,57 */
    136        1.1       wiz     int		:32;		/* 58, 59,5a,5b */
    137        1.1       wiz     int		:32;		/* 5c, 5d,5e,5f */
    138        1.1       wiz     BTLONG (adelay);		/* 60, 61,62,63 */
    139        1.1       wiz     BTBYTE (bdelay);		/* 64, 65,66,67 */
    140        1.1       wiz     BTBYTE (adc);		/* 68, 69,6a,6b */
    141        1.1       wiz #define BT848_ADC_RESERVED		(0x80)	/* required pattern */
    142        1.1       wiz #define BT848_ADC_SYNC_T		(1<<5)
    143        1.1       wiz #define BT848_ADC_AGC_EN		(1<<4)
    144        1.1       wiz #define BT848_ADC_CLK_SLEEP		(1<<3)
    145        1.1       wiz #define BT848_ADC_Y_SLEEP		(1<<2)
    146        1.1       wiz #define BT848_ADC_C_SLEEP		(1<<1)
    147        1.1       wiz #define BT848_ADC_CRUSH			(1<<0)
    148        1.1       wiz     BTBYTE (e_vtc);		/* 6c, 6d,6e,6f */
    149        1.1       wiz     int		:32;		/* 70, 71,72,73 */
    150        1.1       wiz     int 	:32;		/* 74, 75,76,77 */
    151        1.1       wiz     int		:32;		/* 78, 79,7a,7b */
    152        1.1       wiz     BTLONG (sreset);		/* 7c, 7d,7e,7f */
    153        1.1       wiz     u_char 	filler1[0x84-0x80];
    154        1.1       wiz     BTBYTE (tgctrl);		/* 84, 85,86,87 */
    155        1.1       wiz #define BT848_TGCTRL_TGCKI		(3<<3)
    156        1.1       wiz #define BT848_TGCTRL_TGCKI_XTAL		(0<<3)
    157        1.1       wiz #define BT848_TGCTRL_TGCKI_PLL		(1<<3)
    158        1.1       wiz #define BT848_TGCTRL_TGCKI_GPCLK	(2<<3)
    159        1.1       wiz #define BT848_TGCTRL_TGCKI_GPCLK_I	(3<<3)
    160        1.1       wiz     u_char 	filler[0x8c-0x88];
    161        1.1       wiz     BTBYTE (o_crop);		/* 8c, 8d,8e,8f */
    162        1.1       wiz     BTBYTE (o_vdelay_lo);	/* 90, 91,92,93 */
    163        1.1       wiz     BTBYTE (o_vactive_lo);	/* 94, 95,96,97 */
    164        1.1       wiz     BTBYTE (o_delay_lo);	/* 98, 99,9a,9b */
    165        1.1       wiz     BTBYTE (o_hactive_lo);	/* 9c, 9d,9e,9f */
    166        1.1       wiz     BTBYTE (o_hscale_hi);	/* a0, a1,a2,a3 */
    167        1.1       wiz     BTBYTE (o_hscale_lo);	/* a4, a5,a6,a7 */
    168        1.1       wiz     int		:32;		/* a8, a9,aa,ab */
    169        1.1       wiz     BTBYTE (o_control);		/* ac, ad,ae,af */
    170        1.1       wiz #define BT848_O_CONTROL_LNOTCH		(1<<7)
    171        1.1       wiz #define BT848_O_CONTROL_COMP		(1<<6)
    172        1.1       wiz #define BT848_O_CONTROL_LDEC		(1<<5)
    173        1.1       wiz #define BT848_O_CONTROL_CBSENSE		(1<<4)
    174        1.1       wiz #define BT848_O_CONTROL_RSVD		(1<<3)
    175        1.1       wiz #define BT848_O_CONTROL_CON_MSB		(1<<2)
    176        1.1       wiz #define BT848_O_CONTROL_SAT_U_MSB	(1<<1)
    177        1.1       wiz #define BT848_O_CONTROL_SAT_V_MSB	(1<<0)
    178        1.1       wiz     u_char	fillter4[16];
    179        1.1       wiz     BTBYTE (o_scloop);		/* c0, c1,c2,c3 */
    180        1.1       wiz #define BT848_O_SCLOOP_RSVD1		(1<<7)
    181        1.1       wiz #define BT848_O_SCLOOP_CAGC		(1<<6)
    182        1.1       wiz #define BT848_O_SCLOOP_CKILL		(1<<5)
    183        1.1       wiz #define BT848_O_SCLOOP_HFILT		(0x3<<3)
    184        1.1       wiz #define BT848_O_SCLOOP_HFILT_ICON	(0x3<<3)
    185        1.1       wiz #define BT848_O_SCLOOP_HFILT_QCIF	(0x2<<3)
    186        1.1       wiz #define BT848_O_SCLOOP_HFILT_CIF	(0x1<<3)
    187        1.1       wiz #define BT848_O_SCLOOP_HFILT_AUTO	(0x0<<3)
    188        1.1       wiz #define BT848_O_SCLOOP_RSVD0		(0x7<<0)
    189        1.1       wiz     int		:32;		/* c4, c5,c6,c7 */
    190        1.1       wiz     int		:32;		/* c8, c9,ca,cb */
    191        1.1       wiz     BTBYTE (o_vscale_hi);	/* cc, cd,ce,cf */
    192        1.1       wiz     BTBYTE (o_vscale_lo);	/* d0, d1,d2,d3 */
    193        1.1       wiz     BTBYTE (color_fmt);		/* d4, d5,d6,d7 */
    194        1.1       wiz     bregister_t color_ctl_swap		:4; /* d8 */
    195        1.1       wiz #define BT848_COLOR_CTL_WSWAP_ODD	(1<<3)
    196        1.1       wiz #define BT848_COLOR_CTL_WSWAP_EVEN	(1<<2)
    197        1.1       wiz #define BT848_COLOR_CTL_BSWAP_ODD	(1<<1)
    198        1.1       wiz #define BT848_COLOR_CTL_BSWAP_EVEN	(1<<0)
    199        1.1       wiz     bregister_t color_ctl_gamma		:1;
    200        1.1       wiz     bregister_t color_ctl_rgb_ded	:1;
    201        1.1       wiz     bregister_t color_ctl_color_bars	:1;
    202        1.1       wiz     bregister_t color_ctl_ext_frmrate	:1;
    203        1.1       wiz #define BT848_COLOR_CTL_GAMMA		(1<<4)
    204        1.1       wiz #define BT848_COLOR_CTL_RGB_DED		(1<<5)
    205        1.1       wiz #define BT848_COLOR_CTL_COLOR_BARS	(1<<6)
    206        1.1       wiz #define BT848_COLOR_CTL_EXT_FRMRATE     (1<<7)
    207        1.1       wiz     int		:24;		/* d9,da,db */
    208        1.1       wiz     BTBYTE (cap_ctl);		/* dc, dd,de,df */
    209        1.1       wiz #define BT848_CAP_CTL_DITH_FRAME	(1<<4)
    210        1.1       wiz #define BT848_CAP_CTL_VBI_ODD		(1<<3)
    211        1.1       wiz #define BT848_CAP_CTL_VBI_EVEN		(1<<2)
    212        1.1       wiz #define BT848_CAP_CTL_ODD		(1<<1)
    213        1.1       wiz #define BT848_CAP_CTL_EVEN		(1<<0)
    214        1.1       wiz     BTBYTE (vbi_pack_size);	/* e0, e1,e2,e3 */
    215        1.1       wiz     BTBYTE (vbi_pack_del);	/* e4, e5,e6,e7 */
    216        1.1       wiz     int		:32;		/* e8, e9,ea,eb */
    217        1.1       wiz     BTBYTE (o_vtc);		/* ec, ed,ee,ef */
    218        1.1       wiz     BTBYTE (pll_f_lo);		/* f0, f1,f2,f3 */
    219        1.1       wiz     BTBYTE (pll_f_hi);		/* f4, f5,f6,f7 */
    220        1.1       wiz     BTBYTE (pll_f_xci);		/* f8, f9,fa,fb */
    221        1.1       wiz #define BT848_PLL_F_C			(1<<6)
    222        1.1       wiz #define BT848_PLL_F_X			(1<<7)
    223        1.1       wiz     u_char	filler2[0x100-0xfc];
    224        1.1       wiz     BTLONG (int_stat);		/* 100, 101,102,103 */
    225        1.1       wiz     BTLONG (int_mask);		/* 104, 105,106,107 */
    226        1.1       wiz #define BT848_INT_RISCS			(0xf<<28)
    227        1.1       wiz #define BT848_INT_RISC_EN		(1<<27)
    228        1.1       wiz #define BT848_INT_RACK			(1<<25)
    229        1.1       wiz #define BT848_INT_FIELD			(1<<24)
    230        1.1       wiz #define BT848_INT_MYSTERYBIT		(1<<23)
    231        1.1       wiz #define BT848_INT_SCERR			(1<<19)
    232        1.1       wiz #define BT848_INT_OCERR			(1<<18)
    233        1.1       wiz #define BT848_INT_PABORT		(1<<17)
    234        1.1       wiz #define BT848_INT_RIPERR		(1<<16)
    235        1.1       wiz #define BT848_INT_PPERR			(1<<15)
    236        1.1       wiz #define BT848_INT_FDSR			(1<<14)
    237        1.1       wiz #define BT848_INT_FTRGT			(1<<13)
    238        1.1       wiz #define BT848_INT_FBUS			(1<<12)
    239        1.1       wiz #define BT848_INT_RISCI			(1<<11)
    240        1.1       wiz #define BT848_INT_GPINT			(1<<9)
    241        1.1       wiz #define BT848_INT_I2CDONE		(1<<8)
    242        1.1       wiz #define BT848_INT_RSV1			(1<<7)
    243        1.1       wiz #define BT848_INT_RSV0			(1<<6)
    244        1.1       wiz #define BT848_INT_VPRES			(1<<5)
    245        1.1       wiz #define BT848_INT_HLOCK			(1<<4)
    246        1.1       wiz #define BT848_INT_OFLOW			(1<<3)
    247        1.1       wiz #define BT848_INT_HSYNC			(1<<2)
    248        1.1       wiz #define BT848_INT_VSYNC			(1<<1)
    249        1.1       wiz #define BT848_INT_FMTCHG		(1<<0)
    250        1.1       wiz     int		:32;		/* 108, 109,10a,10b */
    251        1.1       wiz     BTWORD (gpio_dma_ctl);	/* 10c, 10d,10e,10f */
    252        1.1       wiz #define BT848_DMA_CTL_PL23TP4		(0<<6)	/* planar1 trigger 4 */
    253        1.1       wiz #define BT848_DMA_CTL_PL23TP8		(1<<6)	/* planar1 trigger 8 */
    254        1.1       wiz #define BT848_DMA_CTL_PL23TP16		(2<<6)	/* planar1 trigger 16 */
    255        1.1       wiz #define BT848_DMA_CTL_PL23TP32		(3<<6)	/* planar1 trigger 32 */
    256        1.1       wiz #define BT848_DMA_CTL_PL1TP4		(0<<4)	/* planar1 trigger 4 */
    257        1.1       wiz #define BT848_DMA_CTL_PL1TP8		(1<<4)	/* planar1 trigger 8 */
    258        1.1       wiz #define BT848_DMA_CTL_PL1TP16		(2<<4)	/* planar1 trigger 16 */
    259        1.1       wiz #define BT848_DMA_CTL_PL1TP32		(3<<4)	/* planar1 trigger 32 */
    260        1.1       wiz #define BT848_DMA_CTL_PKTP4		(0<<2)	/* packed trigger 4 */
    261        1.1       wiz #define BT848_DMA_CTL_PKTP8		(1<<2)	/* packed trigger 8 */
    262        1.1       wiz #define BT848_DMA_CTL_PKTP16		(2<<2)	/* packed trigger 16 */
    263        1.1       wiz #define BT848_DMA_CTL_PKTP32		(3<<2)	/* packed trigger 32 */
    264        1.1       wiz #define BT848_DMA_CTL_RISC_EN		(1<<1)
    265        1.1       wiz #define BT848_DMA_CTL_FIFO_EN		(1<<0)
    266        1.1       wiz     BTLONG (i2c_data_ctl);	/* 110, 111,112,113 */
    267        1.1       wiz #define BT848_DATA_CTL_I2CDIV		(0xf<<4)
    268        1.1       wiz #define BT848_DATA_CTL_I2CSYNC		(1<<3)
    269        1.1       wiz #define BT848_DATA_CTL_I2CW3B		(1<<2)
    270        1.1       wiz #define BT848_DATA_CTL_I2CSCL		(1<<1)
    271        1.1       wiz #define BT848_DATA_CTL_I2CSDA		(1<<0)
    272        1.1       wiz     BTLONG (risc_strt_add);	/* 114, 115,116,117 */
    273        1.1       wiz     BTLONG (gpio_out_en);	/* 118, 119,11a,11b */	/* really 24 bits */
    274        1.1       wiz     BTLONG (gpio_reg_inp);	/* 11c, 11d,11e,11f */	/* really 24 bits */
    275        1.1       wiz     BTLONG (risc_count);	/* 120, 121,122,123 */
    276        1.1       wiz     u_char	filler3[0x200-0x124];
    277        1.1       wiz     BTLONG (gpio_data);		/* 200, 201,202,203 */	/* really 24 bits */
    278        1.1       wiz };
    279        1.1       wiz 
    280        1.1       wiz 
    281        1.1       wiz #define BKTR_DSTATUS			0x000
    282        1.1       wiz #define BKTR_IFORM			0x004
    283        1.1       wiz #define BKTR_TDEC			0x008
    284        1.1       wiz #define BKTR_E_CROP			0x00C
    285        1.1       wiz #define BKTR_O_CROP			0x08C
    286        1.1       wiz #define BKTR_E_VDELAY_LO		0x010
    287        1.1       wiz #define BKTR_O_VDELAY_LO		0x090
    288        1.1       wiz #define BKTR_E_VACTIVE_LO		0x014
    289        1.1       wiz #define BKTR_O_VACTIVE_LO		0x094
    290        1.1       wiz #define BKTR_E_DELAY_LO			0x018
    291        1.1       wiz #define BKTR_O_DELAY_LO			0x098
    292        1.1       wiz #define BKTR_E_HACTIVE_LO		0x01C
    293        1.1       wiz #define BKTR_O_HACTIVE_LO		0x09C
    294        1.1       wiz #define BKTR_E_HSCALE_HI		0x020
    295        1.1       wiz #define BKTR_O_HSCALE_HI		0x0A0
    296        1.1       wiz #define BKTR_E_HSCALE_LO		0x024
    297        1.1       wiz #define BKTR_O_HSCALE_LO		0x0A4
    298        1.1       wiz #define BKTR_BRIGHT			0x028
    299        1.1       wiz #define BKTR_E_CONTROL			0x02C
    300        1.1       wiz #define BKTR_O_CONTROL			0x0AC
    301        1.1       wiz #define BKTR_CONTRAST_LO		0x030
    302        1.1       wiz #define BKTR_SAT_U_LO			0x034
    303        1.1       wiz #define BKTR_SAT_V_LO			0x038
    304        1.1       wiz #define BKTR_HUE			0x03C
    305        1.1       wiz #define BKTR_E_SCLOOP			0x040
    306        1.1       wiz #define BKTR_O_SCLOOP			0x0C0
    307        1.1       wiz #define BKTR_OFORM			0x048
    308        1.1       wiz #define BKTR_E_VSCALE_HI		0x04C
    309        1.1       wiz #define BKTR_O_VSCALE_HI		0x0CC
    310        1.1       wiz #define BKTR_E_VSCALE_LO		0x050
    311        1.1       wiz #define BKTR_O_VSCALE_LO		0x0D0
    312        1.1       wiz #define BKTR_TEST			0x054
    313        1.1       wiz #define BKTR_ADELAY			0x060
    314        1.1       wiz #define BKTR_BDELAY			0x064
    315        1.1       wiz #define BKTR_ADC			0x068
    316        1.1       wiz #define BKTR_E_VTC			0x06C
    317        1.1       wiz #define BKTR_O_VTC			0x0EC
    318        1.1       wiz #define BKTR_SRESET			0x07C
    319        1.1       wiz #define BKTR_COLOR_FMT			0x0D4
    320        1.1       wiz #define BKTR_COLOR_CTL			0x0D8
    321        1.1       wiz #define BKTR_CAP_CTL			0x0DC
    322        1.1       wiz #define BKTR_VBI_PACK_SIZE		0x0E0
    323        1.1       wiz #define BKTR_VBI_PACK_DEL		0x0E4
    324        1.1       wiz #define BKTR_INT_STAT			0x100
    325        1.1       wiz #define BKTR_INT_MASK			0x104
    326        1.1       wiz #define BKTR_RISC_COUNT			0x120
    327        1.1       wiz #define BKTR_RISC_STRT_ADD		0x114
    328        1.1       wiz #define BKTR_GPIO_DMA_CTL		0x10C
    329        1.1       wiz #define BKTR_GPIO_OUT_EN		0x118
    330        1.1       wiz #define BKTR_GPIO_REG_INP		0x11C
    331        1.1       wiz #define BKTR_GPIO_DATA			0x200
    332        1.1       wiz #define BKTR_I2C_DATA_CTL		0x110
    333        1.1       wiz #define BKTR_TGCTRL			0x084
    334       1.13       wiz #define BKTR_PLL_F_LO			0x0F0
    335       1.13       wiz #define BKTR_PLL_F_HI			0x0F4
    336        1.1       wiz #define BKTR_PLL_F_XCI			0x0F8
    337        1.1       wiz 
    338        1.1       wiz /*
    339        1.1       wiz  * device support for onboard tv tuners
    340        1.1       wiz  */
    341        1.1       wiz 
    342        1.1       wiz /* description of the LOGICAL tuner */
    343        1.1       wiz struct TVTUNER {
    344        1.1       wiz 	int		frequency;
    345        1.1       wiz 	u_char		chnlset;
    346        1.1       wiz 	u_char		channel;
    347        1.1       wiz 	u_char		band;
    348        1.1       wiz 	u_char		afc;
    349        1.1       wiz  	u_char		radio_mode;	/* current mode of the radio mode */
    350        1.1       wiz };
    351        1.1       wiz 
    352        1.1       wiz /* description of the PHYSICAL tuner */
    353        1.1       wiz struct TUNER {
    354       1.14  christos 	const char*	name;
    355        1.1       wiz 	u_char		type;
    356        1.1       wiz 	u_char		pllControl[4];
    357       1.16       mjl 	u_int		bandLimits[2];
    358       1.13       wiz 	u_char		bandAddrs[4];        /* 3 first for the 3 TV
    359       1.13       wiz 					       ** bands. Last for radio
    360        1.1       wiz 					       ** band (0x00=NoRadio).
    361        1.1       wiz 					       */
    362        1.1       wiz 
    363        1.1       wiz };
    364        1.1       wiz 
    365        1.1       wiz /* description of the card */
    366        1.1       wiz #define EEPROMBLOCKSIZE		32
    367        1.1       wiz struct CARDTYPE {
    368        1.1       wiz 	unsigned int		card_id;	/* card id (from #define's) */
    369       1.14  christos 	const char*		name;
    370        1.1       wiz 	const struct TUNER*	tuner;		/* Tuner details */
    371        1.1       wiz 	u_char			tuner_pllAddr;	/* Tuner i2c address */
    372        1.1       wiz 	u_char			dbx;		/* Has DBX chip? */
    373        1.1       wiz 	u_char			msp3400c;	/* Has msp3400c chip? */
    374        1.1       wiz 	u_char			dpl3518a;	/* Has dpl3518a chip? */
    375        1.1       wiz 	u_char			eepromAddr;
    376        1.1       wiz 	u_char			eepromSize;	/* bytes / EEPROMBLOCKSIZE */
    377       1.13       wiz 	u_int			audiomuxs[5];	/* tuner, ext (line-in) */
    378        1.1       wiz 						/* int/unused (radio) */
    379        1.1       wiz 						/* mute, present */
    380        1.1       wiz 	u_int			gpio_mux_bits;	/* GPIO mask for audio mux */
    381        1.1       wiz };
    382        1.1       wiz 
    383        1.1       wiz struct format_params {
    384        1.1       wiz   /* Total lines, lines before image, image lines */
    385        1.1       wiz   int vtotal, vdelay, vactive;
    386        1.1       wiz   /* Total unscaled horizontal pixels, pixels before image, image pixels */
    387        1.1       wiz   int htotal, hdelay, hactive;
    388        1.1       wiz   /* Scaled horizontal image pixels, Total Scaled horizontal pixels */
    389        1.1       wiz   int  scaled_hactive, scaled_htotal;
    390        1.1       wiz   /* frame rate . for ntsc is 30 frames per second */
    391        1.1       wiz   int frame_rate;
    392        1.1       wiz   /* A-delay and B-delay */
    393        1.1       wiz   u_char adelay, bdelay;
    394        1.1       wiz   /* Iform XTSEL value */
    395        1.1       wiz   int iform_xtsel;
    396        1.1       wiz   /* VBI number of lines per field, and number of samples per line */
    397        1.1       wiz   int vbi_num_lines, vbi_num_samples;
    398        1.1       wiz };
    399        1.1       wiz 
    400        1.8       wiz #if defined(BKTR_USE_FREEBSD_SMBUS)
    401        1.1       wiz struct bktr_i2c_softc {
    402        1.1       wiz 	device_t iicbus;
    403        1.1       wiz 	device_t smbus;
    404        1.1       wiz };
    405        1.1       wiz #endif
    406        1.1       wiz 
    407        1.1       wiz 
    408        1.1       wiz /* Bt848/878 register access
    409        1.1       wiz  * The registers can either be access via a memory mapped structure
    410        1.1       wiz  * or accessed via bus_space.
    411       1.12       mjl  * bus_space access allows cross platform support, where as the
    412        1.1       wiz  * memory mapped structure method only works on 32 bit processors
    413        1.1       wiz  * with the right type of endianness.
    414        1.1       wiz  */
    415       1.12       mjl struct bktr_softc;
    416       1.12       mjl 
    417       1.12       mjl u_int8_t bktr_INB(struct bktr_softc *, int);
    418       1.12       mjl u_int16_t bktr_INW(struct bktr_softc *, int);
    419       1.12       mjl u_int32_t bktr_INL(struct bktr_softc *, int);
    420       1.12       mjl void bktr_OUTB(struct bktr_softc *, int, u_int8_t);
    421       1.12       mjl void bktr_OUTW(struct bktr_softc *, int, u_int16_t);
    422       1.12       mjl void bktr_OUTL(struct bktr_softc *, int, u_int32_t);
    423       1.12       mjl 
    424       1.12       mjl #define INB(bktr,offset)	bktr_INB(bktr,offset)
    425       1.12       mjl #define INW(bktr,offset)	bktr_INW(bktr,offset)
    426       1.12       mjl #define INL(bktr,offset)	bktr_INL(bktr,offset)
    427       1.12       mjl #define OUTB(bktr,offset,value)	bktr_OUTB(bktr,offset,value)
    428       1.12       mjl #define OUTW(bktr,offset,value)	bktr_OUTW(bktr,offset,value)
    429       1.12       mjl #define OUTL(bktr,offset,value)	bktr_OUTL(bktr,offset,value)
    430       1.12       mjl 
    431        1.1       wiz typedef struct bktr_clip bktr_clip_t;
    432        1.1       wiz 
    433        1.1       wiz /*
    434        1.1       wiz  * BrookTree 848  info structure, one per bt848 card installed.
    435        1.1       wiz  */
    436        1.1       wiz struct bktr_softc {
    437        1.1       wiz 
    438        1.1       wiz 
    439  1.21.14.1       tls     device_t bktr_dev;     /* base device */
    440        1.1       wiz     bus_dma_tag_t	dmat;   /* DMA tag */
    441        1.1       wiz     bus_space_tag_t	memt;
    442        1.1       wiz     bus_space_handle_t	memh;
    443        1.1       wiz     bus_size_t		obmemsz;        /* size of en card (bytes) */
    444        1.1       wiz     void		*ih;
    445        1.1       wiz     bus_dmamap_t	dm_prog;
    446        1.1       wiz     bus_dmamap_t	dm_oprog;
    447        1.1       wiz     bus_dmamap_t	dm_mem;
    448        1.1       wiz     bus_dmamap_t	dm_vbidata;
    449        1.1       wiz     bus_dmamap_t	dm_vbibuffer;
    450        1.1       wiz 
    451        1.1       wiz 
    452        1.1       wiz 
    453        1.8       wiz 
    454        1.8       wiz     /* The following definitions are for the contiguous memory */
    455        1.8       wiz     vaddr_t bigbuf;          /* buffer that holds the captured image */
    456        1.8       wiz     vaddr_t vbidata;         /* RISC program puts VBI data from the current frame here */
    457        1.8       wiz     vaddr_t vbibuffer;       /* Circular buffer holding VBI data for the user */
    458        1.8       wiz     vaddr_t dma_prog;        /* RISC prog for single and/or even field capture*/
    459        1.8       wiz     vaddr_t odd_dma_prog;    /* RISC program for Odd field capture */
    460        1.8       wiz 
    461        1.8       wiz 
    462        1.1       wiz     /* the following definitions are common over all platforms */
    463        1.1       wiz     int		alloc_pages;	/* number of pages in bigbuf */
    464        1.1       wiz     int         vbiinsert;      /* Position for next write into circular buffer */
    465        1.1       wiz     int         vbistart;       /* Position of last read from circular buffer */
    466        1.1       wiz     int         vbisize;        /* Number of bytes in the circular buffer */
    467       1.18  jmcneill     u_int	vbi_sequence_number;	/* sequence number for VBI */
    468        1.1       wiz     int		vbi_read_blocked;	/* user process blocked on read() from /dev/vbi */
    469        1.1       wiz     struct selinfo vbi_select;	/* Data used by select() on /dev/vbi */
    470       1.13       wiz 
    471        1.1       wiz 
    472        1.1       wiz     struct proc	*proc;		/* process to receive raised signal */
    473        1.1       wiz     int		signal;		/* signal to send to process */
    474        1.1       wiz     int		clr_on_start;	/* clear cap buf on capture start? */
    475        1.1       wiz #define	METEOR_SIG_MODE_MASK	0xffff0000
    476        1.1       wiz #define	METEOR_SIG_FIELD_MODE	0x00010000
    477        1.1       wiz #define	METEOR_SIG_FRAME_MODE	0x00000000
    478        1.1       wiz     char         dma_prog_loaded;
    479        1.1       wiz     struct meteor_mem *mem;	/* used to control sync. multi-frame output */
    480       1.18  jmcneill     u_int	synch_wait;	/* wait for free buffer before continuing */
    481        1.1       wiz     short	current;	/* frame number in buffer (1-frames) */
    482        1.1       wiz     short	rows;		/* number of rows in a frame */
    483        1.1       wiz     short	cols;		/* number of columns in a frame */
    484        1.1       wiz     int		capture_area_x_offset; /* Usually the full 640x480(NTSC) image is */
    485        1.1       wiz     int		capture_area_y_offset; /* captured. The capture area allows for */
    486        1.1       wiz     int		capture_area_x_size;   /* example 320x200 pixels from the centre */
    487        1.1       wiz     int		capture_area_y_size;   /* of the video image to be captured. */
    488        1.1       wiz     char	capture_area_enabled;  /* When TRUE use user's capture area. */
    489        1.1       wiz     int		pixfmt;         /* active pixel format (idx into fmt tbl) */
    490        1.1       wiz     int		pixfmt_compat;  /* Y/N - in meteor pix fmt compat mode */
    491       1.18  jmcneill     u_int	format;		/* frame format rgb, yuv, etc.. */
    492        1.1       wiz     short	frames;		/* number of frames allocated */
    493        1.1       wiz     int		frame_size;	/* number of bytes in a frame */
    494       1.18  jmcneill     u_int	fifo_errors;	/* number of fifo capture errors since open */
    495       1.18  jmcneill     u_int	dma_errors;	/* number of DMA capture errors since open */
    496       1.18  jmcneill     u_int	frames_captured;/* number of frames captured since open */
    497       1.18  jmcneill     u_int	even_fields_captured; /* number of even fields captured */
    498       1.18  jmcneill     u_int	odd_fields_captured; /* number of odd fields captured */
    499       1.18  jmcneill     u_int	range_enable;	/* enable range checking ?? */
    500        1.1       wiz     u_short     capcontrol;     /* reg 0xdc capture control */
    501        1.1       wiz     u_short     bktr_cap_ctl;
    502        1.1       wiz     volatile u_int	flags;
    503       1.10       wiz #define	METEOR_INITIALIZED	0x00000001
    504       1.13       wiz #define	METEOR_OPEN		0x00000002
    505        1.1       wiz #define	METEOR_MMAP		0x00000004
    506        1.1       wiz #define	METEOR_INTR		0x00000008
    507        1.1       wiz #define	METEOR_READ		0x00000010	/* XXX never gets referenced */
    508        1.1       wiz #define	METEOR_SINGLE		0x00000020	/* get single frame */
    509        1.1       wiz #define	METEOR_CONTIN		0x00000040	/* continuously get frames */
    510        1.1       wiz #define	METEOR_SYNCAP		0x00000080	/* synchronously get frames */
    511        1.1       wiz #define	METEOR_CAP_MASK		0x000000f0
    512        1.1       wiz #define	METEOR_NTSC		0x00000100
    513        1.1       wiz #define	METEOR_PAL		0x00000200
    514        1.1       wiz #define	METEOR_SECAM		0x00000400
    515        1.1       wiz #define	BROOKTREE_NTSC		0x00000100	/* used in video open() and */
    516        1.1       wiz #define	BROOKTREE_PAL		0x00000200	/* in the kernel config */
    517        1.1       wiz #define	BROOKTREE_SECAM		0x00000400	/* file */
    518        1.1       wiz #define	METEOR_AUTOMODE		0x00000800
    519        1.1       wiz #define	METEOR_FORM_MASK	0x00000f00
    520        1.1       wiz #define	METEOR_DEV0		0x00001000
    521        1.1       wiz #define	METEOR_DEV1		0x00002000
    522        1.1       wiz #define	METEOR_DEV2		0x00004000
    523        1.1       wiz #define	METEOR_DEV3		0x00008000
    524        1.1       wiz #define METEOR_DEV_SVIDEO	0x00006000
    525        1.1       wiz #define METEOR_DEV_RGB		0x0000a000
    526        1.1       wiz #define	METEOR_DEV_MASK		0x0000f000
    527        1.1       wiz #define	METEOR_RGB16		0x00010000
    528        1.1       wiz #define	METEOR_RGB24		0x00020000
    529        1.1       wiz #define	METEOR_YUV_PACKED	0x00040000
    530        1.1       wiz #define	METEOR_YUV_PLANAR	0x00080000
    531        1.1       wiz #define	METEOR_WANT_EVEN	0x00100000	/* want even frame */
    532        1.1       wiz #define	METEOR_WANT_ODD		0x00200000	/* want odd frame */
    533        1.1       wiz #define	METEOR_WANT_MASK	0x00300000
    534        1.1       wiz #define METEOR_ONLY_EVEN_FIELDS	0x01000000
    535        1.1       wiz #define METEOR_ONLY_ODD_FIELDS	0x02000000
    536        1.1       wiz #define METEOR_ONLY_FIELDS_MASK 0x03000000
    537        1.1       wiz #define METEOR_YUV_422		0x04000000
    538        1.1       wiz #define	METEOR_OUTPUT_FMT_MASK	0x040f0000
    539        1.1       wiz #define	METEOR_WANT_TS		0x08000000	/* time-stamp a frame */
    540        1.1       wiz #define METEOR_RGB		0x20000000	/* meteor rgb unit */
    541        1.1       wiz     u_char	tflags;				/* Tuner flags (/dev/tuner) */
    542       1.10       wiz #define	TUNER_INITIALIZED	0x00000001
    543       1.13       wiz #define	TUNER_OPEN		0x00000002
    544        1.1       wiz     u_char      vbiflags;			/* VBI flags (/dev/vbi) */
    545       1.10       wiz #define VBI_INITIALIZED         0x00000001
    546        1.1       wiz #define VBI_OPEN                0x00000002
    547        1.1       wiz #define VBI_CAPTURE             0x00000004
    548        1.1       wiz     u_short	fps;		/* frames per second */
    549        1.1       wiz     struct meteor_video video;
    550        1.1       wiz     struct TVTUNER	tuner;
    551        1.1       wiz     struct CARDTYPE	card;
    552        1.1       wiz     u_char		audio_mux_select;	/* current mode of the audio */
    553        1.1       wiz     u_char		audio_mute_state;	/* mute state of the audio */
    554        1.1       wiz     u_char		format_params;
    555       1.18  jmcneill     u_int              current_sol;
    556       1.18  jmcneill     u_int              current_col;
    557        1.1       wiz     int                 clip_start;
    558        1.1       wiz     int                 line_length;
    559        1.1       wiz     int                 last_y;
    560        1.1       wiz     int                 y;
    561        1.1       wiz     int                 y2;
    562        1.1       wiz     int                 yclip;
    563        1.1       wiz     int                 yclip2;
    564        1.1       wiz     int                 max_clip_node;
    565        1.1       wiz     bktr_clip_t		clip_list[100];
    566        1.1       wiz     int                 reverse_mute;		/* Swap the GPIO values for Mute and TV Audio */
    567        1.1       wiz     int                 bt848_tuner;
    568        1.1       wiz     int                 bt848_card;
    569       1.18  jmcneill     u_int              id;
    570        1.1       wiz #define BT848_USE_XTALS 0
    571        1.1       wiz #define BT848_USE_PLL   1
    572        1.1       wiz     int			xtal_pll_mode;	/* Use XTAL or PLL mode for PAL/SECAM */
    573        1.1       wiz     int			remote_control;      /* remote control detected */
    574        1.1       wiz     int			remote_control_addr;   /* remote control i2c address */
    575        1.1       wiz     char		msp_version_string[9]; /* MSP version string 34xxx-xx */
    576        1.1       wiz     int			msp_addr;	       /* MSP i2c address */
    577        1.1       wiz     char		dpl_version_string[9]; /* DPL version string 35xxx-xx */
    578        1.1       wiz     int			dpl_addr;	       /* DPL i2c address */
    579        1.1       wiz     int                 slow_msp_audio;	       /* 0 = use fast MSP3410/3415 programming sequence */
    580        1.1       wiz 					       /* 1 = use slow MSP3410/3415 programming sequence */
    581        1.9       wiz 					       /* 2 = use Tuner's Mono audio output via the MSP chip */
    582        1.9       wiz     int                 msp_use_mono_source;   /* use Tuner's Mono audio output via the MSP chip */
    583        1.9       wiz     int                 audio_mux_present;     /* 1 = has audio mux on GPIO lines, 0 = no audio mux */
    584        1.9       wiz     int                 msp_source_selected;   /* 0 = TV source, 1 = Line In source, 2 = FM Radio Source */
    585       1.19        ad     void		*sih;
    586        1.1       wiz 
    587        1.1       wiz };
    588        1.1       wiz 
    589        1.1       wiz typedef struct bktr_softc bktr_reg_t;
    590        1.1       wiz typedef struct bktr_softc* bktr_ptr_t;
    591        1.1       wiz 
    592        1.1       wiz #define Bt848_MAX_SIGN 16
    593        1.1       wiz 
    594        1.1       wiz struct bt848_card_sig {
    595        1.1       wiz   int card;
    596        1.1       wiz   int tuner;
    597        1.1       wiz   u_char signature[Bt848_MAX_SIGN];
    598        1.1       wiz };
    599        1.1       wiz 
    600        1.1       wiz 
    601        1.1       wiz /***********************************************************/
    602        1.1       wiz /* ioctl_cmd_t int on old versions, u_long on new versions */
    603        1.1       wiz /***********************************************************/
    604        1.1       wiz 
    605        1.1       wiz 
    606        1.1       wiz 
    607        1.1       wiz typedef u_long ioctl_cmd_t;
    608        1.1       wiz 
    609        1.1       wiz 
    610