bktr_reg.h revision 1.1
1 /* $NetBSD: bktr_reg.h,v 1.1 2000/05/07 00:16:18 wiz Exp $ */ 2 3 /* 4 * FreeBSD: src/sys/dev/bktr/bktr_reg.h,v 1.36 1999/10/28 13:58:17 roger Exp 5 * 6 * Copyright (c) 1999 Roger Hardiman 7 * Copyright (c) 1998 Amancio Hasty 8 * Copyright (c) 1995 Mark Tinguely and Jim Lowe 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Mark Tinguely and Jim Lowe 22 * 4. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 27 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 28 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 33 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 34 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 * 37 */ 38 39 #ifdef __FreeBSD__ 40 # if (__FreeBSD_version >= 310000) 41 # include <sys/bus.h> 42 # include "smbus.h" 43 # else 44 # define NSMBUS 0 /* FreeBSD before 3.1 does not have SMBUS */ 45 # endif 46 #else 47 # define NSMBUS 0 /* Non FreeBSD systems do not have SMBUS */ 48 #endif 49 50 #ifdef __NetBSD__ 51 #include <machine/bus.h> /* struct device */ 52 #include <sys/device.h> 53 #include <sys/select.h> /* struct selinfo */ 54 #endif 55 56 #ifndef PCI_LATENCY_TIMER 57 #define PCI_LATENCY_TIMER 0x0c /* pci timer register */ 58 #endif 59 60 /* 61 * Definitions for the Brooktree 848/878 video capture to pci interface. 62 */ 63 #define BROOKTREE_848_PCI_ID 0x0350109E 64 #define BROOKTREE_849_PCI_ID 0x0351109E 65 #define BROOKTREE_878_PCI_ID 0x036E109E 66 #define BROOKTREE_879_PCI_ID 0x036F109E 67 68 #define BROOKTREE_848 1 69 #define BROOKTREE_848A 2 70 #define BROOKTREE_849A 3 71 #define BROOKTREE_878 4 72 #define BROOKTREE_879 5 73 74 typedef volatile u_int bregister_t; 75 /* 76 * if other persuasion endian, then compiler will probably require that 77 * these next 78 * macros be reversed 79 */ 80 #define BTBYTE(what) bregister_t what:8; int :24 81 #define BTWORD(what) bregister_t what:16; int: 16 82 #define BTLONG(what) bregister_t what:32 83 84 struct bt848_registers { 85 BTBYTE (dstatus); /* 0, 1,2,3 */ 86 #define BT848_DSTATUS_PRES (1<<7) 87 #define BT848_DSTATUS_HLOC (1<<6) 88 #define BT848_DSTATUS_FIELD (1<<5) 89 #define BT848_DSTATUS_NUML (1<<4) 90 #define BT848_DSTATUS_CSEL (1<<3) 91 #define BT848_DSTATUS_PLOCK (1<<2) 92 #define BT848_DSTATUS_LOF (1<<1) 93 #define BT848_DSTATUS_COF (1<<0) 94 BTBYTE (iform); /* 4, 5,6,7 */ 95 #define BT848_IFORM_MUXSEL (0x3<<5) 96 # define BT848_IFORM_M_MUX1 (0x03<<5) 97 # define BT848_IFORM_M_MUX0 (0x02<<5) 98 # define BT848_IFORM_M_MUX2 (0x01<<5) 99 # define BT848_IFORM_M_MUX3 (0x0) 100 # define BT848_IFORM_M_RSVD (0x00<<5) 101 #define BT848_IFORM_XTSEL (0x3<<3) 102 # define BT848_IFORM_X_AUTO (0x03<<3) 103 # define BT848_IFORM_X_XT1 (0x02<<3) 104 # define BT848_IFORM_X_XT0 (0x01<<3) 105 # define BT848_IFORM_X_RSVD (0x00<<3) 106 BTBYTE (tdec); /* 8, 9,a,b */ 107 BTBYTE (e_crop); /* c, d,e,f */ 108 BTBYTE (e_vdelay_lo); /* 10, 11,12,13 */ 109 BTBYTE (e_vactive_lo); /* 14, 15,16,17 */ 110 BTBYTE (e_delay_lo); /* 18, 19,1a,1b */ 111 BTBYTE (e_hactive_lo); /* 1c, 1d,1e,1f */ 112 BTBYTE (e_hscale_hi); /* 20, 21,22,23 */ 113 BTBYTE (e_hscale_lo); /* 24, 25,26,27 */ 114 BTBYTE (bright); /* 28, 29,2a,2b */ 115 BTBYTE (e_control); /* 2c, 2d,2e,2f */ 116 #define BT848_E_CONTROL_LNOTCH (1<<7) 117 #define BT848_E_CONTROL_COMP (1<<6) 118 #define BT848_E_CONTROL_LDEC (1<<5) 119 #define BT848_E_CONTROL_CBSENSE (1<<4) 120 #define BT848_E_CONTROL_RSVD (1<<3) 121 #define BT848_E_CONTROL_CON_MSB (1<<2) 122 #define BT848_E_CONTROL_SAT_U_MSB (1<<1) 123 #define BT848_E_CONTROL_SAT_V_MSB (1<<0) 124 BTBYTE (contrast_lo); /* 30, 31,32,33 */ 125 BTBYTE (sat_u_lo); /* 34, 35,36,37 */ 126 BTBYTE (sat_v_lo); /* 38, 39,3a,3b */ 127 BTBYTE (hue); /* 3c, 3d,3e,3f */ 128 BTBYTE (e_scloop); /* 40, 41,42,43 */ 129 #define BT848_E_SCLOOP_RSVD1 (1<<7) 130 #define BT848_E_SCLOOP_CAGC (1<<6) 131 #define BT848_E_SCLOOP_CKILL (1<<5) 132 #define BT848_E_SCLOOP_HFILT (0x3<<3) 133 # define BT848_E_SCLOOP_HFILT_ICON (0x3<<3) 134 # define BT848_E_SCLOOP_HFILT_QCIF (0x2<<3) 135 # define BT848_E_SCLOOP_HFILT_CIF (0x1<<3) 136 # define BT848_E_SCLOOP_HFILT_AUTO (0x0<<3) 137 #define BT848_E_SCLOOP_RSVD0 (0x7<<0) 138 int :32; /* 44, 45,46,47 */ 139 BTBYTE (oform); /* 48, 49,4a,4b */ 140 BTBYTE (e_vscale_hi); /* 4c, 4d,4e,4f */ 141 BTBYTE (e_vscale_lo); /* 50, 51,52,53 */ 142 BTBYTE (test); /* 54, 55,56,57 */ 143 int :32; /* 58, 59,5a,5b */ 144 int :32; /* 5c, 5d,5e,5f */ 145 BTLONG (adelay); /* 60, 61,62,63 */ 146 BTBYTE (bdelay); /* 64, 65,66,67 */ 147 BTBYTE (adc); /* 68, 69,6a,6b */ 148 #define BT848_ADC_RESERVED (0x80) /* required pattern */ 149 #define BT848_ADC_SYNC_T (1<<5) 150 #define BT848_ADC_AGC_EN (1<<4) 151 #define BT848_ADC_CLK_SLEEP (1<<3) 152 #define BT848_ADC_Y_SLEEP (1<<2) 153 #define BT848_ADC_C_SLEEP (1<<1) 154 #define BT848_ADC_CRUSH (1<<0) 155 BTBYTE (e_vtc); /* 6c, 6d,6e,6f */ 156 int :32; /* 70, 71,72,73 */ 157 int :32; /* 74, 75,76,77 */ 158 int :32; /* 78, 79,7a,7b */ 159 BTLONG (sreset); /* 7c, 7d,7e,7f */ 160 u_char filler1[0x84-0x80]; 161 BTBYTE (tgctrl); /* 84, 85,86,87 */ 162 #define BT848_TGCTRL_TGCKI (3<<3) 163 #define BT848_TGCTRL_TGCKI_XTAL (0<<3) 164 #define BT848_TGCTRL_TGCKI_PLL (1<<3) 165 #define BT848_TGCTRL_TGCKI_GPCLK (2<<3) 166 #define BT848_TGCTRL_TGCKI_GPCLK_I (3<<3) 167 u_char filler[0x8c-0x88]; 168 BTBYTE (o_crop); /* 8c, 8d,8e,8f */ 169 BTBYTE (o_vdelay_lo); /* 90, 91,92,93 */ 170 BTBYTE (o_vactive_lo); /* 94, 95,96,97 */ 171 BTBYTE (o_delay_lo); /* 98, 99,9a,9b */ 172 BTBYTE (o_hactive_lo); /* 9c, 9d,9e,9f */ 173 BTBYTE (o_hscale_hi); /* a0, a1,a2,a3 */ 174 BTBYTE (o_hscale_lo); /* a4, a5,a6,a7 */ 175 int :32; /* a8, a9,aa,ab */ 176 BTBYTE (o_control); /* ac, ad,ae,af */ 177 #define BT848_O_CONTROL_LNOTCH (1<<7) 178 #define BT848_O_CONTROL_COMP (1<<6) 179 #define BT848_O_CONTROL_LDEC (1<<5) 180 #define BT848_O_CONTROL_CBSENSE (1<<4) 181 #define BT848_O_CONTROL_RSVD (1<<3) 182 #define BT848_O_CONTROL_CON_MSB (1<<2) 183 #define BT848_O_CONTROL_SAT_U_MSB (1<<1) 184 #define BT848_O_CONTROL_SAT_V_MSB (1<<0) 185 u_char fillter4[16]; 186 BTBYTE (o_scloop); /* c0, c1,c2,c3 */ 187 #define BT848_O_SCLOOP_RSVD1 (1<<7) 188 #define BT848_O_SCLOOP_CAGC (1<<6) 189 #define BT848_O_SCLOOP_CKILL (1<<5) 190 #define BT848_O_SCLOOP_HFILT (0x3<<3) 191 #define BT848_O_SCLOOP_HFILT_ICON (0x3<<3) 192 #define BT848_O_SCLOOP_HFILT_QCIF (0x2<<3) 193 #define BT848_O_SCLOOP_HFILT_CIF (0x1<<3) 194 #define BT848_O_SCLOOP_HFILT_AUTO (0x0<<3) 195 #define BT848_O_SCLOOP_RSVD0 (0x7<<0) 196 int :32; /* c4, c5,c6,c7 */ 197 int :32; /* c8, c9,ca,cb */ 198 BTBYTE (o_vscale_hi); /* cc, cd,ce,cf */ 199 BTBYTE (o_vscale_lo); /* d0, d1,d2,d3 */ 200 BTBYTE (color_fmt); /* d4, d5,d6,d7 */ 201 bregister_t color_ctl_swap :4; /* d8 */ 202 #define BT848_COLOR_CTL_WSWAP_ODD (1<<3) 203 #define BT848_COLOR_CTL_WSWAP_EVEN (1<<2) 204 #define BT848_COLOR_CTL_BSWAP_ODD (1<<1) 205 #define BT848_COLOR_CTL_BSWAP_EVEN (1<<0) 206 bregister_t color_ctl_gamma :1; 207 bregister_t color_ctl_rgb_ded :1; 208 bregister_t color_ctl_color_bars :1; 209 bregister_t color_ctl_ext_frmrate :1; 210 #define BT848_COLOR_CTL_GAMMA (1<<4) 211 #define BT848_COLOR_CTL_RGB_DED (1<<5) 212 #define BT848_COLOR_CTL_COLOR_BARS (1<<6) 213 #define BT848_COLOR_CTL_EXT_FRMRATE (1<<7) 214 int :24; /* d9,da,db */ 215 BTBYTE (cap_ctl); /* dc, dd,de,df */ 216 #define BT848_CAP_CTL_DITH_FRAME (1<<4) 217 #define BT848_CAP_CTL_VBI_ODD (1<<3) 218 #define BT848_CAP_CTL_VBI_EVEN (1<<2) 219 #define BT848_CAP_CTL_ODD (1<<1) 220 #define BT848_CAP_CTL_EVEN (1<<0) 221 BTBYTE (vbi_pack_size); /* e0, e1,e2,e3 */ 222 BTBYTE (vbi_pack_del); /* e4, e5,e6,e7 */ 223 int :32; /* e8, e9,ea,eb */ 224 BTBYTE (o_vtc); /* ec, ed,ee,ef */ 225 BTBYTE (pll_f_lo); /* f0, f1,f2,f3 */ 226 BTBYTE (pll_f_hi); /* f4, f5,f6,f7 */ 227 BTBYTE (pll_f_xci); /* f8, f9,fa,fb */ 228 #define BT848_PLL_F_C (1<<6) 229 #define BT848_PLL_F_X (1<<7) 230 u_char filler2[0x100-0xfc]; 231 BTLONG (int_stat); /* 100, 101,102,103 */ 232 BTLONG (int_mask); /* 104, 105,106,107 */ 233 #define BT848_INT_RISCS (0xf<<28) 234 #define BT848_INT_RISC_EN (1<<27) 235 #define BT848_INT_RACK (1<<25) 236 #define BT848_INT_FIELD (1<<24) 237 #define BT848_INT_MYSTERYBIT (1<<23) 238 #define BT848_INT_SCERR (1<<19) 239 #define BT848_INT_OCERR (1<<18) 240 #define BT848_INT_PABORT (1<<17) 241 #define BT848_INT_RIPERR (1<<16) 242 #define BT848_INT_PPERR (1<<15) 243 #define BT848_INT_FDSR (1<<14) 244 #define BT848_INT_FTRGT (1<<13) 245 #define BT848_INT_FBUS (1<<12) 246 #define BT848_INT_RISCI (1<<11) 247 #define BT848_INT_GPINT (1<<9) 248 #define BT848_INT_I2CDONE (1<<8) 249 #define BT848_INT_RSV1 (1<<7) 250 #define BT848_INT_RSV0 (1<<6) 251 #define BT848_INT_VPRES (1<<5) 252 #define BT848_INT_HLOCK (1<<4) 253 #define BT848_INT_OFLOW (1<<3) 254 #define BT848_INT_HSYNC (1<<2) 255 #define BT848_INT_VSYNC (1<<1) 256 #define BT848_INT_FMTCHG (1<<0) 257 int :32; /* 108, 109,10a,10b */ 258 BTWORD (gpio_dma_ctl); /* 10c, 10d,10e,10f */ 259 #define BT848_DMA_CTL_PL23TP4 (0<<6) /* planar1 trigger 4 */ 260 #define BT848_DMA_CTL_PL23TP8 (1<<6) /* planar1 trigger 8 */ 261 #define BT848_DMA_CTL_PL23TP16 (2<<6) /* planar1 trigger 16 */ 262 #define BT848_DMA_CTL_PL23TP32 (3<<6) /* planar1 trigger 32 */ 263 #define BT848_DMA_CTL_PL1TP4 (0<<4) /* planar1 trigger 4 */ 264 #define BT848_DMA_CTL_PL1TP8 (1<<4) /* planar1 trigger 8 */ 265 #define BT848_DMA_CTL_PL1TP16 (2<<4) /* planar1 trigger 16 */ 266 #define BT848_DMA_CTL_PL1TP32 (3<<4) /* planar1 trigger 32 */ 267 #define BT848_DMA_CTL_PKTP4 (0<<2) /* packed trigger 4 */ 268 #define BT848_DMA_CTL_PKTP8 (1<<2) /* packed trigger 8 */ 269 #define BT848_DMA_CTL_PKTP16 (2<<2) /* packed trigger 16 */ 270 #define BT848_DMA_CTL_PKTP32 (3<<2) /* packed trigger 32 */ 271 #define BT848_DMA_CTL_RISC_EN (1<<1) 272 #define BT848_DMA_CTL_FIFO_EN (1<<0) 273 BTLONG (i2c_data_ctl); /* 110, 111,112,113 */ 274 #define BT848_DATA_CTL_I2CDIV (0xf<<4) 275 #define BT848_DATA_CTL_I2CSYNC (1<<3) 276 #define BT848_DATA_CTL_I2CW3B (1<<2) 277 #define BT848_DATA_CTL_I2CSCL (1<<1) 278 #define BT848_DATA_CTL_I2CSDA (1<<0) 279 BTLONG (risc_strt_add); /* 114, 115,116,117 */ 280 BTLONG (gpio_out_en); /* 118, 119,11a,11b */ /* really 24 bits */ 281 BTLONG (gpio_reg_inp); /* 11c, 11d,11e,11f */ /* really 24 bits */ 282 BTLONG (risc_count); /* 120, 121,122,123 */ 283 u_char filler3[0x200-0x124]; 284 BTLONG (gpio_data); /* 200, 201,202,203 */ /* really 24 bits */ 285 }; 286 287 288 #define BKTR_DSTATUS 0x000 289 #define BKTR_IFORM 0x004 290 #define BKTR_TDEC 0x008 291 #define BKTR_E_CROP 0x00C 292 #define BKTR_O_CROP 0x08C 293 #define BKTR_E_VDELAY_LO 0x010 294 #define BKTR_O_VDELAY_LO 0x090 295 #define BKTR_E_VACTIVE_LO 0x014 296 #define BKTR_O_VACTIVE_LO 0x094 297 #define BKTR_E_DELAY_LO 0x018 298 #define BKTR_O_DELAY_LO 0x098 299 #define BKTR_E_HACTIVE_LO 0x01C 300 #define BKTR_O_HACTIVE_LO 0x09C 301 #define BKTR_E_HSCALE_HI 0x020 302 #define BKTR_O_HSCALE_HI 0x0A0 303 #define BKTR_E_HSCALE_LO 0x024 304 #define BKTR_O_HSCALE_LO 0x0A4 305 #define BKTR_BRIGHT 0x028 306 #define BKTR_E_CONTROL 0x02C 307 #define BKTR_O_CONTROL 0x0AC 308 #define BKTR_CONTRAST_LO 0x030 309 #define BKTR_SAT_U_LO 0x034 310 #define BKTR_SAT_V_LO 0x038 311 #define BKTR_HUE 0x03C 312 #define BKTR_E_SCLOOP 0x040 313 #define BKTR_O_SCLOOP 0x0C0 314 #define BKTR_OFORM 0x048 315 #define BKTR_E_VSCALE_HI 0x04C 316 #define BKTR_O_VSCALE_HI 0x0CC 317 #define BKTR_E_VSCALE_LO 0x050 318 #define BKTR_O_VSCALE_LO 0x0D0 319 #define BKTR_TEST 0x054 320 #define BKTR_ADELAY 0x060 321 #define BKTR_BDELAY 0x064 322 #define BKTR_ADC 0x068 323 #define BKTR_E_VTC 0x06C 324 #define BKTR_O_VTC 0x0EC 325 #define BKTR_SRESET 0x07C 326 #define BKTR_COLOR_FMT 0x0D4 327 #define BKTR_COLOR_CTL 0x0D8 328 #define BKTR_CAP_CTL 0x0DC 329 #define BKTR_VBI_PACK_SIZE 0x0E0 330 #define BKTR_VBI_PACK_DEL 0x0E4 331 #define BKTR_INT_STAT 0x100 332 #define BKTR_INT_MASK 0x104 333 #define BKTR_RISC_COUNT 0x120 334 #define BKTR_RISC_STRT_ADD 0x114 335 #define BKTR_GPIO_DMA_CTL 0x10C 336 #define BKTR_GPIO_OUT_EN 0x118 337 #define BKTR_GPIO_REG_INP 0x11C 338 #define BKTR_GPIO_DATA 0x200 339 #define BKTR_I2C_DATA_CTL 0x110 340 #define BKTR_TGCTRL 0x084 341 #define BKTR_PLL_F_LO 0x0F0 342 #define BKTR_PLL_F_HI 0x0F4 343 #define BKTR_PLL_F_XCI 0x0F8 344 345 /* 346 * device support for onboard tv tuners 347 */ 348 349 /* description of the LOGICAL tuner */ 350 struct TVTUNER { 351 int frequency; 352 u_char chnlset; 353 u_char channel; 354 u_char band; 355 u_char afc; 356 u_char radio_mode; /* current mode of the radio mode */ 357 }; 358 359 /* description of the PHYSICAL tuner */ 360 struct TUNER { 361 char* name; 362 u_char type; 363 u_char pllControl[4]; 364 u_char bandLimits[ 2 ]; 365 u_char bandAddrs[ 4 ]; /* 3 first for the 3 TV 366 ** bands. Last for radio 367 ** band (0x00=NoRadio). 368 */ 369 370 }; 371 372 /* description of the card */ 373 #define EEPROMBLOCKSIZE 32 374 struct CARDTYPE { 375 unsigned int card_id; /* card id (from #define's) */ 376 char* name; 377 const struct TUNER* tuner; /* Tuner details */ 378 u_char tuner_pllAddr; /* Tuner i2c address */ 379 u_char dbx; /* Has DBX chip? */ 380 u_char msp3400c; /* Has msp3400c chip? */ 381 u_char dpl3518a; /* Has dpl3518a chip? */ 382 u_char eepromAddr; 383 u_char eepromSize; /* bytes / EEPROMBLOCKSIZE */ 384 u_int audiomuxs[ 5 ]; /* tuner, ext (line-in) */ 385 /* int/unused (radio) */ 386 /* mute, present */ 387 u_int gpio_mux_bits; /* GPIO mask for audio mux */ 388 }; 389 390 struct format_params { 391 /* Total lines, lines before image, image lines */ 392 int vtotal, vdelay, vactive; 393 /* Total unscaled horizontal pixels, pixels before image, image pixels */ 394 int htotal, hdelay, hactive; 395 /* Scaled horizontal image pixels, Total Scaled horizontal pixels */ 396 int scaled_hactive, scaled_htotal; 397 /* frame rate . for ntsc is 30 frames per second */ 398 int frame_rate; 399 /* A-delay and B-delay */ 400 u_char adelay, bdelay; 401 /* Iform XTSEL value */ 402 int iform_xtsel; 403 /* VBI number of lines per field, and number of samples per line */ 404 int vbi_num_lines, vbi_num_samples; 405 }; 406 407 #if ((defined(__FreeBSD__)) && (NSMBUS > 0)) 408 struct bktr_i2c_softc { 409 device_t iicbus; 410 device_t smbus; 411 }; 412 #endif 413 414 415 /* Bt848/878 register access 416 * The registers can either be access via a memory mapped structure 417 * or accessed via bus_space. 418 * bus_0pace access allows cross platform support, where as the 419 * memory mapped structure method only works on 32 bit processors 420 * with the right type of endianness. 421 */ 422 #if defined(__NetBSD__) || ( defined(__FreeBSD__) && (__FreeBSD_version >=300000) ) 423 #define INB(bktr,offset) bus_space_read_1((bktr)->memt,(bktr)->memh,(offset)) 424 #define INW(bktr,offset) bus_space_read_2((bktr)->memt,(bktr)->memh,(offset)) 425 #define INL(bktr,offset) bus_space_read_4((bktr)->memt,(bktr)->memh,(offset)) 426 #define OUTB(bktr,offset,value) bus_space_write_1((bktr)->memt,(bktr)->memh,(offset),(value)) 427 #define OUTW(bktr,offset,value) bus_space_write_2((bktr)->memt,(bktr)->memh,(offset),(value)) 428 #define OUTL(bktr,offset,value) bus_space_write_4((bktr)->memt,(bktr)->memh,(offset),(value)) 429 #else 430 #define INB(bktr,offset) *(volatile unsigned char*) ((int)((bktr)->memh)+(offset)) 431 #define INW(bktr,offset) *(volatile unsigned short*)((int)((bktr)->memh)+(offset)) 432 #define INL(bktr,offset) *(volatile unsigned int*) ((int)((bktr)->memh)+(offset)) 433 #define OUTB(bktr,offset,value) *(volatile unsigned char*) ((int)((bktr)->memh)+(offset)) = (value) 434 #define OUTW(bktr,offset,value) *(volatile unsigned short*)((int)((bktr)->memh)+(offset)) = (value) 435 #define OUTL(bktr,offset,value) *(volatile unsigned int*) ((int)((bktr)->memh)+(offset)) = (value) 436 #endif 437 438 439 typedef struct bktr_clip bktr_clip_t; 440 441 /* 442 * NetBSD >= 1.3H uses vaddr_t instead of vm_offset_t 443 */ 444 #if defined(__NetBSD__) && __NetBSD_Version__ >= 103080000 445 typedef vaddr_t vm_offset_t; 446 #endif 447 448 /* 449 * BrookTree 848 info structure, one per bt848 card installed. 450 */ 451 struct bktr_softc { 452 453 #if defined (__bsdi__) 454 struct device bktr_dev; /* base device */ 455 struct isadev bktr_id; /* ISA device */ 456 struct intrhand bktr_ih; /* interrupt vectoring */ 457 #define pcici_t pci_devaddr_t 458 #endif 459 460 #if defined(__NetBSD__) 461 struct device bktr_dev; /* base device */ 462 bus_dma_tag_t dmat; /* DMA tag */ 463 bus_space_tag_t memt; 464 bus_space_handle_t memh; 465 bus_size_t obmemsz; /* size of en card (bytes) */ 466 void *ih; 467 bus_dmamap_t dm_prog; 468 bus_dmamap_t dm_oprog; 469 bus_dmamap_t dm_mem; 470 bus_dmamap_t dm_vbidata; 471 bus_dmamap_t dm_vbibuffer; 472 #if __NetBSD_Version__ >= 103080000 473 paddr_t phys_base; /* Bt848 register physical address */ 474 #else 475 vm_offset_t phys_base; /* Bt848 register physical address */ 476 #endif 477 #endif 478 479 #if defined(__OpenBSD__) 480 struct device bktr_dev; /* base device */ 481 bus_dma_tag_t dmat; /* DMA tag */ 482 bus_space_tag_t memt; 483 bus_space_handle_t memh; 484 bus_size_t obmemsz; /* size of en card (bytes) */ 485 void *ih; 486 bus_dmamap_t dm_prog; 487 bus_dmamap_t dm_oprog; 488 bus_dmamap_t dm_mem; 489 bus_dmamap_t dm_vbidata; 490 bus_dmamap_t dm_vbibuffer; 491 size_t dm_mapsize; 492 pci_chipset_tag_t pc; /* Opaque PCI chipset tag */ 493 pcitag_t tag; /* PCI tag, for doing PCI commands */ 494 vm_offset_t phys_base; /* Bt848 register physical address */ 495 #endif 496 497 #if defined (__FreeBSD__) 498 #if (__FreeBSD_version < 400000) 499 vm_offset_t phys_base; /* 2.x Bt848 register physical address */ 500 pcici_t tag; /* 2.x PCI tag, for doing PCI commands */ 501 #endif 502 #if (__FreeBSD_version >= 400000) 503 struct resource *res_mem; /* 4.x resource descriptor for registers */ 504 struct resource *res_irq; /* 4.x resource descriptor for interrupt */ 505 void *res_ih; /* 4.x newbus interrupt handler cookie */ 506 #endif 507 #if (__FreeBSD_version >= 310000) 508 bus_space_tag_t memt; /* Bus space register access functions */ 509 bus_space_handle_t memh; /* Bus space register access functions */ 510 bus_size_t obmemsz;/* Size of card (bytes) */ 511 #endif 512 #if (NSMBUS > 0) 513 struct bktr_i2c_softc i2c_sc; /* bt848_i2c device */ 514 #endif 515 #endif 516 517 /* the following definitions are common over all platforms */ 518 vm_offset_t bigbuf; /* buffer that holds the captured image */ 519 int alloc_pages; /* number of pages in bigbuf */ 520 521 vm_offset_t vbidata; /* RISC program puts VBI data from the current frame here */ 522 vm_offset_t vbibuffer; /* Circular buffer holding VBI data for the user */ 523 int vbiinsert; /* Position for next write into circular buffer */ 524 int vbistart; /* Position of last read from circular buffer */ 525 int vbisize; /* Number of bytes in the circular buffer */ 526 u_long vbi_sequence_number; /* sequence number for VBI */ 527 int vbi_read_blocked; /* user process blocked on read() from /dev/vbi */ 528 struct selinfo vbi_select; /* Data used by select() on /dev/vbi */ 529 530 531 struct proc *proc; /* process to receive raised signal */ 532 int signal; /* signal to send to process */ 533 int clr_on_start; /* clear cap buf on capture start? */ 534 #define METEOR_SIG_MODE_MASK 0xffff0000 535 #define METEOR_SIG_FIELD_MODE 0x00010000 536 #define METEOR_SIG_FRAME_MODE 0x00000000 537 vm_offset_t dma_prog; 538 vm_offset_t odd_dma_prog; 539 char dma_prog_loaded; 540 struct meteor_mem *mem; /* used to control sync. multi-frame output */ 541 u_long synch_wait; /* wait for free buffer before continuing */ 542 short current; /* frame number in buffer (1-frames) */ 543 short rows; /* number of rows in a frame */ 544 short cols; /* number of columns in a frame */ 545 int capture_area_x_offset; /* Usually the full 640x480(NTSC) image is */ 546 int capture_area_y_offset; /* captured. The capture area allows for */ 547 int capture_area_x_size; /* example 320x200 pixels from the centre */ 548 int capture_area_y_size; /* of the video image to be captured. */ 549 char capture_area_enabled; /* When TRUE use user's capture area. */ 550 int pixfmt; /* active pixel format (idx into fmt tbl) */ 551 int pixfmt_compat; /* Y/N - in meteor pix fmt compat mode */ 552 u_long format; /* frame format rgb, yuv, etc.. */ 553 short frames; /* number of frames allocated */ 554 int frame_size; /* number of bytes in a frame */ 555 u_long fifo_errors; /* number of fifo capture errors since open */ 556 u_long dma_errors; /* number of DMA capture errors since open */ 557 u_long frames_captured;/* number of frames captured since open */ 558 u_long even_fields_captured; /* number of even fields captured */ 559 u_long odd_fields_captured; /* number of odd fields captured */ 560 u_long range_enable; /* enable range checking ?? */ 561 u_short capcontrol; /* reg 0xdc capture control */ 562 u_short bktr_cap_ctl; 563 volatile u_int flags; 564 #define METEOR_INITALIZED 0x00000001 565 #define METEOR_OPEN 0x00000002 566 #define METEOR_MMAP 0x00000004 567 #define METEOR_INTR 0x00000008 568 #define METEOR_READ 0x00000010 /* XXX never gets referenced */ 569 #define METEOR_SINGLE 0x00000020 /* get single frame */ 570 #define METEOR_CONTIN 0x00000040 /* continuously get frames */ 571 #define METEOR_SYNCAP 0x00000080 /* synchronously get frames */ 572 #define METEOR_CAP_MASK 0x000000f0 573 #define METEOR_NTSC 0x00000100 574 #define METEOR_PAL 0x00000200 575 #define METEOR_SECAM 0x00000400 576 #define BROOKTREE_NTSC 0x00000100 /* used in video open() and */ 577 #define BROOKTREE_PAL 0x00000200 /* in the kernel config */ 578 #define BROOKTREE_SECAM 0x00000400 /* file */ 579 #define METEOR_AUTOMODE 0x00000800 580 #define METEOR_FORM_MASK 0x00000f00 581 #define METEOR_DEV0 0x00001000 582 #define METEOR_DEV1 0x00002000 583 #define METEOR_DEV2 0x00004000 584 #define METEOR_DEV3 0x00008000 585 #define METEOR_DEV_SVIDEO 0x00006000 586 #define METEOR_DEV_RGB 0x0000a000 587 #define METEOR_DEV_MASK 0x0000f000 588 #define METEOR_RGB16 0x00010000 589 #define METEOR_RGB24 0x00020000 590 #define METEOR_YUV_PACKED 0x00040000 591 #define METEOR_YUV_PLANAR 0x00080000 592 #define METEOR_WANT_EVEN 0x00100000 /* want even frame */ 593 #define METEOR_WANT_ODD 0x00200000 /* want odd frame */ 594 #define METEOR_WANT_MASK 0x00300000 595 #define METEOR_ONLY_EVEN_FIELDS 0x01000000 596 #define METEOR_ONLY_ODD_FIELDS 0x02000000 597 #define METEOR_ONLY_FIELDS_MASK 0x03000000 598 #define METEOR_YUV_422 0x04000000 599 #define METEOR_OUTPUT_FMT_MASK 0x040f0000 600 #define METEOR_WANT_TS 0x08000000 /* time-stamp a frame */ 601 #define METEOR_RGB 0x20000000 /* meteor rgb unit */ 602 #define METEOR_FIELD_MODE 0x80000000 603 u_char tflags; /* Tuner flags (/dev/tuner) */ 604 #define TUNER_INITALIZED 0x00000001 605 #define TUNER_OPEN 0x00000002 606 u_char vbiflags; /* VBI flags (/dev/vbi) */ 607 #define VBI_INITALIZED 0x00000001 608 #define VBI_OPEN 0x00000002 609 #define VBI_CAPTURE 0x00000004 610 u_short fps; /* frames per second */ 611 struct meteor_video video; 612 struct TVTUNER tuner; 613 struct CARDTYPE card; 614 u_char audio_mux_select; /* current mode of the audio */ 615 u_char audio_mute_state; /* mute state of the audio */ 616 u_char format_params; 617 u_long current_sol; 618 u_long current_col; 619 int clip_start; 620 int line_length; 621 int last_y; 622 int y; 623 int y2; 624 int yclip; 625 int yclip2; 626 int max_clip_node; 627 bktr_clip_t clip_list[100]; 628 int reverse_mute; /* Swap the GPIO values for Mute and TV Audio */ 629 int bt848_tuner; 630 int bt848_card; 631 u_long id; 632 #define BT848_USE_XTALS 0 633 #define BT848_USE_PLL 1 634 int xtal_pll_mode; /* Use XTAL or PLL mode for PAL/SECAM */ 635 int remote_control; /* remote control detected */ 636 int remote_control_addr; /* remote control i2c address */ 637 char msp_version_string[9]; /* MSP version string 34xxx-xx */ 638 int msp_addr; /* MSP i2c address */ 639 char dpl_version_string[9]; /* DPL version string 35xxx-xx */ 640 int dpl_addr; /* DPL i2c address */ 641 int slow_msp_audio; /* 0 = use fast MSP3410/3415 programming sequence */ 642 /* 1 = use slow MSP3410/3415 programming sequence */ 643 644 }; 645 646 typedef struct bktr_softc bktr_reg_t; 647 typedef struct bktr_softc* bktr_ptr_t; 648 649 #define Bt848_MAX_SIGN 16 650 651 struct bt848_card_sig { 652 int card; 653 int tuner; 654 u_char signature[Bt848_MAX_SIGN]; 655 }; 656 657 658 /***********************************************************/ 659 /* ioctl_cmd_t int on old versions, u_long on new versions */ 660 /***********************************************************/ 661 662 #if (__FreeBSD__ == 2) 663 typedef int ioctl_cmd_t; 664 #endif 665 666 #if defined(__FreeBSD__) 667 #if (__FreeBSD_version >= 300000) 668 typedef u_long ioctl_cmd_t; 669 #endif 670 #endif 671 672 #if defined(__NetBSD__) || defined(__OpenBSD__) 673 typedef u_long ioctl_cmd_t; 674 #endif 675 676 677
Indexes created Fri Oct 03 02:09:57 GMT 2025