bktr_reg.h revision 1.1.1.4
1 /* $NetBSD: bktr_reg.h,v 1.1.1.4 2000/12/30 16:44:15 wiz Exp $ */ 2 3 /* 4 * FreeBSD: src/sys/dev/bktr/bktr_reg.h,v 1.42 2000/10/31 13:09:56 roger Exp 5 * 6 * Copyright (c) 1999 Roger Hardiman 7 * Copyright (c) 1998 Amancio Hasty 8 * Copyright (c) 1995 Mark Tinguely and Jim Lowe 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Mark Tinguely and Jim Lowe 22 * 4. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 27 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 28 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 33 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 34 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 * 37 */ 38 39 #ifdef __FreeBSD__ 40 # if (__FreeBSD_version >= 310000) 41 # include "smbus.h" 42 # else 43 # define NSMBUS 0 /* FreeBSD before 3.1 does not have SMBUS */ 44 # endif 45 # if (NSMBUS > 0) 46 # define BKTR_USE_FREEBSD_SMBUS 47 # endif 48 #endif 49 50 #ifdef __NetBSD__ 51 #include <machine/bus.h> /* struct device */ 52 #include <sys/device.h> 53 #include <sys/select.h> /* struct selinfo */ 54 # ifdef DEBUG 55 # define bootverbose 1 56 # else 57 # define bootverbose 0 58 # endif 59 #endif 60 61 /* 62 * The kernel options for the driver now all begin with BKTR. 63 * Support the older kernel options on FreeBSD and OpenBSD. 64 * 65 */ 66 #if defined(__FreeBSD__) || defined(__OpenBSD__) 67 #if defined(BROOKTREE_ALLOC_PAGES) 68 #define BKTR_ALLOC_PAGES BROOKTREE_ALLOC_PAGES 69 #endif 70 71 #if defined(BROOKTREE_SYSTEM_DEFAULT) 72 #define BKTR_SYSTEM_DEFAULT BROOKTREE_SYSTEM_DEFAULT 73 #endif 74 75 #if defined(OVERRIDE_CARD) 76 #define BKTR_OVERRIDE_CARD OVERRIDE_CARD 77 #endif 78 79 #if defined(OVERRIDE_TUNER) 80 #define BKTR_OVERRIDE_TUNER OVERRIDE_TUNER 81 #endif 82 83 #if defined(OVERRIDE_DBX) 84 #define BKTR_OVERRIDE_DBX OVERRIDE_DBX 85 #endif 86 87 #if defined(OVERRIDE_MSP) 88 #define BKTR_OVERRIDE_MSP OVERRIDE_MSP 89 #endif 90 91 #endif 92 93 94 #ifndef PCI_LATENCY_TIMER 95 #define PCI_LATENCY_TIMER 0x0c /* pci timer register */ 96 #endif 97 98 /* 99 * Definitions for the Brooktree 848/878 video capture to pci interface. 100 */ 101 #ifndef __NetBSD__ 102 #define PCI_VENDOR_SHIFT 0 103 #define PCI_VENDOR_MASK 0xffff 104 #define PCI_VENDOR(id) \ 105 (((id) >> PCI_VENDOR_SHIFT) & PCI_VENDOR_MASK) 106 107 #define PCI_PRODUCT_SHIFT 16 108 #define PCI_PRODUCT_MASK 0xffff 109 #define PCI_PRODUCT(id) \ 110 (((id) >> PCI_PRODUCT_SHIFT) & PCI_PRODUCT_MASK) 111 112 /* PCI vendor ID */ 113 #define PCI_VENDOR_BROOKTREE 0x109e /* Brooktree */ 114 /* Brooktree products */ 115 #define PCI_PRODUCT_BROOKTREE_BT848 0x0350 /* Bt848 Video Capture */ 116 #define PCI_PRODUCT_BROOKTREE_BT849 0x0351 /* Bt849 Video Capture */ 117 #define PCI_PRODUCT_BROOKTREE_BT878 0x036e /* Bt878 Video Capture */ 118 #define PCI_PRODUCT_BROOKTREE_BT879 0x036f /* Bt879 Video Capture */ 119 #endif 120 121 #define BROOKTREE_848 1 122 #define BROOKTREE_848A 2 123 #define BROOKTREE_849A 3 124 #define BROOKTREE_878 4 125 #define BROOKTREE_879 5 126 127 typedef volatile u_int bregister_t; 128 /* 129 * if other persuasion endian, then compiler will probably require that 130 * these next 131 * macros be reversed 132 */ 133 #define BTBYTE(what) bregister_t what:8; int :24 134 #define BTWORD(what) bregister_t what:16; int: 16 135 #define BTLONG(what) bregister_t what:32 136 137 struct bt848_registers { 138 BTBYTE (dstatus); /* 0, 1,2,3 */ 139 #define BT848_DSTATUS_PRES (1<<7) 140 #define BT848_DSTATUS_HLOC (1<<6) 141 #define BT848_DSTATUS_FIELD (1<<5) 142 #define BT848_DSTATUS_NUML (1<<4) 143 #define BT848_DSTATUS_CSEL (1<<3) 144 #define BT848_DSTATUS_PLOCK (1<<2) 145 #define BT848_DSTATUS_LOF (1<<1) 146 #define BT848_DSTATUS_COF (1<<0) 147 BTBYTE (iform); /* 4, 5,6,7 */ 148 #define BT848_IFORM_MUXSEL (0x3<<5) 149 # define BT848_IFORM_M_MUX1 (0x03<<5) 150 # define BT848_IFORM_M_MUX0 (0x02<<5) 151 # define BT848_IFORM_M_MUX2 (0x01<<5) 152 # define BT848_IFORM_M_MUX3 (0x0) 153 # define BT848_IFORM_M_RSVD (0x00<<5) 154 #define BT848_IFORM_XTSEL (0x3<<3) 155 # define BT848_IFORM_X_AUTO (0x03<<3) 156 # define BT848_IFORM_X_XT1 (0x02<<3) 157 # define BT848_IFORM_X_XT0 (0x01<<3) 158 # define BT848_IFORM_X_RSVD (0x00<<3) 159 BTBYTE (tdec); /* 8, 9,a,b */ 160 BTBYTE (e_crop); /* c, d,e,f */ 161 BTBYTE (e_vdelay_lo); /* 10, 11,12,13 */ 162 BTBYTE (e_vactive_lo); /* 14, 15,16,17 */ 163 BTBYTE (e_delay_lo); /* 18, 19,1a,1b */ 164 BTBYTE (e_hactive_lo); /* 1c, 1d,1e,1f */ 165 BTBYTE (e_hscale_hi); /* 20, 21,22,23 */ 166 BTBYTE (e_hscale_lo); /* 24, 25,26,27 */ 167 BTBYTE (bright); /* 28, 29,2a,2b */ 168 BTBYTE (e_control); /* 2c, 2d,2e,2f */ 169 #define BT848_E_CONTROL_LNOTCH (1<<7) 170 #define BT848_E_CONTROL_COMP (1<<6) 171 #define BT848_E_CONTROL_LDEC (1<<5) 172 #define BT848_E_CONTROL_CBSENSE (1<<4) 173 #define BT848_E_CONTROL_RSVD (1<<3) 174 #define BT848_E_CONTROL_CON_MSB (1<<2) 175 #define BT848_E_CONTROL_SAT_U_MSB (1<<1) 176 #define BT848_E_CONTROL_SAT_V_MSB (1<<0) 177 BTBYTE (contrast_lo); /* 30, 31,32,33 */ 178 BTBYTE (sat_u_lo); /* 34, 35,36,37 */ 179 BTBYTE (sat_v_lo); /* 38, 39,3a,3b */ 180 BTBYTE (hue); /* 3c, 3d,3e,3f */ 181 BTBYTE (e_scloop); /* 40, 41,42,43 */ 182 #define BT848_E_SCLOOP_RSVD1 (1<<7) 183 #define BT848_E_SCLOOP_CAGC (1<<6) 184 #define BT848_E_SCLOOP_CKILL (1<<5) 185 #define BT848_E_SCLOOP_HFILT (0x3<<3) 186 # define BT848_E_SCLOOP_HFILT_ICON (0x3<<3) 187 # define BT848_E_SCLOOP_HFILT_QCIF (0x2<<3) 188 # define BT848_E_SCLOOP_HFILT_CIF (0x1<<3) 189 # define BT848_E_SCLOOP_HFILT_AUTO (0x0<<3) 190 #define BT848_E_SCLOOP_RSVD0 (0x7<<0) 191 int :32; /* 44, 45,46,47 */ 192 BTBYTE (oform); /* 48, 49,4a,4b */ 193 BTBYTE (e_vscale_hi); /* 4c, 4d,4e,4f */ 194 BTBYTE (e_vscale_lo); /* 50, 51,52,53 */ 195 BTBYTE (test); /* 54, 55,56,57 */ 196 int :32; /* 58, 59,5a,5b */ 197 int :32; /* 5c, 5d,5e,5f */ 198 BTLONG (adelay); /* 60, 61,62,63 */ 199 BTBYTE (bdelay); /* 64, 65,66,67 */ 200 BTBYTE (adc); /* 68, 69,6a,6b */ 201 #define BT848_ADC_RESERVED (0x80) /* required pattern */ 202 #define BT848_ADC_SYNC_T (1<<5) 203 #define BT848_ADC_AGC_EN (1<<4) 204 #define BT848_ADC_CLK_SLEEP (1<<3) 205 #define BT848_ADC_Y_SLEEP (1<<2) 206 #define BT848_ADC_C_SLEEP (1<<1) 207 #define BT848_ADC_CRUSH (1<<0) 208 BTBYTE (e_vtc); /* 6c, 6d,6e,6f */ 209 int :32; /* 70, 71,72,73 */ 210 int :32; /* 74, 75,76,77 */ 211 int :32; /* 78, 79,7a,7b */ 212 BTLONG (sreset); /* 7c, 7d,7e,7f */ 213 u_char filler1[0x84-0x80]; 214 BTBYTE (tgctrl); /* 84, 85,86,87 */ 215 #define BT848_TGCTRL_TGCKI (3<<3) 216 #define BT848_TGCTRL_TGCKI_XTAL (0<<3) 217 #define BT848_TGCTRL_TGCKI_PLL (1<<3) 218 #define BT848_TGCTRL_TGCKI_GPCLK (2<<3) 219 #define BT848_TGCTRL_TGCKI_GPCLK_I (3<<3) 220 u_char filler[0x8c-0x88]; 221 BTBYTE (o_crop); /* 8c, 8d,8e,8f */ 222 BTBYTE (o_vdelay_lo); /* 90, 91,92,93 */ 223 BTBYTE (o_vactive_lo); /* 94, 95,96,97 */ 224 BTBYTE (o_delay_lo); /* 98, 99,9a,9b */ 225 BTBYTE (o_hactive_lo); /* 9c, 9d,9e,9f */ 226 BTBYTE (o_hscale_hi); /* a0, a1,a2,a3 */ 227 BTBYTE (o_hscale_lo); /* a4, a5,a6,a7 */ 228 int :32; /* a8, a9,aa,ab */ 229 BTBYTE (o_control); /* ac, ad,ae,af */ 230 #define BT848_O_CONTROL_LNOTCH (1<<7) 231 #define BT848_O_CONTROL_COMP (1<<6) 232 #define BT848_O_CONTROL_LDEC (1<<5) 233 #define BT848_O_CONTROL_CBSENSE (1<<4) 234 #define BT848_O_CONTROL_RSVD (1<<3) 235 #define BT848_O_CONTROL_CON_MSB (1<<2) 236 #define BT848_O_CONTROL_SAT_U_MSB (1<<1) 237 #define BT848_O_CONTROL_SAT_V_MSB (1<<0) 238 u_char fillter4[16]; 239 BTBYTE (o_scloop); /* c0, c1,c2,c3 */ 240 #define BT848_O_SCLOOP_RSVD1 (1<<7) 241 #define BT848_O_SCLOOP_CAGC (1<<6) 242 #define BT848_O_SCLOOP_CKILL (1<<5) 243 #define BT848_O_SCLOOP_HFILT (0x3<<3) 244 #define BT848_O_SCLOOP_HFILT_ICON (0x3<<3) 245 #define BT848_O_SCLOOP_HFILT_QCIF (0x2<<3) 246 #define BT848_O_SCLOOP_HFILT_CIF (0x1<<3) 247 #define BT848_O_SCLOOP_HFILT_AUTO (0x0<<3) 248 #define BT848_O_SCLOOP_RSVD0 (0x7<<0) 249 int :32; /* c4, c5,c6,c7 */ 250 int :32; /* c8, c9,ca,cb */ 251 BTBYTE (o_vscale_hi); /* cc, cd,ce,cf */ 252 BTBYTE (o_vscale_lo); /* d0, d1,d2,d3 */ 253 BTBYTE (color_fmt); /* d4, d5,d6,d7 */ 254 bregister_t color_ctl_swap :4; /* d8 */ 255 #define BT848_COLOR_CTL_WSWAP_ODD (1<<3) 256 #define BT848_COLOR_CTL_WSWAP_EVEN (1<<2) 257 #define BT848_COLOR_CTL_BSWAP_ODD (1<<1) 258 #define BT848_COLOR_CTL_BSWAP_EVEN (1<<0) 259 bregister_t color_ctl_gamma :1; 260 bregister_t color_ctl_rgb_ded :1; 261 bregister_t color_ctl_color_bars :1; 262 bregister_t color_ctl_ext_frmrate :1; 263 #define BT848_COLOR_CTL_GAMMA (1<<4) 264 #define BT848_COLOR_CTL_RGB_DED (1<<5) 265 #define BT848_COLOR_CTL_COLOR_BARS (1<<6) 266 #define BT848_COLOR_CTL_EXT_FRMRATE (1<<7) 267 int :24; /* d9,da,db */ 268 BTBYTE (cap_ctl); /* dc, dd,de,df */ 269 #define BT848_CAP_CTL_DITH_FRAME (1<<4) 270 #define BT848_CAP_CTL_VBI_ODD (1<<3) 271 #define BT848_CAP_CTL_VBI_EVEN (1<<2) 272 #define BT848_CAP_CTL_ODD (1<<1) 273 #define BT848_CAP_CTL_EVEN (1<<0) 274 BTBYTE (vbi_pack_size); /* e0, e1,e2,e3 */ 275 BTBYTE (vbi_pack_del); /* e4, e5,e6,e7 */ 276 int :32; /* e8, e9,ea,eb */ 277 BTBYTE (o_vtc); /* ec, ed,ee,ef */ 278 BTBYTE (pll_f_lo); /* f0, f1,f2,f3 */ 279 BTBYTE (pll_f_hi); /* f4, f5,f6,f7 */ 280 BTBYTE (pll_f_xci); /* f8, f9,fa,fb */ 281 #define BT848_PLL_F_C (1<<6) 282 #define BT848_PLL_F_X (1<<7) 283 u_char filler2[0x100-0xfc]; 284 BTLONG (int_stat); /* 100, 101,102,103 */ 285 BTLONG (int_mask); /* 104, 105,106,107 */ 286 #define BT848_INT_RISCS (0xf<<28) 287 #define BT848_INT_RISC_EN (1<<27) 288 #define BT848_INT_RACK (1<<25) 289 #define BT848_INT_FIELD (1<<24) 290 #define BT848_INT_MYSTERYBIT (1<<23) 291 #define BT848_INT_SCERR (1<<19) 292 #define BT848_INT_OCERR (1<<18) 293 #define BT848_INT_PABORT (1<<17) 294 #define BT848_INT_RIPERR (1<<16) 295 #define BT848_INT_PPERR (1<<15) 296 #define BT848_INT_FDSR (1<<14) 297 #define BT848_INT_FTRGT (1<<13) 298 #define BT848_INT_FBUS (1<<12) 299 #define BT848_INT_RISCI (1<<11) 300 #define BT848_INT_GPINT (1<<9) 301 #define BT848_INT_I2CDONE (1<<8) 302 #define BT848_INT_RSV1 (1<<7) 303 #define BT848_INT_RSV0 (1<<6) 304 #define BT848_INT_VPRES (1<<5) 305 #define BT848_INT_HLOCK (1<<4) 306 #define BT848_INT_OFLOW (1<<3) 307 #define BT848_INT_HSYNC (1<<2) 308 #define BT848_INT_VSYNC (1<<1) 309 #define BT848_INT_FMTCHG (1<<0) 310 int :32; /* 108, 109,10a,10b */ 311 BTWORD (gpio_dma_ctl); /* 10c, 10d,10e,10f */ 312 #define BT848_DMA_CTL_PL23TP4 (0<<6) /* planar1 trigger 4 */ 313 #define BT848_DMA_CTL_PL23TP8 (1<<6) /* planar1 trigger 8 */ 314 #define BT848_DMA_CTL_PL23TP16 (2<<6) /* planar1 trigger 16 */ 315 #define BT848_DMA_CTL_PL23TP32 (3<<6) /* planar1 trigger 32 */ 316 #define BT848_DMA_CTL_PL1TP4 (0<<4) /* planar1 trigger 4 */ 317 #define BT848_DMA_CTL_PL1TP8 (1<<4) /* planar1 trigger 8 */ 318 #define BT848_DMA_CTL_PL1TP16 (2<<4) /* planar1 trigger 16 */ 319 #define BT848_DMA_CTL_PL1TP32 (3<<4) /* planar1 trigger 32 */ 320 #define BT848_DMA_CTL_PKTP4 (0<<2) /* packed trigger 4 */ 321 #define BT848_DMA_CTL_PKTP8 (1<<2) /* packed trigger 8 */ 322 #define BT848_DMA_CTL_PKTP16 (2<<2) /* packed trigger 16 */ 323 #define BT848_DMA_CTL_PKTP32 (3<<2) /* packed trigger 32 */ 324 #define BT848_DMA_CTL_RISC_EN (1<<1) 325 #define BT848_DMA_CTL_FIFO_EN (1<<0) 326 BTLONG (i2c_data_ctl); /* 110, 111,112,113 */ 327 #define BT848_DATA_CTL_I2CDIV (0xf<<4) 328 #define BT848_DATA_CTL_I2CSYNC (1<<3) 329 #define BT848_DATA_CTL_I2CW3B (1<<2) 330 #define BT848_DATA_CTL_I2CSCL (1<<1) 331 #define BT848_DATA_CTL_I2CSDA (1<<0) 332 BTLONG (risc_strt_add); /* 114, 115,116,117 */ 333 BTLONG (gpio_out_en); /* 118, 119,11a,11b */ /* really 24 bits */ 334 BTLONG (gpio_reg_inp); /* 11c, 11d,11e,11f */ /* really 24 bits */ 335 BTLONG (risc_count); /* 120, 121,122,123 */ 336 u_char filler3[0x200-0x124]; 337 BTLONG (gpio_data); /* 200, 201,202,203 */ /* really 24 bits */ 338 }; 339 340 341 #define BKTR_DSTATUS 0x000 342 #define BKTR_IFORM 0x004 343 #define BKTR_TDEC 0x008 344 #define BKTR_E_CROP 0x00C 345 #define BKTR_O_CROP 0x08C 346 #define BKTR_E_VDELAY_LO 0x010 347 #define BKTR_O_VDELAY_LO 0x090 348 #define BKTR_E_VACTIVE_LO 0x014 349 #define BKTR_O_VACTIVE_LO 0x094 350 #define BKTR_E_DELAY_LO 0x018 351 #define BKTR_O_DELAY_LO 0x098 352 #define BKTR_E_HACTIVE_LO 0x01C 353 #define BKTR_O_HACTIVE_LO 0x09C 354 #define BKTR_E_HSCALE_HI 0x020 355 #define BKTR_O_HSCALE_HI 0x0A0 356 #define BKTR_E_HSCALE_LO 0x024 357 #define BKTR_O_HSCALE_LO 0x0A4 358 #define BKTR_BRIGHT 0x028 359 #define BKTR_E_CONTROL 0x02C 360 #define BKTR_O_CONTROL 0x0AC 361 #define BKTR_CONTRAST_LO 0x030 362 #define BKTR_SAT_U_LO 0x034 363 #define BKTR_SAT_V_LO 0x038 364 #define BKTR_HUE 0x03C 365 #define BKTR_E_SCLOOP 0x040 366 #define BKTR_O_SCLOOP 0x0C0 367 #define BKTR_OFORM 0x048 368 #define BKTR_E_VSCALE_HI 0x04C 369 #define BKTR_O_VSCALE_HI 0x0CC 370 #define BKTR_E_VSCALE_LO 0x050 371 #define BKTR_O_VSCALE_LO 0x0D0 372 #define BKTR_TEST 0x054 373 #define BKTR_ADELAY 0x060 374 #define BKTR_BDELAY 0x064 375 #define BKTR_ADC 0x068 376 #define BKTR_E_VTC 0x06C 377 #define BKTR_O_VTC 0x0EC 378 #define BKTR_SRESET 0x07C 379 #define BKTR_COLOR_FMT 0x0D4 380 #define BKTR_COLOR_CTL 0x0D8 381 #define BKTR_CAP_CTL 0x0DC 382 #define BKTR_VBI_PACK_SIZE 0x0E0 383 #define BKTR_VBI_PACK_DEL 0x0E4 384 #define BKTR_INT_STAT 0x100 385 #define BKTR_INT_MASK 0x104 386 #define BKTR_RISC_COUNT 0x120 387 #define BKTR_RISC_STRT_ADD 0x114 388 #define BKTR_GPIO_DMA_CTL 0x10C 389 #define BKTR_GPIO_OUT_EN 0x118 390 #define BKTR_GPIO_REG_INP 0x11C 391 #define BKTR_GPIO_DATA 0x200 392 #define BKTR_I2C_DATA_CTL 0x110 393 #define BKTR_TGCTRL 0x084 394 #define BKTR_PLL_F_LO 0x0F0 395 #define BKTR_PLL_F_HI 0x0F4 396 #define BKTR_PLL_F_XCI 0x0F8 397 398 /* 399 * device support for onboard tv tuners 400 */ 401 402 /* description of the LOGICAL tuner */ 403 struct TVTUNER { 404 int frequency; 405 u_char chnlset; 406 u_char channel; 407 u_char band; 408 u_char afc; 409 u_char radio_mode; /* current mode of the radio mode */ 410 }; 411 412 /* description of the PHYSICAL tuner */ 413 struct TUNER { 414 char* name; 415 u_char type; 416 u_char pllControl[4]; 417 u_char bandLimits[ 2 ]; 418 u_char bandAddrs[ 4 ]; /* 3 first for the 3 TV 419 ** bands. Last for radio 420 ** band (0x00=NoRadio). 421 */ 422 423 }; 424 425 /* description of the card */ 426 #define EEPROMBLOCKSIZE 32 427 struct CARDTYPE { 428 unsigned int card_id; /* card id (from #define's) */ 429 char* name; 430 const struct TUNER* tuner; /* Tuner details */ 431 u_char tuner_pllAddr; /* Tuner i2c address */ 432 u_char dbx; /* Has DBX chip? */ 433 u_char msp3400c; /* Has msp3400c chip? */ 434 u_char dpl3518a; /* Has dpl3518a chip? */ 435 u_char eepromAddr; 436 u_char eepromSize; /* bytes / EEPROMBLOCKSIZE */ 437 u_int audiomuxs[ 5 ]; /* tuner, ext (line-in) */ 438 /* int/unused (radio) */ 439 /* mute, present */ 440 u_int gpio_mux_bits; /* GPIO mask for audio mux */ 441 }; 442 443 struct format_params { 444 /* Total lines, lines before image, image lines */ 445 int vtotal, vdelay, vactive; 446 /* Total unscaled horizontal pixels, pixels before image, image pixels */ 447 int htotal, hdelay, hactive; 448 /* Scaled horizontal image pixels, Total Scaled horizontal pixels */ 449 int scaled_hactive, scaled_htotal; 450 /* frame rate . for ntsc is 30 frames per second */ 451 int frame_rate; 452 /* A-delay and B-delay */ 453 u_char adelay, bdelay; 454 /* Iform XTSEL value */ 455 int iform_xtsel; 456 /* VBI number of lines per field, and number of samples per line */ 457 int vbi_num_lines, vbi_num_samples; 458 }; 459 460 #if defined(BKTR_USE_FREEBSD_SMBUS) 461 struct bktr_i2c_softc { 462 device_t iicbus; 463 device_t smbus; 464 }; 465 #endif 466 467 468 /* Bt848/878 register access 469 * The registers can either be access via a memory mapped structure 470 * or accessed via bus_space. 471 * bus_0pace access allows cross platform support, where as the 472 * memory mapped structure method only works on 32 bit processors 473 * with the right type of endianness. 474 */ 475 #if defined(__NetBSD__) || ( defined(__FreeBSD__) && (__FreeBSD_version >=300000) ) 476 #define INB(bktr,offset) bus_space_read_1((bktr)->memt,(bktr)->memh,(offset)) 477 #define INW(bktr,offset) bus_space_read_2((bktr)->memt,(bktr)->memh,(offset)) 478 #define INL(bktr,offset) bus_space_read_4((bktr)->memt,(bktr)->memh,(offset)) 479 #define OUTB(bktr,offset,value) bus_space_write_1((bktr)->memt,(bktr)->memh,(offset),(value)) 480 #define OUTW(bktr,offset,value) bus_space_write_2((bktr)->memt,(bktr)->memh,(offset),(value)) 481 #define OUTL(bktr,offset,value) bus_space_write_4((bktr)->memt,(bktr)->memh,(offset),(value)) 482 #else 483 #define INB(bktr,offset) *(volatile unsigned char*) ((int)((bktr)->memh)+(offset)) 484 #define INW(bktr,offset) *(volatile unsigned short*)((int)((bktr)->memh)+(offset)) 485 #define INL(bktr,offset) *(volatile unsigned int*) ((int)((bktr)->memh)+(offset)) 486 #define OUTB(bktr,offset,value) *(volatile unsigned char*) ((int)((bktr)->memh)+(offset)) = (value) 487 #define OUTW(bktr,offset,value) *(volatile unsigned short*)((int)((bktr)->memh)+(offset)) = (value) 488 #define OUTL(bktr,offset,value) *(volatile unsigned int*) ((int)((bktr)->memh)+(offset)) = (value) 489 #endif 490 491 492 typedef struct bktr_clip bktr_clip_t; 493 494 /* 495 * BrookTree 848 info structure, one per bt848 card installed. 496 */ 497 struct bktr_softc { 498 499 #if defined (__bsdi__) 500 struct device bktr_dev; /* base device */ 501 struct isadev bktr_id; /* ISA device */ 502 struct intrhand bktr_ih; /* interrupt vectoring */ 503 #define pcici_t pci_devaddr_t 504 #endif 505 506 #if defined(__NetBSD__) 507 struct device bktr_dev; /* base device */ 508 bus_dma_tag_t dmat; /* DMA tag */ 509 bus_space_tag_t memt; 510 bus_space_handle_t memh; 511 bus_size_t obmemsz; /* size of en card (bytes) */ 512 void *ih; 513 bus_dmamap_t dm_prog; 514 bus_dmamap_t dm_oprog; 515 bus_dmamap_t dm_mem; 516 bus_dmamap_t dm_vbidata; 517 bus_dmamap_t dm_vbibuffer; 518 #endif 519 520 #if defined(__OpenBSD__) 521 struct device bktr_dev; /* base device */ 522 bus_dma_tag_t dmat; /* DMA tag */ 523 bus_space_tag_t memt; 524 bus_space_handle_t memh; 525 bus_size_t obmemsz; /* size of en card (bytes) */ 526 void *ih; 527 bus_dmamap_t dm_prog; 528 bus_dmamap_t dm_oprog; 529 bus_dmamap_t dm_mem; 530 bus_dmamap_t dm_vbidata; 531 bus_dmamap_t dm_vbibuffer; 532 size_t dm_mapsize; 533 pci_chipset_tag_t pc; /* Opaque PCI chipset tag */ 534 pcitag_t tag; /* PCI tag, for doing PCI commands */ 535 vm_offset_t phys_base; /* Bt848 register physical address */ 536 #endif 537 538 #if defined (__FreeBSD__) 539 #if (__FreeBSD_version < 400000) 540 vm_offset_t phys_base; /* 2.x Bt848 register physical address */ 541 pcici_t tag; /* 2.x PCI tag, for doing PCI commands */ 542 #endif 543 #if (__FreeBSD_version >= 400000) 544 int mem_rid; /* 4.x resource id */ 545 struct resource *res_mem; /* 4.x resource descriptor for registers */ 546 int irq_rid; /* 4.x resource id */ 547 struct resource *res_irq; /* 4.x resource descriptor for interrupt */ 548 void *res_ih; /* 4.x newbus interrupt handler cookie */ 549 dev_t bktrdev; /* 4.x device entry for /dev/bktrN */ 550 dev_t tunerdev; /* 4.x device entry for /dev/tunerN */ 551 dev_t vbidev; /* 4.x device entry for /dev/vbiN */ 552 dev_t bktrdev_alias; /* alias /dev/bktr to /dev/bktr0 */ 553 dev_t tunerdev_alias; /* alias /dev/tuner to /dev/tuner0 */ 554 dev_t vbidev_alias; /* alias /dev/vbi to /dev/vbi0 */ 555 #endif 556 #if (__FreeBSD_version >= 310000) 557 bus_space_tag_t memt; /* Bus space register access functions */ 558 bus_space_handle_t memh; /* Bus space register access functions */ 559 bus_size_t obmemsz;/* Size of card (bytes) */ 560 #endif 561 #if (NSMBUS > 0) 562 struct bktr_i2c_softc i2c_sc; /* bt848_i2c device */ 563 #endif 564 char bktr_xname[7]; /* device name and unit number */ 565 #endif 566 567 568 /* The following definitions are for the contiguous memory */ 569 #ifdef __NetBSD__ 570 vaddr_t bigbuf; /* buffer that holds the captured image */ 571 vaddr_t vbidata; /* RISC program puts VBI data from the current frame here */ 572 vaddr_t vbibuffer; /* Circular buffer holding VBI data for the user */ 573 vaddr_t dma_prog; /* RISC prog for single and/or even field capture*/ 574 vaddr_t odd_dma_prog; /* RISC program for Odd field capture */ 575 #else 576 vm_offset_t bigbuf; /* buffer that holds the captured image */ 577 vm_offset_t vbidata; /* RISC program puts VBI data from the current frame here */ 578 vm_offset_t vbibuffer; /* Circular buffer holding VBI data for the user */ 579 vm_offset_t dma_prog; /* RISC prog for single and/or even field capture*/ 580 vm_offset_t odd_dma_prog;/* RISC program for Odd field capture */ 581 #endif 582 583 584 /* the following definitions are common over all platforms */ 585 int alloc_pages; /* number of pages in bigbuf */ 586 int vbiinsert; /* Position for next write into circular buffer */ 587 int vbistart; /* Position of last read from circular buffer */ 588 int vbisize; /* Number of bytes in the circular buffer */ 589 u_long vbi_sequence_number; /* sequence number for VBI */ 590 int vbi_read_blocked; /* user process blocked on read() from /dev/vbi */ 591 struct selinfo vbi_select; /* Data used by select() on /dev/vbi */ 592 593 594 struct proc *proc; /* process to receive raised signal */ 595 int signal; /* signal to send to process */ 596 int clr_on_start; /* clear cap buf on capture start? */ 597 #define METEOR_SIG_MODE_MASK 0xffff0000 598 #define METEOR_SIG_FIELD_MODE 0x00010000 599 #define METEOR_SIG_FRAME_MODE 0x00000000 600 char dma_prog_loaded; 601 struct meteor_mem *mem; /* used to control sync. multi-frame output */ 602 u_long synch_wait; /* wait for free buffer before continuing */ 603 short current; /* frame number in buffer (1-frames) */ 604 short rows; /* number of rows in a frame */ 605 short cols; /* number of columns in a frame */ 606 int capture_area_x_offset; /* Usually the full 640x480(NTSC) image is */ 607 int capture_area_y_offset; /* captured. The capture area allows for */ 608 int capture_area_x_size; /* example 320x200 pixels from the centre */ 609 int capture_area_y_size; /* of the video image to be captured. */ 610 char capture_area_enabled; /* When TRUE use user's capture area. */ 611 int pixfmt; /* active pixel format (idx into fmt tbl) */ 612 int pixfmt_compat; /* Y/N - in meteor pix fmt compat mode */ 613 u_long format; /* frame format rgb, yuv, etc.. */ 614 short frames; /* number of frames allocated */ 615 int frame_size; /* number of bytes in a frame */ 616 u_long fifo_errors; /* number of fifo capture errors since open */ 617 u_long dma_errors; /* number of DMA capture errors since open */ 618 u_long frames_captured;/* number of frames captured since open */ 619 u_long even_fields_captured; /* number of even fields captured */ 620 u_long odd_fields_captured; /* number of odd fields captured */ 621 u_long range_enable; /* enable range checking ?? */ 622 u_short capcontrol; /* reg 0xdc capture control */ 623 u_short bktr_cap_ctl; 624 volatile u_int flags; 625 #define METEOR_INITALIZED 0x00000001 626 #define METEOR_OPEN 0x00000002 627 #define METEOR_MMAP 0x00000004 628 #define METEOR_INTR 0x00000008 629 #define METEOR_READ 0x00000010 /* XXX never gets referenced */ 630 #define METEOR_SINGLE 0x00000020 /* get single frame */ 631 #define METEOR_CONTIN 0x00000040 /* continuously get frames */ 632 #define METEOR_SYNCAP 0x00000080 /* synchronously get frames */ 633 #define METEOR_CAP_MASK 0x000000f0 634 #define METEOR_NTSC 0x00000100 635 #define METEOR_PAL 0x00000200 636 #define METEOR_SECAM 0x00000400 637 #define BROOKTREE_NTSC 0x00000100 /* used in video open() and */ 638 #define BROOKTREE_PAL 0x00000200 /* in the kernel config */ 639 #define BROOKTREE_SECAM 0x00000400 /* file */ 640 #define METEOR_AUTOMODE 0x00000800 641 #define METEOR_FORM_MASK 0x00000f00 642 #define METEOR_DEV0 0x00001000 643 #define METEOR_DEV1 0x00002000 644 #define METEOR_DEV2 0x00004000 645 #define METEOR_DEV3 0x00008000 646 #define METEOR_DEV_SVIDEO 0x00006000 647 #define METEOR_DEV_RGB 0x0000a000 648 #define METEOR_DEV_MASK 0x0000f000 649 #define METEOR_RGB16 0x00010000 650 #define METEOR_RGB24 0x00020000 651 #define METEOR_YUV_PACKED 0x00040000 652 #define METEOR_YUV_PLANAR 0x00080000 653 #define METEOR_WANT_EVEN 0x00100000 /* want even frame */ 654 #define METEOR_WANT_ODD 0x00200000 /* want odd frame */ 655 #define METEOR_WANT_MASK 0x00300000 656 #define METEOR_ONLY_EVEN_FIELDS 0x01000000 657 #define METEOR_ONLY_ODD_FIELDS 0x02000000 658 #define METEOR_ONLY_FIELDS_MASK 0x03000000 659 #define METEOR_YUV_422 0x04000000 660 #define METEOR_OUTPUT_FMT_MASK 0x040f0000 661 #define METEOR_WANT_TS 0x08000000 /* time-stamp a frame */ 662 #define METEOR_RGB 0x20000000 /* meteor rgb unit */ 663 #define METEOR_FIELD_MODE 0x80000000 664 u_char tflags; /* Tuner flags (/dev/tuner) */ 665 #define TUNER_INITALIZED 0x00000001 666 #define TUNER_OPEN 0x00000002 667 u_char vbiflags; /* VBI flags (/dev/vbi) */ 668 #define VBI_INITALIZED 0x00000001 669 #define VBI_OPEN 0x00000002 670 #define VBI_CAPTURE 0x00000004 671 u_short fps; /* frames per second */ 672 struct meteor_video video; 673 struct TVTUNER tuner; 674 struct CARDTYPE card; 675 u_char audio_mux_select; /* current mode of the audio */ 676 u_char audio_mute_state; /* mute state of the audio */ 677 u_char format_params; 678 u_long current_sol; 679 u_long current_col; 680 int clip_start; 681 int line_length; 682 int last_y; 683 int y; 684 int y2; 685 int yclip; 686 int yclip2; 687 int max_clip_node; 688 bktr_clip_t clip_list[100]; 689 int reverse_mute; /* Swap the GPIO values for Mute and TV Audio */ 690 int bt848_tuner; 691 int bt848_card; 692 u_long id; 693 #define BT848_USE_XTALS 0 694 #define BT848_USE_PLL 1 695 int xtal_pll_mode; /* Use XTAL or PLL mode for PAL/SECAM */ 696 int remote_control; /* remote control detected */ 697 int remote_control_addr; /* remote control i2c address */ 698 char msp_version_string[9]; /* MSP version string 34xxx-xx */ 699 int msp_addr; /* MSP i2c address */ 700 char dpl_version_string[9]; /* DPL version string 35xxx-xx */ 701 int dpl_addr; /* DPL i2c address */ 702 int slow_msp_audio; /* 0 = use fast MSP3410/3415 programming sequence */ 703 /* 1 = use slow MSP3410/3415 programming sequence */ 704 /* 2 = use Tuner's Mono audio output via the MSP chip */ 705 int msp_use_mono_source; /* use Tuner's Mono audio output via the MSP chip */ 706 int audio_mux_present; /* 1 = has audio mux on GPIO lines, 0 = no audio mux */ 707 int msp_source_selected; /* 0 = TV source, 1 = Line In source, 2 = FM Radio Source */ 708 709 }; 710 711 typedef struct bktr_softc bktr_reg_t; 712 typedef struct bktr_softc* bktr_ptr_t; 713 714 #define Bt848_MAX_SIGN 16 715 716 struct bt848_card_sig { 717 int card; 718 int tuner; 719 u_char signature[Bt848_MAX_SIGN]; 720 }; 721 722 723 /***********************************************************/ 724 /* ioctl_cmd_t int on old versions, u_long on new versions */ 725 /***********************************************************/ 726 727 #if (__FreeBSD__ == 2) 728 typedef int ioctl_cmd_t; 729 #endif 730 731 #if defined(__FreeBSD__) 732 #if (__FreeBSD_version >= 300000) 733 typedef u_long ioctl_cmd_t; 734 #endif 735 #endif 736 737 #if defined(__NetBSD__) || defined(__OpenBSD__) 738 typedef u_long ioctl_cmd_t; 739 #endif 740 741 742
Indexes created Tue Oct 28 12:10:06 GMT 2025