11.1Snia/* 21.1Snia * Copyright (c) 2025 The NetBSD Foundation, Inc. 31.1Snia * All rights reserved. 41.1Snia * 51.1Snia * Redistribution and use in source and binary forms, with or without 61.1Snia * modification, are permitted provided that the following conditions 71.1Snia * are met: 81.1Snia * 1. Redistributions of source code must retain the above copyright 91.1Snia * notice, this list of conditions and the following disclaimer. 101.1Snia * 2. Redistributions in binary form must reproduce the above copyright 111.1Snia * notice, this list of conditions and the following disclaimer in the 121.1Snia * documentation and/or other materials provided with the distribution. 131.1Snia * 141.1Snia * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 151.1Snia * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 161.1Snia * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 171.1Snia * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 181.1Snia * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 191.1Snia * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 201.1Snia * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 211.1Snia * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 221.1Snia * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 231.1Snia * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 241.1Snia */ 251.1Snia 261.1Snia/* 271.1Snia * Bochs DISPI interface register definitions 281.1Snia * See: 291.1Snia * https://wiki.osdev.org/Bochs_VBE_Extensions 301.1Snia * https://www.qemu.org/docs/master/specs/standard-vga.html 311.1Snia */ 321.1Snia 331.1Snia#ifndef BOCHSFBREG_H 341.1Snia#define BOCHSFBREG_H 351.1Snia 361.1Snia/* Standard VGA I/O ports */ 371.1Snia#define VGA_IO_START 0x3C0 381.1Snia#define VGA_IO_SIZE 0x20 391.1Snia 401.1Snia/* VGA registers we access */ 411.1Snia#define VGA_CRTC_INDEX 0x3D4 421.1Snia#define VGA_CRTC_DATA 0x3D5 431.1Snia 441.1Snia/* Bochs VBE DISPI interface I/O ports */ 451.1Snia#define VBE_DISPI_IOPORT_INDEX 0x01CE 461.1Snia#if defined(__i386__) || defined(__x86_64__) 471.1Snia#define VBE_DISPI_IOPORT_DATA 0x01CF 481.1Snia#else 491.1Snia#define VBE_DISPI_IOPORT_DATA 0x01D0 501.1Snia#endif 511.1Snia 521.1Snia/* Bochs VBE DISPI interface MMIO bar and offset */ 531.1Snia#define BOCHSFB_MMIO_BAR 0x14 541.1Snia#define BOCHSFB_MMIO_EDID_OFFSET 0x000 551.1Snia#define BOCHSFB_MMIO_EDID_SIZE 0x400 561.1Snia#define BOCHSFB_MMIO_VGA_OFFSET 0x400 571.1Snia#define BOCHSFB_MMIO_DISPI_OFFSET 0x500 581.1Snia 591.1Snia/* VBE DISPI interface indices */ 601.1Snia#define VBE_DISPI_INDEX_ID 0x0 611.1Snia#define VBE_DISPI_INDEX_XRES 0x1 621.1Snia#define VBE_DISPI_INDEX_YRES 0x2 631.1Snia#define VBE_DISPI_INDEX_BPP 0x3 641.1Snia#define VBE_DISPI_INDEX_ENABLE 0x4 651.1Snia#define VBE_DISPI_INDEX_BANK 0x5 661.1Snia#define VBE_DISPI_INDEX_VIRT_WIDTH 0x6 671.1Snia#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7 681.1Snia#define VBE_DISPI_INDEX_X_OFFSET 0x8 691.1Snia#define VBE_DISPI_INDEX_Y_OFFSET 0x9 701.1Snia#define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa 711.1Snia 721.1Snia/* VBE DISPI interface ID values */ 731.1Snia#define VBE_DISPI_ID0 0xB0C0 /* Magic value for first 12 bits */ 741.1Snia#define VBE_DISPI_ID1 0xB0C1 751.1Snia#define VBE_DISPI_ID2 0xB0C2 761.1Snia#define VBE_DISPI_ID3 0xB0C3 771.1Snia#define VBE_DISPI_ID4 0xB0C4 781.1Snia#define VBE_DISPI_ID5 0xB0C5 791.1Snia 801.1Snia/* VBE DISPI interface enable values */ 811.1Snia#define VBE_DISPI_ENABLED 0x01 821.1Snia#define VBE_DISPI_GETCAPS 0x02 831.1Snia#define VBE_DISPI_8BIT_DAC 0x20 841.1Snia#define VBE_DISPI_LFB_ENABLED 0x40 851.1Snia#define VBE_DISPI_NOCLEARMEM 0x80 861.1Snia 871.1Snia#endif /* BOCHSFBREG_H */ 88