bochsfbreg.h revision 1.1 
1/*
2 * Copyright (c) 2025 The NetBSD Foundation, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 */
25
26/*
27 * Bochs DISPI interface register definitions
28 * See:
29 *      https://wiki.osdev.org/Bochs_VBE_Extensions
30 *      https://www.qemu.org/docs/master/specs/standard-vga.html
31 */
32
33#ifndef BOCHSFBREG_H
34#define BOCHSFBREG_H
35
36/* Standard VGA I/O ports */
37#define VGA_IO_START              0x3C0
38#define VGA_IO_SIZE               0x20
39
40/* VGA registers we access */
41#define VGA_CRTC_INDEX            0x3D4
42#define VGA_CRTC_DATA             0x3D5
43
44/* Bochs VBE DISPI interface I/O ports */
45#define VBE_DISPI_IOPORT_INDEX    0x01CE
46#if defined(__i386__) || defined(__x86_64__)
47#define VBE_DISPI_IOPORT_DATA     0x01CF
48#else
49#define VBE_DISPI_IOPORT_DATA     0x01D0
50#endif
51
52/* Bochs VBE DISPI interface MMIO bar and offset */
53#define BOCHSFB_MMIO_BAR          0x14
54#define BOCHSFB_MMIO_EDID_OFFSET  0x000
55#define BOCHSFB_MMIO_EDID_SIZE    0x400
56#define BOCHSFB_MMIO_VGA_OFFSET   0x400
57#define BOCHSFB_MMIO_DISPI_OFFSET 0x500
58
59/* VBE DISPI interface indices */
60#define VBE_DISPI_INDEX_ID        0x0
61#define VBE_DISPI_INDEX_XRES      0x1
62#define VBE_DISPI_INDEX_YRES      0x2
63#define VBE_DISPI_INDEX_BPP       0x3
64#define VBE_DISPI_INDEX_ENABLE    0x4
65#define VBE_DISPI_INDEX_BANK      0x5
66#define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
67#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
68#define VBE_DISPI_INDEX_X_OFFSET  0x8
69#define VBE_DISPI_INDEX_Y_OFFSET  0x9
70#define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa
71
72/* VBE DISPI interface ID values */
73#define VBE_DISPI_ID0             0xB0C0  /* Magic value for first 12 bits */
74#define VBE_DISPI_ID1             0xB0C1
75#define VBE_DISPI_ID2             0xB0C2
76#define VBE_DISPI_ID3             0xB0C3
77#define VBE_DISPI_ID4             0xB0C4
78#define VBE_DISPI_ID5             0xB0C5
79
80/* VBE DISPI interface enable values */
81#define VBE_DISPI_ENABLED         0x01
82#define VBE_DISPI_GETCAPS         0x02
83#define VBE_DISPI_8BIT_DAC        0x20
84#define VBE_DISPI_LFB_ENABLED     0x40
85#define VBE_DISPI_NOCLEARMEM      0x80
86
87#endif /* BOCHSFBREG_H */
88