btvmei.c revision 1.32
1 /* $NetBSD: btvmei.c,v 1.32 2019/11/10 21:16:36 chs Exp $ */ 2 3 /* 4 * Copyright (c) 1999 5 * Matthias Drochner. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 */ 30 31 #include <sys/cdefs.h> 32 __KERNEL_RCSID(0, "$NetBSD: btvmei.c,v 1.32 2019/11/10 21:16:36 chs Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/device.h> 38 #include <sys/proc.h> 39 #include <sys/malloc.h> 40 41 #include <sys/bus.h> 42 #include <sys/extent.h> 43 44 #include <dev/pci/pcireg.h> 45 #include <dev/pci/pcivar.h> 46 #include <dev/pci/pcidevs.h> 47 48 #include <dev/vme/vmereg.h> 49 #include <dev/vme/vmevar.h> 50 51 #include <dev/pci/btvmeireg.h> 52 #include <dev/pci/btvmeivar.h> 53 54 static int b3_617_match(device_t, cfdata_t, void *); 55 static void b3_617_attach(device_t, device_t, void *); 56 #ifdef notyet 57 static int b3_617_detach(device_t); 58 #endif 59 void b3_617_slaveconfig(device_t, struct vme_attach_args *); 60 61 static void b3_617_vmeintr(struct b3_617_softc *, unsigned char); 62 63 /* 64 * mapping ressources, needed for deallocation 65 */ 66 struct b3_617_vmeresc { 67 bus_space_handle_t handle; 68 bus_size_t len; 69 int firstpage, maplen; 70 }; 71 72 CFATTACH_DECL_NEW(btvmei, sizeof(struct b3_617_softc), 73 b3_617_match, b3_617_attach, NULL, NULL); 74 75 static int 76 b3_617_match(device_t parent, cfdata_t match, void *aux) 77 { 78 struct pci_attach_args *pa = aux; 79 80 if ((PCI_VENDOR(pa->pa_id) != PCI_VENDOR_BIT3) 81 || (PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_BIT3_PCIVME617)) 82 return (0); 83 return (1); 84 } 85 86 static void 87 b3_617_attach(device_t parent, device_t self, void *aux) 88 { 89 struct b3_617_softc *sc = device_private(self); 90 struct pci_attach_args *pa = aux; 91 pci_chipset_tag_t pc = pa->pa_pc; 92 93 pci_intr_handle_t ih; 94 const char *intrstr; 95 struct vmebus_attach_args vaa; 96 char intrbuf[PCI_INTRSTR_LEN]; 97 98 sc->sc_dev = self; 99 sc->sc_pc = pc; 100 sc->sc_dmat = pa->pa_dmat; 101 102 pci_aprint_devinfo_fancy(pa, "VME bus adapter", "BIT3 PCI-VME 617", 1); 103 104 /* 105 * Map CSR and mapping table spaces. 106 * Don't map VME window; parts are mapped as needed to 107 * save kernel virtual memory space 108 */ 109 if (pci_mapreg_map(pa, 0x14, 110 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 111 0, &sc->csrt, &sc->csrh, NULL, NULL) && 112 pci_mapreg_map(pa, 0x10, 113 PCI_MAPREG_TYPE_IO, 114 0, &sc->csrt, &sc->csrh, NULL, NULL)) { 115 aprint_error_dev(self, "can't map CSR space\n"); 116 return; 117 } 118 119 if (pci_mapreg_map(pa, 0x18, 120 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 121 0, &sc->mapt, &sc->maph, NULL, NULL)) { 122 aprint_error_dev(self, "can't map map space\n"); 123 return; 124 } 125 126 if (pci_mapreg_info(pc, pa->pa_tag, 0x1c, 127 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 128 &sc->vmepbase, 0, 0)) { 129 aprint_error_dev(self, "can't get VME range\n"); 130 return; 131 } 132 sc->sc_vmet = pa->pa_memt; /* XXX needed for VME mappings */ 133 134 /* Map and establish the interrupt. */ 135 if (pci_intr_map(pa, &ih)) { 136 aprint_error_dev(sc->sc_dev, "couldn't map interrupt\n"); 137 return; 138 } 139 intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf)); 140 /* 141 * Use a low interrupt level (the lowest?). 142 * We will raise before calling a subdevice's handler. 143 */ 144 sc->sc_ih = pci_intr_establish_xname(pc, ih, IPL_BIO, b3_617_intr, sc, 145 device_xname(self)); 146 if (sc->sc_ih == NULL) { 147 aprint_error_dev(sc->sc_dev, "couldn't establish interrupt"); 148 if (intrstr != NULL) 149 aprint_error(" at %s", intrstr); 150 aprint_error("\n"); 151 return; 152 } 153 aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", intrstr); 154 155 if (b3_617_init(sc)) 156 return; 157 158 /* 159 * set up all the tags for use by VME devices 160 */ 161 sc->sc_vct.cookie = self; 162 sc->sc_vct.vct_probe = b3_617_vme_probe; 163 sc->sc_vct.vct_map = b3_617_map_vme; 164 sc->sc_vct.vct_unmap = b3_617_unmap_vme; 165 sc->sc_vct.vct_int_map = b3_617_map_vmeint; 166 sc->sc_vct.vct_int_establish = b3_617_establish_vmeint; 167 sc->sc_vct.vct_int_disestablish = b3_617_disestablish_vmeint; 168 sc->sc_vct.vct_dmamap_create = b3_617_dmamap_create; 169 sc->sc_vct.vct_dmamap_destroy = b3_617_dmamap_destroy; 170 sc->sc_vct.vct_dmamem_alloc = b3_617_dmamem_alloc; 171 sc->sc_vct.vct_dmamem_free = b3_617_dmamem_free; 172 173 vaa.va_vct = &(sc->sc_vct); 174 vaa.va_bdt = pa->pa_dmat; 175 vaa.va_slaveconfig = b3_617_slaveconfig; 176 177 sc->csrwindow.offset = -1; 178 sc->dmawindow24.offset = -1; 179 sc->dmawindow32.offset = -1; 180 config_found(self, &vaa, 0); 181 } 182 183 #ifdef notyet 184 static int 185 b3_617_detach(device_t dev) 186 { 187 struct b3_617_softc *sc = device_private(dev); 188 189 b3_617_halt(sc); 190 191 if (sc->sc_ih) 192 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 193 194 bus_space_unmap(sc->sc_bc, sc->csrbase, 32); 195 bus_space_unmap(sc->sc_bc, sc->mapbase, 64*1024); 196 197 return(0); 198 } 199 #endif 200 201 void 202 b3_617_slaveconfig(device_t dev, struct vme_attach_args *va) 203 { 204 struct b3_617_softc *sc = device_private(dev); 205 vme_chipset_tag_t vmect; 206 int i, res; 207 const char *name = 0; /* XXX gcc! */ 208 209 vmect = &sc->sc_vct; 210 if (!va) 211 goto freeit; 212 213 #ifdef DIAGNOSTIC 214 if (vmect != va->va_vct) 215 panic("pcivme_slaveconfig: chipset tag?"); 216 #endif 217 218 for (i = 0; i < va->numcfranges; i++) { 219 res = vme_space_alloc(vmect, va->r[i].offset, 220 va->r[i].size, va->r[i].am); 221 if (res) 222 panic("%s: can't alloc slave window %x/%x/%x", 223 device_xname(dev), va->r[i].offset, 224 va->r[i].size, va->r[i].am); 225 226 switch (va->r[i].am & VME_AM_ADRSIZEMASK) { 227 /* structure assignments! */ 228 case VME_AM_A16: 229 sc->csrwindow = va->r[i]; 230 name = "VME CSR"; 231 break; 232 case VME_AM_A24: 233 sc->dmawindow24 = va->r[i]; 234 name = "A24 DMA"; 235 break; 236 case VME_AM_A32: 237 sc->dmawindow32 = va->r[i]; 238 name = "A32 DMA"; 239 break; 240 } 241 printf("%s: %s window: %x-%x\n", device_xname(dev), 242 name, va->r[i].offset, 243 va->r[i].offset + va->r[i].size - 1); 244 } 245 return; 246 247 freeit: 248 if (sc->csrwindow.offset != -1) 249 vme_space_free(vmect, sc->csrwindow.offset, 250 sc->csrwindow.size, sc->csrwindow.am); 251 if (sc->dmawindow32.offset != -1) 252 vme_space_free(vmect, sc->dmawindow32.offset, 253 sc->dmawindow32.size, sc->dmawindow32.am); 254 if (sc->dmawindow24.offset != -1) 255 vme_space_free(vmect, sc->dmawindow24.offset, 256 sc->dmawindow24.size, sc->dmawindow24.am); 257 } 258 259 int 260 b3_617_reset(struct b3_617_softc *sc) 261 { 262 unsigned char status; 263 264 /* reset sequence, ch 5.2 */ 265 status = read_csr_byte(sc, LOC_STATUS); 266 if (status & LSR_NO_CONNECT) { 267 printf("%s: not connected\n", device_xname(sc->sc_dev)); 268 return (-1); 269 } 270 status = read_csr_byte(sc, REM_STATUS); /* discard */ 271 write_csr_byte(sc, LOC_CMD1, LC1_CLR_ERROR); 272 status = read_csr_byte(sc, LOC_STATUS); 273 if (status & LSR_CERROR_MASK) { 274 char sbuf[sizeof(BIT3_LSR_BITS) + 64]; 275 276 snprintb(sbuf, sizeof(sbuf), BIT3_LSR_BITS, status); 277 printf("%s: interface error, lsr=%s\n", device_xname(sc->sc_dev), 278 sbuf); 279 return (-1); 280 } 281 return (0); 282 } 283 284 int 285 b3_617_init(struct b3_617_softc *sc) 286 { 287 unsigned int i; 288 289 if (b3_617_reset(sc)) 290 return (-1); 291 292 /* all maps invalid */ 293 for (i = MR_PCI_VME; i < MR_PCI_VME + MR_PCI_VME_SIZE; i += 4) 294 write_mapmem(sc, i, MR_RAM_INVALID); 295 for (i = MR_VME_PCI; i < MR_VME_PCI + MR_VME_PCI_SIZE; i += 4) 296 write_mapmem(sc, i, MR_RAM_INVALID); 297 for (i = MR_DMA_PCI; i < MR_DMA_PCI + MR_DMA_PCI_SIZE; i += 4) 298 write_mapmem(sc, i, MR_RAM_INVALID); 299 300 /* 301 * set up scatter page allocation control 302 */ 303 sc->vmeext = extent_create("pcivme", MR_PCI_VME, 304 MR_PCI_VME + MR_PCI_VME_SIZE - 1, 305 sc->vmemap, sizeof(sc->vmemap), 306 EX_NOCOALESCE); 307 #if 0 308 sc->pciext = extent_create("vmepci", MR_VME_PCI, 309 MR_VME_PCI + MR_VME_PCI_SIZE - 1, 310 sc->pcimap, sizeof(sc->pcimap), 311 EX_NOCOALESCE); 312 sc->dmaext = extent_create("dmapci", MR_DMA_PCI, 313 MR_DMA_PCI + MR_DMA_PCI_SIZE - 1, 314 sc->dmamap, sizeof(sc->dmamap), 315 EX_NOCOALESCE); 316 #endif 317 318 /* 319 * init int handler queue, 320 * enable interrupts if PCI interrupt available 321 */ 322 TAILQ_INIT(&(sc->intrhdls)); 323 sc->strayintrs = 0; 324 325 if (sc->sc_ih) 326 write_csr_byte(sc, LOC_INT_CTRL, LIC_INT_ENABLE); 327 /* no error ints */ 328 write_csr_byte(sc, REM_CMD2, 0); /* enables VME IRQ */ 329 330 return (0); 331 } 332 333 #ifdef notyet /* for detach */ 334 void 335 b3_617_halt(struct b3_617_softc *sc) 336 { 337 /* 338 * because detach code checks for existence of children, 339 * all ressources (mappings, VME IRQs, DMA requests) 340 * should be deallocated at this point 341 */ 342 343 /* disable IRQ */ 344 write_csr_byte(sc, LOC_INT_CTRL, 0); 345 } 346 #endif 347 348 static void 349 b3_617_vmeintr(struct b3_617_softc *sc, unsigned char lstat) 350 { 351 int level; 352 353 for (level = 7; level >= 1; level--) { 354 unsigned char vector; 355 struct b3_617_vmeintrhand *ih; 356 int found; 357 358 if (!(lstat & (1 << level))) 359 continue; 360 361 write_csr_byte(sc, REM_CMD1, level); 362 vector = read_csr_byte(sc, REM_IACK); 363 364 found = 0; 365 366 for (ih = sc->intrhdls.tqh_first; ih; 367 ih = ih->ih_next.tqe_next) { 368 if ((ih->ih_level == level) && 369 ((ih->ih_vector == -1) || 370 (ih->ih_vector == vector))) { 371 int s, res; 372 /* 373 * We should raise the interrupt level 374 * to ih->ih_prior here. How to do this 375 * machine-independently? 376 * To be safe, raise to the maximum. 377 */ 378 s = splhigh(); 379 found |= (res = (*(ih->ih_fun))(ih->ih_arg)); 380 splx(s); 381 if (res) 382 ih->ih_count++; 383 if (res == 1) 384 break; 385 } 386 } 387 if (!found) 388 sc->strayintrs++; 389 } 390 } 391 392 #define sc ((struct b3_617_softc*)vsc) 393 394 int 395 b3_617_map_vme(void *vsc, vme_addr_t vmeaddr, vme_size_t len, vme_am_t am, vme_datasize_t datasizes, vme_swap_t swap, bus_space_tag_t *tag, bus_space_handle_t *handle, vme_mapresc_t *resc) 396 { 397 vme_addr_t vmebase, vmeend, va; 398 unsigned long maplen, first, i; 399 u_int32_t mapreg; 400 bus_addr_t pcibase; 401 int res; 402 struct b3_617_vmeresc *r; 403 404 /* first mapped address */ 405 vmebase = vmeaddr & ~(VME_PAGESIZE - 1); 406 /* base of last mapped page */ 407 vmeend = (vmeaddr + len - 1) & ~(VME_PAGESIZE - 1); 408 /* bytes in scatter table required */ 409 maplen = ((vmeend - vmebase) / VME_PAGESIZE + 1) * 4; 410 411 if (extent_alloc(sc->vmeext, maplen, 4, 0, EX_FAST, &first)) 412 return (ENOMEM); 413 414 /* 415 * set up adapter mapping registers 416 */ 417 mapreg = (am << MR_AMOD_SHIFT) | MR_FC_RRAM | swap; 418 419 for (i = first, va = vmebase; 420 i < first + maplen; 421 i += 4, va += VME_PAGESIZE) { 422 write_mapmem(sc, i, mapreg | va); 423 #ifdef BIT3DEBUG 424 printf("mapreg@%lx=%x\n", i, read_mapmem(sc, i)); 425 #endif 426 } 427 428 #ifdef DIAGNOSTIC 429 if (va != vmeend + VME_PAGESIZE) 430 panic("b3_617_map_pci_vme: botch"); 431 #endif 432 /* 433 * map needed range in PCI space 434 */ 435 pcibase = sc->vmepbase + (first - MR_PCI_VME) / 4 * VME_PAGESIZE 436 + (vmeaddr & (VME_PAGESIZE - 1)); 437 438 if ((res = bus_space_map(sc->sc_vmet, pcibase, len, 0, handle))) { 439 for (i = first; i < first + maplen; i += 4) 440 write_mapmem(sc, i, MR_RAM_INVALID); 441 extent_free(sc->vmeext, first, maplen, 0); 442 return (res); 443 } 444 445 *tag = sc->sc_vmet; 446 447 /* 448 * save all data needed for later unmapping 449 */ 450 r = malloc(sizeof(*r), M_DEVBUF, M_WAITOK); 451 r->handle = *handle; 452 r->len = len; 453 r->firstpage = first; 454 r->maplen = maplen; 455 *resc = r; 456 return (0); 457 } 458 459 void 460 b3_617_unmap_vme(void *vsc, vme_mapresc_t resc) 461 { 462 unsigned long i; 463 struct b3_617_vmeresc *r = resc; 464 465 /* unmap PCI window */ 466 bus_space_unmap(sc->sc_vmet, r->handle, r->len); 467 468 for (i = r->firstpage; i < r->firstpage + r->maplen; i += 4) 469 write_mapmem(sc, i, MR_RAM_INVALID); 470 471 extent_free(sc->vmeext, r->firstpage, r->maplen, 0); 472 473 free(r, M_DEVBUF); 474 } 475 476 int 477 b3_617_vme_probe(void *vsc, vme_addr_t addr, vme_size_t len, vme_am_t am, vme_datasize_t datasize, int (*callback)(void *, bus_space_tag_t, bus_space_handle_t), void *cbarg) 478 { 479 bus_space_tag_t tag; 480 bus_space_handle_t handle; 481 vme_mapresc_t resc; 482 int res, i; 483 volatile u_int32_t dummy; 484 int status; 485 486 res = b3_617_map_vme(vsc, addr, len, am, 0, 0, 487 &tag, &handle, &resc); 488 if (res) 489 return (res); 490 491 if (read_csr_byte(sc, LOC_STATUS) & LSR_ERROR_MASK) { 492 printf("b3_617_vme_badaddr: error bit not clean - resetting\n"); 493 write_csr_byte(sc, LOC_CMD1, LC1_CLR_ERROR); 494 } 495 496 if (callback) 497 res = (*callback)(cbarg, tag, handle); 498 else { 499 for (i = 0; i < len;) { 500 switch (datasize) { 501 case VME_D8: 502 dummy = bus_space_read_1(tag, handle, i); 503 i++; 504 break; 505 case VME_D16: 506 dummy = bus_space_read_2(tag, handle, i); 507 i += 2; 508 break; 509 case VME_D32: 510 dummy = bus_space_read_4(tag, handle, i); 511 i += 4; 512 break; 513 default: 514 panic("b3_617_vme_probe: invalid datasize %x", 515 datasize); 516 } 517 } 518 } 519 520 if ((status = read_csr_byte(sc, LOC_STATUS)) & LSR_ERROR_MASK) { 521 #ifdef BIT3DEBUG 522 printf("b3_617_vme_badaddr: caught error %x\n", status); 523 #endif 524 write_csr_byte(sc, LOC_CMD1, LC1_CLR_ERROR); 525 res = EIO; 526 } 527 528 b3_617_unmap_vme(vsc, resc); 529 return (res); 530 } 531 532 int 533 b3_617_map_vmeint(void *vsc, int level, int vector, vme_intr_handle_t *handlep) 534 { 535 if (!sc->sc_ih) { 536 printf("%s: b3_617_map_vmeint: no IRQ\n", 537 device_xname(sc->sc_dev)); 538 return (ENXIO); 539 } 540 /* 541 * We should check whether the interface can pass this interrupt 542 * level at all, but we don't know much about the jumper setting. 543 */ 544 *handlep = (void *)(long)((level << 8) | vector); /* XXX */ 545 return (0); 546 } 547 548 void * 549 b3_617_establish_vmeint(void *vsc, vme_intr_handle_t handle, int prior, int (*func)(void *), void *arg) 550 { 551 struct b3_617_vmeintrhand *ih; 552 long lv; 553 int s; 554 555 ih = malloc(sizeof *ih, M_DEVBUF, M_WAITOK); 556 557 lv = (long)handle; /* XXX */ 558 559 ih->ih_fun = func; 560 ih->ih_arg = arg; 561 ih->ih_level = lv >> 8; 562 ih->ih_vector = lv & 0xff; 563 ih->ih_prior = prior; 564 ih->ih_count = 0; 565 566 s = splhigh(); 567 TAILQ_INSERT_TAIL(&(sc->intrhdls), ih, ih_next); 568 splx(s); 569 570 return (ih); 571 } 572 573 void 574 b3_617_disestablish_vmeint(void *vsc, void *cookie) 575 { 576 struct b3_617_vmeintrhand *ih = cookie; 577 int s; 578 579 if (!ih) { 580 printf("b3_617_unmap_vmeint: NULL arg\n"); 581 return; 582 } 583 584 s = splhigh(); 585 TAILQ_REMOVE(&(sc->intrhdls), ih, ih_next); 586 splx(s); 587 588 free(ih, M_DEVBUF); 589 } 590 591 int 592 b3_617_intr(void *vsc) 593 { 594 int handled = 0; 595 596 /* follows ch. 5.5.5 (reordered for speed) */ 597 while (read_csr_byte(sc, LOC_INT_CTRL) & LIC_INT_PENDING) { 598 unsigned char lstat; 599 600 handled = 1; 601 602 /* no error interrupts! */ 603 604 lstat = read_csr_byte(sc, LDMA_CMD); 605 if ((lstat & LDC_DMA_DONE) && (lstat & LDC_DMA_INT_ENABLE)) { 606 /* DMA done indicator flag */ 607 write_csr_byte(sc, LDMA_CMD, lstat & (~LDC_DMA_DONE)); 608 #if 0 609 b3_617_cntlrdma_done(sc); 610 #endif 611 continue; 612 } 613 614 lstat = read_csr_byte(sc, LOC_INT_STATUS); 615 if (lstat & LIS_CINT_MASK) { 616 /* VME backplane interrupt, ch. 5.5.3 */ 617 b3_617_vmeintr(sc, lstat); 618 } 619 620 /* for now, ignore "mailbox interrupts" */ 621 622 lstat = read_csr_byte(sc, LOC_STATUS); 623 if (lstat & LSR_PR_STATUS) { 624 /* PR interrupt received from REMOTE */ 625 write_csr_byte(sc, LOC_CMD1, LC1_CLR_PR_INT); 626 continue; 627 } 628 629 lstat = read_csr_byte(sc, REM_STATUS); 630 if (lstat & RSR_PT_STATUS) { 631 /* PT interrupt is set */ 632 write_csr_byte(sc, REM_CMD1, RC1_CLR_PT_INT); 633 continue; 634 } 635 } 636 return (handled); 637 } 638 639 int 640 b3_617_dmamap_create(vsc, len, am, datasize, swap, 641 nsegs, segsz, bound, 642 flags, mapp) 643 void *vsc; 644 vme_size_t len; 645 vme_am_t am; 646 vme_datasize_t datasize; 647 vme_swap_t swap; 648 int nsegs; 649 vme_size_t segsz; 650 vme_addr_t bound; 651 int flags; 652 bus_dmamap_t *mapp; 653 { 654 return (EINVAL); 655 } 656 657 void 658 b3_617_dmamap_destroy(void *vsc, bus_dmamap_t map) 659 { 660 } 661 662 int 663 b3_617_dmamem_alloc(vsc, len, am, datasizes, swap, 664 segs, nsegs, rsegs, flags) 665 void *vsc; 666 vme_size_t len; 667 vme_am_t am; 668 vme_datasize_t datasizes; 669 vme_swap_t swap; 670 bus_dma_segment_t *segs; 671 int nsegs; 672 int *rsegs; 673 int flags; 674 { 675 return (EINVAL); 676 } 677 678 void 679 b3_617_dmamem_free(void *vsc, bus_dma_segment_t *segs, int nsegs) 680 { 681 } 682 683 #undef sc 684
Indexes created Wed Oct 01 12:09:54 GMT 2025