1 1.36 jdolecek /* $NetBSD: cac_pci.c,v 1.36 2018/12/09 11:14:01 jdolecek Exp $ */ 2 1.1 ad 3 1.1 ad /*- 4 1.1 ad * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 1.1 ad * All rights reserved. 6 1.1 ad * 7 1.1 ad * This code is derived from software contributed to The NetBSD Foundation 8 1.4 ad * by Andrew Doran. 9 1.1 ad * 10 1.1 ad * Redistribution and use in source and binary forms, with or without 11 1.1 ad * modification, are permitted provided that the following conditions 12 1.1 ad * are met: 13 1.1 ad * 1. Redistributions of source code must retain the above copyright 14 1.1 ad * notice, this list of conditions and the following disclaimer. 15 1.1 ad * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 ad * notice, this list of conditions and the following disclaimer in the 17 1.1 ad * documentation and/or other materials provided with the distribution. 18 1.1 ad * 19 1.1 ad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 ad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 ad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 ad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1 ad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 ad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 ad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 ad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 ad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 ad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 ad * POSSIBILITY OF SUCH DAMAGE. 30 1.1 ad */ 31 1.1 ad 32 1.1 ad /* 33 1.1 ad * PCI front-end for cac(4) driver. 34 1.1 ad */ 35 1.11 lukem 36 1.11 lukem #include <sys/cdefs.h> 37 1.36 jdolecek __KERNEL_RCSID(0, "$NetBSD: cac_pci.c,v 1.36 2018/12/09 11:14:01 jdolecek Exp $"); 38 1.1 ad 39 1.1 ad #include <sys/param.h> 40 1.1 ad #include <sys/systm.h> 41 1.1 ad #include <sys/kernel.h> 42 1.1 ad #include <sys/device.h> 43 1.1 ad #include <sys/queue.h> 44 1.35 pgoyette #include <sys/module.h> 45 1.1 ad 46 1.1 ad #include <machine/endian.h> 47 1.26 ad #include <sys/bus.h> 48 1.1 ad 49 1.1 ad #include <dev/pci/pcidevs.h> 50 1.1 ad #include <dev/pci/pcivar.h> 51 1.1 ad 52 1.1 ad #include <dev/ic/cacreg.h> 53 1.1 ad #include <dev/ic/cacvar.h> 54 1.1 ad 55 1.35 pgoyette #include "ioconf.h" 56 1.35 pgoyette 57 1.19 thorpej static struct cac_ccb *cac_pci_l0_completed(struct cac_softc *); 58 1.19 thorpej static int cac_pci_l0_fifo_full(struct cac_softc *); 59 1.19 thorpej static void cac_pci_l0_intr_enable(struct cac_softc *, int); 60 1.19 thorpej static int cac_pci_l0_intr_pending(struct cac_softc *); 61 1.19 thorpej static void cac_pci_l0_submit(struct cac_softc *, struct cac_ccb *); 62 1.1 ad 63 1.12 ad static const struct cac_linkage cac_pci_l0 = { 64 1.1 ad cac_pci_l0_completed, 65 1.5 ad cac_pci_l0_fifo_full, 66 1.5 ad cac_pci_l0_intr_enable, 67 1.1 ad cac_pci_l0_intr_pending, 68 1.5 ad cac_pci_l0_submit 69 1.1 ad }; 70 1.1 ad 71 1.8 ad #define CT_STARTFW 0x01 /* Need to start controller firmware */ 72 1.1 ad 73 1.21 christos static struct cac_pci_type { 74 1.5 ad int ct_subsysid; 75 1.5 ad int ct_flags; 76 1.12 ad const struct cac_linkage *ct_linkage; 77 1.12 ad const char *ct_typestr; 78 1.21 christos } const cac_pci_type[] = { 79 1.5 ad { 0x40300e11, 0, &cac_l0, "SMART-2/P" }, 80 1.5 ad { 0x40310e11, 0, &cac_l0, "SMART-2SL" }, 81 1.5 ad { 0x40320e11, 0, &cac_l0, "Smart Array 3200" }, 82 1.5 ad { 0x40330e11, 0, &cac_l0, "Smart Array 3100ES" }, 83 1.5 ad { 0x40340e11, 0, &cac_l0, "Smart Array 221" }, 84 1.5 ad { 0x40400e11, CT_STARTFW, &cac_pci_l0, "Integrated Array" }, 85 1.5 ad { 0x40480e11, CT_STARTFW, &cac_pci_l0, "RAID LC2" }, 86 1.5 ad { 0x40500e11, 0, &cac_pci_l0, "Smart Array 4200" }, 87 1.5 ad { 0x40510e11, 0, &cac_pci_l0, "Smart Array 4200ES" }, 88 1.5 ad { 0x40580e11, 0, &cac_pci_l0, "Smart Array 431" }, 89 1.1 ad }; 90 1.1 ad 91 1.21 christos static struct cac_pci_product { 92 1.8 ad u_short cp_vendor; 93 1.8 ad u_short cp_product; 94 1.21 christos } const cac_pci_product[] = { 95 1.8 ad { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_SMART2P }, 96 1.13 augustss { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21554 }, 97 1.8 ad { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1510 }, 98 1.8 ad }; 99 1.8 ad 100 1.19 thorpej static const struct cac_pci_type * 101 1.8 ad cac_pci_findtype(struct pci_attach_args *pa) 102 1.8 ad { 103 1.12 ad const struct cac_pci_type *ct; 104 1.12 ad const struct cac_pci_product *cp; 105 1.8 ad pcireg_t subsysid; 106 1.8 ad int i; 107 1.8 ad 108 1.8 ad cp = cac_pci_product; 109 1.8 ad i = 0; 110 1.8 ad while (i < sizeof(cac_pci_product) / sizeof(cac_pci_product[0])) { 111 1.18 perry if (PCI_VENDOR(pa->pa_id) == cp->cp_vendor && 112 1.8 ad PCI_PRODUCT(pa->pa_id) == cp->cp_product) 113 1.8 ad break; 114 1.8 ad cp++; 115 1.8 ad i++; 116 1.8 ad } 117 1.8 ad if (i == sizeof(cac_pci_product) / sizeof(cac_pci_product[0])) 118 1.8 ad return (NULL); 119 1.8 ad 120 1.8 ad subsysid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 121 1.8 ad ct = cac_pci_type; 122 1.8 ad i = 0; 123 1.8 ad while (i < sizeof(cac_pci_type) / sizeof(cac_pci_type[0])) { 124 1.8 ad if (subsysid == ct->ct_subsysid) 125 1.8 ad break; 126 1.8 ad ct++; 127 1.8 ad i++; 128 1.8 ad } 129 1.8 ad if (i == sizeof(cac_pci_type) / sizeof(cac_pci_type[0])) 130 1.8 ad return (NULL); 131 1.8 ad 132 1.8 ad return (ct); 133 1.8 ad } 134 1.8 ad 135 1.19 thorpej static int 136 1.30 cegger cac_pci_match(device_t parent, cfdata_t match, void *aux) 137 1.1 ad { 138 1.3 ad 139 1.8 ad return (cac_pci_findtype(aux) != NULL); 140 1.1 ad } 141 1.1 ad 142 1.19 thorpej static void 143 1.30 cegger cac_pci_attach(device_t parent, device_t self, void *aux) 144 1.1 ad { 145 1.1 ad struct pci_attach_args *pa; 146 1.12 ad const struct cac_pci_type *ct; 147 1.1 ad struct cac_softc *sc; 148 1.1 ad pci_chipset_tag_t pc; 149 1.1 ad pci_intr_handle_t ih; 150 1.1 ad const char *intrstr; 151 1.10 ad pcireg_t reg; 152 1.10 ad int memr, ior, i; 153 1.34 christos char intrbuf[PCI_INTRSTR_LEN]; 154 1.5 ad 155 1.17 thorpej aprint_naive(": RAID controller\n"); 156 1.17 thorpej 157 1.31 cegger sc = device_private(self); 158 1.33 chs sc->sc_dev = self; 159 1.1 ad pa = (struct pci_attach_args *)aux; 160 1.1 ad pc = pa->pa_pc; 161 1.8 ad ct = cac_pci_findtype(pa); 162 1.1 ad 163 1.10 ad /* 164 1.10 ad * Map the PCI register window. 165 1.10 ad */ 166 1.10 ad memr = -1; 167 1.10 ad ior = -1; 168 1.10 ad 169 1.10 ad for (i = 0x10; i <= 0x14; i += 4) { 170 1.10 ad reg = pci_conf_read(pa->pa_pc, pa->pa_tag, i); 171 1.10 ad 172 1.10 ad if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_IO) { 173 1.10 ad if (ior == -1 && PCI_MAPREG_IO_SIZE(reg) != 0) 174 1.10 ad ior = i; 175 1.10 ad } else { 176 1.10 ad if (memr == -1 && PCI_MAPREG_MEM_SIZE(reg) != 0) 177 1.10 ad memr = i; 178 1.2 ad } 179 1.10 ad } 180 1.10 ad 181 1.10 ad if (memr != -1) { 182 1.10 ad if (pci_mapreg_map(pa, memr, PCI_MAPREG_TYPE_MEM, 0, 183 1.10 ad &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) 184 1.10 ad memr = -1; 185 1.10 ad else 186 1.10 ad ior = -1; 187 1.10 ad } 188 1.10 ad if (ior != -1) 189 1.10 ad if (pci_mapreg_map(pa, ior, PCI_MAPREG_TYPE_IO, 0, 190 1.10 ad &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) 191 1.10 ad ior = -1; 192 1.10 ad if (memr == -1 && ior == -1) { 193 1.27 cegger aprint_error_dev(self, "can't map i/o or memory space\n"); 194 1.10 ad return; 195 1.10 ad } 196 1.5 ad 197 1.1 ad sc->sc_dmat = pa->pa_dmat; 198 1.1 ad 199 1.1 ad /* Enable the device. */ 200 1.10 ad reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 201 1.1 ad pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 202 1.10 ad reg | PCI_COMMAND_MASTER_ENABLE); 203 1.1 ad 204 1.1 ad /* Map and establish the interrupt. */ 205 1.9 sommerfe if (pci_intr_map(pa, &ih)) { 206 1.17 thorpej aprint_error("can't map interrupt\n"); 207 1.1 ad return; 208 1.1 ad } 209 1.34 christos intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf)); 210 1.36 jdolecek sc->sc_ih = pci_intr_establish_xname(pc, ih, IPL_BIO, cac_intr, sc, 211 1.36 jdolecek device_xname(self)); 212 1.1 ad if (sc->sc_ih == NULL) { 213 1.17 thorpej aprint_error("can't establish interrupt"); 214 1.1 ad if (intrstr != NULL) 215 1.32 njoly aprint_error(" at %s", intrstr); 216 1.32 njoly aprint_error("\n"); 217 1.1 ad return; 218 1.1 ad } 219 1.1 ad 220 1.17 thorpej aprint_normal(": Compaq %s\n", ct->ct_typestr); 221 1.5 ad 222 1.5 ad /* Now attach to the bus-independent code. */ 223 1.12 ad memcpy(&sc->sc_cl, ct->ct_linkage, sizeof(sc->sc_cl)); 224 1.8 ad cac_init(sc, intrstr, (ct->ct_flags & CT_STARTFW) != 0); 225 1.1 ad } 226 1.1 ad 227 1.35 pgoyette CFATTACH_DECL3_NEW(cac_pci, sizeof(struct cac_softc), 228 1.35 pgoyette cac_pci_match, cac_pci_attach, NULL, NULL, cac_rescan, NULL, 0); 229 1.19 thorpej 230 1.19 thorpej static void 231 1.5 ad cac_pci_l0_submit(struct cac_softc *sc, struct cac_ccb *ccb) 232 1.1 ad { 233 1.1 ad 234 1.25 christos bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 235 1.25 christos (char *)ccb - (char *)sc->sc_ccbs, 236 1.5 ad sizeof(struct cac_ccb), BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 237 1.5 ad cac_outl(sc, CAC_42REG_CMD_FIFO, ccb->ccb_paddr); 238 1.1 ad } 239 1.1 ad 240 1.19 thorpej static struct cac_ccb * 241 1.5 ad cac_pci_l0_completed(struct cac_softc *sc) 242 1.1 ad { 243 1.5 ad struct cac_ccb *ccb; 244 1.5 ad u_int32_t off; 245 1.1 ad 246 1.5 ad if ((off = cac_inl(sc, CAC_42REG_DONE_FIFO)) == 0xffffffffU) 247 1.12 ad return (NULL); 248 1.1 ad 249 1.18 perry cac_outl(sc, CAC_42REG_DONE_FIFO, 0); 250 1.12 ad 251 1.12 ad if ((off & 3) != 0) 252 1.12 ad printf("%s: failed command list returned: %lx\n", 253 1.33 chs device_xname(sc->sc_dev), (long)off); 254 1.12 ad 255 1.5 ad off = (off & ~3) - sc->sc_ccbs_paddr; 256 1.25 christos ccb = (struct cac_ccb *)((char *)sc->sc_ccbs + off); 257 1.1 ad 258 1.5 ad bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, off, sizeof(struct cac_ccb), 259 1.5 ad BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 260 1.1 ad 261 1.24 ad if ((off & 3) != 0 && ccb->ccb_req.error == 0) 262 1.24 ad ccb->ccb_req.error = CAC_RET_CMD_REJECTED; 263 1.24 ad 264 1.5 ad return (ccb); 265 1.1 ad } 266 1.1 ad 267 1.19 thorpej static int 268 1.5 ad cac_pci_l0_intr_pending(struct cac_softc *sc) 269 1.1 ad { 270 1.1 ad 271 1.10 ad return ((cac_inl(sc, CAC_42REG_STATUS) & CAC_42_EXTINT) != 0); 272 1.1 ad } 273 1.1 ad 274 1.19 thorpej static void 275 1.5 ad cac_pci_l0_intr_enable(struct cac_softc *sc, int state) 276 1.1 ad { 277 1.1 ad 278 1.6 ad cac_outl(sc, CAC_42REG_INTR_MASK, (state ? 0 : 8)); /* XXX */ 279 1.1 ad } 280 1.1 ad 281 1.19 thorpej static int 282 1.5 ad cac_pci_l0_fifo_full(struct cac_softc *sc) 283 1.1 ad { 284 1.1 ad 285 1.10 ad return (cac_inl(sc, CAC_42REG_CMD_FIFO) != 0); 286 1.1 ad } 287 1.35 pgoyette 288 1.35 pgoyette MODULE(MODULE_CLASS_DRIVER, cac_pci, "cac,pci"); 289 1.35 pgoyette 290 1.35 pgoyette #ifdef _MODULE 291 1.35 pgoyette /* 292 1.35 pgoyette * XXX Don't allow ioconf.c to redefine the "struct cfdriver ld_cd" 293 1.35 pgoyette * XXX it will be defined in the common-code module 294 1.35 pgoyette */ 295 1.35 pgoyette #undef CFDRIVER_DECL 296 1.35 pgoyette #define CFDRIVER_DECL(name, class, attr) 297 1.35 pgoyette #include "ioconf.c" 298 1.35 pgoyette #endif 299 1.35 pgoyette 300 1.35 pgoyette static int 301 1.35 pgoyette cac_pci_modcmd(modcmd_t cmd, void *opaque) 302 1.35 pgoyette { 303 1.35 pgoyette int error = 0; 304 1.35 pgoyette 305 1.35 pgoyette #ifdef _MODULE 306 1.35 pgoyette switch (cmd) { 307 1.35 pgoyette case MODULE_CMD_INIT: 308 1.35 pgoyette /* 309 1.35 pgoyette * We skip over the first entry in cfdriver[] array 310 1.35 pgoyette * since the cfdriver is attached by the common 311 1.35 pgoyette * (non-attachment-specific) code. 312 1.35 pgoyette */ 313 1.35 pgoyette error = config_init_component(&cfdriver_ioconf_cac_pci[1], 314 1.35 pgoyette cfattach_ioconf_cac_pci, cfdata_ioconf_cac_pci); 315 1.35 pgoyette break; 316 1.35 pgoyette case MODULE_CMD_FINI: 317 1.35 pgoyette error = config_fini_component(&cfdriver_ioconf_cac_pci[1], 318 1.35 pgoyette cfattach_ioconf_cac_pci, cfdata_ioconf_cac_pci); 319 1.35 pgoyette break; 320 1.35 pgoyette default: 321 1.35 pgoyette error = ENOTTY; 322 1.35 pgoyette break; 323 1.35 pgoyette } 324 1.35 pgoyette #endif 325 1.35 pgoyette 326 1.35 pgoyette return error; 327 1.35 pgoyette } 328