cac_pci.c revision 1.10 1 1.10 ad /* $NetBSD: cac_pci.c,v 1.10 2001/01/10 16:48:04 ad Exp $ */
2 1.1 ad
3 1.1 ad /*-
4 1.1 ad * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 1.1 ad * All rights reserved.
6 1.1 ad *
7 1.1 ad * This code is derived from software contributed to The NetBSD Foundation
8 1.4 ad * by Andrew Doran.
9 1.1 ad *
10 1.1 ad * Redistribution and use in source and binary forms, with or without
11 1.1 ad * modification, are permitted provided that the following conditions
12 1.1 ad * are met:
13 1.1 ad * 1. Redistributions of source code must retain the above copyright
14 1.1 ad * notice, this list of conditions and the following disclaimer.
15 1.1 ad * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 ad * notice, this list of conditions and the following disclaimer in the
17 1.1 ad * documentation and/or other materials provided with the distribution.
18 1.1 ad * 3. All advertising materials mentioning features or use of this software
19 1.1 ad * must display the following acknowledgement:
20 1.1 ad * This product includes software developed by the NetBSD
21 1.1 ad * Foundation, Inc. and its contributors.
22 1.1 ad * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 ad * contributors may be used to endorse or promote products derived
24 1.1 ad * from this software without specific prior written permission.
25 1.1 ad *
26 1.1 ad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 ad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 ad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 ad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 ad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 ad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 ad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 ad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 ad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 ad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 ad * POSSIBILITY OF SUCH DAMAGE.
37 1.1 ad */
38 1.1 ad
39 1.1 ad /*
40 1.1 ad * PCI front-end for cac(4) driver.
41 1.1 ad */
42 1.1 ad
43 1.1 ad #include <sys/param.h>
44 1.1 ad #include <sys/systm.h>
45 1.1 ad #include <sys/kernel.h>
46 1.1 ad #include <sys/device.h>
47 1.1 ad #include <sys/queue.h>
48 1.1 ad
49 1.1 ad #include <machine/endian.h>
50 1.1 ad #include <machine/bus.h>
51 1.1 ad
52 1.1 ad #include <dev/pci/pcidevs.h>
53 1.1 ad #include <dev/pci/pcivar.h>
54 1.1 ad
55 1.1 ad #include <dev/ic/cacreg.h>
56 1.1 ad #include <dev/ic/cacvar.h>
57 1.1 ad
58 1.5 ad static void cac_pci_attach(struct device *, struct device *, void *);
59 1.8 ad static struct cac_pci_type *cac_pci_findtype(struct pci_attach_args *);
60 1.5 ad static int cac_pci_match(struct device *, struct cfdata *, void *);
61 1.1 ad
62 1.5 ad static struct cac_ccb *cac_pci_l0_completed(struct cac_softc *);
63 1.5 ad static int cac_pci_l0_fifo_full(struct cac_softc *);
64 1.5 ad static void cac_pci_l0_intr_enable(struct cac_softc *, int);
65 1.5 ad static int cac_pci_l0_intr_pending(struct cac_softc *);
66 1.5 ad static void cac_pci_l0_submit(struct cac_softc *, struct cac_ccb *);
67 1.1 ad
68 1.1 ad struct cfattach cac_pci_ca = {
69 1.1 ad sizeof(struct cac_softc), cac_pci_match, cac_pci_attach
70 1.1 ad };
71 1.1 ad
72 1.1 ad static struct cac_linkage cac_pci_l0 = {
73 1.1 ad cac_pci_l0_completed,
74 1.5 ad cac_pci_l0_fifo_full,
75 1.5 ad cac_pci_l0_intr_enable,
76 1.1 ad cac_pci_l0_intr_pending,
77 1.5 ad cac_pci_l0_submit
78 1.1 ad };
79 1.1 ad
80 1.8 ad #define CT_STARTFW 0x01 /* Need to start controller firmware */
81 1.1 ad
82 1.5 ad struct cac_pci_type {
83 1.5 ad int ct_subsysid;
84 1.5 ad int ct_flags;
85 1.5 ad struct cac_linkage *ct_linkage;
86 1.5 ad char *ct_typestr;
87 1.5 ad } static cac_pci_type[] = {
88 1.5 ad { 0x40300e11, 0, &cac_l0, "SMART-2/P" },
89 1.5 ad { 0x40310e11, 0, &cac_l0, "SMART-2SL" },
90 1.5 ad { 0x40320e11, 0, &cac_l0, "Smart Array 3200" },
91 1.5 ad { 0x40330e11, 0, &cac_l0, "Smart Array 3100ES" },
92 1.5 ad { 0x40340e11, 0, &cac_l0, "Smart Array 221" },
93 1.5 ad { 0x40400e11, CT_STARTFW, &cac_pci_l0, "Integrated Array" },
94 1.5 ad { 0x40480e11, CT_STARTFW, &cac_pci_l0, "RAID LC2" },
95 1.5 ad { 0x40500e11, 0, &cac_pci_l0, "Smart Array 4200" },
96 1.5 ad { 0x40510e11, 0, &cac_pci_l0, "Smart Array 4200ES" },
97 1.5 ad { 0x40580e11, 0, &cac_pci_l0, "Smart Array 431" },
98 1.1 ad };
99 1.1 ad
100 1.8 ad struct cac_pci_product {
101 1.8 ad u_short cp_vendor;
102 1.8 ad u_short cp_product;
103 1.8 ad } static cac_pci_product[] = {
104 1.8 ad { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_SMART2P },
105 1.8 ad { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_CPQ42XX },
106 1.8 ad { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1510 },
107 1.8 ad };
108 1.8 ad
109 1.8 ad static struct cac_pci_type *
110 1.8 ad cac_pci_findtype(struct pci_attach_args *pa)
111 1.8 ad {
112 1.8 ad struct cac_pci_type *ct;
113 1.8 ad struct cac_pci_product *cp;
114 1.8 ad pcireg_t subsysid;
115 1.8 ad int i;
116 1.8 ad
117 1.8 ad cp = cac_pci_product;
118 1.8 ad i = 0;
119 1.8 ad while (i < sizeof(cac_pci_product) / sizeof(cac_pci_product[0])) {
120 1.8 ad if (PCI_VENDOR(pa->pa_id) == cp->cp_vendor &&
121 1.8 ad PCI_PRODUCT(pa->pa_id) == cp->cp_product)
122 1.8 ad break;
123 1.8 ad cp++;
124 1.8 ad i++;
125 1.8 ad }
126 1.8 ad if (i == sizeof(cac_pci_product) / sizeof(cac_pci_product[0]))
127 1.8 ad return (NULL);
128 1.8 ad
129 1.8 ad subsysid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
130 1.8 ad ct = cac_pci_type;
131 1.8 ad i = 0;
132 1.8 ad while (i < sizeof(cac_pci_type) / sizeof(cac_pci_type[0])) {
133 1.8 ad if (subsysid == ct->ct_subsysid)
134 1.8 ad break;
135 1.8 ad ct++;
136 1.8 ad i++;
137 1.8 ad }
138 1.8 ad if (i == sizeof(cac_pci_type) / sizeof(cac_pci_type[0]))
139 1.8 ad return (NULL);
140 1.8 ad
141 1.8 ad return (ct);
142 1.8 ad }
143 1.8 ad
144 1.1 ad static int
145 1.5 ad cac_pci_match(struct device *parent, struct cfdata *match, void *aux)
146 1.1 ad {
147 1.3 ad
148 1.8 ad return (cac_pci_findtype(aux) != NULL);
149 1.1 ad }
150 1.1 ad
151 1.1 ad static void
152 1.5 ad cac_pci_attach(struct device *parent, struct device *self, void *aux)
153 1.1 ad {
154 1.1 ad struct pci_attach_args *pa;
155 1.5 ad struct cac_pci_type *ct;
156 1.1 ad struct cac_softc *sc;
157 1.1 ad pci_chipset_tag_t pc;
158 1.1 ad pci_intr_handle_t ih;
159 1.1 ad const char *intrstr;
160 1.10 ad pcireg_t reg;
161 1.10 ad int memr, ior, i;
162 1.5 ad
163 1.1 ad sc = (struct cac_softc *)self;
164 1.1 ad pa = (struct pci_attach_args *)aux;
165 1.1 ad pc = pa->pa_pc;
166 1.8 ad ct = cac_pci_findtype(pa);
167 1.1 ad
168 1.10 ad /*
169 1.10 ad * Map the PCI register window.
170 1.10 ad */
171 1.10 ad memr = -1;
172 1.10 ad ior = -1;
173 1.10 ad
174 1.10 ad for (i = 0x10; i <= 0x14; i += 4) {
175 1.10 ad reg = pci_conf_read(pa->pa_pc, pa->pa_tag, i);
176 1.10 ad
177 1.10 ad if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_IO) {
178 1.10 ad if (ior == -1 && PCI_MAPREG_IO_SIZE(reg) != 0)
179 1.10 ad ior = i;
180 1.10 ad } else {
181 1.10 ad if (memr == -1 && PCI_MAPREG_MEM_SIZE(reg) != 0)
182 1.10 ad memr = i;
183 1.2 ad }
184 1.10 ad }
185 1.10 ad
186 1.10 ad if (memr != -1) {
187 1.10 ad if (pci_mapreg_map(pa, memr, PCI_MAPREG_TYPE_MEM, 0,
188 1.10 ad &sc->sc_iot, &sc->sc_ioh, NULL, NULL))
189 1.10 ad memr = -1;
190 1.10 ad else
191 1.10 ad ior = -1;
192 1.10 ad }
193 1.10 ad if (ior != -1)
194 1.10 ad if (pci_mapreg_map(pa, ior, PCI_MAPREG_TYPE_IO, 0,
195 1.10 ad &sc->sc_iot, &sc->sc_ioh, NULL, NULL))
196 1.10 ad ior = -1;
197 1.10 ad if (memr == -1 && ior == -1) {
198 1.10 ad printf("%s: can't map i/o or memory space\n", self->dv_xname);
199 1.10 ad return;
200 1.10 ad }
201 1.5 ad
202 1.1 ad sc->sc_dmat = pa->pa_dmat;
203 1.1 ad
204 1.1 ad /* Enable the device. */
205 1.10 ad reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
206 1.1 ad pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
207 1.10 ad reg | PCI_COMMAND_MASTER_ENABLE);
208 1.1 ad
209 1.1 ad /* Map and establish the interrupt. */
210 1.9 sommerfe if (pci_intr_map(pa, &ih)) {
211 1.1 ad printf("can't map interrupt\n");
212 1.1 ad return;
213 1.1 ad }
214 1.1 ad intrstr = pci_intr_string(pc, ih);
215 1.1 ad sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, cac_intr, sc);
216 1.1 ad if (sc->sc_ih == NULL) {
217 1.1 ad printf("can't establish interrupt");
218 1.1 ad if (intrstr != NULL)
219 1.1 ad printf(" at %s", intrstr);
220 1.1 ad printf("\n");
221 1.1 ad return;
222 1.1 ad }
223 1.1 ad
224 1.8 ad printf(": Compaq %s\n", ct->ct_typestr);
225 1.5 ad
226 1.5 ad /* Now attach to the bus-independent code. */
227 1.2 ad sc->sc_cl = ct->ct_linkage;
228 1.8 ad cac_init(sc, intrstr, (ct->ct_flags & CT_STARTFW) != 0);
229 1.1 ad }
230 1.1 ad
231 1.1 ad static void
232 1.5 ad cac_pci_l0_submit(struct cac_softc *sc, struct cac_ccb *ccb)
233 1.1 ad {
234 1.1 ad
235 1.5 ad bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, (caddr_t)ccb - sc->sc_ccbs,
236 1.5 ad sizeof(struct cac_ccb), BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
237 1.5 ad cac_outl(sc, CAC_42REG_CMD_FIFO, ccb->ccb_paddr);
238 1.1 ad }
239 1.1 ad
240 1.5 ad static struct cac_ccb *
241 1.5 ad cac_pci_l0_completed(struct cac_softc *sc)
242 1.1 ad {
243 1.5 ad struct cac_ccb *ccb;
244 1.5 ad u_int32_t off;
245 1.1 ad
246 1.5 ad if ((off = cac_inl(sc, CAC_42REG_DONE_FIFO)) == 0xffffffffU)
247 1.5 ad return (0);
248 1.1 ad
249 1.5 ad cac_outl(sc, CAC_42REG_DONE_FIFO, 0);
250 1.5 ad off = (off & ~3) - sc->sc_ccbs_paddr;
251 1.5 ad ccb = (struct cac_ccb *)(sc->sc_ccbs + off);
252 1.1 ad
253 1.5 ad bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, off, sizeof(struct cac_ccb),
254 1.5 ad BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
255 1.1 ad
256 1.5 ad return (ccb);
257 1.1 ad }
258 1.1 ad
259 1.1 ad static int
260 1.5 ad cac_pci_l0_intr_pending(struct cac_softc *sc)
261 1.1 ad {
262 1.1 ad
263 1.10 ad return ((cac_inl(sc, CAC_42REG_STATUS) & CAC_42_EXTINT) != 0);
264 1.1 ad }
265 1.1 ad
266 1.1 ad static void
267 1.5 ad cac_pci_l0_intr_enable(struct cac_softc *sc, int state)
268 1.1 ad {
269 1.1 ad
270 1.6 ad cac_outl(sc, CAC_42REG_INTR_MASK, (state ? 0 : 8)); /* XXX */
271 1.1 ad }
272 1.1 ad
273 1.1 ad static int
274 1.5 ad cac_pci_l0_fifo_full(struct cac_softc *sc)
275 1.1 ad {
276 1.1 ad
277 1.10 ad return (cac_inl(sc, CAC_42REG_CMD_FIFO) != 0);
278 1.1 ad }
279