cac_pci.c revision 1.4.2.1 1 1.4.2.1 he /* $NetBSD: cac_pci.c,v 1.4.2.1 2001/10/25 18:01:54 he Exp $ */
2 1.1 ad
3 1.1 ad /*-
4 1.1 ad * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 1.1 ad * All rights reserved.
6 1.1 ad *
7 1.1 ad * This code is derived from software contributed to The NetBSD Foundation
8 1.4 ad * by Andrew Doran.
9 1.1 ad *
10 1.1 ad * Redistribution and use in source and binary forms, with or without
11 1.1 ad * modification, are permitted provided that the following conditions
12 1.1 ad * are met:
13 1.1 ad * 1. Redistributions of source code must retain the above copyright
14 1.1 ad * notice, this list of conditions and the following disclaimer.
15 1.1 ad * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 ad * notice, this list of conditions and the following disclaimer in the
17 1.1 ad * documentation and/or other materials provided with the distribution.
18 1.1 ad * 3. All advertising materials mentioning features or use of this software
19 1.1 ad * must display the following acknowledgement:
20 1.1 ad * This product includes software developed by the NetBSD
21 1.1 ad * Foundation, Inc. and its contributors.
22 1.1 ad * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 ad * contributors may be used to endorse or promote products derived
24 1.1 ad * from this software without specific prior written permission.
25 1.1 ad *
26 1.1 ad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 ad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 ad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 ad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 ad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 ad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 ad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 ad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 ad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 ad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 ad * POSSIBILITY OF SUCH DAMAGE.
37 1.1 ad */
38 1.1 ad
39 1.1 ad /*
40 1.1 ad * PCI front-end for cac(4) driver.
41 1.1 ad */
42 1.1 ad
43 1.1 ad #include <sys/param.h>
44 1.1 ad #include <sys/systm.h>
45 1.1 ad #include <sys/kernel.h>
46 1.1 ad #include <sys/device.h>
47 1.1 ad #include <sys/queue.h>
48 1.1 ad
49 1.1 ad #include <machine/endian.h>
50 1.1 ad #include <machine/bus.h>
51 1.1 ad
52 1.1 ad #include <dev/pci/pcidevs.h>
53 1.1 ad #include <dev/pci/pcivar.h>
54 1.1 ad
55 1.1 ad #include <dev/ic/cacreg.h>
56 1.1 ad #include <dev/ic/cacvar.h>
57 1.1 ad
58 1.4.2.1 he static void cac_pci_attach(struct device *, struct device *, void *);
59 1.4.2.1 he static struct cac_pci_type *cac_pci_findtype(struct pci_attach_args *);
60 1.4.2.1 he static int cac_pci_match(struct device *, struct cfdata *, void *);
61 1.4.2.1 he
62 1.4.2.1 he static struct cac_ccb *cac_pci_l0_completed(struct cac_softc *);
63 1.4.2.1 he static int cac_pci_l0_fifo_full(struct cac_softc *);
64 1.4.2.1 he static void cac_pci_l0_intr_enable(struct cac_softc *, int);
65 1.4.2.1 he static int cac_pci_l0_intr_pending(struct cac_softc *);
66 1.4.2.1 he static void cac_pci_l0_submit(struct cac_softc *, struct cac_ccb *);
67 1.1 ad
68 1.1 ad struct cfattach cac_pci_ca = {
69 1.1 ad sizeof(struct cac_softc), cac_pci_match, cac_pci_attach
70 1.1 ad };
71 1.1 ad
72 1.1 ad static struct cac_linkage cac_pci_l0 = {
73 1.1 ad cac_pci_l0_completed,
74 1.4.2.1 he cac_pci_l0_fifo_full,
75 1.1 ad cac_pci_l0_intr_enable,
76 1.4.2.1 he cac_pci_l0_intr_pending,
77 1.4.2.1 he cac_pci_l0_submit
78 1.1 ad };
79 1.1 ad
80 1.4.2.1 he #define CT_STARTFW 0x01 /* Need to start controller firmware */
81 1.4.2.1 he
82 1.4.2.1 he struct cac_pci_type {
83 1.4.2.1 he int ct_subsysid;
84 1.4.2.1 he int ct_flags;
85 1.4.2.1 he struct cac_linkage *ct_linkage;
86 1.4.2.1 he char *ct_typestr;
87 1.4.2.1 he } static cac_pci_type[] = {
88 1.4.2.1 he { 0x40300e11, 0, &cac_l0, "SMART-2/P" },
89 1.4.2.1 he { 0x40310e11, 0, &cac_l0, "SMART-2SL" },
90 1.4.2.1 he { 0x40320e11, 0, &cac_l0, "Smart Array 3200" },
91 1.4.2.1 he { 0x40330e11, 0, &cac_l0, "Smart Array 3100ES" },
92 1.4.2.1 he { 0x40340e11, 0, &cac_l0, "Smart Array 221" },
93 1.4.2.1 he { 0x40400e11, CT_STARTFW, &cac_pci_l0, "Integrated Array" },
94 1.4.2.1 he { 0x40480e11, CT_STARTFW, &cac_pci_l0, "RAID LC2" },
95 1.4.2.1 he { 0x40500e11, 0, &cac_pci_l0, "Smart Array 4200" },
96 1.4.2.1 he { 0x40510e11, 0, &cac_pci_l0, "Smart Array 4200ES" },
97 1.4.2.1 he { 0x40580e11, 0, &cac_pci_l0, "Smart Array 431" },
98 1.1 ad };
99 1.1 ad
100 1.4.2.1 he struct cac_pci_product {
101 1.4.2.1 he u_short cp_vendor;
102 1.4.2.1 he u_short cp_product;
103 1.4.2.1 he } static cac_pci_product[] = {
104 1.4.2.1 he { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_SMART2P },
105 1.4.2.1 he { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_CPQ42XX },
106 1.4.2.1 he { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1510 },
107 1.1 ad };
108 1.1 ad
109 1.4.2.1 he static struct cac_pci_type *
110 1.4.2.1 he cac_pci_findtype(struct pci_attach_args *pa)
111 1.1 ad {
112 1.4.2.1 he struct cac_pci_type *ct;
113 1.4.2.1 he struct cac_pci_product *cp;
114 1.4.2.1 he pcireg_t subsysid;
115 1.4.2.1 he int i;
116 1.4.2.1 he
117 1.4.2.1 he cp = cac_pci_product;
118 1.4.2.1 he i = 0;
119 1.4.2.1 he while (i < sizeof(cac_pci_product) / sizeof(cac_pci_product[0])) {
120 1.4.2.1 he if (PCI_VENDOR(pa->pa_id) == cp->cp_vendor &&
121 1.4.2.1 he PCI_PRODUCT(pa->pa_id) == cp->cp_product)
122 1.4.2.1 he break;
123 1.4.2.1 he cp++;
124 1.4.2.1 he i++;
125 1.4.2.1 he }
126 1.4.2.1 he if (i == sizeof(cac_pci_product) / sizeof(cac_pci_product[0]))
127 1.4.2.1 he return (NULL);
128 1.4.2.1 he
129 1.4.2.1 he subsysid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
130 1.4.2.1 he ct = cac_pci_type;
131 1.4.2.1 he i = 0;
132 1.4.2.1 he while (i < sizeof(cac_pci_type) / sizeof(cac_pci_type[0])) {
133 1.4.2.1 he if (subsysid == ct->ct_subsysid)
134 1.4.2.1 he break;
135 1.4.2.1 he ct++;
136 1.4.2.1 he i++;
137 1.4.2.1 he }
138 1.4.2.1 he if (i == sizeof(cac_pci_type) / sizeof(cac_pci_type[0]))
139 1.4.2.1 he return (NULL);
140 1.4.2.1 he
141 1.4.2.1 he return (ct);
142 1.4.2.1 he }
143 1.1 ad
144 1.4.2.1 he static int
145 1.4.2.1 he cac_pci_match(struct device *parent, struct cfdata *match, void *aux)
146 1.4.2.1 he {
147 1.3 ad
148 1.4.2.1 he return (cac_pci_findtype(aux) != NULL);
149 1.1 ad }
150 1.1 ad
151 1.1 ad static void
152 1.4.2.1 he cac_pci_attach(struct device *parent, struct device *self, void *aux)
153 1.1 ad {
154 1.1 ad struct pci_attach_args *pa;
155 1.4.2.1 he struct cac_pci_type *ct;
156 1.1 ad struct cac_softc *sc;
157 1.1 ad pci_chipset_tag_t pc;
158 1.1 ad pci_intr_handle_t ih;
159 1.1 ad const char *intrstr;
160 1.4.2.1 he pcireg_t reg;
161 1.4.2.1 he int memr, ior, i;
162 1.4.2.1 he
163 1.1 ad sc = (struct cac_softc *)self;
164 1.1 ad pa = (struct pci_attach_args *)aux;
165 1.1 ad pc = pa->pa_pc;
166 1.4.2.1 he ct = cac_pci_findtype(pa);
167 1.3 ad
168 1.4.2.1 he /*
169 1.4.2.1 he * Map the PCI register window.
170 1.4.2.1 he */
171 1.4.2.1 he memr = -1;
172 1.4.2.1 he ior = -1;
173 1.4.2.1 he
174 1.4.2.1 he for (i = 0x10; i <= 0x14; i += 4) {
175 1.4.2.1 he reg = pci_conf_read(pa->pa_pc, pa->pa_tag, i);
176 1.4.2.1 he
177 1.4.2.1 he if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_IO) {
178 1.4.2.1 he if (ior == -1 && PCI_MAPREG_IO_SIZE(reg) != 0)
179 1.4.2.1 he ior = i;
180 1.4.2.1 he } else {
181 1.4.2.1 he if (memr == -1 && PCI_MAPREG_MEM_SIZE(reg) != 0)
182 1.4.2.1 he memr = i;
183 1.4.2.1 he }
184 1.4.2.1 he }
185 1.2 ad
186 1.4.2.1 he if (memr != -1) {
187 1.4.2.1 he if (pci_mapreg_map(pa, memr, PCI_MAPREG_TYPE_MEM, 0,
188 1.2 ad &sc->sc_iot, &sc->sc_ioh, NULL, NULL))
189 1.4.2.1 he memr = -1;
190 1.4.2.1 he else
191 1.4.2.1 he ior = -1;
192 1.4.2.1 he }
193 1.4.2.1 he if (ior != -1)
194 1.4.2.1 he if (pci_mapreg_map(pa, ior, PCI_MAPREG_TYPE_IO, 0,
195 1.4.2.1 he &sc->sc_iot, &sc->sc_ioh, NULL, NULL))
196 1.4.2.1 he ior = -1;
197 1.4.2.1 he if (memr == -1 && ior == -1) {
198 1.4.2.1 he printf("%s: can't map i/o or memory space\n", self->dv_xname);
199 1.4.2.1 he return;
200 1.4.2.1 he }
201 1.4.2.1 he
202 1.1 ad sc->sc_dmat = pa->pa_dmat;
203 1.1 ad
204 1.1 ad /* Enable the device. */
205 1.4.2.1 he reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
206 1.1 ad pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
207 1.4.2.1 he reg | PCI_COMMAND_MASTER_ENABLE);
208 1.1 ad
209 1.1 ad /* Map and establish the interrupt. */
210 1.4.2.1 he if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin, pa->pa_intrline,
211 1.4.2.1 he &ih)) {
212 1.1 ad printf("can't map interrupt\n");
213 1.1 ad return;
214 1.1 ad }
215 1.1 ad intrstr = pci_intr_string(pc, ih);
216 1.1 ad sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, cac_intr, sc);
217 1.1 ad if (sc->sc_ih == NULL) {
218 1.1 ad printf("can't establish interrupt");
219 1.1 ad if (intrstr != NULL)
220 1.1 ad printf(" at %s", intrstr);
221 1.1 ad printf("\n");
222 1.1 ad return;
223 1.1 ad }
224 1.1 ad
225 1.4.2.1 he printf(": Compaq %s\n", ct->ct_typestr);
226 1.1 ad
227 1.4.2.1 he /* Now attach to the bus-independent code. */
228 1.4.2.1 he sc->sc_cl = ct->ct_linkage;
229 1.4.2.1 he cac_init(sc, intrstr, (ct->ct_flags & CT_STARTFW) != 0);
230 1.1 ad }
231 1.1 ad
232 1.1 ad static void
233 1.4.2.1 he cac_pci_l0_submit(struct cac_softc *sc, struct cac_ccb *ccb)
234 1.1 ad {
235 1.1 ad
236 1.4.2.1 he bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, (caddr_t)ccb - sc->sc_ccbs,
237 1.4.2.1 he sizeof(struct cac_ccb), BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
238 1.4.2.1 he cac_outl(sc, CAC_42REG_CMD_FIFO, ccb->ccb_paddr);
239 1.1 ad }
240 1.1 ad
241 1.4.2.1 he static struct cac_ccb *
242 1.4.2.1 he cac_pci_l0_completed(struct cac_softc *sc)
243 1.1 ad {
244 1.4.2.1 he struct cac_ccb *ccb;
245 1.4.2.1 he u_int32_t off;
246 1.1 ad
247 1.4.2.1 he if ((off = cac_inl(sc, CAC_42REG_DONE_FIFO)) == 0xffffffffU)
248 1.4.2.1 he return (0);
249 1.1 ad
250 1.4.2.1 he cac_outl(sc, CAC_42REG_DONE_FIFO, 0);
251 1.4.2.1 he off = (off & ~3) - sc->sc_ccbs_paddr;
252 1.4.2.1 he ccb = (struct cac_ccb *)(sc->sc_ccbs + off);
253 1.1 ad
254 1.4.2.1 he bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, off, sizeof(struct cac_ccb),
255 1.4.2.1 he BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
256 1.1 ad
257 1.4.2.1 he return (ccb);
258 1.1 ad }
259 1.1 ad
260 1.1 ad static int
261 1.4.2.1 he cac_pci_l0_intr_pending(struct cac_softc *sc)
262 1.1 ad {
263 1.1 ad
264 1.4.2.1 he return ((cac_inl(sc, CAC_42REG_STATUS) & CAC_42_EXTINT) != 0);
265 1.1 ad }
266 1.1 ad
267 1.1 ad static void
268 1.4.2.1 he cac_pci_l0_intr_enable(struct cac_softc *sc, int state)
269 1.1 ad {
270 1.1 ad
271 1.4.2.1 he cac_outl(sc, CAC_42REG_INTR_MASK, (state ? 0 : 8)); /* XXX */
272 1.1 ad }
273 1.1 ad
274 1.1 ad static int
275 1.4.2.1 he cac_pci_l0_fifo_full(struct cac_softc *sc)
276 1.1 ad {
277 1.1 ad
278 1.4.2.1 he return (cac_inl(sc, CAC_42REG_CMD_FIFO) != 0);
279 1.1 ad }
280