cac_pci.c revision 1.8.2.3 1 1.8.2.3 bouyer /* $NetBSD: cac_pci.c,v 1.8.2.3 2000/11/22 16:04:01 bouyer Exp $ */
2 1.8.2.2 bouyer
3 1.8.2.2 bouyer /*-
4 1.8.2.2 bouyer * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 1.8.2.2 bouyer * All rights reserved.
6 1.8.2.2 bouyer *
7 1.8.2.2 bouyer * This code is derived from software contributed to The NetBSD Foundation
8 1.8.2.2 bouyer * by Andrew Doran.
9 1.8.2.2 bouyer *
10 1.8.2.2 bouyer * Redistribution and use in source and binary forms, with or without
11 1.8.2.2 bouyer * modification, are permitted provided that the following conditions
12 1.8.2.2 bouyer * are met:
13 1.8.2.2 bouyer * 1. Redistributions of source code must retain the above copyright
14 1.8.2.2 bouyer * notice, this list of conditions and the following disclaimer.
15 1.8.2.2 bouyer * 2. Redistributions in binary form must reproduce the above copyright
16 1.8.2.2 bouyer * notice, this list of conditions and the following disclaimer in the
17 1.8.2.2 bouyer * documentation and/or other materials provided with the distribution.
18 1.8.2.2 bouyer * 3. All advertising materials mentioning features or use of this software
19 1.8.2.2 bouyer * must display the following acknowledgement:
20 1.8.2.2 bouyer * This product includes software developed by the NetBSD
21 1.8.2.2 bouyer * Foundation, Inc. and its contributors.
22 1.8.2.2 bouyer * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.8.2.2 bouyer * contributors may be used to endorse or promote products derived
24 1.8.2.2 bouyer * from this software without specific prior written permission.
25 1.8.2.2 bouyer *
26 1.8.2.2 bouyer * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.8.2.2 bouyer * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.8.2.2 bouyer * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.8.2.2 bouyer * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.8.2.2 bouyer * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.8.2.2 bouyer * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.8.2.2 bouyer * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.8.2.2 bouyer * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.8.2.2 bouyer * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.8.2.2 bouyer * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.8.2.2 bouyer * POSSIBILITY OF SUCH DAMAGE.
37 1.8.2.2 bouyer */
38 1.8.2.2 bouyer
39 1.8.2.2 bouyer /*
40 1.8.2.2 bouyer * PCI front-end for cac(4) driver.
41 1.8.2.2 bouyer */
42 1.8.2.2 bouyer
43 1.8.2.2 bouyer #include <sys/param.h>
44 1.8.2.2 bouyer #include <sys/systm.h>
45 1.8.2.2 bouyer #include <sys/kernel.h>
46 1.8.2.2 bouyer #include <sys/device.h>
47 1.8.2.2 bouyer #include <sys/queue.h>
48 1.8.2.2 bouyer
49 1.8.2.2 bouyer #include <machine/endian.h>
50 1.8.2.2 bouyer #include <machine/bus.h>
51 1.8.2.2 bouyer
52 1.8.2.2 bouyer #include <dev/pci/pcidevs.h>
53 1.8.2.2 bouyer #include <dev/pci/pcivar.h>
54 1.8.2.2 bouyer
55 1.8.2.2 bouyer #include <dev/ic/cacreg.h>
56 1.8.2.2 bouyer #include <dev/ic/cacvar.h>
57 1.8.2.2 bouyer
58 1.8.2.2 bouyer #define PCI_CBIO 0x10 /* Configuration base I/O address */
59 1.8.2.2 bouyer #define PCI_CBMA 0x14 /* Configuration base memory address */
60 1.8.2.2 bouyer
61 1.8.2.2 bouyer static void cac_pci_attach(struct device *, struct device *, void *);
62 1.8.2.3 bouyer static struct cac_pci_type *cac_pci_findtype(struct pci_attach_args *);
63 1.8.2.2 bouyer static int cac_pci_match(struct device *, struct cfdata *, void *);
64 1.8.2.2 bouyer
65 1.8.2.2 bouyer static struct cac_ccb *cac_pci_l0_completed(struct cac_softc *);
66 1.8.2.2 bouyer static int cac_pci_l0_fifo_full(struct cac_softc *);
67 1.8.2.2 bouyer static void cac_pci_l0_intr_enable(struct cac_softc *, int);
68 1.8.2.2 bouyer static int cac_pci_l0_intr_pending(struct cac_softc *);
69 1.8.2.2 bouyer static void cac_pci_l0_submit(struct cac_softc *, struct cac_ccb *);
70 1.8.2.2 bouyer
71 1.8.2.2 bouyer struct cfattach cac_pci_ca = {
72 1.8.2.2 bouyer sizeof(struct cac_softc), cac_pci_match, cac_pci_attach
73 1.8.2.2 bouyer };
74 1.8.2.2 bouyer
75 1.8.2.2 bouyer static struct cac_linkage cac_pci_l0 = {
76 1.8.2.2 bouyer cac_pci_l0_completed,
77 1.8.2.2 bouyer cac_pci_l0_fifo_full,
78 1.8.2.2 bouyer cac_pci_l0_intr_enable,
79 1.8.2.2 bouyer cac_pci_l0_intr_pending,
80 1.8.2.2 bouyer cac_pci_l0_submit
81 1.8.2.2 bouyer };
82 1.8.2.2 bouyer
83 1.8.2.3 bouyer #define CT_STARTFW 0x01 /* Need to start controller firmware */
84 1.8.2.2 bouyer
85 1.8.2.2 bouyer struct cac_pci_type {
86 1.8.2.2 bouyer int ct_subsysid;
87 1.8.2.2 bouyer int ct_flags;
88 1.8.2.2 bouyer struct cac_linkage *ct_linkage;
89 1.8.2.2 bouyer char *ct_typestr;
90 1.8.2.2 bouyer } static cac_pci_type[] = {
91 1.8.2.2 bouyer { 0x40300e11, 0, &cac_l0, "SMART-2/P" },
92 1.8.2.2 bouyer { 0x40310e11, 0, &cac_l0, "SMART-2SL" },
93 1.8.2.2 bouyer { 0x40320e11, 0, &cac_l0, "Smart Array 3200" },
94 1.8.2.2 bouyer { 0x40330e11, 0, &cac_l0, "Smart Array 3100ES" },
95 1.8.2.2 bouyer { 0x40340e11, 0, &cac_l0, "Smart Array 221" },
96 1.8.2.2 bouyer { 0x40400e11, CT_STARTFW, &cac_pci_l0, "Integrated Array" },
97 1.8.2.2 bouyer { 0x40480e11, CT_STARTFW, &cac_pci_l0, "RAID LC2" },
98 1.8.2.2 bouyer { 0x40500e11, 0, &cac_pci_l0, "Smart Array 4200" },
99 1.8.2.2 bouyer { 0x40510e11, 0, &cac_pci_l0, "Smart Array 4200ES" },
100 1.8.2.2 bouyer { 0x40580e11, 0, &cac_pci_l0, "Smart Array 431" },
101 1.8.2.2 bouyer };
102 1.8.2.2 bouyer
103 1.8.2.3 bouyer struct cac_pci_product {
104 1.8.2.3 bouyer u_short cp_vendor;
105 1.8.2.3 bouyer u_short cp_product;
106 1.8.2.3 bouyer } static cac_pci_product[] = {
107 1.8.2.3 bouyer { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_SMART2P },
108 1.8.2.3 bouyer { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_CPQ42XX },
109 1.8.2.3 bouyer { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1510 },
110 1.8.2.3 bouyer };
111 1.8.2.3 bouyer
112 1.8.2.3 bouyer static struct cac_pci_type *
113 1.8.2.3 bouyer cac_pci_findtype(struct pci_attach_args *pa)
114 1.8.2.2 bouyer {
115 1.8.2.3 bouyer struct cac_pci_type *ct;
116 1.8.2.3 bouyer struct cac_pci_product *cp;
117 1.8.2.3 bouyer pcireg_t subsysid;
118 1.8.2.3 bouyer int i;
119 1.8.2.3 bouyer
120 1.8.2.3 bouyer cp = cac_pci_product;
121 1.8.2.3 bouyer i = 0;
122 1.8.2.3 bouyer while (i < sizeof(cac_pci_product) / sizeof(cac_pci_product[0])) {
123 1.8.2.3 bouyer if (PCI_VENDOR(pa->pa_id) == cp->cp_vendor &&
124 1.8.2.3 bouyer PCI_PRODUCT(pa->pa_id) == cp->cp_product)
125 1.8.2.3 bouyer break;
126 1.8.2.3 bouyer cp++;
127 1.8.2.3 bouyer i++;
128 1.8.2.3 bouyer }
129 1.8.2.3 bouyer if (i == sizeof(cac_pci_product) / sizeof(cac_pci_product[0]))
130 1.8.2.3 bouyer return (NULL);
131 1.8.2.2 bouyer
132 1.8.2.3 bouyer subsysid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
133 1.8.2.3 bouyer ct = cac_pci_type;
134 1.8.2.3 bouyer i = 0;
135 1.8.2.3 bouyer while (i < sizeof(cac_pci_type) / sizeof(cac_pci_type[0])) {
136 1.8.2.3 bouyer if (subsysid == ct->ct_subsysid)
137 1.8.2.3 bouyer break;
138 1.8.2.3 bouyer ct++;
139 1.8.2.3 bouyer i++;
140 1.8.2.3 bouyer }
141 1.8.2.3 bouyer if (i == sizeof(cac_pci_type) / sizeof(cac_pci_type[0]))
142 1.8.2.3 bouyer return (NULL);
143 1.8.2.2 bouyer
144 1.8.2.3 bouyer return (ct);
145 1.8.2.3 bouyer }
146 1.8.2.3 bouyer
147 1.8.2.3 bouyer static int
148 1.8.2.3 bouyer cac_pci_match(struct device *parent, struct cfdata *match, void *aux)
149 1.8.2.3 bouyer {
150 1.8.2.2 bouyer
151 1.8.2.3 bouyer return (cac_pci_findtype(aux) != NULL);
152 1.8.2.2 bouyer }
153 1.8.2.2 bouyer
154 1.8.2.2 bouyer static void
155 1.8.2.2 bouyer cac_pci_attach(struct device *parent, struct device *self, void *aux)
156 1.8.2.2 bouyer {
157 1.8.2.2 bouyer struct pci_attach_args *pa;
158 1.8.2.2 bouyer struct cac_pci_type *ct;
159 1.8.2.2 bouyer struct cac_softc *sc;
160 1.8.2.2 bouyer pci_chipset_tag_t pc;
161 1.8.2.2 bouyer pci_intr_handle_t ih;
162 1.8.2.2 bouyer const char *intrstr;
163 1.8.2.3 bouyer pcireg_t csr;
164 1.8.2.2 bouyer
165 1.8.2.2 bouyer sc = (struct cac_softc *)self;
166 1.8.2.2 bouyer pa = (struct pci_attach_args *)aux;
167 1.8.2.2 bouyer pc = pa->pa_pc;
168 1.8.2.3 bouyer ct = cac_pci_findtype(pa);
169 1.8.2.2 bouyer
170 1.8.2.3 bouyer if (pci_mapreg_map(pa, PCI_CBMA, PCI_MAPREG_TYPE_MEM, 0,
171 1.8.2.3 bouyer &sc->sc_iot, &sc->sc_ioh, NULL, NULL))
172 1.8.2.2 bouyer if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0,
173 1.8.2.2 bouyer &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) {
174 1.8.2.3 bouyer printf("can't map memory or i/o space\n");
175 1.8.2.2 bouyer return;
176 1.8.2.2 bouyer }
177 1.8.2.2 bouyer
178 1.8.2.2 bouyer sc->sc_dmat = pa->pa_dmat;
179 1.8.2.2 bouyer
180 1.8.2.2 bouyer /* Enable the device. */
181 1.8.2.2 bouyer csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
182 1.8.2.2 bouyer pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
183 1.8.2.2 bouyer csr | PCI_COMMAND_MASTER_ENABLE);
184 1.8.2.2 bouyer
185 1.8.2.2 bouyer /* Map and establish the interrupt. */
186 1.8.2.2 bouyer if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin,
187 1.8.2.2 bouyer pa->pa_intrline, &ih)) {
188 1.8.2.2 bouyer printf("can't map interrupt\n");
189 1.8.2.2 bouyer return;
190 1.8.2.2 bouyer }
191 1.8.2.2 bouyer intrstr = pci_intr_string(pc, ih);
192 1.8.2.2 bouyer sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, cac_intr, sc);
193 1.8.2.2 bouyer if (sc->sc_ih == NULL) {
194 1.8.2.2 bouyer printf("can't establish interrupt");
195 1.8.2.2 bouyer if (intrstr != NULL)
196 1.8.2.2 bouyer printf(" at %s", intrstr);
197 1.8.2.2 bouyer printf("\n");
198 1.8.2.2 bouyer return;
199 1.8.2.2 bouyer }
200 1.8.2.2 bouyer
201 1.8.2.3 bouyer printf(": Compaq %s\n", ct->ct_typestr);
202 1.8.2.2 bouyer
203 1.8.2.2 bouyer /* Now attach to the bus-independent code. */
204 1.8.2.2 bouyer sc->sc_cl = ct->ct_linkage;
205 1.8.2.3 bouyer cac_init(sc, intrstr, (ct->ct_flags & CT_STARTFW) != 0);
206 1.8.2.2 bouyer }
207 1.8.2.2 bouyer
208 1.8.2.2 bouyer static void
209 1.8.2.2 bouyer cac_pci_l0_submit(struct cac_softc *sc, struct cac_ccb *ccb)
210 1.8.2.2 bouyer {
211 1.8.2.2 bouyer
212 1.8.2.2 bouyer bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, (caddr_t)ccb - sc->sc_ccbs,
213 1.8.2.2 bouyer sizeof(struct cac_ccb), BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
214 1.8.2.2 bouyer cac_outl(sc, CAC_42REG_CMD_FIFO, ccb->ccb_paddr);
215 1.8.2.2 bouyer }
216 1.8.2.2 bouyer
217 1.8.2.2 bouyer static struct cac_ccb *
218 1.8.2.2 bouyer cac_pci_l0_completed(struct cac_softc *sc)
219 1.8.2.2 bouyer {
220 1.8.2.2 bouyer struct cac_ccb *ccb;
221 1.8.2.2 bouyer u_int32_t off;
222 1.8.2.2 bouyer
223 1.8.2.2 bouyer if ((off = cac_inl(sc, CAC_42REG_DONE_FIFO)) == 0xffffffffU)
224 1.8.2.2 bouyer return (0);
225 1.8.2.2 bouyer
226 1.8.2.2 bouyer cac_outl(sc, CAC_42REG_DONE_FIFO, 0);
227 1.8.2.2 bouyer off = (off & ~3) - sc->sc_ccbs_paddr;
228 1.8.2.2 bouyer ccb = (struct cac_ccb *)(sc->sc_ccbs + off);
229 1.8.2.2 bouyer
230 1.8.2.2 bouyer bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, off, sizeof(struct cac_ccb),
231 1.8.2.2 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
232 1.8.2.2 bouyer
233 1.8.2.2 bouyer return (ccb);
234 1.8.2.2 bouyer }
235 1.8.2.2 bouyer
236 1.8.2.2 bouyer static int
237 1.8.2.2 bouyer cac_pci_l0_intr_pending(struct cac_softc *sc)
238 1.8.2.2 bouyer {
239 1.8.2.2 bouyer
240 1.8.2.2 bouyer return (cac_inl(sc, CAC_42REG_INTR_PENDING) &
241 1.8.2.2 bouyer cac_inl(sc, CAC_42REG_STATUS));
242 1.8.2.2 bouyer }
243 1.8.2.2 bouyer
244 1.8.2.2 bouyer static void
245 1.8.2.2 bouyer cac_pci_l0_intr_enable(struct cac_softc *sc, int state)
246 1.8.2.2 bouyer {
247 1.8.2.2 bouyer
248 1.8.2.2 bouyer cac_outl(sc, CAC_42REG_INTR_MASK, (state ? 0 : 8)); /* XXX */
249 1.8.2.2 bouyer }
250 1.8.2.2 bouyer
251 1.8.2.2 bouyer static int
252 1.8.2.2 bouyer cac_pci_l0_fifo_full(struct cac_softc *sc)
253 1.8.2.2 bouyer {
254 1.8.2.2 bouyer
255 1.8.2.2 bouyer return (~cac_inl(sc, CAC_42REG_CMD_FIFO));
256 1.8.2.2 bouyer }
257