cac_pci.c revision 1.12 1 /* $NetBSD: cac_pci.c,v 1.12 2002/01/25 16:10:37 ad Exp $ */
2
3 /*-
4 * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Andrew Doran.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * PCI front-end for cac(4) driver.
41 */
42
43 #include <sys/cdefs.h>
44 __KERNEL_RCSID(0, "$NetBSD: cac_pci.c,v 1.12 2002/01/25 16:10:37 ad Exp $");
45
46 #include <sys/param.h>
47 #include <sys/systm.h>
48 #include <sys/kernel.h>
49 #include <sys/device.h>
50 #include <sys/queue.h>
51
52 #include <machine/endian.h>
53 #include <machine/bus.h>
54
55 #include <dev/pci/pcidevs.h>
56 #include <dev/pci/pcivar.h>
57
58 #include <dev/ic/cacreg.h>
59 #include <dev/ic/cacvar.h>
60
61 void cac_pci_attach(struct device *, struct device *, void *);
62 const struct cac_pci_type *cac_pci_findtype(struct pci_attach_args *);
63 int cac_pci_match(struct device *, struct cfdata *, void *);
64
65 struct cac_ccb *cac_pci_l0_completed(struct cac_softc *);
66 int cac_pci_l0_fifo_full(struct cac_softc *);
67 void cac_pci_l0_intr_enable(struct cac_softc *, int);
68 int cac_pci_l0_intr_pending(struct cac_softc *);
69 void cac_pci_l0_submit(struct cac_softc *, struct cac_ccb *);
70
71 struct cfattach cac_pci_ca = {
72 sizeof(struct cac_softc), cac_pci_match, cac_pci_attach
73 };
74
75 static const struct cac_linkage cac_pci_l0 = {
76 cac_pci_l0_completed,
77 cac_pci_l0_fifo_full,
78 cac_pci_l0_intr_enable,
79 cac_pci_l0_intr_pending,
80 cac_pci_l0_submit
81 };
82
83 #define CT_STARTFW 0x01 /* Need to start controller firmware */
84
85 struct cac_pci_type {
86 int ct_subsysid;
87 int ct_flags;
88 const struct cac_linkage *ct_linkage;
89 const char *ct_typestr;
90 } static const cac_pci_type[] = {
91 { 0x40300e11, 0, &cac_l0, "SMART-2/P" },
92 { 0x40310e11, 0, &cac_l0, "SMART-2SL" },
93 { 0x40320e11, 0, &cac_l0, "Smart Array 3200" },
94 { 0x40330e11, 0, &cac_l0, "Smart Array 3100ES" },
95 { 0x40340e11, 0, &cac_l0, "Smart Array 221" },
96 { 0x40400e11, CT_STARTFW, &cac_pci_l0, "Integrated Array" },
97 { 0x40480e11, CT_STARTFW, &cac_pci_l0, "RAID LC2" },
98 { 0x40500e11, 0, &cac_pci_l0, "Smart Array 4200" },
99 { 0x40510e11, 0, &cac_pci_l0, "Smart Array 4200ES" },
100 { 0x40580e11, 0, &cac_pci_l0, "Smart Array 431" },
101 };
102
103 struct cac_pci_product {
104 u_short cp_vendor;
105 u_short cp_product;
106 } static const cac_pci_product[] = {
107 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_SMART2P },
108 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_CPQ42XX },
109 { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1510 },
110 };
111
112 const struct cac_pci_type *
113 cac_pci_findtype(struct pci_attach_args *pa)
114 {
115 const struct cac_pci_type *ct;
116 const struct cac_pci_product *cp;
117 pcireg_t subsysid;
118 int i;
119
120 cp = cac_pci_product;
121 i = 0;
122 while (i < sizeof(cac_pci_product) / sizeof(cac_pci_product[0])) {
123 if (PCI_VENDOR(pa->pa_id) == cp->cp_vendor &&
124 PCI_PRODUCT(pa->pa_id) == cp->cp_product)
125 break;
126 cp++;
127 i++;
128 }
129 if (i == sizeof(cac_pci_product) / sizeof(cac_pci_product[0]))
130 return (NULL);
131
132 subsysid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
133 ct = cac_pci_type;
134 i = 0;
135 while (i < sizeof(cac_pci_type) / sizeof(cac_pci_type[0])) {
136 if (subsysid == ct->ct_subsysid)
137 break;
138 ct++;
139 i++;
140 }
141 if (i == sizeof(cac_pci_type) / sizeof(cac_pci_type[0]))
142 return (NULL);
143
144 return (ct);
145 }
146
147 int
148 cac_pci_match(struct device *parent, struct cfdata *match, void *aux)
149 {
150
151 return (cac_pci_findtype(aux) != NULL);
152 }
153
154 void
155 cac_pci_attach(struct device *parent, struct device *self, void *aux)
156 {
157 struct pci_attach_args *pa;
158 const struct cac_pci_type *ct;
159 struct cac_softc *sc;
160 pci_chipset_tag_t pc;
161 pci_intr_handle_t ih;
162 const char *intrstr;
163 pcireg_t reg;
164 int memr, ior, i;
165
166 sc = (struct cac_softc *)self;
167 pa = (struct pci_attach_args *)aux;
168 pc = pa->pa_pc;
169 ct = cac_pci_findtype(pa);
170
171 /*
172 * Map the PCI register window.
173 */
174 memr = -1;
175 ior = -1;
176
177 for (i = 0x10; i <= 0x14; i += 4) {
178 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, i);
179
180 if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_IO) {
181 if (ior == -1 && PCI_MAPREG_IO_SIZE(reg) != 0)
182 ior = i;
183 } else {
184 if (memr == -1 && PCI_MAPREG_MEM_SIZE(reg) != 0)
185 memr = i;
186 }
187 }
188
189 if (memr != -1) {
190 if (pci_mapreg_map(pa, memr, PCI_MAPREG_TYPE_MEM, 0,
191 &sc->sc_iot, &sc->sc_ioh, NULL, NULL))
192 memr = -1;
193 else
194 ior = -1;
195 }
196 if (ior != -1)
197 if (pci_mapreg_map(pa, ior, PCI_MAPREG_TYPE_IO, 0,
198 &sc->sc_iot, &sc->sc_ioh, NULL, NULL))
199 ior = -1;
200 if (memr == -1 && ior == -1) {
201 printf("%s: can't map i/o or memory space\n", self->dv_xname);
202 return;
203 }
204
205 sc->sc_dmat = pa->pa_dmat;
206
207 /* Enable the device. */
208 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
209 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
210 reg | PCI_COMMAND_MASTER_ENABLE);
211
212 /* Map and establish the interrupt. */
213 if (pci_intr_map(pa, &ih)) {
214 printf("can't map interrupt\n");
215 return;
216 }
217 intrstr = pci_intr_string(pc, ih);
218 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, cac_intr, sc);
219 if (sc->sc_ih == NULL) {
220 printf("can't establish interrupt");
221 if (intrstr != NULL)
222 printf(" at %s", intrstr);
223 printf("\n");
224 return;
225 }
226
227 printf(": Compaq %s\n", ct->ct_typestr);
228
229 /* Now attach to the bus-independent code. */
230 memcpy(&sc->sc_cl, ct->ct_linkage, sizeof(sc->sc_cl));
231 cac_init(sc, intrstr, (ct->ct_flags & CT_STARTFW) != 0);
232 }
233
234 void
235 cac_pci_l0_submit(struct cac_softc *sc, struct cac_ccb *ccb)
236 {
237
238 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, (caddr_t)ccb - sc->sc_ccbs,
239 sizeof(struct cac_ccb), BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
240 cac_outl(sc, CAC_42REG_CMD_FIFO, ccb->ccb_paddr);
241 }
242
243 struct cac_ccb *
244 cac_pci_l0_completed(struct cac_softc *sc)
245 {
246 struct cac_ccb *ccb;
247 u_int32_t off;
248
249 if ((off = cac_inl(sc, CAC_42REG_DONE_FIFO)) == 0xffffffffU)
250 return (NULL);
251
252 cac_outl(sc, CAC_42REG_DONE_FIFO, 0);
253
254 if ((off & 3) != 0)
255 printf("%s: failed command list returned: %lx\n",
256 sc->sc_dv.dv_xname, (long)off);
257
258 off = (off & ~3) - sc->sc_ccbs_paddr;
259 ccb = (struct cac_ccb *)(sc->sc_ccbs + off);
260
261 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, off, sizeof(struct cac_ccb),
262 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
263
264 return (ccb);
265 }
266
267 int
268 cac_pci_l0_intr_pending(struct cac_softc *sc)
269 {
270
271 return ((cac_inl(sc, CAC_42REG_STATUS) & CAC_42_EXTINT) != 0);
272 }
273
274 void
275 cac_pci_l0_intr_enable(struct cac_softc *sc, int state)
276 {
277
278 cac_outl(sc, CAC_42REG_INTR_MASK, (state ? 0 : 8)); /* XXX */
279 }
280
281 int
282 cac_pci_l0_fifo_full(struct cac_softc *sc)
283 {
284
285 return (cac_inl(sc, CAC_42REG_CMD_FIFO) != 0);
286 }
287