cac_pci.c revision 1.27
1 /* $NetBSD: cac_pci.c,v 1.27 2008/04/10 19:13:36 cegger Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * PCI front-end for cac(4) driver. 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: cac_pci.c,v 1.27 2008/04/10 19:13:36 cegger Exp $"); 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/kernel.h> 49 #include <sys/device.h> 50 #include <sys/queue.h> 51 52 #include <machine/endian.h> 53 #include <sys/bus.h> 54 55 #include <dev/pci/pcidevs.h> 56 #include <dev/pci/pcivar.h> 57 58 #include <dev/ic/cacreg.h> 59 #include <dev/ic/cacvar.h> 60 61 static struct cac_ccb *cac_pci_l0_completed(struct cac_softc *); 62 static int cac_pci_l0_fifo_full(struct cac_softc *); 63 static void cac_pci_l0_intr_enable(struct cac_softc *, int); 64 static int cac_pci_l0_intr_pending(struct cac_softc *); 65 static void cac_pci_l0_submit(struct cac_softc *, struct cac_ccb *); 66 67 static const struct cac_linkage cac_pci_l0 = { 68 cac_pci_l0_completed, 69 cac_pci_l0_fifo_full, 70 cac_pci_l0_intr_enable, 71 cac_pci_l0_intr_pending, 72 cac_pci_l0_submit 73 }; 74 75 #define CT_STARTFW 0x01 /* Need to start controller firmware */ 76 77 static struct cac_pci_type { 78 int ct_subsysid; 79 int ct_flags; 80 const struct cac_linkage *ct_linkage; 81 const char *ct_typestr; 82 } const cac_pci_type[] = { 83 { 0x40300e11, 0, &cac_l0, "SMART-2/P" }, 84 { 0x40310e11, 0, &cac_l0, "SMART-2SL" }, 85 { 0x40320e11, 0, &cac_l0, "Smart Array 3200" }, 86 { 0x40330e11, 0, &cac_l0, "Smart Array 3100ES" }, 87 { 0x40340e11, 0, &cac_l0, "Smart Array 221" }, 88 { 0x40400e11, CT_STARTFW, &cac_pci_l0, "Integrated Array" }, 89 { 0x40480e11, CT_STARTFW, &cac_pci_l0, "RAID LC2" }, 90 { 0x40500e11, 0, &cac_pci_l0, "Smart Array 4200" }, 91 { 0x40510e11, 0, &cac_pci_l0, "Smart Array 4200ES" }, 92 { 0x40580e11, 0, &cac_pci_l0, "Smart Array 431" }, 93 }; 94 95 static struct cac_pci_product { 96 u_short cp_vendor; 97 u_short cp_product; 98 } const cac_pci_product[] = { 99 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_SMART2P }, 100 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21554 }, 101 { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1510 }, 102 }; 103 104 static const struct cac_pci_type * 105 cac_pci_findtype(struct pci_attach_args *pa) 106 { 107 const struct cac_pci_type *ct; 108 const struct cac_pci_product *cp; 109 pcireg_t subsysid; 110 int i; 111 112 cp = cac_pci_product; 113 i = 0; 114 while (i < sizeof(cac_pci_product) / sizeof(cac_pci_product[0])) { 115 if (PCI_VENDOR(pa->pa_id) == cp->cp_vendor && 116 PCI_PRODUCT(pa->pa_id) == cp->cp_product) 117 break; 118 cp++; 119 i++; 120 } 121 if (i == sizeof(cac_pci_product) / sizeof(cac_pci_product[0])) 122 return (NULL); 123 124 subsysid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 125 ct = cac_pci_type; 126 i = 0; 127 while (i < sizeof(cac_pci_type) / sizeof(cac_pci_type[0])) { 128 if (subsysid == ct->ct_subsysid) 129 break; 130 ct++; 131 i++; 132 } 133 if (i == sizeof(cac_pci_type) / sizeof(cac_pci_type[0])) 134 return (NULL); 135 136 return (ct); 137 } 138 139 static int 140 cac_pci_match(struct device *parent, struct cfdata *match, 141 void *aux) 142 { 143 144 return (cac_pci_findtype(aux) != NULL); 145 } 146 147 static void 148 cac_pci_attach(struct device *parent, struct device *self, void *aux) 149 { 150 struct pci_attach_args *pa; 151 const struct cac_pci_type *ct; 152 struct cac_softc *sc; 153 pci_chipset_tag_t pc; 154 pci_intr_handle_t ih; 155 const char *intrstr; 156 pcireg_t reg; 157 int memr, ior, i; 158 159 aprint_naive(": RAID controller\n"); 160 161 sc = (struct cac_softc *)self; 162 pa = (struct pci_attach_args *)aux; 163 pc = pa->pa_pc; 164 ct = cac_pci_findtype(pa); 165 166 /* 167 * Map the PCI register window. 168 */ 169 memr = -1; 170 ior = -1; 171 172 for (i = 0x10; i <= 0x14; i += 4) { 173 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, i); 174 175 if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_IO) { 176 if (ior == -1 && PCI_MAPREG_IO_SIZE(reg) != 0) 177 ior = i; 178 } else { 179 if (memr == -1 && PCI_MAPREG_MEM_SIZE(reg) != 0) 180 memr = i; 181 } 182 } 183 184 if (memr != -1) { 185 if (pci_mapreg_map(pa, memr, PCI_MAPREG_TYPE_MEM, 0, 186 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) 187 memr = -1; 188 else 189 ior = -1; 190 } 191 if (ior != -1) 192 if (pci_mapreg_map(pa, ior, PCI_MAPREG_TYPE_IO, 0, 193 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) 194 ior = -1; 195 if (memr == -1 && ior == -1) { 196 aprint_error_dev(self, "can't map i/o or memory space\n"); 197 return; 198 } 199 200 sc->sc_dmat = pa->pa_dmat; 201 202 /* Enable the device. */ 203 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 204 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 205 reg | PCI_COMMAND_MASTER_ENABLE); 206 207 /* Map and establish the interrupt. */ 208 if (pci_intr_map(pa, &ih)) { 209 aprint_error("can't map interrupt\n"); 210 return; 211 } 212 intrstr = pci_intr_string(pc, ih); 213 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, cac_intr, sc); 214 if (sc->sc_ih == NULL) { 215 aprint_error("can't establish interrupt"); 216 if (intrstr != NULL) 217 aprint_normal(" at %s", intrstr); 218 aprint_normal("\n"); 219 return; 220 } 221 222 aprint_normal(": Compaq %s\n", ct->ct_typestr); 223 224 /* Now attach to the bus-independent code. */ 225 memcpy(&sc->sc_cl, ct->ct_linkage, sizeof(sc->sc_cl)); 226 cac_init(sc, intrstr, (ct->ct_flags & CT_STARTFW) != 0); 227 } 228 229 CFATTACH_DECL(cac_pci, sizeof(struct cac_softc), 230 cac_pci_match, cac_pci_attach, NULL, NULL); 231 232 static void 233 cac_pci_l0_submit(struct cac_softc *sc, struct cac_ccb *ccb) 234 { 235 236 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 237 (char *)ccb - (char *)sc->sc_ccbs, 238 sizeof(struct cac_ccb), BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 239 cac_outl(sc, CAC_42REG_CMD_FIFO, ccb->ccb_paddr); 240 } 241 242 static struct cac_ccb * 243 cac_pci_l0_completed(struct cac_softc *sc) 244 { 245 struct cac_ccb *ccb; 246 u_int32_t off; 247 248 if ((off = cac_inl(sc, CAC_42REG_DONE_FIFO)) == 0xffffffffU) 249 return (NULL); 250 251 cac_outl(sc, CAC_42REG_DONE_FIFO, 0); 252 253 if ((off & 3) != 0) 254 printf("%s: failed command list returned: %lx\n", 255 device_xname(&sc->sc_dv), (long)off); 256 257 off = (off & ~3) - sc->sc_ccbs_paddr; 258 ccb = (struct cac_ccb *)((char *)sc->sc_ccbs + off); 259 260 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, off, sizeof(struct cac_ccb), 261 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 262 263 if ((off & 3) != 0 && ccb->ccb_req.error == 0) 264 ccb->ccb_req.error = CAC_RET_CMD_REJECTED; 265 266 return (ccb); 267 } 268 269 static int 270 cac_pci_l0_intr_pending(struct cac_softc *sc) 271 { 272 273 return ((cac_inl(sc, CAC_42REG_STATUS) & CAC_42_EXTINT) != 0); 274 } 275 276 static void 277 cac_pci_l0_intr_enable(struct cac_softc *sc, int state) 278 { 279 280 cac_outl(sc, CAC_42REG_INTR_MASK, (state ? 0 : 8)); /* XXX */ 281 } 282 283 static int 284 cac_pci_l0_fifo_full(struct cac_softc *sc) 285 { 286 287 return (cac_inl(sc, CAC_42REG_CMD_FIFO) != 0); 288 } 289
Indexes created Mon Sep 22 05:09:51 GMT 2025