chipsfb.c revision 1.19
1 /* $NetBSD: chipsfb.c,v 1.19 2009/05/12 08:23:00 cegger Exp $ */ 2 3 /* 4 * Copyright (c) 2006 Michael Lorenz 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * A console driver for Chips & Technologies 65550 graphics controllers 30 * tested on macppc only so far 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: chipsfb.c,v 1.19 2009/05/12 08:23:00 cegger Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/kernel.h> 39 #include <sys/device.h> 40 #include <sys/malloc.h> 41 #include <sys/callout.h> 42 #include <sys/lwp.h> 43 #include <sys/kauth.h> 44 45 #include <uvm/uvm_extern.h> 46 47 #include <dev/videomode/videomode.h> 48 49 #include <dev/pci/pcivar.h> 50 #include <dev/pci/pcireg.h> 51 #include <dev/pci/pcidevs.h> 52 #include <dev/pci/pciio.h> 53 #include <dev/pci/chipsfbreg.h> 54 55 #include <dev/wscons/wsdisplayvar.h> 56 #include <dev/wscons/wsconsio.h> 57 #include <dev/wsfont/wsfont.h> 58 #include <dev/rasops/rasops.h> 59 #include <dev/wscons/wsdisplay_vconsvar.h> 60 61 #include <dev/i2c/i2cvar.h> 62 63 #include "opt_wsemul.h" 64 #include "opt_chipsfb.h" 65 66 struct chipsfb_softc { 67 struct device sc_dev; 68 pci_chipset_tag_t sc_pc; 69 pcitag_t sc_pcitag; 70 71 bus_space_tag_t sc_memt; 72 bus_space_tag_t sc_iot; 73 bus_space_handle_t sc_memh; 74 75 bus_space_tag_t sc_fbt; 76 bus_space_tag_t sc_ioregt; 77 bus_space_handle_t sc_fbh; 78 bus_space_handle_t sc_ioregh; 79 bus_addr_t sc_fb, sc_ioreg; 80 bus_size_t sc_fbsize, sc_ioregsize; 81 82 void *sc_ih; 83 84 size_t memsize; 85 86 int bits_per_pixel; 87 int width, height, linebytes; 88 89 int sc_mode; 90 uint32_t sc_bg; 91 92 u_char sc_cmap_red[256]; 93 u_char sc_cmap_green[256]; 94 u_char sc_cmap_blue[256]; 95 int sc_dacw; 96 97 /* 98 * I2C stuff 99 * DDC2 clock is on GPIO1, data on GPIO0 100 */ 101 struct i2c_controller sc_i2c; 102 uint8_t sc_edid[1024]; 103 int sc_edidbytes; /* number of bytes read from the monitor */ 104 105 struct vcons_data vd; 106 }; 107 108 static struct vcons_screen chipsfb_console_screen; 109 110 extern const u_char rasops_cmap[768]; 111 112 static int chipsfb_match(device_t, cfdata_t, void *); 113 static void chipsfb_attach(device_t, device_t, void *); 114 115 CFATTACH_DECL(chipsfb, sizeof(struct chipsfb_softc), chipsfb_match, 116 chipsfb_attach, NULL, NULL); 117 118 static void chipsfb_init(struct chipsfb_softc *); 119 120 static void chipsfb_cursor(void *, int, int, int); 121 static void chipsfb_copycols(void *, int, int, int, int); 122 static void chipsfb_erasecols(void *, int, int, int, long); 123 static void chipsfb_copyrows(void *, int, int, int); 124 static void chipsfb_eraserows(void *, int, int, long); 125 126 #if 0 127 static int chipsfb_allocattr(void *, int, int, int, long *); 128 static void chipsfb_scroll(void *, void *, int); 129 static int chipsfb_load_font(void *, void *, struct wsdisplay_font *); 130 #endif 131 132 static int chipsfb_putcmap(struct chipsfb_softc *, 133 struct wsdisplay_cmap *); 134 static int chipsfb_getcmap(struct chipsfb_softc *, 135 struct wsdisplay_cmap *); 136 static int chipsfb_putpalreg(struct chipsfb_softc *, uint8_t, uint8_t, 137 uint8_t, uint8_t); 138 139 static void chipsfb_bitblt(struct chipsfb_softc *, int, int, int, int, 140 int, int, uint8_t); 141 static void chipsfb_rectfill(struct chipsfb_softc *, int, int, int, int, 142 int); 143 static void chipsfb_putchar(void *, int, int, u_int, long); 144 static void chipsfb_setup_mono(struct chipsfb_softc *, int, int, int, 145 int, uint32_t, uint32_t); 146 static void chipsfb_feed(struct chipsfb_softc *, int, uint8_t *); 147 148 #if 0 149 static void chipsfb_showpal(struct chipsfb_softc *); 150 #endif 151 static void chipsfb_restore_palette(struct chipsfb_softc *); 152 153 static void chipsfb_wait_idle(struct chipsfb_softc *); 154 155 static uint32_t chipsfb_probe_vram(struct chipsfb_softc *); 156 157 struct wsscreen_descr chipsfb_defaultscreen = { 158 "default", 159 0, 0, 160 NULL, 161 8, 16, 162 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 163 }; 164 165 const struct wsscreen_descr *_chipsfb_scrlist[] = { 166 &chipsfb_defaultscreen, 167 /* XXX other formats, graphics screen? */ 168 }; 169 170 struct wsscreen_list chipsfb_screenlist = { 171 sizeof(_chipsfb_scrlist) / sizeof(struct wsscreen_descr *), _chipsfb_scrlist 172 }; 173 174 static int chipsfb_ioctl(void *, void *, u_long, void *, int, 175 struct lwp *); 176 static paddr_t chipsfb_mmap(void *, void *, off_t, int); 177 static void chipsfb_clearscreen(struct chipsfb_softc *); 178 static void chipsfb_init_screen(void *, struct vcons_screen *, int, 179 long *); 180 181 182 struct wsdisplay_accessops chipsfb_accessops = { 183 chipsfb_ioctl, 184 chipsfb_mmap, 185 NULL, /* load_font */ 186 NULL, /* polls */ 187 NULL, /* scroll */ 188 }; 189 190 /* 191 * Inline functions for getting access to register aperture. 192 */ 193 static inline void 194 chipsfb_write32(struct chipsfb_softc *sc, uint32_t reg, uint32_t val) 195 { 196 bus_space_write_4(sc->sc_fbt, sc->sc_fbh, reg, val); 197 } 198 199 static inline uint32_t 200 chipsfb_read32(struct chipsfb_softc *sc, uint32_t reg) 201 { 202 return bus_space_read_4(sc->sc_fbt, sc->sc_fbh, reg); 203 } 204 205 static inline void 206 chipsfb_write_vga(struct chipsfb_softc *sc, uint32_t reg, uint8_t val) 207 { 208 bus_space_write_1(sc->sc_iot, sc->sc_ioregh, reg, val); 209 } 210 211 static inline uint8_t 212 chipsfb_read_vga(struct chipsfb_softc *sc, uint32_t reg) 213 { 214 return bus_space_read_1(sc->sc_iot, sc->sc_ioregh, reg); 215 } 216 217 static inline uint8_t 218 chipsfb_read_indexed(struct chipsfb_softc *sc, uint32_t reg, uint8_t index) 219 { 220 221 chipsfb_write_vga(sc, reg & 0xfffe, index); 222 return chipsfb_read_vga(sc, reg | 0x0001); 223 } 224 225 static inline void 226 chipsfb_write_indexed(struct chipsfb_softc *sc, uint32_t reg, uint8_t index, 227 uint8_t val) 228 { 229 230 chipsfb_write_vga(sc, reg & 0xfffe, index); 231 chipsfb_write_vga(sc, reg | 0x0001, val); 232 } 233 234 static void 235 chipsfb_wait_idle(struct chipsfb_softc *sc) 236 { 237 238 #ifdef CHIPSFB_DEBUG 239 chipsfb_write32(sc, CT_OFF_FB + (800 * 598) - 4, 0); 240 #endif 241 242 /* spin until the blitter is idle */ 243 while ((chipsfb_read32(sc, CT_BLT_CONTROL) & BLT_IS_BUSY) != 0) { 244 } 245 246 #ifdef CHIPSFB_DEBUG 247 chipsfb_write32(sc, CT_OFF_FB + (800 * 598) - 4, 0xffffffff); 248 #endif 249 } 250 251 static int 252 chipsfb_match(device_t parent, cfdata_t match, void *aux) 253 { 254 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 255 256 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY || 257 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 258 return 0; 259 if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CHIPS) && 260 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CHIPS_65550)) 261 return 100; 262 if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CHIPS) && 263 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CHIPS_65554)) 264 return 100; 265 return 0; 266 } 267 268 static void 269 chipsfb_attach(device_t parent, device_t self, void *aux) 270 { 271 struct chipsfb_softc *sc = device_private(self); 272 struct pci_attach_args *pa = aux; 273 char devinfo[256]; 274 struct wsemuldisplaydev_attach_args aa; 275 struct rasops_info *ri; 276 prop_dictionary_t dict; 277 pcireg_t screg; 278 ulong defattr; 279 bool console = false; 280 int width, height, i, j; 281 uint32_t bg, fg, ul; 282 283 dict = device_properties(self); 284 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 285 sc->sc_pc = pa->pa_pc; 286 sc->sc_pcitag = pa->pa_tag; 287 sc->sc_dacw = -1; 288 289 screg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, PCI_COMMAND_STATUS_REG); 290 screg |= PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; 291 pci_conf_write(sc->sc_pc, sc->sc_pcitag,PCI_COMMAND_STATUS_REG,screg); 292 293 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 294 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class)); 295 #ifdef CHIPSFB_DEBUG 296 printf(prop_dictionary_externalize(dict)); 297 #endif 298 299 sc->sc_memt = pa->pa_memt; 300 sc->sc_iot = pa->pa_iot; 301 302 /* the framebuffer */ 303 if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_MEM, 304 BUS_SPACE_MAP_LINEAR, 305 &sc->sc_fbt, &sc->sc_fbh, &sc->sc_fb, &sc->sc_fbsize)) { 306 aprint_error_dev(&sc->sc_dev, "failed to map the frame buffer.\n"); 307 } 308 309 /* IO-mapped registers */ 310 if (bus_space_map(sc->sc_iot, 0x0, 0x400, 0, &sc->sc_ioregh) != 0) { 311 aprint_error_dev(&sc->sc_dev, "failed to map IO registers.\n"); 312 } 313 314 sc->memsize = chipsfb_probe_vram(sc); 315 chipsfb_init(sc); 316 317 /* we should read these from the chip instead of depending on OF */ 318 width = height = -1; 319 320 /* detect panel size */ 321 width = chipsfb_read_indexed(sc, CT_FP_INDEX, FP_HSIZE_LSB); 322 width |= (chipsfb_read_indexed(sc, CT_FP_INDEX, FP_HORZ_OVERFLOW_1) 323 & 0x0f) << 8; 324 width = (width + 1) * 8; 325 height = chipsfb_read_indexed(sc, CT_FP_INDEX, FP_VSIZE_LSB); 326 height |= (chipsfb_read_indexed(sc, CT_FP_INDEX, FP_VERT_OVERFLOW_1) 327 & 0x0f) << 8; 328 height++; 329 aprint_verbose("Panel size: %d x %d\n", width, height); 330 331 if (!prop_dictionary_get_uint32(dict, "width", &sc->width)) 332 sc->width = width; 333 if (!prop_dictionary_get_uint32(dict, "height", &sc->height)) 334 sc->height = height; 335 if (!prop_dictionary_get_uint32(dict, "depth", &sc->bits_per_pixel)) 336 sc->bits_per_pixel = 8; 337 if (!prop_dictionary_get_uint32(dict, "linebytes", &sc->linebytes)) 338 sc->linebytes = (sc->width * sc->bits_per_pixel) >> 3; 339 340 prop_dictionary_get_bool(dict, "is_console", &console); 341 342 #ifdef notyet 343 /* XXX this should at least be configurable via kernel config */ 344 chipsfb_set_videomode(sc, &videomode_list[16]); 345 #endif 346 347 vcons_init(&sc->vd, sc, &chipsfb_defaultscreen, &chipsfb_accessops); 348 sc->vd.init_screen = chipsfb_init_screen; 349 350 ri = &chipsfb_console_screen.scr_ri; 351 if (console) { 352 vcons_init_screen(&sc->vd, &chipsfb_console_screen, 1, 353 &defattr); 354 chipsfb_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 355 356 chipsfb_defaultscreen.textops = &ri->ri_ops; 357 chipsfb_defaultscreen.capabilities = ri->ri_caps; 358 chipsfb_defaultscreen.nrows = ri->ri_rows; 359 chipsfb_defaultscreen.ncols = ri->ri_cols; 360 wsdisplay_cnattach(&chipsfb_defaultscreen, ri, 0, 0, defattr); 361 } else { 362 /* 363 * since we're not the console we can postpone the rest 364 * until someone actually allocates a screen for us 365 */ 366 #ifdef notyet 367 chipsfb_set_videomode(sc, &videomode_list[0]); 368 #endif 369 } 370 371 rasops_unpack_attr(defattr, &fg, &bg, &ul); 372 sc->sc_bg = ri->ri_devcmap[bg]; 373 chipsfb_clearscreen(sc); 374 375 aprint_normal_dev(&sc->sc_dev, "%d MB aperture, %d MB VRAM at 0x%08x\n", 376 (u_int)(sc->sc_fbsize >> 20), 377 sc->memsize >> 20, (u_int)sc->sc_fb); 378 #ifdef CHIPSFB_DEBUG 379 aprint_debug("fb: %08lx\n", (ulong)ri->ri_bits); 380 #endif 381 382 j = 0; 383 for (i = 0; i < 256; i++) { 384 chipsfb_putpalreg(sc, i, rasops_cmap[j], rasops_cmap[j + 1], 385 rasops_cmap[j + 2]); 386 j += 3; 387 } 388 389 aa.console = console; 390 aa.scrdata = &chipsfb_screenlist; 391 aa.accessops = &chipsfb_accessops; 392 aa.accesscookie = &sc->vd; 393 394 config_found(self, &aa, wsemuldisplaydevprint); 395 } 396 397 static int 398 chipsfb_putpalreg(struct chipsfb_softc *sc, uint8_t index, uint8_t r, 399 uint8_t g, uint8_t b) 400 { 401 402 sc->sc_cmap_red[index] = r; 403 sc->sc_cmap_green[index] = g; 404 sc->sc_cmap_blue[index] = b; 405 406 chipsfb_write_vga(sc, CT_DACMASK, 0xff); 407 chipsfb_write_vga(sc, CT_WRITEINDEX, index); 408 chipsfb_write_vga(sc, CT_DACDATA, r); 409 chipsfb_write_vga(sc, CT_DACDATA, g); 410 chipsfb_write_vga(sc, CT_DACDATA, b); 411 412 return 0; 413 } 414 415 static int 416 chipsfb_putcmap(struct chipsfb_softc *sc, struct wsdisplay_cmap *cm) 417 { 418 u_char *r, *g, *b; 419 u_int index = cm->index; 420 u_int count = cm->count; 421 int i, error; 422 u_char rbuf[256], gbuf[256], bbuf[256]; 423 424 #ifdef CHIPSFB_DEBUG 425 aprint_debug("putcmap: %d %d\n",index, count); 426 #endif 427 if (cm->index >= 256 || cm->count > 256 || 428 (cm->index + cm->count) > 256) 429 return EINVAL; 430 error = copyin(cm->red, &rbuf[index], count); 431 if (error) 432 return error; 433 error = copyin(cm->green, &gbuf[index], count); 434 if (error) 435 return error; 436 error = copyin(cm->blue, &bbuf[index], count); 437 if (error) 438 return error; 439 440 memcpy(&sc->sc_cmap_red[index], &rbuf[index], count); 441 memcpy(&sc->sc_cmap_green[index], &gbuf[index], count); 442 memcpy(&sc->sc_cmap_blue[index], &bbuf[index], count); 443 444 r = &sc->sc_cmap_red[index]; 445 g = &sc->sc_cmap_green[index]; 446 b = &sc->sc_cmap_blue[index]; 447 448 for (i = 0; i < count; i++) { 449 chipsfb_putpalreg(sc, index, *r, *g, *b); 450 index++; 451 r++, g++, b++; 452 } 453 return 0; 454 } 455 456 static int 457 chipsfb_getcmap(struct chipsfb_softc *sc, struct wsdisplay_cmap *cm) 458 { 459 u_int index = cm->index; 460 u_int count = cm->count; 461 int error; 462 463 if (index >= 255 || count > 256 || index + count > 256) 464 return EINVAL; 465 466 error = copyout(&sc->sc_cmap_red[index], cm->red, count); 467 if (error) 468 return error; 469 error = copyout(&sc->sc_cmap_green[index], cm->green, count); 470 if (error) 471 return error; 472 error = copyout(&sc->sc_cmap_blue[index], cm->blue, count); 473 if (error) 474 return error; 475 476 return 0; 477 } 478 479 static void 480 chipsfb_clearscreen(struct chipsfb_softc *sc) 481 { 482 chipsfb_rectfill(sc, 0, 0, sc->width, sc->height, sc->sc_bg); 483 } 484 485 /* 486 * wsdisplay_emulops 487 */ 488 489 static void 490 chipsfb_cursor(void *cookie, int on, int row, int col) 491 { 492 struct rasops_info *ri = cookie; 493 struct vcons_screen *scr = ri->ri_hw; 494 struct chipsfb_softc *sc = scr->scr_cookie; 495 int x, y, wi, he; 496 497 wi = ri->ri_font->fontwidth; 498 he = ri->ri_font->fontheight; 499 500 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 501 x = ri->ri_ccol * wi + ri->ri_xorigin; 502 y = ri->ri_crow * he + ri->ri_yorigin; 503 if (ri->ri_flg & RI_CURSOR) { 504 chipsfb_bitblt(sc, x, y, x, y, wi, he, ROP_NOT_DST); 505 ri->ri_flg &= ~RI_CURSOR; 506 } 507 ri->ri_crow = row; 508 ri->ri_ccol = col; 509 if (on) { 510 x = ri->ri_ccol * wi + ri->ri_xorigin; 511 y = ri->ri_crow * he + ri->ri_yorigin; 512 chipsfb_bitblt(sc, x, y, x, y, wi, he, ROP_NOT_DST); 513 ri->ri_flg |= RI_CURSOR; 514 } 515 } else { 516 ri->ri_flg &= ~RI_CURSOR; 517 ri->ri_crow = row; 518 ri->ri_ccol = col; 519 } 520 } 521 522 #if 0 523 int 524 chipsfb_mapchar(void *cookie, int uni, u_int *index) 525 { 526 return 0; 527 } 528 #endif 529 530 static void 531 chipsfb_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 532 { 533 struct rasops_info *ri = cookie; 534 struct vcons_screen *scr = ri->ri_hw; 535 struct chipsfb_softc *sc = scr->scr_cookie; 536 int32_t xs, xd, y, width, height; 537 538 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 539 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 540 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 541 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 542 width = ri->ri_font->fontwidth * ncols; 543 height = ri->ri_font->fontheight; 544 chipsfb_bitblt(sc, xs, y, xd, y, width, height, ROP_COPY); 545 } 546 } 547 548 static void 549 chipsfb_erasecols(void *cookie, int row, int startcol, int ncols, 550 long fillattr) 551 { 552 struct rasops_info *ri = cookie; 553 struct vcons_screen *scr = ri->ri_hw; 554 struct chipsfb_softc *sc = scr->scr_cookie; 555 int32_t x, y, width, height, fg, bg, ul; 556 557 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 558 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 559 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 560 width = ri->ri_font->fontwidth * ncols; 561 height = ri->ri_font->fontheight; 562 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 563 564 chipsfb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 565 } 566 } 567 568 static void 569 chipsfb_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 570 { 571 struct rasops_info *ri = cookie; 572 struct vcons_screen *scr = ri->ri_hw; 573 struct chipsfb_softc *sc = scr->scr_cookie; 574 int32_t x, ys, yd, width, height; 575 576 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 577 x = ri->ri_xorigin; 578 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 579 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 580 width = ri->ri_emuwidth; 581 height = ri->ri_font->fontheight * nrows; 582 chipsfb_bitblt(sc, x, ys, x, yd, width, height, ROP_COPY); 583 } 584 } 585 586 static void 587 chipsfb_eraserows(void *cookie, int row, int nrows, long fillattr) 588 { 589 struct rasops_info *ri = cookie; 590 struct vcons_screen *scr = ri->ri_hw; 591 struct chipsfb_softc *sc = scr->scr_cookie; 592 int32_t x, y, width, height, fg, bg, ul; 593 594 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 595 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 596 if ((row == 0) && (nrows == ri->ri_rows)) { 597 /* clear the whole screen */ 598 chipsfb_rectfill(sc, 0, 0, ri->ri_width, 599 ri->ri_height, ri->ri_devcmap[bg]); 600 } else { 601 x = ri->ri_xorigin; 602 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 603 width = ri->ri_emuwidth; 604 height = ri->ri_font->fontheight * nrows; 605 chipsfb_rectfill(sc, x, y, width, height, 606 ri->ri_devcmap[bg]); 607 } 608 } 609 } 610 611 static void 612 chipsfb_bitblt(struct chipsfb_softc *sc, int xs, int ys, int xd, int yd, 613 int width, int height, uint8_t rop) 614 { 615 uint32_t src, dst, cmd = rop, stride, size; 616 617 cmd |= BLT_PAT_IS_SOLID; 618 619 /* we assume 8 bit for now */ 620 src = xs + ys * sc->linebytes; 621 dst = xd + yd * sc->linebytes; 622 623 if (xs < xd) { 624 /* right-to-left operation */ 625 cmd |= BLT_START_RIGHT; 626 src += width - 1; 627 dst += width - 1; 628 } 629 630 if (ys < yd) { 631 /* bottom-to-top operation */ 632 cmd |= BLT_START_BOTTOM; 633 src += (height - 1) * sc->linebytes; 634 dst += (height - 1) * sc->linebytes; 635 } 636 637 stride = (sc->linebytes << 16) | sc->linebytes; 638 size = (height << 16) | width; 639 640 chipsfb_wait_idle(sc); 641 chipsfb_write32(sc, CT_BLT_STRIDE, stride); 642 chipsfb_write32(sc, CT_BLT_SRCADDR, src); 643 chipsfb_write32(sc, CT_BLT_DSTADDR, dst); 644 chipsfb_write32(sc, CT_BLT_CONTROL, cmd); 645 chipsfb_write32(sc, CT_BLT_SIZE, size); 646 #ifdef CHIPSFB_WAIT 647 chipsfb_wait_idle(sc); 648 #endif 649 } 650 651 static void 652 chipsfb_rectfill(struct chipsfb_softc *sc, int x, int y, int width, 653 int height, int colour) 654 { 655 uint32_t dst, cmd, stride, size; 656 657 cmd = BLT_PAT_IS_SOLID | BLT_PAT_IS_MONO | ROP_PAT; 658 659 /* we assume 8 bit for now */ 660 dst = x + y * sc->linebytes; 661 662 stride = (sc->linebytes << 16) | sc->linebytes; 663 size = (height << 16) | width; 664 665 chipsfb_wait_idle(sc); 666 chipsfb_write32(sc, CT_BLT_STRIDE, stride); 667 chipsfb_write32(sc, CT_BLT_SRCADDR, dst); 668 chipsfb_write32(sc, CT_BLT_DSTADDR, dst); 669 chipsfb_write32(sc, CT_BLT_CONTROL, cmd); 670 chipsfb_write32(sc, CT_BLT_BG, colour); 671 chipsfb_write32(sc, CT_BLT_FG, colour); 672 chipsfb_write32(sc, CT_BLT_SIZE, size); 673 #ifdef CHIPSFB_WAIT 674 chipsfb_wait_idle(sc); 675 #endif 676 } 677 678 static void 679 chipsfb_putchar(void *cookie, int row, int col, u_int c, long attr) 680 { 681 struct rasops_info *ri = cookie; 682 struct vcons_screen *scr = ri->ri_hw; 683 struct chipsfb_softc *sc = scr->scr_cookie; 684 685 if (__predict_false((unsigned int)row > ri->ri_rows || 686 (unsigned int)col > ri->ri_cols)) 687 return; 688 689 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 690 uint8_t *data; 691 int fg, bg, uc; 692 int x, y, wi, he; 693 694 wi = ri->ri_font->fontwidth; 695 he = ri->ri_font->fontheight; 696 697 if (!CHAR_IN_FONT(c, ri->ri_font)) 698 return; 699 bg = (u_char)ri->ri_devcmap[(attr >> 16) & 0xf]; 700 fg = (u_char)ri->ri_devcmap[(attr >> 24) & 0xf]; 701 x = ri->ri_xorigin + col * wi; 702 y = ri->ri_yorigin + row * he; 703 if (c == 0x20) { 704 chipsfb_rectfill(sc, x, y, wi, he, bg); 705 } else { 706 uc = c-ri->ri_font->firstchar; 707 data = (uint8_t *)ri->ri_font->data + uc * 708 ri->ri_fontscale; 709 chipsfb_setup_mono(sc, x, y, wi, he, fg, bg); 710 chipsfb_feed(sc, ri->ri_font->stride * he, data); 711 } 712 } 713 } 714 715 static void 716 chipsfb_setup_mono(struct chipsfb_softc *sc, int xd, int yd, int width, 717 int height, uint32_t fg, uint32_t bg) 718 { 719 uint32_t dst, cmd, stride, size; 720 721 cmd = BLT_PAT_IS_SOLID | BLT_SRC_IS_CPU | BLT_SRC_IS_MONO | ROP_COPY; 722 723 /* we assume 8 bit for now */ 724 dst = xd + yd * sc->linebytes; 725 726 stride = (sc->linebytes << 16); 727 size = (height << 16) | width; 728 729 chipsfb_wait_idle(sc); 730 chipsfb_write32(sc, CT_BLT_STRIDE, stride); 731 chipsfb_write32(sc, CT_BLT_EXPCTL, MONO_SRC_ALIGN_BYTE); 732 chipsfb_write32(sc, CT_BLT_DSTADDR, dst); 733 chipsfb_write32(sc, CT_BLT_SRCADDR, 0); 734 chipsfb_write32(sc, CT_BLT_CONTROL, cmd); 735 chipsfb_write32(sc, CT_BLT_BG, bg); 736 chipsfb_write32(sc, CT_BLT_FG, fg); 737 chipsfb_write32(sc, CT_BLT_SIZE, size); 738 } 739 740 static void 741 chipsfb_feed(struct chipsfb_softc *sc, int count, uint8_t *data) 742 { 743 int i; 744 uint32_t latch = 0, bork; 745 int shift = 0; 746 747 for (i = 0; i < count; i++) { 748 bork = data[i]; 749 latch |= (bork << shift); 750 if (shift == 24) { 751 chipsfb_write32(sc, CT_OFF_DATA, latch); 752 latch = 0; 753 shift = 0; 754 } else 755 shift += 8; 756 } 757 758 if (shift != 0) { 759 chipsfb_write32(sc, CT_OFF_DATA, latch); 760 } 761 762 /* apparently the chip wants 64bit-aligned data or it won't go idle */ 763 if ((count + 3) & 0x04) { 764 chipsfb_write32(sc, CT_OFF_DATA, 0); 765 } 766 #ifdef CHIPSFB_WAIT 767 chipsfb_wait_idle(sc); 768 #endif 769 } 770 771 #if 0 772 static void 773 chipsfb_showpal(struct chipsfb_softc *sc) 774 { 775 int i, x = 0; 776 777 for (i = 0; i < 16; i++) { 778 chipsfb_rectfill(sc, x, 0, 64, 64, i); 779 x += 64; 780 } 781 } 782 #endif 783 784 #if 0 785 static int 786 chipsfb_allocattr(void *cookie, int fg, int bg, int flags, long *attrp) 787 { 788 789 return 0; 790 } 791 #endif 792 793 static void 794 chipsfb_restore_palette(struct chipsfb_softc *sc) 795 { 796 int i; 797 798 for (i = 0; i < 256; i++) { 799 chipsfb_putpalreg(sc, 800 i, 801 sc->sc_cmap_red[i], 802 sc->sc_cmap_green[i], 803 sc->sc_cmap_blue[i]); 804 } 805 } 806 807 /* 808 * wsdisplay_accessops 809 */ 810 811 static int 812 chipsfb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, 813 struct lwp *l) 814 { 815 struct vcons_data *vd = v; 816 struct chipsfb_softc *sc = vd->cookie; 817 struct wsdisplay_fbinfo *wdf; 818 struct vcons_screen *ms = vd->active; 819 820 switch (cmd) { 821 case WSDISPLAYIO_GTYPE: 822 *(u_int *)data = WSDISPLAY_TYPE_PCIMISC; 823 return 0; 824 825 case WSDISPLAYIO_GINFO: 826 wdf = (void *)data; 827 wdf->height = ms->scr_ri.ri_height; 828 wdf->width = ms->scr_ri.ri_width; 829 wdf->depth = ms->scr_ri.ri_depth; 830 wdf->cmsize = 256; 831 return 0; 832 833 case WSDISPLAYIO_GETCMAP: 834 return chipsfb_getcmap(sc, 835 (struct wsdisplay_cmap *)data); 836 837 case WSDISPLAYIO_PUTCMAP: 838 return chipsfb_putcmap(sc, 839 (struct wsdisplay_cmap *)data); 840 841 /* PCI config read/write passthrough. */ 842 case PCI_IOC_CFGREAD: 843 case PCI_IOC_CFGWRITE: 844 return (pci_devioctl(sc->sc_pc, sc->sc_pcitag, 845 cmd, data, flag, l)); 846 847 case WSDISPLAYIO_SMODE: 848 { 849 int new_mode = *(int*)data; 850 if (new_mode != sc->sc_mode) { 851 sc->sc_mode = new_mode; 852 if(new_mode == WSDISPLAYIO_MODE_EMUL) { 853 chipsfb_restore_palette(sc); 854 vcons_redraw_screen(ms); 855 } 856 } 857 } 858 return 0; 859 } 860 return EPASSTHROUGH; 861 } 862 863 static paddr_t 864 chipsfb_mmap(void *v, void *vs, off_t offset, int prot) 865 { 866 struct vcons_data *vd = v; 867 struct chipsfb_softc *sc = vd->cookie; 868 paddr_t pa; 869 870 /* 'regular' framebuffer mmap()ing */ 871 if (offset < sc->memsize) { 872 pa = bus_space_mmap(sc->sc_fbt, offset, 0, prot, 873 BUS_SPACE_MAP_LINEAR); 874 return pa; 875 } 876 877 /* 878 * restrict all other mappings to processes with superuser privileges 879 * or the kernel itself 880 */ 881 if (kauth_authorize_generic(kauth_cred_get(), KAUTH_GENERIC_ISSUSER, 882 NULL) != 0) { 883 aprint_normal_dev(&sc->sc_dev, "mmap() rejected.\n"); 884 return -1; 885 } 886 887 if ((offset >= sc->sc_fb) && (offset < (sc->sc_fb + sc->sc_fbsize))) { 888 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 889 BUS_SPACE_MAP_LINEAR); 890 return pa; 891 } 892 893 #ifdef PCI_MAGIC_IO_RANGE 894 /* allow mapping of IO space */ 895 if ((offset >= PCI_MAGIC_IO_RANGE) && 896 (offset < PCI_MAGIC_IO_RANGE + 0x10000)) { 897 pa = bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE, 898 0, prot, BUS_SPACE_MAP_LINEAR); 899 return pa; 900 } 901 #endif 902 903 #ifdef OFB_ALLOW_OTHERS 904 if (offset >= 0x80000000) { 905 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 906 BUS_SPACE_MAP_LINEAR); 907 return pa; 908 } 909 #endif 910 return -1; 911 } 912 913 static void 914 chipsfb_init_screen(void *cookie, struct vcons_screen *scr, 915 int existing, long *defattr) 916 { 917 struct chipsfb_softc *sc = cookie; 918 struct rasops_info *ri = &scr->scr_ri; 919 920 ri->ri_depth = sc->bits_per_pixel; 921 ri->ri_width = sc->width; 922 ri->ri_height = sc->height; 923 ri->ri_stride = sc->width; 924 ri->ri_flg = RI_CENTER | RI_FULLCLEAR; 925 926 ri->ri_bits = bus_space_vaddr(sc->sc_fbt, sc->sc_fbh); 927 928 #ifdef CHIPSFB_DEBUG 929 aprint_debug("addr: %08lx\n", (ulong)ri->ri_bits); 930 #endif 931 if (existing) { 932 ri->ri_flg |= RI_CLEAR; 933 } 934 935 rasops_init(ri, sc->height/8, sc->width/8); 936 ri->ri_caps = WSSCREEN_WSCOLORS; 937 938 rasops_reconfig(ri, sc->height / ri->ri_font->fontheight, 939 sc->width / ri->ri_font->fontwidth); 940 941 ri->ri_hw = scr; 942 ri->ri_ops.copyrows = chipsfb_copyrows; 943 ri->ri_ops.copycols = chipsfb_copycols; 944 ri->ri_ops.eraserows = chipsfb_eraserows; 945 ri->ri_ops.erasecols = chipsfb_erasecols; 946 ri->ri_ops.cursor = chipsfb_cursor; 947 ri->ri_ops.putchar = chipsfb_putchar; 948 } 949 950 #if 0 951 int 952 chipsfb_load_font(void *v, void *cookie, struct wsdisplay_font *data) 953 { 954 955 return 0; 956 } 957 #endif 958 959 static void 960 chipsfb_init(struct chipsfb_softc *sc) 961 { 962 963 chipsfb_wait_idle(sc); 964 965 chipsfb_write_indexed(sc, CT_CONF_INDEX, XR_IO_CONTROL, 966 ENABLE_CRTC_EXT | ENABLE_ATTR_EXT); 967 chipsfb_write_indexed(sc, CT_CONF_INDEX, XR_ADDR_MAPPING, 968 ENABLE_LINEAR); 969 970 /* setup the blitter */ 971 } 972 973 static uint32_t 974 chipsfb_probe_vram(struct chipsfb_softc *sc) 975 { 976 uint32_t ofs = 0x00080000; /* 512kB */ 977 978 /* 979 * advance in 0.5MB steps, see if we can read back what we wrote and 980 * if what we wrote to 0 is left untouched. Max. fb size is 4MB so 981 * we voluntarily stop there. 982 */ 983 chipsfb_write32(sc, 0, 0xf0f0f0f0); 984 chipsfb_write32(sc, ofs, 0x0f0f0f0f); 985 while ((chipsfb_read32(sc, 0) == 0xf0f0f0f0) && 986 (chipsfb_read32(sc, ofs) == 0x0f0f0f0f) && 987 (ofs < 0x00400000)) { 988 989 ofs += 0x00080000; 990 chipsfb_write32(sc, ofs, 0x0f0f0f0f); 991 } 992 993 return ofs; 994 } 995
Indexes created Wed Sep 24 05:09:52 GMT 2025