chipsfb.c revision 1.23
1 /* $NetBSD: chipsfb.c,v 1.23 2010/12/16 06:19:01 cegger Exp $ */ 2 3 /* 4 * Copyright (c) 2006 Michael Lorenz 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * A console driver for Chips & Technologies 65550 graphics controllers 30 * tested on macppc only so far 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: chipsfb.c,v 1.23 2010/12/16 06:19:01 cegger Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/kernel.h> 39 #include <sys/device.h> 40 #include <sys/malloc.h> 41 #include <sys/callout.h> 42 #include <sys/lwp.h> 43 #include <sys/kauth.h> 44 45 #include <dev/videomode/videomode.h> 46 47 #include <dev/pci/pcivar.h> 48 #include <dev/pci/pcireg.h> 49 #include <dev/pci/pcidevs.h> 50 #include <dev/pci/pciio.h> 51 #include <dev/pci/chipsfbreg.h> 52 53 #include <dev/wscons/wsdisplayvar.h> 54 #include <dev/wscons/wsconsio.h> 55 #include <dev/wsfont/wsfont.h> 56 #include <dev/rasops/rasops.h> 57 #include <dev/wscons/wsdisplay_vconsvar.h> 58 59 #include <dev/i2c/i2cvar.h> 60 61 #include "opt_wsemul.h" 62 #include "opt_chipsfb.h" 63 64 struct chipsfb_softc { 65 struct device sc_dev; 66 pci_chipset_tag_t sc_pc; 67 pcitag_t sc_pcitag; 68 69 bus_space_tag_t sc_memt; 70 bus_space_tag_t sc_iot; 71 bus_space_handle_t sc_memh; 72 73 bus_space_tag_t sc_fbt; 74 bus_space_tag_t sc_ioregt; 75 bus_space_handle_t sc_fbh; 76 bus_space_handle_t sc_ioregh; 77 bus_addr_t sc_fb, sc_ioreg; 78 bus_size_t sc_fbsize, sc_ioregsize; 79 80 void *sc_ih; 81 82 size_t memsize; 83 84 int bits_per_pixel; 85 int width, height, linebytes; 86 87 int sc_mode; 88 uint32_t sc_bg; 89 90 u_char sc_cmap_red[256]; 91 u_char sc_cmap_green[256]; 92 u_char sc_cmap_blue[256]; 93 int sc_dacw; 94 95 /* 96 * I2C stuff 97 * DDC2 clock is on GPIO1, data on GPIO0 98 */ 99 struct i2c_controller sc_i2c; 100 uint8_t sc_edid[1024]; 101 int sc_edidbytes; /* number of bytes read from the monitor */ 102 103 struct vcons_data vd; 104 }; 105 106 static struct vcons_screen chipsfb_console_screen; 107 108 extern const u_char rasops_cmap[768]; 109 110 static int chipsfb_match(device_t, cfdata_t, void *); 111 static void chipsfb_attach(device_t, device_t, void *); 112 113 CFATTACH_DECL(chipsfb, sizeof(struct chipsfb_softc), chipsfb_match, 114 chipsfb_attach, NULL, NULL); 115 116 static void chipsfb_init(struct chipsfb_softc *); 117 118 static void chipsfb_cursor(void *, int, int, int); 119 static void chipsfb_copycols(void *, int, int, int, int); 120 static void chipsfb_erasecols(void *, int, int, int, long); 121 static void chipsfb_copyrows(void *, int, int, int); 122 static void chipsfb_eraserows(void *, int, int, long); 123 124 #if 0 125 static int chipsfb_allocattr(void *, int, int, int, long *); 126 static void chipsfb_scroll(void *, void *, int); 127 static int chipsfb_load_font(void *, void *, struct wsdisplay_font *); 128 #endif 129 130 static int chipsfb_putcmap(struct chipsfb_softc *, 131 struct wsdisplay_cmap *); 132 static int chipsfb_getcmap(struct chipsfb_softc *, 133 struct wsdisplay_cmap *); 134 static int chipsfb_putpalreg(struct chipsfb_softc *, uint8_t, uint8_t, 135 uint8_t, uint8_t); 136 137 static void chipsfb_bitblt(struct chipsfb_softc *, int, int, int, int, 138 int, int, uint8_t); 139 static void chipsfb_rectfill(struct chipsfb_softc *, int, int, int, int, 140 int); 141 static void chipsfb_putchar(void *, int, int, u_int, long); 142 static void chipsfb_setup_mono(struct chipsfb_softc *, int, int, int, 143 int, uint32_t, uint32_t); 144 static void chipsfb_feed(struct chipsfb_softc *, int, uint8_t *); 145 146 #if 0 147 static void chipsfb_showpal(struct chipsfb_softc *); 148 #endif 149 static void chipsfb_restore_palette(struct chipsfb_softc *); 150 151 static void chipsfb_wait_idle(struct chipsfb_softc *); 152 153 static uint32_t chipsfb_probe_vram(struct chipsfb_softc *); 154 155 struct wsscreen_descr chipsfb_defaultscreen = { 156 "default", 157 0, 0, 158 NULL, 159 8, 16, 160 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 161 }; 162 163 const struct wsscreen_descr *_chipsfb_scrlist[] = { 164 &chipsfb_defaultscreen, 165 /* XXX other formats, graphics screen? */ 166 }; 167 168 struct wsscreen_list chipsfb_screenlist = { 169 sizeof(_chipsfb_scrlist) / sizeof(struct wsscreen_descr *), _chipsfb_scrlist 170 }; 171 172 static int chipsfb_ioctl(void *, void *, u_long, void *, int, 173 struct lwp *); 174 static paddr_t chipsfb_mmap(void *, void *, off_t, int); 175 static void chipsfb_clearscreen(struct chipsfb_softc *); 176 static void chipsfb_init_screen(void *, struct vcons_screen *, int, 177 long *); 178 179 180 struct wsdisplay_accessops chipsfb_accessops = { 181 chipsfb_ioctl, 182 chipsfb_mmap, 183 NULL, /* load_font */ 184 NULL, /* polls */ 185 NULL, /* scroll */ 186 }; 187 188 /* 189 * Inline functions for getting access to register aperture. 190 */ 191 static inline void 192 chipsfb_write32(struct chipsfb_softc *sc, uint32_t reg, uint32_t val) 193 { 194 bus_space_write_4(sc->sc_fbt, sc->sc_fbh, reg, val); 195 } 196 197 static inline uint32_t 198 chipsfb_read32(struct chipsfb_softc *sc, uint32_t reg) 199 { 200 return bus_space_read_4(sc->sc_fbt, sc->sc_fbh, reg); 201 } 202 203 static inline void 204 chipsfb_write_vga(struct chipsfb_softc *sc, uint32_t reg, uint8_t val) 205 { 206 bus_space_write_1(sc->sc_iot, sc->sc_ioregh, reg, val); 207 } 208 209 static inline uint8_t 210 chipsfb_read_vga(struct chipsfb_softc *sc, uint32_t reg) 211 { 212 return bus_space_read_1(sc->sc_iot, sc->sc_ioregh, reg); 213 } 214 215 static inline uint8_t 216 chipsfb_read_indexed(struct chipsfb_softc *sc, uint32_t reg, uint8_t index) 217 { 218 219 chipsfb_write_vga(sc, reg & 0xfffe, index); 220 return chipsfb_read_vga(sc, reg | 0x0001); 221 } 222 223 static inline void 224 chipsfb_write_indexed(struct chipsfb_softc *sc, uint32_t reg, uint8_t index, 225 uint8_t val) 226 { 227 228 chipsfb_write_vga(sc, reg & 0xfffe, index); 229 chipsfb_write_vga(sc, reg | 0x0001, val); 230 } 231 232 static void 233 chipsfb_wait_idle(struct chipsfb_softc *sc) 234 { 235 236 #ifdef CHIPSFB_DEBUG 237 chipsfb_write32(sc, CT_OFF_FB + (800 * 598) - 4, 0); 238 #endif 239 240 /* spin until the blitter is idle */ 241 while ((chipsfb_read32(sc, CT_BLT_CONTROL) & BLT_IS_BUSY) != 0) { 242 } 243 244 #ifdef CHIPSFB_DEBUG 245 chipsfb_write32(sc, CT_OFF_FB + (800 * 598) - 4, 0xffffffff); 246 #endif 247 } 248 249 static int 250 chipsfb_match(device_t parent, cfdata_t match, void *aux) 251 { 252 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 253 254 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY || 255 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 256 return 0; 257 if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CHIPS) && 258 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CHIPS_65550)) 259 return 100; 260 if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CHIPS) && 261 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CHIPS_65554)) 262 return 100; 263 return 0; 264 } 265 266 static void 267 chipsfb_attach(device_t parent, device_t self, void *aux) 268 { 269 struct chipsfb_softc *sc = device_private(self); 270 struct pci_attach_args *pa = aux; 271 char devinfo[256]; 272 struct wsemuldisplaydev_attach_args aa; 273 struct rasops_info *ri; 274 prop_dictionary_t dict; 275 pcireg_t screg; 276 ulong defattr; 277 bool console = false; 278 int width, height, i, j; 279 uint32_t bg, fg, ul; 280 281 dict = device_properties(self); 282 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 283 sc->sc_pc = pa->pa_pc; 284 sc->sc_pcitag = pa->pa_tag; 285 sc->sc_dacw = -1; 286 287 screg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, PCI_COMMAND_STATUS_REG); 288 screg |= PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; 289 pci_conf_write(sc->sc_pc, sc->sc_pcitag,PCI_COMMAND_STATUS_REG,screg); 290 291 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 292 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class)); 293 #ifdef CHIPSFB_DEBUG 294 printf(prop_dictionary_externalize(dict)); 295 #endif 296 297 sc->sc_memt = pa->pa_memt; 298 sc->sc_iot = pa->pa_iot; 299 300 /* the framebuffer */ 301 if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_MEM, 302 BUS_SPACE_MAP_LINEAR, 303 &sc->sc_fbt, &sc->sc_fbh, &sc->sc_fb, &sc->sc_fbsize)) { 304 aprint_error_dev(&sc->sc_dev, "failed to map the frame buffer.\n"); 305 } 306 307 /* IO-mapped registers */ 308 if (bus_space_map(sc->sc_iot, 0x0, 0x400, 0, &sc->sc_ioregh) != 0) { 309 aprint_error_dev(&sc->sc_dev, "failed to map IO registers.\n"); 310 } 311 312 sc->memsize = chipsfb_probe_vram(sc); 313 chipsfb_init(sc); 314 315 /* we should read these from the chip instead of depending on OF */ 316 width = height = -1; 317 318 /* detect panel size */ 319 width = chipsfb_read_indexed(sc, CT_FP_INDEX, FP_HSIZE_LSB); 320 width |= (chipsfb_read_indexed(sc, CT_FP_INDEX, FP_HORZ_OVERFLOW_1) 321 & 0x0f) << 8; 322 width = (width + 1) * 8; 323 height = chipsfb_read_indexed(sc, CT_FP_INDEX, FP_VSIZE_LSB); 324 height |= (chipsfb_read_indexed(sc, CT_FP_INDEX, FP_VERT_OVERFLOW_1) 325 & 0x0f) << 8; 326 height++; 327 aprint_verbose("Panel size: %d x %d\n", width, height); 328 329 if (!prop_dictionary_get_uint32(dict, "width", &sc->width)) 330 sc->width = width; 331 if (!prop_dictionary_get_uint32(dict, "height", &sc->height)) 332 sc->height = height; 333 if (!prop_dictionary_get_uint32(dict, "depth", &sc->bits_per_pixel)) 334 sc->bits_per_pixel = 8; 335 if (!prop_dictionary_get_uint32(dict, "linebytes", &sc->linebytes)) 336 sc->linebytes = (sc->width * sc->bits_per_pixel) >> 3; 337 338 prop_dictionary_get_bool(dict, "is_console", &console); 339 340 #ifdef notyet 341 /* XXX this should at least be configurable via kernel config */ 342 chipsfb_set_videomode(sc, &videomode_list[16]); 343 #endif 344 345 vcons_init(&sc->vd, sc, &chipsfb_defaultscreen, &chipsfb_accessops); 346 sc->vd.init_screen = chipsfb_init_screen; 347 348 ri = &chipsfb_console_screen.scr_ri; 349 if (console) { 350 vcons_init_screen(&sc->vd, &chipsfb_console_screen, 1, 351 &defattr); 352 chipsfb_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 353 354 chipsfb_defaultscreen.textops = &ri->ri_ops; 355 chipsfb_defaultscreen.capabilities = ri->ri_caps; 356 chipsfb_defaultscreen.nrows = ri->ri_rows; 357 chipsfb_defaultscreen.ncols = ri->ri_cols; 358 wsdisplay_cnattach(&chipsfb_defaultscreen, ri, 0, 0, defattr); 359 } else { 360 /* 361 * since we're not the console we can postpone the rest 362 * until someone actually allocates a screen for us 363 */ 364 #ifdef notyet 365 chipsfb_set_videomode(sc, &videomode_list[0]); 366 #endif 367 } 368 369 rasops_unpack_attr(defattr, &fg, &bg, &ul); 370 sc->sc_bg = ri->ri_devcmap[bg]; 371 chipsfb_clearscreen(sc); 372 373 if (console) 374 vcons_replay_msgbuf(&chipsfb_console_screen); 375 376 aprint_normal_dev(&sc->sc_dev, "%d MB aperture, %d MB VRAM at 0x%08x\n", 377 (u_int)(sc->sc_fbsize >> 20), 378 sc->memsize >> 20, (u_int)sc->sc_fb); 379 #ifdef CHIPSFB_DEBUG 380 aprint_debug("fb: %08lx\n", (ulong)ri->ri_bits); 381 #endif 382 383 j = 0; 384 for (i = 0; i < 256; i++) { 385 chipsfb_putpalreg(sc, i, rasops_cmap[j], rasops_cmap[j + 1], 386 rasops_cmap[j + 2]); 387 j += 3; 388 } 389 390 aa.console = console; 391 aa.scrdata = &chipsfb_screenlist; 392 aa.accessops = &chipsfb_accessops; 393 aa.accesscookie = &sc->vd; 394 395 config_found(self, &aa, wsemuldisplaydevprint); 396 } 397 398 static int 399 chipsfb_putpalreg(struct chipsfb_softc *sc, uint8_t index, uint8_t r, 400 uint8_t g, uint8_t b) 401 { 402 403 sc->sc_cmap_red[index] = r; 404 sc->sc_cmap_green[index] = g; 405 sc->sc_cmap_blue[index] = b; 406 407 chipsfb_write_vga(sc, CT_DACMASK, 0xff); 408 chipsfb_write_vga(sc, CT_WRITEINDEX, index); 409 chipsfb_write_vga(sc, CT_DACDATA, r); 410 chipsfb_write_vga(sc, CT_DACDATA, g); 411 chipsfb_write_vga(sc, CT_DACDATA, b); 412 413 return 0; 414 } 415 416 static int 417 chipsfb_putcmap(struct chipsfb_softc *sc, struct wsdisplay_cmap *cm) 418 { 419 u_char *r, *g, *b; 420 u_int index = cm->index; 421 u_int count = cm->count; 422 int i, error; 423 u_char rbuf[256], gbuf[256], bbuf[256]; 424 425 #ifdef CHIPSFB_DEBUG 426 aprint_debug("putcmap: %d %d\n",index, count); 427 #endif 428 if (cm->index >= 256 || cm->count > 256 || 429 (cm->index + cm->count) > 256) 430 return EINVAL; 431 error = copyin(cm->red, &rbuf[index], count); 432 if (error) 433 return error; 434 error = copyin(cm->green, &gbuf[index], count); 435 if (error) 436 return error; 437 error = copyin(cm->blue, &bbuf[index], count); 438 if (error) 439 return error; 440 441 memcpy(&sc->sc_cmap_red[index], &rbuf[index], count); 442 memcpy(&sc->sc_cmap_green[index], &gbuf[index], count); 443 memcpy(&sc->sc_cmap_blue[index], &bbuf[index], count); 444 445 r = &sc->sc_cmap_red[index]; 446 g = &sc->sc_cmap_green[index]; 447 b = &sc->sc_cmap_blue[index]; 448 449 for (i = 0; i < count; i++) { 450 chipsfb_putpalreg(sc, index, *r, *g, *b); 451 index++; 452 r++, g++, b++; 453 } 454 return 0; 455 } 456 457 static int 458 chipsfb_getcmap(struct chipsfb_softc *sc, struct wsdisplay_cmap *cm) 459 { 460 u_int index = cm->index; 461 u_int count = cm->count; 462 int error; 463 464 if (index >= 255 || count > 256 || index + count > 256) 465 return EINVAL; 466 467 error = copyout(&sc->sc_cmap_red[index], cm->red, count); 468 if (error) 469 return error; 470 error = copyout(&sc->sc_cmap_green[index], cm->green, count); 471 if (error) 472 return error; 473 error = copyout(&sc->sc_cmap_blue[index], cm->blue, count); 474 if (error) 475 return error; 476 477 return 0; 478 } 479 480 static void 481 chipsfb_clearscreen(struct chipsfb_softc *sc) 482 { 483 chipsfb_rectfill(sc, 0, 0, sc->width, sc->height, sc->sc_bg); 484 } 485 486 /* 487 * wsdisplay_emulops 488 */ 489 490 static void 491 chipsfb_cursor(void *cookie, int on, int row, int col) 492 { 493 struct rasops_info *ri = cookie; 494 struct vcons_screen *scr = ri->ri_hw; 495 struct chipsfb_softc *sc = scr->scr_cookie; 496 int x, y, wi, he; 497 498 wi = ri->ri_font->fontwidth; 499 he = ri->ri_font->fontheight; 500 501 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 502 x = ri->ri_ccol * wi + ri->ri_xorigin; 503 y = ri->ri_crow * he + ri->ri_yorigin; 504 if (ri->ri_flg & RI_CURSOR) { 505 chipsfb_bitblt(sc, x, y, x, y, wi, he, ROP_NOT_DST); 506 ri->ri_flg &= ~RI_CURSOR; 507 } 508 ri->ri_crow = row; 509 ri->ri_ccol = col; 510 if (on) { 511 x = ri->ri_ccol * wi + ri->ri_xorigin; 512 y = ri->ri_crow * he + ri->ri_yorigin; 513 chipsfb_bitblt(sc, x, y, x, y, wi, he, ROP_NOT_DST); 514 ri->ri_flg |= RI_CURSOR; 515 } 516 } else { 517 ri->ri_flg &= ~RI_CURSOR; 518 ri->ri_crow = row; 519 ri->ri_ccol = col; 520 } 521 } 522 523 #if 0 524 int 525 chipsfb_mapchar(void *cookie, int uni, u_int *index) 526 { 527 return 0; 528 } 529 #endif 530 531 static void 532 chipsfb_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 533 { 534 struct rasops_info *ri = cookie; 535 struct vcons_screen *scr = ri->ri_hw; 536 struct chipsfb_softc *sc = scr->scr_cookie; 537 int32_t xs, xd, y, width, height; 538 539 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 540 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 541 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 542 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 543 width = ri->ri_font->fontwidth * ncols; 544 height = ri->ri_font->fontheight; 545 chipsfb_bitblt(sc, xs, y, xd, y, width, height, ROP_COPY); 546 } 547 } 548 549 static void 550 chipsfb_erasecols(void *cookie, int row, int startcol, int ncols, 551 long fillattr) 552 { 553 struct rasops_info *ri = cookie; 554 struct vcons_screen *scr = ri->ri_hw; 555 struct chipsfb_softc *sc = scr->scr_cookie; 556 int32_t x, y, width, height, fg, bg, ul; 557 558 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 559 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 560 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 561 width = ri->ri_font->fontwidth * ncols; 562 height = ri->ri_font->fontheight; 563 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 564 565 chipsfb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 566 } 567 } 568 569 static void 570 chipsfb_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 571 { 572 struct rasops_info *ri = cookie; 573 struct vcons_screen *scr = ri->ri_hw; 574 struct chipsfb_softc *sc = scr->scr_cookie; 575 int32_t x, ys, yd, width, height; 576 577 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 578 x = ri->ri_xorigin; 579 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 580 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 581 width = ri->ri_emuwidth; 582 height = ri->ri_font->fontheight * nrows; 583 chipsfb_bitblt(sc, x, ys, x, yd, width, height, ROP_COPY); 584 } 585 } 586 587 static void 588 chipsfb_eraserows(void *cookie, int row, int nrows, long fillattr) 589 { 590 struct rasops_info *ri = cookie; 591 struct vcons_screen *scr = ri->ri_hw; 592 struct chipsfb_softc *sc = scr->scr_cookie; 593 int32_t x, y, width, height, fg, bg, ul; 594 595 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 596 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 597 if ((row == 0) && (nrows == ri->ri_rows)) { 598 /* clear the whole screen */ 599 chipsfb_rectfill(sc, 0, 0, ri->ri_width, 600 ri->ri_height, ri->ri_devcmap[bg]); 601 } else { 602 x = ri->ri_xorigin; 603 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 604 width = ri->ri_emuwidth; 605 height = ri->ri_font->fontheight * nrows; 606 chipsfb_rectfill(sc, x, y, width, height, 607 ri->ri_devcmap[bg]); 608 } 609 } 610 } 611 612 static void 613 chipsfb_bitblt(struct chipsfb_softc *sc, int xs, int ys, int xd, int yd, 614 int width, int height, uint8_t rop) 615 { 616 uint32_t src, dst, cmd = rop, stride, size; 617 618 cmd |= BLT_PAT_IS_SOLID; 619 620 /* we assume 8 bit for now */ 621 src = xs + ys * sc->linebytes; 622 dst = xd + yd * sc->linebytes; 623 624 if (xs < xd) { 625 /* right-to-left operation */ 626 cmd |= BLT_START_RIGHT; 627 src += width - 1; 628 dst += width - 1; 629 } 630 631 if (ys < yd) { 632 /* bottom-to-top operation */ 633 cmd |= BLT_START_BOTTOM; 634 src += (height - 1) * sc->linebytes; 635 dst += (height - 1) * sc->linebytes; 636 } 637 638 stride = (sc->linebytes << 16) | sc->linebytes; 639 size = (height << 16) | width; 640 641 chipsfb_wait_idle(sc); 642 chipsfb_write32(sc, CT_BLT_STRIDE, stride); 643 chipsfb_write32(sc, CT_BLT_SRCADDR, src); 644 chipsfb_write32(sc, CT_BLT_DSTADDR, dst); 645 chipsfb_write32(sc, CT_BLT_CONTROL, cmd); 646 chipsfb_write32(sc, CT_BLT_SIZE, size); 647 #ifdef CHIPSFB_WAIT 648 chipsfb_wait_idle(sc); 649 #endif 650 } 651 652 static void 653 chipsfb_rectfill(struct chipsfb_softc *sc, int x, int y, int width, 654 int height, int colour) 655 { 656 uint32_t dst, cmd, stride, size; 657 658 cmd = BLT_PAT_IS_SOLID | BLT_PAT_IS_MONO | ROP_PAT; 659 660 /* we assume 8 bit for now */ 661 dst = x + y * sc->linebytes; 662 663 stride = (sc->linebytes << 16) | sc->linebytes; 664 size = (height << 16) | width; 665 666 chipsfb_wait_idle(sc); 667 chipsfb_write32(sc, CT_BLT_STRIDE, stride); 668 chipsfb_write32(sc, CT_BLT_SRCADDR, dst); 669 chipsfb_write32(sc, CT_BLT_DSTADDR, dst); 670 chipsfb_write32(sc, CT_BLT_CONTROL, cmd); 671 chipsfb_write32(sc, CT_BLT_BG, colour); 672 chipsfb_write32(sc, CT_BLT_FG, colour); 673 chipsfb_write32(sc, CT_BLT_SIZE, size); 674 #ifdef CHIPSFB_WAIT 675 chipsfb_wait_idle(sc); 676 #endif 677 } 678 679 static void 680 chipsfb_putchar(void *cookie, int row, int col, u_int c, long attr) 681 { 682 struct rasops_info *ri = cookie; 683 struct wsdisplay_font *font = PICK_FONT(ri, c); 684 struct vcons_screen *scr = ri->ri_hw; 685 struct chipsfb_softc *sc = scr->scr_cookie; 686 687 if (__predict_false((unsigned int)row > ri->ri_rows || 688 (unsigned int)col > ri->ri_cols)) 689 return; 690 691 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 692 uint8_t *data; 693 int fg, bg, uc; 694 int x, y, wi, he; 695 696 wi = font->fontwidth; 697 he = font->fontheight; 698 699 if (!CHAR_IN_FONT(c, font)) 700 return; 701 bg = (u_char)ri->ri_devcmap[(attr >> 16) & 0xf]; 702 fg = (u_char)ri->ri_devcmap[(attr >> 24) & 0xf]; 703 x = ri->ri_xorigin + col * wi; 704 y = ri->ri_yorigin + row * he; 705 if (c == 0x20) { 706 chipsfb_rectfill(sc, x, y, wi, he, bg); 707 } else { 708 uc = c - font->firstchar; 709 data = (uint8_t *)font->data + uc * 710 ri->ri_fontscale; 711 chipsfb_setup_mono(sc, x, y, wi, he, fg, bg); 712 chipsfb_feed(sc, font->stride * he, data); 713 } 714 } 715 } 716 717 static void 718 chipsfb_setup_mono(struct chipsfb_softc *sc, int xd, int yd, int width, 719 int height, uint32_t fg, uint32_t bg) 720 { 721 uint32_t dst, cmd, stride, size; 722 723 cmd = BLT_PAT_IS_SOLID | BLT_SRC_IS_CPU | BLT_SRC_IS_MONO | ROP_COPY; 724 725 /* we assume 8 bit for now */ 726 dst = xd + yd * sc->linebytes; 727 728 stride = (sc->linebytes << 16); 729 size = (height << 16) | width; 730 731 chipsfb_wait_idle(sc); 732 chipsfb_write32(sc, CT_BLT_STRIDE, stride); 733 chipsfb_write32(sc, CT_BLT_EXPCTL, MONO_SRC_ALIGN_BYTE); 734 chipsfb_write32(sc, CT_BLT_DSTADDR, dst); 735 chipsfb_write32(sc, CT_BLT_SRCADDR, 0); 736 chipsfb_write32(sc, CT_BLT_CONTROL, cmd); 737 chipsfb_write32(sc, CT_BLT_BG, bg); 738 chipsfb_write32(sc, CT_BLT_FG, fg); 739 chipsfb_write32(sc, CT_BLT_SIZE, size); 740 } 741 742 static void 743 chipsfb_feed(struct chipsfb_softc *sc, int count, uint8_t *data) 744 { 745 int i; 746 uint32_t latch = 0, bork; 747 int shift = 0; 748 749 for (i = 0; i < count; i++) { 750 bork = data[i]; 751 latch |= (bork << shift); 752 if (shift == 24) { 753 chipsfb_write32(sc, CT_OFF_DATA, latch); 754 latch = 0; 755 shift = 0; 756 } else 757 shift += 8; 758 } 759 760 if (shift != 0) { 761 chipsfb_write32(sc, CT_OFF_DATA, latch); 762 } 763 764 /* apparently the chip wants 64bit-aligned data or it won't go idle */ 765 if ((count + 3) & 0x04) { 766 chipsfb_write32(sc, CT_OFF_DATA, 0); 767 } 768 #ifdef CHIPSFB_WAIT 769 chipsfb_wait_idle(sc); 770 #endif 771 } 772 773 #if 0 774 static void 775 chipsfb_showpal(struct chipsfb_softc *sc) 776 { 777 int i, x = 0; 778 779 for (i = 0; i < 16; i++) { 780 chipsfb_rectfill(sc, x, 0, 64, 64, i); 781 x += 64; 782 } 783 } 784 #endif 785 786 #if 0 787 static int 788 chipsfb_allocattr(void *cookie, int fg, int bg, int flags, long *attrp) 789 { 790 791 return 0; 792 } 793 #endif 794 795 static void 796 chipsfb_restore_palette(struct chipsfb_softc *sc) 797 { 798 int i; 799 800 for (i = 0; i < 256; i++) { 801 chipsfb_putpalreg(sc, 802 i, 803 sc->sc_cmap_red[i], 804 sc->sc_cmap_green[i], 805 sc->sc_cmap_blue[i]); 806 } 807 } 808 809 /* 810 * wsdisplay_accessops 811 */ 812 813 static int 814 chipsfb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, 815 struct lwp *l) 816 { 817 struct vcons_data *vd = v; 818 struct chipsfb_softc *sc = vd->cookie; 819 struct wsdisplay_fbinfo *wdf; 820 struct vcons_screen *ms = vd->active; 821 822 switch (cmd) { 823 case WSDISPLAYIO_GTYPE: 824 *(u_int *)data = WSDISPLAY_TYPE_PCIMISC; 825 return 0; 826 827 case WSDISPLAYIO_GINFO: 828 wdf = (void *)data; 829 wdf->height = ms->scr_ri.ri_height; 830 wdf->width = ms->scr_ri.ri_width; 831 wdf->depth = ms->scr_ri.ri_depth; 832 wdf->cmsize = 256; 833 return 0; 834 835 case WSDISPLAYIO_GETCMAP: 836 return chipsfb_getcmap(sc, 837 (struct wsdisplay_cmap *)data); 838 839 case WSDISPLAYIO_PUTCMAP: 840 return chipsfb_putcmap(sc, 841 (struct wsdisplay_cmap *)data); 842 843 /* PCI config read/write passthrough. */ 844 case PCI_IOC_CFGREAD: 845 case PCI_IOC_CFGWRITE: 846 return pci_devioctl(sc->sc_pc, sc->sc_pcitag, 847 cmd, data, flag, l); 848 849 case WSDISPLAYIO_SMODE: { 850 int new_mode = *(int*)data; 851 if (new_mode != sc->sc_mode) { 852 sc->sc_mode = new_mode; 853 if(new_mode == WSDISPLAYIO_MODE_EMUL) { 854 chipsfb_restore_palette(sc); 855 vcons_redraw_screen(ms); 856 } 857 } 858 } 859 return 0; 860 } 861 return EPASSTHROUGH; 862 } 863 864 static paddr_t 865 chipsfb_mmap(void *v, void *vs, off_t offset, int prot) 866 { 867 struct vcons_data *vd = v; 868 struct chipsfb_softc *sc = vd->cookie; 869 paddr_t pa; 870 871 /* 'regular' framebuffer mmap()ing */ 872 if (offset < sc->memsize) { 873 pa = bus_space_mmap(sc->sc_fbt, offset, 0, prot, 874 BUS_SPACE_MAP_LINEAR); 875 return pa; 876 } 877 878 /* 879 * restrict all other mappings to processes with superuser privileges 880 * or the kernel itself 881 */ 882 if (kauth_authorize_generic(kauth_cred_get(), KAUTH_GENERIC_ISSUSER, 883 NULL) != 0) { 884 aprint_normal_dev(&sc->sc_dev, "mmap() rejected.\n"); 885 return -1; 886 } 887 888 if ((offset >= sc->sc_fb) && (offset < (sc->sc_fb + sc->sc_fbsize))) { 889 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 890 BUS_SPACE_MAP_LINEAR); 891 return pa; 892 } 893 894 #ifdef PCI_MAGIC_IO_RANGE 895 /* allow mapping of IO space */ 896 if ((offset >= PCI_MAGIC_IO_RANGE) && 897 (offset < PCI_MAGIC_IO_RANGE + 0x10000)) { 898 pa = bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE, 899 0, prot, BUS_SPACE_MAP_LINEAR); 900 return pa; 901 } 902 #endif 903 904 #ifdef OFB_ALLOW_OTHERS 905 if (offset >= 0x80000000) { 906 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 907 BUS_SPACE_MAP_LINEAR); 908 return pa; 909 } 910 #endif 911 return -1; 912 } 913 914 static void 915 chipsfb_init_screen(void *cookie, struct vcons_screen *scr, 916 int existing, long *defattr) 917 { 918 struct chipsfb_softc *sc = cookie; 919 struct rasops_info *ri = &scr->scr_ri; 920 921 ri->ri_depth = sc->bits_per_pixel; 922 ri->ri_width = sc->width; 923 ri->ri_height = sc->height; 924 ri->ri_stride = sc->width; 925 ri->ri_flg = RI_CENTER | RI_FULLCLEAR; 926 927 ri->ri_bits = bus_space_vaddr(sc->sc_fbt, sc->sc_fbh); 928 929 #ifdef CHIPSFB_DEBUG 930 aprint_debug("addr: %08lx\n", (ulong)ri->ri_bits); 931 #endif 932 if (existing) { 933 ri->ri_flg |= RI_CLEAR; 934 } 935 936 rasops_init(ri, sc->height/8, sc->width/8); 937 ri->ri_caps = WSSCREEN_WSCOLORS; 938 939 rasops_reconfig(ri, sc->height / ri->ri_font->fontheight, 940 sc->width / ri->ri_font->fontwidth); 941 942 ri->ri_hw = scr; 943 ri->ri_ops.copyrows = chipsfb_copyrows; 944 ri->ri_ops.copycols = chipsfb_copycols; 945 ri->ri_ops.eraserows = chipsfb_eraserows; 946 ri->ri_ops.erasecols = chipsfb_erasecols; 947 ri->ri_ops.cursor = chipsfb_cursor; 948 ri->ri_ops.putchar = chipsfb_putchar; 949 } 950 951 #if 0 952 int 953 chipsfb_load_font(void *v, void *cookie, struct wsdisplay_font *data) 954 { 955 956 return 0; 957 } 958 #endif 959 960 static void 961 chipsfb_init(struct chipsfb_softc *sc) 962 { 963 964 chipsfb_wait_idle(sc); 965 966 chipsfb_write_indexed(sc, CT_CONF_INDEX, XR_IO_CONTROL, 967 ENABLE_CRTC_EXT | ENABLE_ATTR_EXT); 968 chipsfb_write_indexed(sc, CT_CONF_INDEX, XR_ADDR_MAPPING, 969 ENABLE_LINEAR); 970 971 /* setup the blitter */ 972 } 973 974 static uint32_t 975 chipsfb_probe_vram(struct chipsfb_softc *sc) 976 { 977 uint32_t ofs = 0x00080000; /* 512kB */ 978 979 /* 980 * advance in 0.5MB steps, see if we can read back what we wrote and 981 * if what we wrote to 0 is left untouched. Max. fb size is 4MB so 982 * we voluntarily stop there. 983 */ 984 chipsfb_write32(sc, 0, 0xf0f0f0f0); 985 chipsfb_write32(sc, ofs, 0x0f0f0f0f); 986 while ((chipsfb_read32(sc, 0) == 0xf0f0f0f0) && 987 (chipsfb_read32(sc, ofs) == 0x0f0f0f0f) && 988 (ofs < 0x00400000)) { 989 990 ofs += 0x00080000; 991 chipsfb_write32(sc, ofs, 0x0f0f0f0f); 992 } 993 994 return ofs; 995 } 996
Indexes created Mon Sep 22 21:09:42 GMT 2025