chipsfb.c revision 1.8
1 /* $NetBSD: chipsfb.c,v 1.8 2007/01/22 00:12:24 macallan Exp $ */ 2 3 /* 4 * Copyright (c) 2006 Michael Lorenz 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * A console driver for Chips & Technologies 65550 graphics controllers 32 * tested on macppc only so far 33 */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: chipsfb.c,v 1.8 2007/01/22 00:12:24 macallan Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <sys/malloc.h> 43 #include <sys/callout.h> 44 #include <sys/lwp.h> 45 #include <sys/kauth.h> 46 47 #include <uvm/uvm_extern.h> 48 49 #include <dev/videomode/videomode.h> 50 51 #include <dev/pci/pcivar.h> 52 #include <dev/pci/pcireg.h> 53 #include <dev/pci/pcidevs.h> 54 #include <dev/pci/pciio.h> 55 #include <dev/pci/chipsfbreg.h> 56 57 #include <dev/wscons/wsdisplayvar.h> 58 #include <dev/wscons/wsconsio.h> 59 #include <dev/wsfont/wsfont.h> 60 #include <dev/rasops/rasops.h> 61 #include <dev/wscons/wsdisplay_vconsvar.h> 62 63 #include <dev/i2c/i2cvar.h> 64 65 #include "opt_wsemul.h" 66 #include "opt_chipsfb.h" 67 68 struct chipsfb_softc { 69 struct device sc_dev; 70 pci_chipset_tag_t sc_pc; 71 pcitag_t sc_pcitag; 72 73 bus_space_tag_t sc_memt; 74 bus_space_tag_t sc_iot; 75 bus_space_handle_t sc_memh; 76 77 bus_space_tag_t sc_fbt; 78 bus_space_tag_t sc_ioregt; 79 bus_space_handle_t sc_fbh; 80 bus_space_handle_t sc_ioregh; 81 bus_addr_t sc_fb, sc_ioreg; 82 bus_size_t sc_fbsize, sc_ioregsize; 83 84 void *sc_ih; 85 86 size_t memsize; 87 88 int bits_per_pixel; 89 int width, height, linebytes; 90 91 int sc_mode; 92 uint32_t sc_bg; 93 94 u_char sc_cmap_red[256]; 95 u_char sc_cmap_green[256]; 96 u_char sc_cmap_blue[256]; 97 int sc_dacw; 98 99 /* 100 * I2C stuff 101 * DDC2 clock is on GPIO1, data on GPIO0 102 */ 103 struct i2c_controller sc_i2c; 104 uint8_t sc_edid[1024]; 105 int sc_edidbytes; /* number of bytes read from the monitor */ 106 107 struct vcons_data vd; 108 }; 109 110 static struct vcons_screen chipsfb_console_screen; 111 112 extern const u_char rasops_cmap[768]; 113 114 static int chipsfb_match(struct device *, struct cfdata *, void *); 115 static void chipsfb_attach(struct device *, struct device *, void *); 116 117 CFATTACH_DECL(chipsfb, sizeof(struct chipsfb_softc), chipsfb_match, 118 chipsfb_attach, NULL, NULL); 119 120 static void chipsfb_init(struct chipsfb_softc *); 121 122 static void chipsfb_cursor(void *, int, int, int); 123 static void chipsfb_copycols(void *, int, int, int, int); 124 static void chipsfb_erasecols(void *, int, int, int, long); 125 static void chipsfb_copyrows(void *, int, int, int); 126 static void chipsfb_eraserows(void *, int, int, long); 127 128 #if 0 129 static int chipsfb_allocattr(void *, int, int, int, long *); 130 static void chipsfb_scroll(void *, void *, int); 131 static int chipsfb_load_font(void *, void *, struct wsdisplay_font *); 132 #endif 133 134 static int chipsfb_putcmap(struct chipsfb_softc *, 135 struct wsdisplay_cmap *); 136 static int chipsfb_getcmap(struct chipsfb_softc *, 137 struct wsdisplay_cmap *); 138 static int chipsfb_putpalreg(struct chipsfb_softc *, uint8_t, uint8_t, 139 uint8_t, uint8_t); 140 141 static void chipsfb_bitblt(struct chipsfb_softc *, int, int, int, int, 142 int, int, uint8_t); 143 static void chipsfb_rectfill(struct chipsfb_softc *, int, int, int, int, 144 int); 145 static void chipsfb_putchar(void *, int, int, u_int, long); 146 static void chipsfb_setup_mono(struct chipsfb_softc *, int, int, int, 147 int, uint32_t, uint32_t); 148 static void chipsfb_feed(struct chipsfb_softc *, int, uint8_t *); 149 150 #if 0 151 static void chipsfb_showpal(struct chipsfb_softc *); 152 #endif 153 static void chipsfb_restore_palette(struct chipsfb_softc *); 154 155 static void chipsfb_wait_idle(struct chipsfb_softc *); 156 157 static uint32_t chipsfb_probe_vram(struct chipsfb_softc *); 158 159 struct wsscreen_descr chipsfb_defaultscreen = { 160 "default", 161 0, 0, 162 NULL, 163 8, 16, 164 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 165 }; 166 167 const struct wsscreen_descr *_chipsfb_scrlist[] = { 168 &chipsfb_defaultscreen, 169 /* XXX other formats, graphics screen? */ 170 }; 171 172 struct wsscreen_list chipsfb_screenlist = { 173 sizeof(_chipsfb_scrlist) / sizeof(struct wsscreen_descr *), _chipsfb_scrlist 174 }; 175 176 static int chipsfb_ioctl(void *, void *, u_long, caddr_t, int, 177 struct lwp *); 178 static paddr_t chipsfb_mmap(void *, void *, off_t, int); 179 static void chipsfb_clearscreen(struct chipsfb_softc *); 180 static void chipsfb_init_screen(void *, struct vcons_screen *, int, 181 long *); 182 183 184 struct wsdisplay_accessops chipsfb_accessops = { 185 chipsfb_ioctl, 186 chipsfb_mmap, 187 NULL, /* load_font */ 188 NULL, /* polls */ 189 NULL, /* scroll */ 190 }; 191 192 /* 193 * Inline functions for getting access to register aperture. 194 */ 195 static inline void 196 chipsfb_write32(struct chipsfb_softc *sc, uint32_t reg, uint32_t val) 197 { 198 bus_space_write_4(sc->sc_fbt, sc->sc_fbh, reg, val); 199 } 200 201 static inline uint32_t 202 chipsfb_read32(struct chipsfb_softc *sc, uint32_t reg) 203 { 204 return bus_space_read_4(sc->sc_fbt, sc->sc_fbh, reg); 205 } 206 207 static inline void 208 chipsfb_write_vga(struct chipsfb_softc *sc, uint32_t reg, uint8_t val) 209 { 210 bus_space_write_1(sc->sc_iot, sc->sc_ioregh, reg, val); 211 } 212 213 static inline uint8_t 214 chipsfb_read_vga(struct chipsfb_softc *sc, uint32_t reg) 215 { 216 return bus_space_read_1(sc->sc_iot, sc->sc_ioregh, reg); 217 } 218 219 static inline uint8_t 220 chipsfb_read_indexed(struct chipsfb_softc *sc, uint32_t reg, uint8_t index) 221 { 222 223 chipsfb_write_vga(sc, reg & 0xfffe, index); 224 return chipsfb_read_vga(sc, reg | 0x0001); 225 } 226 227 static inline void 228 chipsfb_write_indexed(struct chipsfb_softc *sc, uint32_t reg, uint8_t index, 229 uint8_t val) 230 { 231 232 chipsfb_write_vga(sc, reg & 0xfffe, index); 233 chipsfb_write_vga(sc, reg | 0x0001, val); 234 } 235 236 static void 237 chipsfb_wait_idle(struct chipsfb_softc *sc) 238 { 239 240 #ifdef CHIPSFB_DEBUG 241 chipsfb_write32(sc, CT_OFF_FB + (800 * 598) - 4, 0); 242 #endif 243 244 /* spin until the blitter is idle */ 245 while ((chipsfb_read32(sc, CT_BLT_CONTROL) & BLT_IS_BUSY) != 0) { 246 } 247 248 #ifdef CHIPSFB_DEBUG 249 chipsfb_write32(sc, CT_OFF_FB + (800 * 598) - 4, 0xffffffff); 250 #endif 251 } 252 253 static int 254 chipsfb_match(struct device *parent, struct cfdata *match, void *aux) 255 { 256 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 257 258 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY || 259 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 260 return 0; 261 if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CHIPS) && 262 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CHIPS_65550)) 263 return 100; 264 if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CHIPS) && 265 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CHIPS_65554)) 266 return 100; 267 return 0; 268 } 269 270 static void 271 chipsfb_attach(struct device *parent, struct device *self, void *aux) 272 { 273 struct chipsfb_softc *sc = (void *)self; 274 struct pci_attach_args *pa = aux; 275 char devinfo[256]; 276 struct wsemuldisplaydev_attach_args aa; 277 struct rasops_info *ri; 278 prop_dictionary_t dict; 279 pcireg_t screg; 280 ulong defattr; 281 int console = 0, width, height, i, j; 282 uint32_t bg, fg, ul; 283 284 dict = device_properties(self); 285 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 286 sc->sc_pc = pa->pa_pc; 287 sc->sc_pcitag = pa->pa_tag; 288 sc->sc_dacw = -1; 289 290 screg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, PCI_COMMAND_STATUS_REG); 291 screg |= PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; 292 pci_conf_write(sc->sc_pc, sc->sc_pcitag,PCI_COMMAND_STATUS_REG,screg); 293 294 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 295 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class)); 296 #ifdef CHIPSFB_DEBUG 297 printf(prop_dictionary_externalize(dict)); 298 #endif 299 300 sc->sc_memt = pa->pa_memt; 301 sc->sc_iot = pa->pa_iot; 302 303 /* the framebuffer */ 304 if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_MEM, 305 BUS_SPACE_MAP_LINEAR, 306 &sc->sc_fbt, &sc->sc_fbh, &sc->sc_fb, &sc->sc_fbsize)) { 307 aprint_error("%s: failed to map the frame buffer.\n", 308 sc->sc_dev.dv_xname); 309 } 310 311 /* IO-mapped registers */ 312 if (bus_space_map(sc->sc_iot, 0x0, PAGE_SIZE, 0, &sc->sc_ioregh) != 0) { 313 aprint_error("%s: failed to map IO registers.\n", 314 sc->sc_dev.dv_xname); 315 } 316 317 sc->memsize = chipsfb_probe_vram(sc); 318 chipsfb_init(sc); 319 320 /* we should read these from the chip instead of depending on OF */ 321 width = height = -1; 322 323 /* detect panel size */ 324 width = chipsfb_read_indexed(sc, CT_FP_INDEX, FP_HSIZE_LSB); 325 width |= (chipsfb_read_indexed(sc, CT_FP_INDEX, FP_HORZ_OVERFLOW_1) 326 & 0x0f) << 8; 327 width = (width + 1) * 8; 328 height = chipsfb_read_indexed(sc, CT_FP_INDEX, FP_VSIZE_LSB); 329 height |= (chipsfb_read_indexed(sc, CT_FP_INDEX, FP_VERT_OVERFLOW_1) 330 & 0x0f) << 8; 331 height++; 332 aprint_verbose("Panel size: %d x %d\n", width, height); 333 334 if (!prop_dictionary_get_uint32(dict, "width", &sc->width)) 335 sc->width = width; 336 if (!prop_dictionary_get_uint32(dict, "height", &sc->height)) 337 sc->height = height; 338 if (!prop_dictionary_get_uint32(dict, "depth", &sc->bits_per_pixel)) 339 sc->bits_per_pixel = 8; 340 if (!prop_dictionary_get_uint32(dict, "linebytes", &sc->linebytes)) 341 sc->linebytes = (sc->width * sc->bits_per_pixel) >> 3; 342 343 prop_dictionary_get_bool(dict, "is_console", &console); 344 345 #ifdef notyet 346 /* XXX this should at least be configurable via kernel config */ 347 chipsfb_set_videomode(sc, &videomode_list[16]); 348 #endif 349 350 vcons_init(&sc->vd, sc, &chipsfb_defaultscreen, &chipsfb_accessops); 351 sc->vd.init_screen = chipsfb_init_screen; 352 353 ri = &chipsfb_console_screen.scr_ri; 354 if (console) { 355 vcons_init_screen(&sc->vd, &chipsfb_console_screen, 1, 356 &defattr); 357 chipsfb_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 358 359 chipsfb_defaultscreen.textops = &ri->ri_ops; 360 chipsfb_defaultscreen.capabilities = ri->ri_caps; 361 chipsfb_defaultscreen.nrows = ri->ri_rows; 362 chipsfb_defaultscreen.ncols = ri->ri_cols; 363 wsdisplay_cnattach(&chipsfb_defaultscreen, ri, 0, 0, defattr); 364 } else { 365 /* 366 * since we're not the console we can postpone the rest 367 * until someone actually allocates a screen for us 368 */ 369 #ifdef notyet 370 chipsfb_set_videomode(sc, &videomode_list[0]); 371 #endif 372 } 373 374 rasops_unpack_attr(defattr, &fg, &bg, &ul); 375 sc->sc_bg = ri->ri_devcmap[bg]; 376 chipsfb_clearscreen(sc); 377 378 aprint_normal("%s: %d MB aperture, %d MB VRAM at 0x%08x\n", 379 sc->sc_dev.dv_xname, (u_int)(sc->sc_fbsize >> 20), 380 sc->memsize >> 20, (u_int)sc->sc_fb); 381 #ifdef CHIPSFB_DEBUG 382 aprint_debug("fb: %08lx\n", (ulong)ri->ri_bits); 383 #endif 384 385 j = 0; 386 for (i = 0; i < 256; i++) { 387 chipsfb_putpalreg(sc, i, rasops_cmap[j], rasops_cmap[j + 1], 388 rasops_cmap[j + 2]); 389 j += 3; 390 } 391 392 aa.console = console; 393 aa.scrdata = &chipsfb_screenlist; 394 aa.accessops = &chipsfb_accessops; 395 aa.accesscookie = &sc->vd; 396 397 config_found(self, &aa, wsemuldisplaydevprint); 398 } 399 400 static int 401 chipsfb_putpalreg(struct chipsfb_softc *sc, uint8_t index, uint8_t r, 402 uint8_t g, uint8_t b) 403 { 404 405 sc->sc_cmap_red[index] = r; 406 sc->sc_cmap_green[index] = g; 407 sc->sc_cmap_blue[index] = b; 408 409 chipsfb_write_vga(sc, CT_DACMASK, 0xff); 410 chipsfb_write_vga(sc, CT_WRITEINDEX, index); 411 chipsfb_write_vga(sc, CT_DACDATA, r); 412 chipsfb_write_vga(sc, CT_DACDATA, g); 413 chipsfb_write_vga(sc, CT_DACDATA, b); 414 415 return 0; 416 } 417 418 static int 419 chipsfb_putcmap(struct chipsfb_softc *sc, struct wsdisplay_cmap *cm) 420 { 421 u_char *r, *g, *b; 422 u_int index = cm->index; 423 u_int count = cm->count; 424 int i, error; 425 u_char rbuf[256], gbuf[256], bbuf[256]; 426 427 #ifdef CHIPSFB_DEBUG 428 aprint_debug("putcmap: %d %d\n",index, count); 429 #endif 430 if (cm->index >= 256 || cm->count > 256 || 431 (cm->index + cm->count) > 256) 432 return EINVAL; 433 error = copyin(cm->red, &rbuf[index], count); 434 if (error) 435 return error; 436 error = copyin(cm->green, &gbuf[index], count); 437 if (error) 438 return error; 439 error = copyin(cm->blue, &bbuf[index], count); 440 if (error) 441 return error; 442 443 memcpy(&sc->sc_cmap_red[index], &rbuf[index], count); 444 memcpy(&sc->sc_cmap_green[index], &gbuf[index], count); 445 memcpy(&sc->sc_cmap_blue[index], &bbuf[index], count); 446 447 r = &sc->sc_cmap_red[index]; 448 g = &sc->sc_cmap_green[index]; 449 b = &sc->sc_cmap_blue[index]; 450 451 for (i = 0; i < count; i++) { 452 chipsfb_putpalreg(sc, index, *r, *g, *b); 453 index++; 454 r++, g++, b++; 455 } 456 return 0; 457 } 458 459 static int 460 chipsfb_getcmap(struct chipsfb_softc *sc, struct wsdisplay_cmap *cm) 461 { 462 u_int index = cm->index; 463 u_int count = cm->count; 464 int error; 465 466 if (index >= 255 || count > 256 || index + count > 256) 467 return EINVAL; 468 469 error = copyout(&sc->sc_cmap_red[index], cm->red, count); 470 if (error) 471 return error; 472 error = copyout(&sc->sc_cmap_green[index], cm->green, count); 473 if (error) 474 return error; 475 error = copyout(&sc->sc_cmap_blue[index], cm->blue, count); 476 if (error) 477 return error; 478 479 return 0; 480 } 481 482 static void 483 chipsfb_clearscreen(struct chipsfb_softc *sc) 484 { 485 chipsfb_rectfill(sc, 0, 0, sc->width, sc->height, sc->sc_bg); 486 } 487 488 /* 489 * wsdisplay_emulops 490 */ 491 492 static void 493 chipsfb_cursor(void *cookie, int on, int row, int col) 494 { 495 struct rasops_info *ri = cookie; 496 struct vcons_screen *scr = ri->ri_hw; 497 struct chipsfb_softc *sc = scr->scr_cookie; 498 int x, y, wi, he; 499 500 wi = ri->ri_font->fontwidth; 501 he = ri->ri_font->fontheight; 502 503 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 504 x = ri->ri_ccol * wi + ri->ri_xorigin; 505 y = ri->ri_crow * he + ri->ri_yorigin; 506 if (ri->ri_flg & RI_CURSOR) { 507 chipsfb_bitblt(sc, x, y, x, y, wi, he, ROP_NOT_DST); 508 ri->ri_flg &= ~RI_CURSOR; 509 } 510 ri->ri_crow = row; 511 ri->ri_ccol = col; 512 if (on) { 513 x = ri->ri_ccol * wi + ri->ri_xorigin; 514 y = ri->ri_crow * he + ri->ri_yorigin; 515 chipsfb_bitblt(sc, x, y, x, y, wi, he, ROP_NOT_DST); 516 ri->ri_flg |= RI_CURSOR; 517 } 518 } else { 519 ri->ri_flg &= ~RI_CURSOR; 520 ri->ri_crow = row; 521 ri->ri_ccol = col; 522 } 523 } 524 525 #if 0 526 int 527 chipsfb_mapchar(void *cookie, int uni, u_int *index) 528 { 529 return 0; 530 } 531 #endif 532 533 static void 534 chipsfb_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 535 { 536 struct rasops_info *ri = cookie; 537 struct vcons_screen *scr = ri->ri_hw; 538 struct chipsfb_softc *sc = scr->scr_cookie; 539 int32_t xs, xd, y, width, height; 540 541 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 542 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 543 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 544 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 545 width = ri->ri_font->fontwidth * ncols; 546 height = ri->ri_font->fontheight; 547 chipsfb_bitblt(sc, xs, y, xd, y, width, height, ROP_COPY); 548 } 549 } 550 551 static void 552 chipsfb_erasecols(void *cookie, int row, int startcol, int ncols, 553 long fillattr) 554 { 555 struct rasops_info *ri = cookie; 556 struct vcons_screen *scr = ri->ri_hw; 557 struct chipsfb_softc *sc = scr->scr_cookie; 558 int32_t x, y, width, height, fg, bg, ul; 559 560 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 561 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 562 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 563 width = ri->ri_font->fontwidth * ncols; 564 height = ri->ri_font->fontheight; 565 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 566 567 chipsfb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 568 } 569 } 570 571 static void 572 chipsfb_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 573 { 574 struct rasops_info *ri = cookie; 575 struct vcons_screen *scr = ri->ri_hw; 576 struct chipsfb_softc *sc = scr->scr_cookie; 577 int32_t x, ys, yd, width, height; 578 579 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 580 x = ri->ri_xorigin; 581 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 582 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 583 width = ri->ri_emuwidth; 584 height = ri->ri_font->fontheight * nrows; 585 chipsfb_bitblt(sc, x, ys, x, yd, width, height, ROP_COPY); 586 } 587 } 588 589 static void 590 chipsfb_eraserows(void *cookie, int row, int nrows, long fillattr) 591 { 592 struct rasops_info *ri = cookie; 593 struct vcons_screen *scr = ri->ri_hw; 594 struct chipsfb_softc *sc = scr->scr_cookie; 595 int32_t x, y, width, height, fg, bg, ul; 596 597 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 598 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 599 if ((row == 0) && (nrows == ri->ri_rows)) { 600 /* clear the whole screen */ 601 chipsfb_rectfill(sc, 0, 0, ri->ri_width, 602 ri->ri_height, ri->ri_devcmap[bg]); 603 } else { 604 x = ri->ri_xorigin; 605 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 606 width = ri->ri_emuwidth; 607 height = ri->ri_font->fontheight * nrows; 608 chipsfb_rectfill(sc, x, y, width, height, 609 ri->ri_devcmap[bg]); 610 } 611 } 612 } 613 614 static void 615 chipsfb_bitblt(struct chipsfb_softc *sc, int xs, int ys, int xd, int yd, 616 int width, int height, uint8_t rop) 617 { 618 uint32_t src, dst, cmd = rop, stride, size; 619 620 cmd |= BLT_PAT_IS_SOLID; 621 622 /* we assume 8 bit for now */ 623 src = xs + ys * sc->linebytes; 624 dst = xd + yd * sc->linebytes; 625 626 if (xs < xd) { 627 /* right-to-left operation */ 628 cmd |= BLT_START_RIGHT; 629 src += width - 1; 630 dst += width - 1; 631 } 632 633 if (ys < yd) { 634 /* bottom-to-top operation */ 635 cmd |= BLT_START_BOTTOM; 636 src += (height - 1) * sc->linebytes; 637 dst += (height - 1) * sc->linebytes; 638 } 639 640 stride = (sc->linebytes << 16) | sc->linebytes; 641 size = (height << 16) | width; 642 643 chipsfb_wait_idle(sc); 644 chipsfb_write32(sc, CT_BLT_STRIDE, stride); 645 chipsfb_write32(sc, CT_BLT_SRCADDR, src); 646 chipsfb_write32(sc, CT_BLT_DSTADDR, dst); 647 chipsfb_write32(sc, CT_BLT_CONTROL, cmd); 648 chipsfb_write32(sc, CT_BLT_SIZE, size); 649 #ifdef CHIPSFB_WAIT 650 chipsfb_wait_idle(sc); 651 #endif 652 } 653 654 static void 655 chipsfb_rectfill(struct chipsfb_softc *sc, int x, int y, int width, 656 int height, int colour) 657 { 658 uint32_t dst, cmd, stride, size; 659 660 cmd = BLT_PAT_IS_SOLID | BLT_PAT_IS_MONO | ROP_PAT; 661 662 /* we assume 8 bit for now */ 663 dst = x + y * sc->linebytes; 664 665 stride = (sc->linebytes << 16) | sc->linebytes; 666 size = (height << 16) | width; 667 668 chipsfb_wait_idle(sc); 669 chipsfb_write32(sc, CT_BLT_STRIDE, stride); 670 chipsfb_write32(sc, CT_BLT_SRCADDR, dst); 671 chipsfb_write32(sc, CT_BLT_DSTADDR, dst); 672 chipsfb_write32(sc, CT_BLT_CONTROL, cmd); 673 chipsfb_write32(sc, CT_BLT_BG, colour); 674 chipsfb_write32(sc, CT_BLT_FG, colour); 675 chipsfb_write32(sc, CT_BLT_SIZE, size); 676 #ifdef CHIPSFB_WAIT 677 chipsfb_wait_idle(sc); 678 #endif 679 } 680 681 static void 682 chipsfb_putchar(void *cookie, int row, int col, u_int c, long attr) 683 { 684 struct rasops_info *ri = cookie; 685 struct vcons_screen *scr = ri->ri_hw; 686 struct chipsfb_softc *sc = scr->scr_cookie; 687 688 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 689 uint8_t *data; 690 int fg, bg, uc; 691 int x, y, wi, he; 692 693 wi = ri->ri_font->fontwidth; 694 he = ri->ri_font->fontheight; 695 696 if (!CHAR_IN_FONT(c, ri->ri_font)) 697 return; 698 bg = (u_char)ri->ri_devcmap[(attr >> 16) & 0xf]; 699 fg = (u_char)ri->ri_devcmap[(attr >> 24) & 0xf]; 700 x = ri->ri_xorigin + col * wi; 701 y = ri->ri_yorigin + row * he; 702 if (c == 0x20) { 703 chipsfb_rectfill(sc, x, y, wi, he, bg); 704 } else { 705 uc = c-ri->ri_font->firstchar; 706 data = (uint8_t *)ri->ri_font->data + uc * 707 ri->ri_fontscale; 708 chipsfb_setup_mono(sc, x, y, wi, he, fg, bg); 709 chipsfb_feed(sc, ri->ri_font->stride * he, data); 710 } 711 } 712 } 713 714 static void 715 chipsfb_setup_mono(struct chipsfb_softc *sc, int xd, int yd, int width, 716 int height, uint32_t fg, uint32_t bg) 717 { 718 uint32_t dst, cmd, stride, size; 719 720 cmd = BLT_PAT_IS_SOLID | BLT_SRC_IS_CPU | BLT_SRC_IS_MONO | ROP_COPY; 721 722 /* we assume 8 bit for now */ 723 dst = xd + yd * sc->linebytes; 724 725 stride = (sc->linebytes << 16); 726 size = (height << 16) | width; 727 728 chipsfb_wait_idle(sc); 729 chipsfb_write32(sc, CT_BLT_STRIDE, stride); 730 chipsfb_write32(sc, CT_BLT_EXPCTL, MONO_SRC_ALIGN_BYTE); 731 chipsfb_write32(sc, CT_BLT_DSTADDR, dst); 732 chipsfb_write32(sc, CT_BLT_SRCADDR, 0); 733 chipsfb_write32(sc, CT_BLT_CONTROL, cmd); 734 chipsfb_write32(sc, CT_BLT_BG, bg); 735 chipsfb_write32(sc, CT_BLT_FG, fg); 736 chipsfb_write32(sc, CT_BLT_SIZE, size); 737 } 738 739 static void 740 chipsfb_feed(struct chipsfb_softc *sc, int count, uint8_t *data) 741 { 742 int i; 743 uint32_t latch = 0, bork; 744 int shift = 0; 745 746 for (i = 0; i < count; i++) { 747 bork = data[i]; 748 latch |= (bork << shift); 749 if (shift == 24) { 750 chipsfb_write32(sc, CT_OFF_DATA, latch); 751 latch = 0; 752 shift = 0; 753 } else 754 shift += 8; 755 } 756 757 if (shift != 0) { 758 chipsfb_write32(sc, CT_OFF_DATA, latch); 759 } 760 761 /* apparently the chip wants 64bit-aligned data or it won't go idle */ 762 if ((count + 3) & 0x04) { 763 chipsfb_write32(sc, CT_OFF_DATA, 0); 764 } 765 #ifdef CHIPSFB_WAIT 766 chipsfb_wait_idle(sc); 767 #endif 768 } 769 770 #if 0 771 static void 772 chipsfb_showpal(struct chipsfb_softc *sc) 773 { 774 int i, x = 0; 775 776 for (i = 0; i < 16; i++) { 777 chipsfb_rectfill(sc, x, 0, 64, 64, i); 778 x += 64; 779 } 780 } 781 #endif 782 783 #if 0 784 static int 785 chipsfb_allocattr(void *cookie, int fg, int bg, int flags, long *attrp) 786 { 787 788 return 0; 789 } 790 #endif 791 792 static void 793 chipsfb_restore_palette(struct chipsfb_softc *sc) 794 { 795 int i; 796 797 for (i = 0; i < 256; i++) { 798 chipsfb_putpalreg(sc, 799 i, 800 sc->sc_cmap_red[i], 801 sc->sc_cmap_green[i], 802 sc->sc_cmap_blue[i]); 803 } 804 } 805 806 /* 807 * wsdisplay_accessops 808 */ 809 810 static int 811 chipsfb_ioctl(void *v, void *vs, u_long cmd, caddr_t data, int flag, 812 struct lwp *l) 813 { 814 struct vcons_data *vd = v; 815 struct chipsfb_softc *sc = vd->cookie; 816 struct wsdisplay_fbinfo *wdf; 817 struct vcons_screen *ms = vd->active; 818 819 switch (cmd) { 820 case WSDISPLAYIO_GTYPE: 821 *(u_int *)data = WSDISPLAY_TYPE_PCIMISC; 822 return 0; 823 824 case WSDISPLAYIO_GINFO: 825 wdf = (void *)data; 826 wdf->height = ms->scr_ri.ri_height; 827 wdf->width = ms->scr_ri.ri_width; 828 wdf->depth = ms->scr_ri.ri_depth; 829 wdf->cmsize = 256; 830 return 0; 831 832 case WSDISPLAYIO_GETCMAP: 833 return chipsfb_getcmap(sc, 834 (struct wsdisplay_cmap *)data); 835 836 case WSDISPLAYIO_PUTCMAP: 837 return chipsfb_putcmap(sc, 838 (struct wsdisplay_cmap *)data); 839 840 /* PCI config read/write passthrough. */ 841 case PCI_IOC_CFGREAD: 842 case PCI_IOC_CFGWRITE: 843 return (pci_devioctl(sc->sc_pc, sc->sc_pcitag, 844 cmd, data, flag, l)); 845 846 case WSDISPLAYIO_SMODE: 847 { 848 int new_mode = *(int*)data; 849 if (new_mode != sc->sc_mode) { 850 sc->sc_mode = new_mode; 851 if(new_mode == WSDISPLAYIO_MODE_EMUL) { 852 chipsfb_restore_palette(sc); 853 vcons_redraw_screen(ms); 854 } 855 } 856 } 857 return 0; 858 } 859 return EPASSTHROUGH; 860 } 861 862 static paddr_t 863 chipsfb_mmap(void *v, void *vs, off_t offset, int prot) 864 { 865 struct vcons_data *vd = v; 866 struct chipsfb_softc *sc = vd->cookie; 867 struct lwp *me; 868 paddr_t pa; 869 870 /* 'regular' framebuffer mmap()ing */ 871 if (offset < sc->memsize) { 872 pa = bus_space_mmap(sc->sc_fbt, offset, 0, prot, 873 BUS_SPACE_MAP_LINEAR); 874 return pa; 875 } 876 877 /* 878 * restrict all other mappings to processes with superuser privileges 879 * or the kernel itself 880 */ 881 me = curlwp; 882 if (me != NULL) { 883 if (kauth_authorize_generic(me->l_cred, KAUTH_GENERIC_ISSUSER, 884 NULL) != 0) { 885 aprint_normal("%s: mmap() rejected.\n", sc->sc_dev.dv_xname); 886 return -1; 887 } 888 } 889 890 if ((offset >= sc->sc_fb) && (offset < (sc->sc_fb + sc->sc_fbsize))) { 891 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 892 BUS_SPACE_MAP_LINEAR); 893 return pa; 894 } 895 896 #ifdef macppc 897 /* allow mapping of IO space */ 898 if ((offset >= 0xf2000000) && (offset < 0xf2800000)) { 899 pa = bus_space_mmap(sc->sc_iot, offset - 0xf2000000, 0, prot, 900 BUS_SPACE_MAP_LINEAR); 901 return pa; 902 } 903 #endif 904 905 #ifdef OFB_ALLOW_OTHERS 906 if (offset >= 0x80000000) { 907 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 908 BUS_SPACE_MAP_LINEAR); 909 return pa; 910 } 911 #endif 912 return -1; 913 } 914 915 static void 916 chipsfb_init_screen(void *cookie, struct vcons_screen *scr, 917 int existing, long *defattr) 918 { 919 struct chipsfb_softc *sc = cookie; 920 struct rasops_info *ri = &scr->scr_ri; 921 922 ri->ri_depth = sc->bits_per_pixel; 923 ri->ri_width = sc->width; 924 ri->ri_height = sc->height; 925 ri->ri_stride = sc->width; 926 ri->ri_flg = RI_CENTER | RI_FULLCLEAR; 927 928 ri->ri_bits = bus_space_vaddr(sc->sc_fbt, sc->sc_fbh); 929 930 #ifdef CHIPSFB_DEBUG 931 aprint_debug("addr: %08lx\n", (ulong)ri->ri_bits); 932 #endif 933 if (existing) { 934 ri->ri_flg |= RI_CLEAR; 935 } 936 937 rasops_init(ri, sc->height/8, sc->width/8); 938 ri->ri_caps = WSSCREEN_WSCOLORS; 939 940 rasops_reconfig(ri, sc->height / ri->ri_font->fontheight, 941 sc->width / ri->ri_font->fontwidth); 942 943 ri->ri_hw = scr; 944 ri->ri_ops.copyrows = chipsfb_copyrows; 945 ri->ri_ops.copycols = chipsfb_copycols; 946 ri->ri_ops.eraserows = chipsfb_eraserows; 947 ri->ri_ops.erasecols = chipsfb_erasecols; 948 ri->ri_ops.cursor = chipsfb_cursor; 949 ri->ri_ops.putchar = chipsfb_putchar; 950 } 951 952 #if 0 953 int 954 chipsfb_load_font(void *v, void *cookie, struct wsdisplay_font *data) 955 { 956 957 return 0; 958 } 959 #endif 960 961 static void 962 chipsfb_init(struct chipsfb_softc *sc) 963 { 964 965 chipsfb_wait_idle(sc); 966 967 chipsfb_write_indexed(sc, CT_CONF_INDEX, XR_IO_CONTROL, 968 ENABLE_CRTC_EXT | ENABLE_ATTR_EXT); 969 chipsfb_write_indexed(sc, CT_CONF_INDEX, XR_ADDR_MAPPING, 970 ENABLE_LINEAR); 971 972 /* setup the blitter */ 973 } 974 975 static uint32_t 976 chipsfb_probe_vram(struct chipsfb_softc *sc) 977 { 978 uint32_t ofs = 0x00080000; /* 512kB */ 979 980 /* 981 * advance in 0.5MB steps, see if we can read back what we wrote and 982 * if what we wrote to 0 is left untouched. Max. fb size is 4MB so 983 * we voluntarily stop there. 984 */ 985 chipsfb_write32(sc, 0, 0xf0f0f0f0); 986 chipsfb_write32(sc, ofs, 0x0f0f0f0f); 987 while ((chipsfb_read32(sc, 0) == 0xf0f0f0f0) && 988 (chipsfb_read32(sc, ofs) == 0x0f0f0f0f) && 989 (ofs < 0x00400000)) { 990 991 ofs += 0x00080000; 992 chipsfb_write32(sc, ofs, 0x0f0f0f0f); 993 } 994 995 return ofs; 996 } 997
Indexes created Wed Sep 24 05:09:52 GMT 2025