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cmpci.c revision 1.26.2.1
      1  1.26.2.1      kent /*	$NetBSD: cmpci.c,v 1.26.2.1 2005/01/02 20:03:11 kent Exp $	*/
      2       1.1  augustss 
      3       1.1  augustss /*
      4      1.10     itohy  * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
      5       1.1  augustss  * All rights reserved.
      6       1.1  augustss  *
      7       1.1  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8      1.22    keihan  * by Takuya SHIOZAKI <tshiozak (at) NetBSD.org> .
      9       1.1  augustss  *
     10      1.10     itohy  * This code is derived from software contributed to The NetBSD Foundation
     11      1.10     itohy  * by ITOH Yasufumi.
     12      1.10     itohy  *
     13       1.1  augustss  * Redistribution and use in source and binary forms, with or without
     14       1.1  augustss  * modification, are permitted provided that the following conditions
     15       1.1  augustss  * are met:
     16       1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     17       1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     18       1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     19       1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     20       1.1  augustss  *    documentation and/or other materials provided with the distribution.
     21       1.1  augustss  *
     22       1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     23       1.1  augustss  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24       1.1  augustss  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25       1.1  augustss  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     26       1.1  augustss  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27       1.1  augustss  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28       1.1  augustss  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29       1.1  augustss  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30       1.1  augustss  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31       1.1  augustss  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32       1.1  augustss  * SUCH DAMAGE.
     33       1.1  augustss  *
     34       1.1  augustss  */
     35       1.1  augustss 
     36       1.1  augustss /*
     37       1.1  augustss  * C-Media CMI8x38 Audio Chip Support.
     38       1.1  augustss  *
     39       1.1  augustss  * TODO:
     40      1.10     itohy  *   - 4ch / 6ch support.
     41      1.10     itohy  *   - Joystick support.
     42       1.1  augustss  *
     43       1.1  augustss  */
     44      1.11     lukem 
     45      1.11     lukem #include <sys/cdefs.h>
     46  1.26.2.1      kent __KERNEL_RCSID(0, "$NetBSD: cmpci.c,v 1.26.2.1 2005/01/02 20:03:11 kent Exp $");
     47       1.1  augustss 
     48       1.1  augustss #if defined(AUDIO_DEBUG) || defined(DEBUG)
     49       1.7  tshiozak #define DPRINTF(x) if (cmpcidebug) printf x
     50       1.7  tshiozak int cmpcidebug = 0;
     51       1.1  augustss #else
     52       1.1  augustss #define DPRINTF(x)
     53       1.1  augustss #endif
     54       1.1  augustss 
     55       1.8     itohy #include "mpu.h"
     56       1.8     itohy 
     57       1.1  augustss #include <sys/param.h>
     58       1.1  augustss #include <sys/systm.h>
     59       1.1  augustss #include <sys/kernel.h>
     60       1.1  augustss #include <sys/malloc.h>
     61       1.1  augustss #include <sys/device.h>
     62       1.1  augustss #include <sys/proc.h>
     63       1.1  augustss 
     64       1.1  augustss #include <dev/pci/pcidevs.h>
     65       1.1  augustss #include <dev/pci/pcivar.h>
     66       1.1  augustss 
     67       1.1  augustss #include <sys/audioio.h>
     68       1.1  augustss #include <dev/audio_if.h>
     69       1.1  augustss #include <dev/midi_if.h>
     70       1.1  augustss 
     71       1.1  augustss #include <dev/mulaw.h>
     72       1.1  augustss #include <dev/auconv.h>
     73       1.1  augustss #include <dev/pci/cmpcireg.h>
     74       1.1  augustss #include <dev/pci/cmpcivar.h>
     75       1.1  augustss 
     76       1.1  augustss #include <dev/ic/mpuvar.h>
     77       1.1  augustss #include <machine/bus.h>
     78       1.1  augustss #include <machine/intr.h>
     79       1.1  augustss 
     80       1.1  augustss /*
     81       1.1  augustss  * Low-level HW interface
     82       1.1  augustss  */
     83       1.1  augustss static __inline uint8_t cmpci_mixerreg_read __P((struct cmpci_softc *,
     84       1.7  tshiozak 						 uint8_t));
     85       1.1  augustss static __inline void cmpci_mixerreg_write __P((struct cmpci_softc *,
     86       1.7  tshiozak 					       uint8_t, uint8_t));
     87      1.10     itohy static __inline void cmpci_reg_partial_write_1 __P((struct cmpci_softc *,
     88      1.10     itohy 						    int, int,
     89      1.10     itohy 						    unsigned, unsigned));
     90       1.1  augustss static __inline void cmpci_reg_partial_write_4 __P((struct cmpci_softc *,
     91       1.7  tshiozak 						    int, int,
     92       1.7  tshiozak 						    uint32_t, uint32_t));
     93       1.7  tshiozak static __inline void cmpci_reg_set_1 __P((struct cmpci_softc *,
     94       1.7  tshiozak 					  int, uint8_t));
     95       1.7  tshiozak static __inline void cmpci_reg_clear_1 __P((struct cmpci_softc *,
     96       1.7  tshiozak 					    int, uint8_t));
     97       1.1  augustss static __inline void cmpci_reg_set_4 __P((struct cmpci_softc *,
     98       1.7  tshiozak 					  int, uint32_t));
     99       1.1  augustss static __inline void cmpci_reg_clear_4 __P((struct cmpci_softc *,
    100       1.7  tshiozak 					    int, uint32_t));
    101      1.21     itohy static __inline void cmpci_reg_set_reg_misc __P((struct cmpci_softc *,
    102      1.21     itohy 						 uint32_t));
    103      1.21     itohy static __inline void cmpci_reg_clear_reg_misc __P((struct cmpci_softc *,
    104      1.21     itohy 						   uint32_t));
    105       1.1  augustss static int cmpci_rate_to_index __P((int));
    106       1.1  augustss static __inline int cmpci_index_to_rate __P((int));
    107       1.1  augustss static __inline int cmpci_index_to_divider __P((int));
    108       1.1  augustss 
    109       1.1  augustss static int cmpci_adjust __P((int, int));
    110       1.1  augustss static void cmpci_set_mixer_gain __P((struct cmpci_softc *, int));
    111       1.7  tshiozak static void cmpci_set_out_ports __P((struct cmpci_softc *));
    112      1.10     itohy static int cmpci_set_in_ports __P((struct cmpci_softc *));
    113       1.1  augustss 
    114       1.1  augustss 
    115       1.1  augustss /*
    116       1.1  augustss  * autoconf interface
    117       1.1  augustss  */
    118       1.1  augustss static int cmpci_match __P((struct device *, struct cfdata *, void *));
    119       1.1  augustss static void cmpci_attach __P((struct device *, struct device *, void *));
    120       1.1  augustss 
    121      1.15   thorpej CFATTACH_DECL(cmpci, sizeof (struct cmpci_softc),
    122      1.16   thorpej     cmpci_match, cmpci_attach, NULL, NULL);
    123       1.1  augustss 
    124       1.1  augustss /* interrupt */
    125       1.1  augustss static int cmpci_intr __P((void *));
    126       1.1  augustss 
    127       1.1  augustss 
    128       1.1  augustss /*
    129       1.1  augustss  * DMA stuffs
    130       1.1  augustss  */
    131       1.1  augustss static int cmpci_alloc_dmamem __P((struct cmpci_softc *,
    132      1.18   thorpej 				   size_t, struct malloc_type *,
    133      1.18   thorpej 				   int, caddr_t *));
    134      1.18   thorpej static int cmpci_free_dmamem __P((struct cmpci_softc *, caddr_t,
    135      1.18   thorpej 				  struct malloc_type *));
    136       1.1  augustss static struct cmpci_dmanode * cmpci_find_dmamem __P((struct cmpci_softc *,
    137       1.7  tshiozak 						     caddr_t));
    138       1.1  augustss 
    139       1.1  augustss 
    140       1.1  augustss /*
    141       1.1  augustss  * interface to machine independent layer
    142       1.1  augustss  */
    143       1.1  augustss static int cmpci_open __P((void *, int));
    144       1.1  augustss static void cmpci_close __P((void *));
    145       1.1  augustss static int cmpci_query_encoding __P((void *, struct audio_encoding *));
    146  1.26.2.1      kent static int cmpci_set_params __P((void *, int, int, audio_params_t *,
    147  1.26.2.1      kent 	audio_params_t *, stream_filter_list_t *, stream_filter_list_t *));
    148       1.1  augustss static int cmpci_round_blocksize __P((void *, int));
    149       1.1  augustss static int cmpci_halt_output __P((void *));
    150       1.1  augustss static int cmpci_halt_input __P((void *));
    151       1.1  augustss static int cmpci_getdev __P((void *, struct audio_device *));
    152       1.1  augustss static int cmpci_set_port __P((void *, mixer_ctrl_t *));
    153       1.1  augustss static int cmpci_get_port __P((void *, mixer_ctrl_t *));
    154       1.1  augustss static int cmpci_query_devinfo __P((void *, mixer_devinfo_t *));
    155      1.18   thorpej static void *cmpci_allocm __P((void *, int, size_t, struct malloc_type *, int));
    156      1.18   thorpej static void cmpci_freem __P((void *, void *, struct malloc_type *));
    157       1.1  augustss static size_t cmpci_round_buffersize __P((void *, int, size_t));
    158       1.4    simonb static paddr_t cmpci_mappage __P((void *, void *, off_t, int));
    159       1.1  augustss static int cmpci_get_props __P((void *));
    160       1.1  augustss static int cmpci_trigger_output __P((void *, void *, void *, int,
    161  1.26.2.1      kent 	void (*)(void *), void *, const audio_params_t *));
    162       1.1  augustss static int cmpci_trigger_input __P((void *, void *, void *, int,
    163  1.26.2.1      kent 	void (*)(void *), void *, const audio_params_t *));
    164       1.1  augustss 
    165      1.26      yamt static const struct audio_hw_if cmpci_hw_if = {
    166       1.3  gmcgarry 	cmpci_open,		/* open */
    167       1.3  gmcgarry 	cmpci_close,		/* close */
    168       1.1  augustss 	NULL,			/* drain */
    169       1.3  gmcgarry 	cmpci_query_encoding,	/* query_encoding */
    170       1.3  gmcgarry 	cmpci_set_params,	/* set_params */
    171       1.3  gmcgarry 	cmpci_round_blocksize,	/* round_blocksize */
    172       1.1  augustss 	NULL,			/* commit_settings */
    173       1.1  augustss 	NULL,			/* init_output */
    174       1.1  augustss 	NULL,			/* init_input */
    175       1.1  augustss 	NULL,			/* start_output */
    176       1.1  augustss 	NULL,			/* start_input */
    177       1.3  gmcgarry 	cmpci_halt_output,	/* halt_output */
    178       1.3  gmcgarry 	cmpci_halt_input,	/* halt_input */
    179       1.1  augustss 	NULL,			/* speaker_ctl */
    180       1.3  gmcgarry 	cmpci_getdev,		/* getdev */
    181       1.1  augustss 	NULL,			/* setfd */
    182       1.3  gmcgarry 	cmpci_set_port,		/* set_port */
    183       1.3  gmcgarry 	cmpci_get_port,		/* get_port */
    184       1.3  gmcgarry 	cmpci_query_devinfo,	/* query_devinfo */
    185       1.3  gmcgarry 	cmpci_allocm,		/* allocm */
    186       1.3  gmcgarry 	cmpci_freem,		/* freem */
    187       1.3  gmcgarry 	cmpci_round_buffersize,/* round_buffersize */
    188       1.3  gmcgarry 	cmpci_mappage,		/* mappage */
    189       1.3  gmcgarry 	cmpci_get_props,	/* get_props */
    190       1.3  gmcgarry 	cmpci_trigger_output,	/* trigger_output */
    191       1.9  augustss 	cmpci_trigger_input,	/* trigger_input */
    192       1.9  augustss 	NULL,			/* dev_ioctl */
    193       1.1  augustss };
    194       1.1  augustss 
    195  1.26.2.1      kent #define CMPCI_NFORMATS	4
    196  1.26.2.1      kent static const struct audio_format cmpci_formats[CMPCI_NFORMATS] = {
    197  1.26.2.1      kent 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
    198  1.26.2.1      kent 	 2, AUFMT_STEREO, 0, {5512, 48000}},
    199  1.26.2.1      kent 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
    200  1.26.2.1      kent 	 1, AUFMT_MONAURAL, 0, {5512, 48000}},
    201  1.26.2.1      kent 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
    202  1.26.2.1      kent 	 2, AUFMT_STEREO, 0, {5512, 48000}},
    203  1.26.2.1      kent 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
    204  1.26.2.1      kent 	 1, AUFMT_MONAURAL, 0, {5512, 48000}},
    205  1.26.2.1      kent };
    206  1.26.2.1      kent 
    207       1.1  augustss 
    208       1.1  augustss /*
    209       1.1  augustss  * Low-level HW interface
    210       1.1  augustss  */
    211       1.1  augustss 
    212       1.1  augustss /* mixer register read/write */
    213       1.1  augustss static __inline uint8_t
    214       1.1  augustss cmpci_mixerreg_read(sc, no)
    215       1.1  augustss 	struct cmpci_softc *sc;
    216       1.1  augustss 	uint8_t no;
    217       1.1  augustss {
    218       1.1  augustss 	uint8_t ret;
    219       1.1  augustss 
    220       1.1  augustss 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no);
    221       1.1  augustss 	delay(10);
    222       1.1  augustss 	ret = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA);
    223       1.1  augustss 	delay(10);
    224       1.1  augustss 	return ret;
    225       1.1  augustss }
    226       1.1  augustss 
    227       1.1  augustss static __inline void
    228       1.1  augustss cmpci_mixerreg_write(sc, no, val)
    229       1.1  augustss 	struct cmpci_softc *sc;
    230       1.1  augustss 	uint8_t no, val;
    231       1.1  augustss {
    232       1.1  augustss 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no);
    233       1.1  augustss 	delay(10);
    234       1.1  augustss 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA, val);
    235       1.1  augustss 	delay(10);
    236       1.1  augustss }
    237       1.1  augustss 
    238       1.1  augustss 
    239       1.1  augustss /* register partial write */
    240       1.1  augustss static __inline void
    241      1.10     itohy cmpci_reg_partial_write_1(sc, no, shift, mask, val)
    242      1.10     itohy 	struct cmpci_softc *sc;
    243      1.10     itohy 	int no, shift;
    244      1.10     itohy 	unsigned mask, val;
    245      1.10     itohy {
    246      1.10     itohy 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
    247      1.10     itohy 	    (val<<shift) |
    248      1.10     itohy 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
    249      1.10     itohy 	delay(10);
    250      1.10     itohy }
    251      1.10     itohy 
    252      1.10     itohy static __inline void
    253       1.1  augustss cmpci_reg_partial_write_4(sc, no, shift, mask, val)
    254       1.1  augustss 	struct cmpci_softc *sc;
    255       1.1  augustss 	int no, shift;
    256       1.1  augustss 	uint32_t mask, val;
    257       1.1  augustss {
    258       1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
    259       1.1  augustss 	    (val<<shift) |
    260       1.1  augustss 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
    261       1.1  augustss 	delay(10);
    262       1.1  augustss }
    263       1.1  augustss 
    264       1.1  augustss /* register set/clear bit */
    265       1.1  augustss static __inline void
    266       1.7  tshiozak cmpci_reg_set_1(sc, no, mask)
    267       1.7  tshiozak 	struct cmpci_softc *sc;
    268       1.7  tshiozak 	int no;
    269       1.7  tshiozak 	uint8_t mask;
    270       1.7  tshiozak {
    271       1.7  tshiozak 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
    272       1.7  tshiozak 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) | mask));
    273       1.7  tshiozak 	delay(10);
    274       1.7  tshiozak }
    275       1.7  tshiozak 
    276       1.7  tshiozak static __inline void
    277       1.7  tshiozak cmpci_reg_clear_1(sc, no, mask)
    278       1.7  tshiozak 	struct cmpci_softc *sc;
    279       1.7  tshiozak 	int no;
    280       1.7  tshiozak 	uint8_t mask;
    281       1.7  tshiozak {
    282       1.7  tshiozak 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
    283       1.7  tshiozak 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~mask));
    284       1.7  tshiozak 	delay(10);
    285       1.7  tshiozak }
    286       1.7  tshiozak 
    287       1.7  tshiozak 
    288       1.7  tshiozak static __inline void
    289       1.1  augustss cmpci_reg_set_4(sc, no, mask)
    290       1.1  augustss 	struct cmpci_softc *sc;
    291       1.1  augustss 	int no;
    292       1.1  augustss 	uint32_t mask;
    293       1.1  augustss {
    294      1.21     itohy 	/* use cmpci_reg_set_reg_misc() for CMPCI_REG_MISC */
    295      1.21     itohy 	KDASSERT(no != CMPCI_REG_MISC);
    296      1.21     itohy 
    297       1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
    298       1.7  tshiozak 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) | mask));
    299       1.1  augustss 	delay(10);
    300       1.1  augustss }
    301       1.1  augustss 
    302       1.1  augustss static __inline void
    303       1.1  augustss cmpci_reg_clear_4(sc, no, mask)
    304       1.1  augustss 	struct cmpci_softc *sc;
    305       1.1  augustss 	int no;
    306       1.1  augustss 	uint32_t mask;
    307       1.1  augustss {
    308      1.21     itohy 	/* use cmpci_reg_clear_reg_misc() for CMPCI_REG_MISC */
    309      1.21     itohy 	KDASSERT(no != CMPCI_REG_MISC);
    310      1.21     itohy 
    311       1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
    312       1.7  tshiozak 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~mask));
    313       1.1  augustss 	delay(10);
    314       1.1  augustss }
    315       1.1  augustss 
    316       1.1  augustss 
    317      1.21     itohy /*
    318      1.21     itohy  * The CMPCI_REG_MISC register needs special handling, since one of
    319      1.21     itohy  * its bits has different read/write values.
    320      1.21     itohy  */
    321      1.21     itohy static __inline void
    322      1.21     itohy cmpci_reg_set_reg_misc(sc, mask)
    323      1.21     itohy 	struct cmpci_softc *sc;
    324      1.21     itohy 	uint32_t mask;
    325      1.21     itohy {
    326      1.21     itohy 	sc->sc_reg_misc |= mask;
    327      1.21     itohy 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC,
    328      1.21     itohy 	    sc->sc_reg_misc);
    329      1.21     itohy 	delay(10);
    330      1.21     itohy }
    331      1.21     itohy 
    332      1.21     itohy static __inline void
    333      1.21     itohy cmpci_reg_clear_reg_misc(sc, mask)
    334      1.21     itohy 	struct cmpci_softc *sc;
    335      1.21     itohy 	uint32_t mask;
    336      1.21     itohy {
    337      1.21     itohy 	sc->sc_reg_misc &= ~mask;
    338      1.21     itohy 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC,
    339      1.21     itohy 	    sc->sc_reg_misc);
    340      1.21     itohy 	delay(10);
    341      1.21     itohy }
    342      1.21     itohy 
    343      1.21     itohy 
    344       1.1  augustss /* rate */
    345       1.6  jdolecek static const struct {
    346       1.1  augustss 	int rate;
    347       1.1  augustss 	int divider;
    348       1.1  augustss } cmpci_rate_table[CMPCI_REG_NUMRATE] = {
    349       1.1  augustss #define _RATE(n) { n, CMPCI_REG_RATE_ ## n }
    350       1.1  augustss 	_RATE(5512),
    351       1.1  augustss 	_RATE(8000),
    352       1.1  augustss 	_RATE(11025),
    353       1.1  augustss 	_RATE(16000),
    354       1.1  augustss 	_RATE(22050),
    355       1.1  augustss 	_RATE(32000),
    356       1.1  augustss 	_RATE(44100),
    357       1.1  augustss 	_RATE(48000)
    358       1.7  tshiozak #undef	_RATE
    359       1.1  augustss };
    360       1.1  augustss 
    361       1.1  augustss static int
    362       1.1  augustss cmpci_rate_to_index(rate)
    363       1.1  augustss 	int rate;
    364       1.1  augustss {
    365       1.1  augustss 	int i;
    366       1.1  augustss 
    367      1.13  augustss 	for (i = 0; i < CMPCI_REG_NUMRATE - 1; i++)
    368       1.1  augustss 		if (rate <=
    369       1.1  augustss 		    (cmpci_rate_table[i].rate+cmpci_rate_table[i+1].rate) / 2)
    370       1.1  augustss 			return i;
    371       1.1  augustss 	return i;  /* 48000 */
    372       1.1  augustss }
    373       1.1  augustss 
    374       1.1  augustss static __inline int
    375       1.1  augustss cmpci_index_to_rate(index)
    376       1.1  augustss 	int index;
    377       1.1  augustss {
    378       1.1  augustss 	return cmpci_rate_table[index].rate;
    379       1.1  augustss }
    380       1.1  augustss 
    381       1.1  augustss static __inline int
    382       1.1  augustss cmpci_index_to_divider(index)
    383       1.1  augustss 	int index;
    384       1.1  augustss {
    385       1.1  augustss 	return cmpci_rate_table[index].divider;
    386       1.1  augustss }
    387       1.1  augustss 
    388       1.1  augustss 
    389       1.1  augustss /*
    390       1.1  augustss  * interface to configure the device.
    391       1.1  augustss  */
    392       1.1  augustss 
    393       1.1  augustss static int
    394       1.1  augustss cmpci_match(parent, match, aux)
    395       1.1  augustss 	struct device *parent;
    396       1.1  augustss 	struct cfdata *match;
    397       1.1  augustss 	void *aux;
    398       1.1  augustss {
    399       1.1  augustss 	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
    400       1.1  augustss 
    401       1.1  augustss 	if ( PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CMEDIA &&
    402       1.1  augustss 	     (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338A ||
    403       1.1  augustss 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338B ||
    404       1.7  tshiozak 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738 ||
    405       1.7  tshiozak 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738B) )
    406       1.1  augustss 		return 1;
    407       1.1  augustss 
    408       1.1  augustss 	return 0;
    409       1.1  augustss }
    410       1.1  augustss 
    411       1.1  augustss static void
    412       1.1  augustss cmpci_attach(parent, self, aux)
    413       1.1  augustss 	struct device *parent, *self;
    414       1.1  augustss 	void *aux;
    415       1.1  augustss {
    416       1.1  augustss 	struct cmpci_softc *sc = (struct cmpci_softc *)self;
    417       1.1  augustss 	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
    418       1.8     itohy 	struct audio_attach_args aa;
    419       1.1  augustss 	pci_intr_handle_t ih;
    420       1.1  augustss 	char const *strintr;
    421       1.7  tshiozak 	char devinfo[256];
    422       1.1  augustss 	int i, v;
    423       1.1  augustss 
    424      1.17   thorpej 	aprint_naive(": Audio controller\n");
    425      1.17   thorpej 
    426       1.7  tshiozak 	sc->sc_id = pa->pa_id;
    427       1.7  tshiozak 	sc->sc_class = pa->pa_class;
    428      1.24    itojun 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
    429      1.17   thorpej 	aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
    430      1.17   thorpej 	    PCI_REVISION(sc->sc_class));
    431       1.7  tshiozak 	switch (PCI_PRODUCT(sc->sc_id)) {
    432       1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338A:
    433       1.7  tshiozak 		/*FALLTHROUGH*/
    434       1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338B:
    435       1.7  tshiozak 		sc->sc_capable = CMPCI_CAP_CMI8338;
    436       1.1  augustss 		break;
    437       1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8738:
    438       1.7  tshiozak 		/*FALLTHROUGH*/
    439       1.7  tshiozak 	case PCI_PRODUCT_CMEDIA_CMI8738B:
    440       1.7  tshiozak 		sc->sc_capable = CMPCI_CAP_CMI8738;
    441       1.1  augustss 		break;
    442       1.1  augustss 	}
    443       1.1  augustss 
    444       1.2  augustss 	/* map I/O space */
    445       1.1  augustss 	if (pci_mapreg_map(pa, CMPCI_PCI_IOBASEREG, PCI_MAPREG_TYPE_IO, 0,
    446       1.7  tshiozak 		&sc->sc_iot, &sc->sc_ioh, NULL, NULL)) {
    447      1.17   thorpej 		aprint_error("%s: failed to map I/O space\n",
    448      1.17   thorpej 		    sc->sc_dev.dv_xname);
    449       1.1  augustss 		return;
    450       1.1  augustss 	}
    451       1.1  augustss 
    452       1.2  augustss 	/* interrupt */
    453       1.5  sommerfe 	if (pci_intr_map(pa, &ih)) {
    454      1.17   thorpej 		aprint_error("%s: failed to map interrupt\n",
    455      1.17   thorpej 		    sc->sc_dev.dv_xname);
    456       1.1  augustss 		return;
    457       1.1  augustss 	}
    458       1.1  augustss 	strintr = pci_intr_string(pa->pa_pc, ih);
    459       1.1  augustss 	sc->sc_ih=pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, cmpci_intr, sc);
    460       1.1  augustss 	if (sc->sc_ih == NULL) {
    461      1.17   thorpej 		aprint_error("%s: failed to establish interrupt",
    462       1.1  augustss 		    sc->sc_dev.dv_xname);
    463       1.1  augustss 		if (strintr != NULL)
    464      1.17   thorpej 			aprint_normal(" at %s", strintr);
    465      1.17   thorpej 		aprint_normal("\n");
    466       1.1  augustss 		return;
    467       1.1  augustss 	}
    468      1.17   thorpej 	aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, strintr);
    469       1.1  augustss 
    470       1.1  augustss 	sc->sc_dmat = pa->pa_dmat;
    471       1.1  augustss 
    472       1.1  augustss 	audio_attach_mi(&cmpci_hw_if, sc, &sc->sc_dev);
    473       1.1  augustss 
    474       1.8     itohy 	/* attach OPL device */
    475       1.8     itohy 	aa.type = AUDIODEV_TYPE_OPL;
    476       1.8     itohy 	aa.hwif = NULL;
    477       1.8     itohy 	aa.hdl = NULL;
    478       1.8     itohy 	(void)config_found(&sc->sc_dev, &aa, audioprint);
    479       1.8     itohy 
    480       1.8     itohy 	/* attach MPU-401 device */
    481       1.8     itohy 	aa.type = AUDIODEV_TYPE_MPU;
    482       1.8     itohy 	aa.hwif = NULL;
    483       1.8     itohy 	aa.hdl = NULL;
    484       1.8     itohy 	if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
    485       1.8     itohy 	    CMPCI_REG_MPU_BASE, CMPCI_REG_MPU_SIZE, &sc->sc_mpu_ioh) == 0)
    486       1.8     itohy 		sc->sc_mpudev = config_found(&sc->sc_dev, &aa, audioprint);
    487       1.8     itohy 
    488      1.21     itohy 	/* get initial value (this is 0 and may be omitted but just in case) */
    489      1.21     itohy 	sc->sc_reg_misc = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
    490      1.21     itohy 	    CMPCI_REG_MISC) & ~CMPCI_REG_SPDIF48K;
    491      1.21     itohy 
    492       1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_RESET, 0);
    493       1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0);
    494       1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0);
    495       1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX,
    496       1.1  augustss 	    CMPCI_SB16_SW_CD|CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE);
    497       1.1  augustss 	for (i = 0; i < CMPCI_NDEVS; i++) {
    498       1.1  augustss 		switch(i) {
    499      1.10     itohy 		/*
    500      1.10     itohy 		 * CMI8738 defaults are
    501      1.10     itohy 		 *  master:	0xe0	(0x00 - 0xf8)
    502      1.12     itohy 		 *  FM, DAC:	0xc0	(0x00 - 0xf8)
    503      1.10     itohy 		 *  PC speaker:	0x80	(0x00 - 0xc0)
    504      1.10     itohy 		 *  others:	0
    505      1.10     itohy 		 */
    506      1.10     itohy 		/* volume */
    507       1.8     itohy 		case CMPCI_MASTER_VOL:
    508      1.10     itohy 			v = 128;	/* 224 */
    509      1.10     itohy 			break;
    510       1.8     itohy 		case CMPCI_FM_VOL:
    511      1.10     itohy 		case CMPCI_DAC_VOL:
    512      1.10     itohy 			v = 192;
    513      1.10     itohy 			break;
    514       1.8     itohy 		case CMPCI_PCSPEAKER:
    515      1.10     itohy 			v = 128;
    516       1.1  augustss 			break;
    517       1.8     itohy 
    518       1.8     itohy 		/* booleans, set to true */
    519      1.10     itohy 		case CMPCI_CD_MUTE:
    520      1.10     itohy 		case CMPCI_MIC_MUTE:
    521      1.10     itohy 		case CMPCI_LINE_IN_MUTE:
    522      1.10     itohy 		case CMPCI_AUX_IN_MUTE:
    523       1.8     itohy 			v = 1;
    524       1.1  augustss 			break;
    525      1.10     itohy 
    526      1.10     itohy 		/* volume with inital value 0 */
    527      1.10     itohy 		case CMPCI_CD_VOL:
    528      1.10     itohy 		case CMPCI_LINE_IN_VOL:
    529      1.10     itohy 		case CMPCI_AUX_IN_VOL:
    530      1.10     itohy 		case CMPCI_MIC_VOL:
    531      1.10     itohy 		case CMPCI_MIC_RECVOL:
    532      1.10     itohy 			/* FALLTHROUGH */
    533      1.10     itohy 
    534       1.8     itohy 		/* others are cleared */
    535      1.10     itohy 		case CMPCI_MIC_PREAMP:
    536       1.8     itohy 		case CMPCI_RECORD_SOURCE:
    537      1.10     itohy 		case CMPCI_PLAYBACK_MODE:
    538      1.10     itohy 		case CMPCI_SPDIF_IN_SELECT:
    539      1.10     itohy 		case CMPCI_SPDIF_IN_PHASE:
    540       1.7  tshiozak 		case CMPCI_SPDIF_LOOP:
    541      1.10     itohy 		case CMPCI_SPDIF_OUT_PLAYBACK:
    542       1.7  tshiozak 		case CMPCI_SPDIF_OUT_VOLTAGE:
    543      1.10     itohy 		case CMPCI_MONITOR_DAC:
    544       1.7  tshiozak 		case CMPCI_REAR:
    545       1.7  tshiozak 		case CMPCI_INDIVIDUAL:
    546       1.7  tshiozak 		case CMPCI_REVERSE:
    547       1.7  tshiozak 		case CMPCI_SURROUND:
    548       1.8     itohy 		default:
    549       1.1  augustss 			v = 0;
    550       1.1  augustss 			break;
    551       1.1  augustss 		}
    552       1.7  tshiozak 		sc->sc_gain[i][CMPCI_LEFT] = sc->sc_gain[i][CMPCI_RIGHT] = v;
    553       1.1  augustss 		cmpci_set_mixer_gain(sc, i);
    554       1.1  augustss 	}
    555       1.1  augustss }
    556       1.1  augustss 
    557       1.1  augustss 
    558       1.1  augustss static int
    559       1.1  augustss cmpci_intr(handle)
    560       1.1  augustss 	void *handle;
    561       1.1  augustss {
    562       1.1  augustss 	struct cmpci_softc *sc = handle;
    563       1.1  augustss 	uint32_t intrstat;
    564       1.1  augustss 
    565       1.1  augustss 	intrstat = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
    566       1.1  augustss 	    CMPCI_REG_INTR_STATUS);
    567       1.1  augustss 
    568       1.1  augustss 	if (!(intrstat & CMPCI_REG_ANY_INTR))
    569       1.1  augustss 		return 0;
    570       1.1  augustss 
    571       1.8     itohy 	delay(10);
    572       1.8     itohy 
    573       1.1  augustss 	/* disable and reset intr */
    574       1.1  augustss 	if (intrstat & CMPCI_REG_CH0_INTR)
    575       1.1  augustss 		cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL,
    576       1.1  augustss 		   CMPCI_REG_CH0_INTR_ENABLE);
    577       1.1  augustss 	if (intrstat & CMPCI_REG_CH1_INTR)
    578       1.1  augustss 		cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL,
    579       1.1  augustss 		    CMPCI_REG_CH1_INTR_ENABLE);
    580       1.1  augustss 
    581       1.1  augustss 	if (intrstat & CMPCI_REG_CH0_INTR) {
    582       1.1  augustss 		if (sc->sc_play.intr != NULL)
    583       1.1  augustss 			(*sc->sc_play.intr)(sc->sc_play.intr_arg);
    584       1.1  augustss 	}
    585       1.1  augustss 	if (intrstat & CMPCI_REG_CH1_INTR) {
    586       1.1  augustss 		if (sc->sc_rec.intr != NULL)
    587       1.1  augustss 			(*sc->sc_rec.intr)(sc->sc_rec.intr_arg);
    588       1.1  augustss 	}
    589       1.1  augustss 
    590       1.1  augustss 	/* enable intr */
    591       1.1  augustss 	if (intrstat & CMPCI_REG_CH0_INTR)
    592       1.1  augustss 		cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL,
    593       1.1  augustss 		    CMPCI_REG_CH0_INTR_ENABLE);
    594       1.1  augustss 	if (intrstat & CMPCI_REG_CH1_INTR)
    595       1.1  augustss 		cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL,
    596       1.1  augustss 		    CMPCI_REG_CH1_INTR_ENABLE);
    597       1.8     itohy 
    598       1.8     itohy #if NMPU > 0
    599       1.8     itohy 	if (intrstat & CMPCI_REG_UART_INTR && sc->sc_mpudev != NULL)
    600       1.8     itohy 		mpu_intr(sc->sc_mpudev);
    601       1.8     itohy #endif
    602       1.8     itohy 
    603       1.8     itohy 	return 1;
    604       1.1  augustss }
    605       1.1  augustss 
    606       1.1  augustss 
    607       1.1  augustss /* open/close */
    608       1.1  augustss static int
    609       1.1  augustss cmpci_open(handle, flags)
    610       1.1  augustss 	void *handle;
    611       1.1  augustss 	int flags;
    612       1.1  augustss {
    613       1.1  augustss 	return 0;
    614       1.1  augustss }
    615       1.1  augustss 
    616       1.1  augustss static void
    617       1.1  augustss cmpci_close(handle)
    618       1.1  augustss 	void *handle;
    619       1.1  augustss {
    620       1.1  augustss }
    621       1.1  augustss 
    622       1.1  augustss static int
    623       1.1  augustss cmpci_query_encoding(handle, fp)
    624       1.1  augustss 	void *handle;
    625       1.1  augustss 	struct audio_encoding *fp;
    626       1.1  augustss {
    627       1.1  augustss 	switch (fp->index) {
    628       1.1  augustss 	case 0:
    629       1.1  augustss 		strcpy(fp->name, AudioEulinear);
    630       1.1  augustss 		fp->encoding = AUDIO_ENCODING_ULINEAR;
    631       1.1  augustss 		fp->precision = 8;
    632       1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    633       1.1  augustss 		break;
    634       1.1  augustss 	case 1:
    635       1.1  augustss 		strcpy(fp->name, AudioEmulaw);
    636       1.1  augustss 		fp->encoding = AUDIO_ENCODING_ULAW;
    637       1.1  augustss 		fp->precision = 8;
    638       1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    639       1.1  augustss 		break;
    640       1.1  augustss 	case 2:
    641       1.1  augustss 		strcpy(fp->name, AudioEalaw);
    642       1.1  augustss 		fp->encoding = AUDIO_ENCODING_ALAW;
    643       1.1  augustss 		fp->precision = 8;
    644       1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    645       1.1  augustss 		break;
    646       1.1  augustss 	case 3:
    647       1.1  augustss 		strcpy(fp->name, AudioEslinear);
    648       1.1  augustss 		fp->encoding = AUDIO_ENCODING_SLINEAR;
    649       1.1  augustss 		fp->precision = 8;
    650       1.1  augustss 		fp->flags = 0;
    651       1.1  augustss 		break;
    652       1.1  augustss 	case 4:
    653       1.1  augustss 		strcpy(fp->name, AudioEslinear_le);
    654       1.1  augustss 		fp->encoding = AUDIO_ENCODING_SLINEAR_LE;
    655       1.1  augustss 		fp->precision = 16;
    656       1.1  augustss 		fp->flags = 0;
    657       1.1  augustss 		break;
    658       1.1  augustss 	case 5:
    659       1.1  augustss 		strcpy(fp->name, AudioEulinear_le);
    660       1.1  augustss 		fp->encoding = AUDIO_ENCODING_ULINEAR_LE;
    661       1.1  augustss 		fp->precision = 16;
    662       1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    663       1.1  augustss 		break;
    664       1.1  augustss 	case 6:
    665       1.1  augustss 		strcpy(fp->name, AudioEslinear_be);
    666       1.1  augustss 		fp->encoding = AUDIO_ENCODING_SLINEAR_BE;
    667       1.1  augustss 		fp->precision = 16;
    668       1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    669       1.1  augustss 		break;
    670       1.1  augustss 	case 7:
    671       1.1  augustss 		strcpy(fp->name, AudioEulinear_be);
    672       1.1  augustss 		fp->encoding = AUDIO_ENCODING_ULINEAR_BE;
    673       1.1  augustss 		fp->precision = 16;
    674       1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    675       1.1  augustss 		break;
    676       1.1  augustss 	default:
    677       1.1  augustss 		return EINVAL;
    678       1.1  augustss 	}
    679       1.1  augustss 	return 0;
    680       1.1  augustss }
    681       1.1  augustss 
    682       1.1  augustss 
    683       1.1  augustss static int
    684  1.26.2.1      kent cmpci_set_params(handle, setmode, usemode, play, rec, pfil, rfil)
    685       1.1  augustss 	void *handle;
    686       1.1  augustss 	int setmode, usemode;
    687  1.26.2.1      kent 	audio_params_t *play, *rec;
    688  1.26.2.1      kent 	stream_filter_list_t *pfil, *rfil;
    689       1.1  augustss {
    690       1.1  augustss 	int i;
    691       1.1  augustss 	struct cmpci_softc *sc = handle;
    692       1.1  augustss 
    693       1.1  augustss 	for (i = 0; i < 2; i++) {
    694       1.1  augustss 		int md_format;
    695       1.1  augustss 		int md_divide;
    696       1.1  augustss 		int md_index;
    697       1.1  augustss 		int mode;
    698  1.26.2.1      kent 		audio_params_t *p;
    699  1.26.2.1      kent 		stream_filter_list_t *fil;
    700  1.26.2.1      kent 		int ind;
    701      1.10     itohy 
    702       1.1  augustss 		switch (i) {
    703       1.1  augustss 		case 0:
    704       1.1  augustss 			mode = AUMODE_PLAY;
    705       1.1  augustss 			p = play;
    706  1.26.2.1      kent 			fil = pfil;
    707       1.1  augustss 			break;
    708       1.1  augustss 		case 1:
    709       1.1  augustss 			mode = AUMODE_RECORD;
    710       1.1  augustss 			p = rec;
    711  1.26.2.1      kent 			fil = rfil;
    712       1.1  augustss 			break;
    713      1.19  christos 		default:
    714      1.19  christos 			return EINVAL;
    715       1.1  augustss 		}
    716      1.10     itohy 
    717       1.1  augustss 		if (!(setmode & mode))
    718       1.1  augustss 			continue;
    719       1.1  augustss 
    720  1.26.2.1      kent 		md_index = cmpci_rate_to_index(p->sample_rate);
    721  1.26.2.1      kent 		md_divide = cmpci_index_to_divider(md_index);
    722  1.26.2.1      kent 		p->sample_rate = cmpci_index_to_rate(md_index);
    723  1.26.2.1      kent 		DPRINTF(("%s: sample:%u, divider=%d\n",
    724  1.26.2.1      kent 			 sc->sc_dev.dv_xname, p->sample_rate, md_divide));
    725  1.26.2.1      kent 
    726  1.26.2.1      kent 		ind = auconv_set_converter(cmpci_formats, CMPCI_NFORMATS,
    727  1.26.2.1      kent 					   mode, p, FALSE, fil);
    728  1.26.2.1      kent 		if (ind < 0)
    729  1.26.2.1      kent 			return EINVAL;
    730  1.26.2.1      kent 		if (fil->req_size > 0)
    731  1.26.2.1      kent 			p = &fil->filters[0].param;
    732       1.1  augustss 
    733       1.1  augustss 		/* format */
    734  1.26.2.1      kent 		md_format = p->channels == 1
    735  1.26.2.1      kent 			? CMPCI_REG_FORMAT_MONO : CMPCI_REG_FORMAT_STEREO;
    736  1.26.2.1      kent 		md_format |= p->precision == 16
    737  1.26.2.1      kent 			? CMPCI_REG_FORMAT_16BIT : CMPCI_REG_FORMAT_8BIT;
    738  1.26.2.1      kent 		if (mode & AUMODE_PLAY) {
    739       1.1  augustss 			cmpci_reg_partial_write_4(sc,
    740       1.7  tshiozak 			   CMPCI_REG_CHANNEL_FORMAT,
    741       1.7  tshiozak 			   CMPCI_REG_CH0_FORMAT_SHIFT,
    742       1.7  tshiozak 			   CMPCI_REG_CH0_FORMAT_MASK, md_format);
    743       1.1  augustss 			cmpci_reg_partial_write_4(sc,
    744       1.1  augustss 			    CMPCI_REG_FUNC_1, CMPCI_REG_DAC_FS_SHIFT,
    745       1.1  augustss 			    CMPCI_REG_DAC_FS_MASK, md_divide);
    746       1.7  tshiozak 			sc->sc_play.md_divide = md_divide;
    747       1.1  augustss 		} else {
    748       1.1  augustss 			cmpci_reg_partial_write_4(sc,
    749  1.26.2.1      kent 			   CMPCI_REG_CHANNEL_FORMAT,
    750  1.26.2.1      kent 			   CMPCI_REG_CH1_FORMAT_SHIFT,
    751  1.26.2.1      kent 			   CMPCI_REG_CH1_FORMAT_MASK, md_format);
    752  1.26.2.1      kent 			cmpci_reg_partial_write_4(sc,
    753       1.1  augustss 			    CMPCI_REG_FUNC_1, CMPCI_REG_ADC_FS_SHIFT,
    754       1.1  augustss 			    CMPCI_REG_ADC_FS_MASK, md_divide);
    755       1.7  tshiozak 			sc->sc_rec.md_divide = md_divide;
    756       1.1  augustss 		}
    757      1.10     itohy 		cmpci_set_out_ports(sc);
    758      1.10     itohy 		cmpci_set_in_ports(sc);
    759       1.1  augustss 	}
    760       1.1  augustss 	return 0;
    761       1.1  augustss }
    762       1.1  augustss 
    763       1.1  augustss /* ARGSUSED */
    764       1.1  augustss static int
    765       1.1  augustss cmpci_round_blocksize(handle, block)
    766       1.1  augustss 	void *handle;
    767       1.1  augustss 	int block;
    768       1.1  augustss {
    769       1.1  augustss 	return (block & -4);
    770       1.1  augustss }
    771       1.1  augustss 
    772       1.1  augustss static int
    773       1.1  augustss cmpci_halt_output(handle)
    774       1.1  augustss     void *handle;
    775       1.1  augustss {
    776       1.1  augustss 	struct cmpci_softc *sc = handle;
    777       1.1  augustss 	int s;
    778       1.1  augustss 
    779       1.1  augustss 	s = splaudio();
    780       1.1  augustss 	sc->sc_play.intr = NULL;
    781       1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE);
    782       1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE);
    783       1.1  augustss 	/* wait for reset DMA */
    784       1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET);
    785       1.1  augustss 	delay(10);
    786       1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET);
    787       1.1  augustss 	splx(s);
    788      1.10     itohy 
    789       1.1  augustss 	return 0;
    790       1.1  augustss }
    791       1.1  augustss 
    792       1.1  augustss static int
    793       1.1  augustss cmpci_halt_input(handle)
    794       1.1  augustss 	void *handle;
    795       1.1  augustss {
    796       1.1  augustss 	struct cmpci_softc *sc = handle;
    797       1.1  augustss 	int s;
    798      1.10     itohy 
    799       1.1  augustss 	s = splaudio();
    800       1.1  augustss 	sc->sc_rec.intr = NULL;
    801       1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE);
    802       1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE);
    803       1.1  augustss 	/* wait for reset DMA */
    804       1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET);
    805       1.1  augustss 	delay(10);
    806       1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET);
    807       1.1  augustss 	splx(s);
    808      1.10     itohy 
    809       1.1  augustss 	return 0;
    810       1.1  augustss }
    811       1.1  augustss 
    812       1.1  augustss 
    813       1.1  augustss /* get audio device information */
    814       1.1  augustss static int
    815       1.1  augustss cmpci_getdev(handle, ad)
    816       1.7  tshiozak 	void *handle;
    817       1.7  tshiozak 	struct audio_device *ad;
    818       1.1  augustss {
    819       1.1  augustss 	struct cmpci_softc *sc = handle;
    820       1.1  augustss 
    821       1.1  augustss 	strncpy(ad->name, "CMI PCI Audio", sizeof(ad->name));
    822       1.7  tshiozak 	snprintf(ad->version, sizeof(ad->version), "0x%02x",
    823       1.7  tshiozak 		 PCI_REVISION(sc->sc_class));
    824       1.7  tshiozak 	switch (PCI_PRODUCT(sc->sc_id)) {
    825       1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338A:
    826       1.1  augustss 		strncpy(ad->config, "CMI8338A", sizeof(ad->config));
    827       1.1  augustss 		break;
    828       1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338B:
    829       1.1  augustss 		strncpy(ad->config, "CMI8338B", sizeof(ad->config));
    830       1.1  augustss 		break;
    831       1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8738:
    832       1.1  augustss 		strncpy(ad->config, "CMI8738", sizeof(ad->config));
    833       1.1  augustss 		break;
    834       1.7  tshiozak 	case PCI_PRODUCT_CMEDIA_CMI8738B:
    835       1.7  tshiozak 		strncpy(ad->config, "CMI8738B", sizeof(ad->config));
    836       1.7  tshiozak 		break;
    837       1.1  augustss 	default:
    838       1.1  augustss 		strncpy(ad->config, "unknown", sizeof(ad->config));
    839       1.1  augustss 	}
    840       1.1  augustss 
    841       1.1  augustss 	return 0;
    842       1.1  augustss }
    843       1.1  augustss 
    844       1.1  augustss 
    845       1.1  augustss /* mixer device information */
    846       1.1  augustss int
    847       1.1  augustss cmpci_query_devinfo(handle, dip)
    848       1.1  augustss 	void *handle;
    849       1.1  augustss 	mixer_devinfo_t *dip;
    850       1.1  augustss {
    851      1.10     itohy 	static const char *const mixer_port_names[] = {
    852      1.10     itohy 		AudioNdac, AudioNfmsynth, AudioNcd, AudioNline, AudioNaux,
    853      1.10     itohy 		AudioNmicrophone
    854      1.10     itohy 	};
    855      1.10     itohy 	static const char *const mixer_classes[] = {
    856      1.10     itohy 		AudioCinputs, AudioCoutputs, AudioCrecord, CmpciCplayback,
    857      1.10     itohy 		CmpciCspdif
    858      1.10     itohy 	};
    859      1.10     itohy 	struct cmpci_softc *sc = handle;
    860      1.10     itohy 	int i;
    861      1.10     itohy 
    862      1.10     itohy 	dip->prev = dip->next = AUDIO_MIXER_LAST;
    863      1.10     itohy 
    864       1.1  augustss 	switch (dip->index) {
    865      1.10     itohy 	case CMPCI_INPUT_CLASS:
    866      1.10     itohy 	case CMPCI_OUTPUT_CLASS:
    867      1.10     itohy 	case CMPCI_RECORD_CLASS:
    868      1.10     itohy 	case CMPCI_PLAYBACK_CLASS:
    869      1.10     itohy 	case CMPCI_SPDIF_CLASS:
    870      1.10     itohy 		dip->type = AUDIO_MIXER_CLASS;
    871      1.10     itohy 		dip->mixer_class = dip->index;
    872      1.10     itohy 		strcpy(dip->label.name,
    873      1.10     itohy 		    mixer_classes[dip->index - CMPCI_INPUT_CLASS]);
    874       1.1  augustss 		return 0;
    875      1.10     itohy 
    876      1.10     itohy 	case CMPCI_AUX_IN_VOL:
    877      1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_REG_AUX_VALBITS);
    878      1.10     itohy 		goto vol1;
    879      1.10     itohy 	case CMPCI_DAC_VOL:
    880       1.1  augustss 	case CMPCI_FM_VOL:
    881      1.10     itohy 	case CMPCI_CD_VOL:
    882      1.10     itohy 	case CMPCI_LINE_IN_VOL:
    883      1.10     itohy 	case CMPCI_MIC_VOL:
    884      1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS);
    885      1.10     itohy 	vol1:	dip->mixer_class = CMPCI_INPUT_CLASS;
    886      1.10     itohy 		dip->next = dip->index + 6;	/* CMPCI_xxx_MUTE */
    887      1.10     itohy 		strcpy(dip->label.name, mixer_port_names[dip->index]);
    888      1.10     itohy 		dip->un.v.num_channels = (dip->index == CMPCI_MIC_VOL ? 1 : 2);
    889      1.10     itohy 	vol:
    890       1.1  augustss 		dip->type = AUDIO_MIXER_VALUE;
    891       1.1  augustss 		strcpy(dip->un.v.units.name, AudioNvolume);
    892       1.1  augustss 		return 0;
    893      1.10     itohy 
    894      1.10     itohy 	case CMPCI_MIC_MUTE:
    895      1.10     itohy 		dip->next = CMPCI_MIC_PREAMP;
    896      1.10     itohy 		/* FALLTHROUGH */
    897      1.10     itohy 	case CMPCI_DAC_MUTE:
    898      1.10     itohy 	case CMPCI_FM_MUTE:
    899      1.10     itohy 	case CMPCI_CD_MUTE:
    900      1.10     itohy 	case CMPCI_LINE_IN_MUTE:
    901      1.10     itohy 	case CMPCI_AUX_IN_MUTE:
    902      1.10     itohy 		dip->prev = dip->index - 6;	/* CMPCI_xxx_VOL */
    903       1.1  augustss 		dip->mixer_class = CMPCI_INPUT_CLASS;
    904      1.10     itohy 		strcpy(dip->label.name, AudioNmute);
    905      1.10     itohy 		goto on_off;
    906      1.10     itohy 	on_off:
    907      1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    908      1.10     itohy 		dip->un.e.num_mem = 2;
    909      1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
    910      1.10     itohy 		dip->un.e.member[0].ord = 0;
    911      1.10     itohy 		strcpy(dip->un.e.member[1].label.name, AudioNon);
    912      1.10     itohy 		dip->un.e.member[1].ord = 1;
    913       1.1  augustss 		return 0;
    914      1.10     itohy 
    915      1.10     itohy 	case CMPCI_MIC_PREAMP:
    916       1.1  augustss 		dip->mixer_class = CMPCI_INPUT_CLASS;
    917      1.10     itohy 		dip->prev = CMPCI_MIC_MUTE;
    918      1.10     itohy 		strcpy(dip->label.name, AudioNpreamp);
    919      1.10     itohy 		goto on_off;
    920      1.10     itohy 	case CMPCI_PCSPEAKER:
    921       1.1  augustss 		dip->mixer_class = CMPCI_INPUT_CLASS;
    922      1.10     itohy 		strcpy(dip->label.name, AudioNspeaker);
    923       1.1  augustss 		dip->un.v.num_channels = 1;
    924      1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_SPEAKER_VALBITS);
    925      1.10     itohy 		goto vol;
    926       1.1  augustss 	case CMPCI_RECORD_SOURCE:
    927       1.1  augustss 		dip->mixer_class = CMPCI_RECORD_CLASS;
    928       1.1  augustss 		strcpy(dip->label.name, AudioNsource);
    929       1.1  augustss 		dip->type = AUDIO_MIXER_SET;
    930      1.10     itohy 		dip->un.s.num_mem = 7;
    931       1.1  augustss 		strcpy(dip->un.s.member[0].label.name, AudioNmicrophone);
    932       1.8     itohy 		dip->un.s.member[0].mask = CMPCI_RECORD_SOURCE_MIC;
    933       1.1  augustss 		strcpy(dip->un.s.member[1].label.name, AudioNcd);
    934       1.8     itohy 		dip->un.s.member[1].mask = CMPCI_RECORD_SOURCE_CD;
    935       1.1  augustss 		strcpy(dip->un.s.member[2].label.name, AudioNline);
    936       1.8     itohy 		dip->un.s.member[2].mask = CMPCI_RECORD_SOURCE_LINE_IN;
    937      1.10     itohy 		strcpy(dip->un.s.member[3].label.name, AudioNaux);
    938      1.10     itohy 		dip->un.s.member[3].mask = CMPCI_RECORD_SOURCE_AUX_IN;
    939      1.10     itohy 		strcpy(dip->un.s.member[4].label.name, AudioNwave);
    940      1.10     itohy 		dip->un.s.member[4].mask = CMPCI_RECORD_SOURCE_WAVE;
    941      1.10     itohy 		strcpy(dip->un.s.member[5].label.name, AudioNfmsynth);
    942      1.10     itohy 		dip->un.s.member[5].mask = CMPCI_RECORD_SOURCE_FM;
    943      1.10     itohy 		strcpy(dip->un.s.member[6].label.name, CmpciNspdif);
    944      1.10     itohy 		dip->un.s.member[6].mask = CMPCI_RECORD_SOURCE_SPDIF;
    945       1.1  augustss 		return 0;
    946      1.10     itohy 	case CMPCI_MIC_RECVOL:
    947       1.1  augustss 		dip->mixer_class = CMPCI_RECORD_CLASS;
    948      1.10     itohy 		strcpy(dip->label.name, AudioNmicrophone);
    949       1.1  augustss 		dip->un.v.num_channels = 1;
    950      1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_REG_ADMIC_VALBITS);
    951      1.10     itohy 		goto vol;
    952      1.10     itohy 
    953      1.10     itohy 	case CMPCI_PLAYBACK_MODE:
    954      1.10     itohy 		dip->mixer_class = CMPCI_PLAYBACK_CLASS;
    955      1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    956      1.10     itohy 		strcpy(dip->label.name, AudioNmode);
    957      1.10     itohy 		dip->un.e.num_mem = 2;
    958      1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNdac);
    959      1.10     itohy 		dip->un.e.member[0].ord = CMPCI_PLAYBACK_MODE_WAVE;
    960      1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNspdif);
    961      1.10     itohy 		dip->un.e.member[1].ord = CMPCI_PLAYBACK_MODE_SPDIF;
    962       1.1  augustss 		return 0;
    963      1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
    964      1.10     itohy 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    965      1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    966      1.10     itohy 		dip->next = CMPCI_SPDIF_IN_PHASE;
    967       1.1  augustss 		strcpy(dip->label.name, AudioNinput);
    968      1.10     itohy 		i = 0;
    969      1.10     itohy 		strcpy(dip->un.e.member[i].label.name, CmpciNspdin1);
    970      1.10     itohy 		dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN1;
    971      1.10     itohy 		if (CMPCI_ISCAP(sc, 2ND_SPDIN)) {
    972      1.10     itohy 			strcpy(dip->un.e.member[i].label.name, CmpciNspdin2);
    973      1.10     itohy 			dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN2;
    974      1.10     itohy 		}
    975      1.10     itohy 		strcpy(dip->un.e.member[i].label.name, CmpciNspdout);
    976      1.10     itohy 		dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDOUT;
    977      1.10     itohy 		dip->un.e.num_mem = i;
    978      1.10     itohy 		return 0;
    979      1.10     itohy 	case CMPCI_SPDIF_IN_PHASE:
    980      1.10     itohy 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    981      1.10     itohy 		dip->prev = CMPCI_SPDIF_IN_SELECT;
    982      1.10     itohy 		strcpy(dip->label.name, CmpciNphase);
    983      1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    984      1.10     itohy 		dip->un.e.num_mem = 2;
    985      1.10     itohy 		strcpy(dip->un.e.member[0].label.name, CmpciNpositive);
    986      1.10     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_IN_PHASE_POSITIVE;
    987      1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNnegative);
    988      1.10     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_IN_PHASE_NEGATIVE;
    989       1.1  augustss 		return 0;
    990      1.10     itohy 	case CMPCI_SPDIF_LOOP:
    991      1.10     itohy 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    992      1.10     itohy 		dip->next = CMPCI_SPDIF_OUT_PLAYBACK;
    993       1.1  augustss 		strcpy(dip->label.name, AudioNoutput);
    994       1.1  augustss 		dip->type = AUDIO_MIXER_ENUM;
    995      1.10     itohy 		dip->un.e.num_mem = 2;
    996      1.10     itohy 		strcpy(dip->un.e.member[0].label.name, CmpciNplayback);
    997      1.10     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_LOOP_OFF;
    998      1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNspdin);
    999      1.10     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_LOOP_ON;
   1000       1.7  tshiozak 		return 0;
   1001      1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
   1002       1.7  tshiozak 		dip->mixer_class = CMPCI_SPDIF_CLASS;
   1003      1.10     itohy 		dip->prev = CMPCI_SPDIF_LOOP;
   1004      1.10     itohy 		dip->next = CMPCI_SPDIF_OUT_VOLTAGE;
   1005      1.10     itohy 		strcpy(dip->label.name, CmpciNplayback);
   1006      1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
   1007      1.10     itohy 		dip->un.e.num_mem = 2;
   1008      1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNwave);
   1009      1.10     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_PLAYBACK_WAVE;
   1010      1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNlegacy);
   1011      1.10     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_PLAYBACK_LEGACY;
   1012       1.7  tshiozak 		return 0;
   1013       1.7  tshiozak 	case CMPCI_SPDIF_OUT_VOLTAGE:
   1014       1.7  tshiozak 		dip->mixer_class = CMPCI_SPDIF_CLASS;
   1015      1.10     itohy 		dip->prev = CMPCI_SPDIF_OUT_PLAYBACK;
   1016      1.10     itohy 		strcpy(dip->label.name, CmpciNvoltage);
   1017       1.7  tshiozak 		dip->type = AUDIO_MIXER_ENUM;
   1018       1.7  tshiozak 		dip->un.e.num_mem = 2;
   1019      1.21     itohy 		strcpy(dip->un.e.member[0].label.name, CmpciNhigh_v);
   1020      1.21     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_VOLTAGE_HIGH;
   1021      1.21     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNlow_v);
   1022      1.21     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_VOLTAGE_LOW;
   1023       1.7  tshiozak 		return 0;
   1024      1.10     itohy 	case CMPCI_MONITOR_DAC:
   1025       1.7  tshiozak 		dip->mixer_class = CMPCI_SPDIF_CLASS;
   1026      1.10     itohy 		strcpy(dip->label.name, AudioNmonitor);
   1027      1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
   1028      1.10     itohy 		dip->un.e.num_mem = 3;
   1029      1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
   1030      1.10     itohy 		dip->un.e.member[0].ord = CMPCI_MONITOR_DAC_OFF;
   1031      1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNspdin);
   1032      1.10     itohy 		dip->un.e.member[1].ord = CMPCI_MONITOR_DAC_SPDIN;
   1033      1.10     itohy 		strcpy(dip->un.e.member[2].label.name, CmpciNspdout);
   1034      1.10     itohy 		dip->un.e.member[2].ord = CMPCI_MONITOR_DAC_SPDOUT;
   1035      1.10     itohy 		return 0;
   1036      1.10     itohy 
   1037      1.10     itohy 	case CMPCI_MASTER_VOL:
   1038      1.10     itohy 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
   1039      1.10     itohy 		strcpy(dip->label.name, AudioNmaster);
   1040      1.10     itohy 		dip->un.v.num_channels = 2;
   1041      1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS);
   1042      1.10     itohy 		goto vol;
   1043       1.7  tshiozak 	case CMPCI_REAR:
   1044       1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
   1045       1.7  tshiozak 		dip->next = CMPCI_INDIVIDUAL;
   1046       1.7  tshiozak 		strcpy(dip->label.name, CmpciNrear);
   1047       1.7  tshiozak 		goto on_off;
   1048       1.7  tshiozak 	case CMPCI_INDIVIDUAL:
   1049       1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
   1050       1.7  tshiozak 		dip->prev = CMPCI_REAR;
   1051       1.7  tshiozak 		dip->next = CMPCI_REVERSE;
   1052       1.7  tshiozak 		strcpy(dip->label.name, CmpciNindividual);
   1053       1.7  tshiozak 		goto on_off;
   1054       1.7  tshiozak 	case CMPCI_REVERSE:
   1055       1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
   1056       1.7  tshiozak 		dip->prev = CMPCI_INDIVIDUAL;
   1057       1.7  tshiozak 		strcpy(dip->label.name, CmpciNreverse);
   1058      1.10     itohy 		goto on_off;
   1059       1.7  tshiozak 	case CMPCI_SURROUND:
   1060       1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
   1061       1.7  tshiozak 		strcpy(dip->label.name, CmpciNsurround);
   1062       1.7  tshiozak 		goto on_off;
   1063      1.10     itohy 	}
   1064       1.7  tshiozak 
   1065       1.1  augustss 	return ENXIO;
   1066       1.1  augustss }
   1067       1.1  augustss 
   1068       1.1  augustss static int
   1069       1.1  augustss cmpci_alloc_dmamem(sc, size, type, flags, r_addr)
   1070       1.1  augustss 	struct cmpci_softc *sc;
   1071       1.1  augustss 	size_t size;
   1072      1.18   thorpej 	struct malloc_type *type;
   1073      1.18   thorpej 	int flags;
   1074       1.1  augustss 	caddr_t *r_addr;
   1075       1.1  augustss {
   1076       1.1  augustss 	int error = 0;
   1077       1.1  augustss 	struct cmpci_dmanode *n;
   1078       1.1  augustss 	int w;
   1079       1.1  augustss 
   1080       1.1  augustss 	n = malloc(sizeof(struct cmpci_dmanode), type, flags);
   1081       1.1  augustss 	if (n == NULL) {
   1082       1.1  augustss 		error = ENOMEM;
   1083       1.1  augustss 		goto quit;
   1084       1.1  augustss 	}
   1085       1.1  augustss 
   1086       1.1  augustss 	w = (flags & M_NOWAIT) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK;
   1087       1.1  augustss #define CMPCI_DMABUF_ALIGN    0x4
   1088       1.1  augustss #define CMPCI_DMABUF_BOUNDARY 0x0
   1089       1.1  augustss 	n->cd_tag = sc->sc_dmat;
   1090       1.1  augustss 	n->cd_size = size;
   1091       1.1  augustss 	error = bus_dmamem_alloc(n->cd_tag, n->cd_size,
   1092       1.1  augustss 	    CMPCI_DMABUF_ALIGN, CMPCI_DMABUF_BOUNDARY, n->cd_segs,
   1093       1.7  tshiozak 	    sizeof(n->cd_segs)/sizeof(n->cd_segs[0]), &n->cd_nsegs, w);
   1094       1.1  augustss 	if (error)
   1095       1.1  augustss 		goto mfree;
   1096       1.1  augustss 	error = bus_dmamem_map(n->cd_tag, n->cd_segs, n->cd_nsegs, n->cd_size,
   1097       1.1  augustss 	    &n->cd_addr, w | BUS_DMA_COHERENT);
   1098       1.1  augustss 	if (error)
   1099       1.1  augustss 		goto dmafree;
   1100       1.1  augustss 	error = bus_dmamap_create(n->cd_tag, n->cd_size, 1, n->cd_size, 0,
   1101       1.1  augustss 	    w, &n->cd_map);
   1102       1.1  augustss 	if (error)
   1103       1.1  augustss 		goto unmap;
   1104       1.1  augustss 	error = bus_dmamap_load(n->cd_tag, n->cd_map, n->cd_addr, n->cd_size,
   1105       1.1  augustss 	    NULL, w);
   1106       1.1  augustss 	if (error)
   1107       1.1  augustss 		goto destroy;
   1108      1.10     itohy 
   1109       1.1  augustss 	n->cd_next = sc->sc_dmap;
   1110       1.1  augustss 	sc->sc_dmap = n;
   1111       1.1  augustss 	*r_addr = KVADDR(n);
   1112       1.1  augustss 	return 0;
   1113      1.10     itohy 
   1114       1.1  augustss  destroy:
   1115       1.1  augustss 	bus_dmamap_destroy(n->cd_tag, n->cd_map);
   1116       1.1  augustss  unmap:
   1117       1.1  augustss 	bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size);
   1118       1.1  augustss  dmafree:
   1119       1.1  augustss 	bus_dmamem_free(n->cd_tag,
   1120       1.1  augustss 			n->cd_segs, sizeof(n->cd_segs)/sizeof(n->cd_segs[0]));
   1121       1.1  augustss  mfree:
   1122       1.1  augustss 	free(n, type);
   1123       1.1  augustss  quit:
   1124       1.1  augustss 	return error;
   1125       1.1  augustss }
   1126       1.1  augustss 
   1127       1.1  augustss static int
   1128       1.1  augustss cmpci_free_dmamem(sc, addr, type)
   1129       1.1  augustss 	struct cmpci_softc *sc;
   1130       1.1  augustss 	caddr_t addr;
   1131      1.18   thorpej 	struct malloc_type *type;
   1132       1.1  augustss {
   1133       1.1  augustss 	struct cmpci_dmanode **nnp;
   1134      1.10     itohy 
   1135       1.1  augustss 	for (nnp = &sc->sc_dmap; *nnp; nnp= &(*nnp)->cd_next) {
   1136       1.1  augustss 		if ((*nnp)->cd_addr == addr) {
   1137       1.1  augustss 			struct cmpci_dmanode *n = *nnp;
   1138       1.1  augustss 			bus_dmamap_unload(n->cd_tag, n->cd_map);
   1139       1.1  augustss 			bus_dmamap_destroy(n->cd_tag, n->cd_map);
   1140       1.1  augustss 			bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size);
   1141       1.1  augustss 			bus_dmamem_free(n->cd_tag, n->cd_segs,
   1142       1.1  augustss 			    sizeof(n->cd_segs)/sizeof(n->cd_segs[0]));
   1143       1.1  augustss 			free(n, type);
   1144       1.1  augustss 			return 0;
   1145       1.1  augustss 		}
   1146       1.1  augustss 	}
   1147       1.1  augustss 	return -1;
   1148       1.1  augustss }
   1149       1.1  augustss 
   1150       1.1  augustss static struct cmpci_dmanode *
   1151       1.1  augustss cmpci_find_dmamem(sc, addr)
   1152       1.1  augustss 	struct cmpci_softc *sc;
   1153       1.1  augustss 	caddr_t addr;
   1154       1.1  augustss {
   1155       1.1  augustss 	struct cmpci_dmanode *p;
   1156      1.10     itohy 
   1157       1.1  augustss 	for (p=sc->sc_dmap; p; p=p->cd_next)
   1158       1.1  augustss 		if ( KVADDR(p) == (void *)addr )
   1159       1.1  augustss 			break;
   1160       1.1  augustss 	return p;
   1161       1.1  augustss }
   1162       1.1  augustss 
   1163       1.1  augustss 
   1164       1.1  augustss #if 0
   1165       1.1  augustss static void
   1166       1.1  augustss cmpci_print_dmamem __P((struct cmpci_dmanode *p));
   1167       1.1  augustss static void
   1168       1.1  augustss cmpci_print_dmamem(p)
   1169       1.1  augustss 	struct cmpci_dmanode *p;
   1170       1.1  augustss {
   1171       1.1  augustss 	DPRINTF(("DMA at virt:%p, dmaseg:%p, mapseg:%p, size:%p\n",
   1172       1.1  augustss 		 (void *)p->cd_addr, (void *)p->cd_segs[0].ds_addr,
   1173       1.1  augustss 		 (void *)DMAADDR(p), (void *)p->cd_size));
   1174       1.1  augustss }
   1175       1.1  augustss #endif /* DEBUG */
   1176       1.1  augustss 
   1177       1.1  augustss 
   1178       1.1  augustss static void *
   1179       1.1  augustss cmpci_allocm(handle, direction, size, type, flags)
   1180       1.1  augustss 	void  *handle;
   1181       1.1  augustss 	int    direction;
   1182       1.1  augustss 	size_t size;
   1183      1.18   thorpej 	struct malloc_type *type;
   1184      1.18   thorpej 	int    flags;
   1185       1.1  augustss {
   1186       1.1  augustss 	struct cmpci_softc *sc = handle;
   1187       1.1  augustss 	caddr_t addr;
   1188      1.10     itohy 
   1189       1.1  augustss 	if (cmpci_alloc_dmamem(sc, size, type, flags, &addr))
   1190       1.1  augustss 		return NULL;
   1191       1.1  augustss 	return addr;
   1192       1.1  augustss }
   1193       1.1  augustss 
   1194       1.1  augustss static void
   1195       1.1  augustss cmpci_freem(handle, addr, type)
   1196       1.7  tshiozak 	void	*handle;
   1197       1.7  tshiozak 	void	*addr;
   1198      1.18   thorpej 	struct malloc_type *type;
   1199       1.1  augustss {
   1200       1.1  augustss 	struct cmpci_softc *sc = handle;
   1201      1.10     itohy 
   1202       1.1  augustss 	cmpci_free_dmamem(sc, addr, type);
   1203       1.1  augustss }
   1204       1.1  augustss 
   1205       1.1  augustss 
   1206       1.1  augustss #define MAXVAL 256
   1207       1.1  augustss static int
   1208       1.1  augustss cmpci_adjust(val, mask)
   1209       1.1  augustss 	int val, mask;
   1210       1.1  augustss {
   1211       1.1  augustss 	val += (MAXVAL - mask) >> 1;
   1212       1.1  augustss 	if (val >= MAXVAL)
   1213       1.1  augustss 		val = MAXVAL-1;
   1214       1.1  augustss 	return val & mask;
   1215       1.1  augustss }
   1216       1.1  augustss 
   1217       1.1  augustss static void
   1218       1.1  augustss cmpci_set_mixer_gain(sc, port)
   1219       1.1  augustss 	struct cmpci_softc *sc;
   1220       1.1  augustss 	int port;
   1221       1.1  augustss {
   1222      1.23     itohy 	int src;
   1223      1.10     itohy 	int bits, mask;
   1224       1.1  augustss 
   1225       1.1  augustss 	switch (port) {
   1226       1.1  augustss 	case CMPCI_MIC_VOL:
   1227      1.10     itohy 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_MIC,
   1228      1.10     itohy 		    CMPCI_ADJUST_MIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
   1229      1.23     itohy 		return;
   1230       1.1  augustss 	case CMPCI_MASTER_VOL:
   1231       1.1  augustss 		src = CMPCI_SB16_MIXER_MASTER_L;
   1232       1.1  augustss 		break;
   1233       1.1  augustss 	case CMPCI_LINE_IN_VOL:
   1234       1.1  augustss 		src = CMPCI_SB16_MIXER_LINE_L;
   1235       1.1  augustss 		break;
   1236      1.10     itohy 	case CMPCI_AUX_IN_VOL:
   1237      1.10     itohy 		bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MIXER_AUX,
   1238      1.10     itohy 		    CMPCI_ADJUST_AUX_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT],
   1239      1.10     itohy 					      sc->sc_gain[port][CMPCI_RIGHT]));
   1240      1.10     itohy 		return;
   1241      1.10     itohy 	case CMPCI_MIC_RECVOL:
   1242      1.10     itohy 		cmpci_reg_partial_write_1(sc, CMPCI_REG_MIXER25,
   1243      1.10     itohy 		    CMPCI_REG_ADMIC_SHIFT, CMPCI_REG_ADMIC_MASK,
   1244      1.10     itohy 		    CMPCI_ADJUST_ADMIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
   1245      1.10     itohy 		return;
   1246      1.10     itohy 	case CMPCI_DAC_VOL:
   1247       1.1  augustss 		src = CMPCI_SB16_MIXER_VOICE_L;
   1248       1.1  augustss 		break;
   1249       1.1  augustss 	case CMPCI_FM_VOL:
   1250       1.1  augustss 		src = CMPCI_SB16_MIXER_FM_L;
   1251       1.1  augustss 		break;
   1252       1.1  augustss 	case CMPCI_CD_VOL:
   1253       1.1  augustss 		src = CMPCI_SB16_MIXER_CDDA_L;
   1254       1.1  augustss 		break;
   1255       1.1  augustss 	case CMPCI_PCSPEAKER:
   1256       1.1  augustss 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_SPEAKER,
   1257      1.10     itohy 		    CMPCI_ADJUST_2_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
   1258      1.10     itohy 		return;
   1259      1.10     itohy 	case CMPCI_MIC_PREAMP:
   1260      1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1261      1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
   1262      1.10     itohy 			    CMPCI_REG_MICGAINZ);
   1263      1.10     itohy 		else
   1264      1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
   1265      1.10     itohy 			    CMPCI_REG_MICGAINZ);
   1266       1.7  tshiozak 		return;
   1267      1.10     itohy 
   1268      1.10     itohy 	case CMPCI_DAC_MUTE:
   1269      1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1270      1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1271      1.10     itohy 			    CMPCI_REG_WSMUTE);
   1272      1.10     itohy 		else
   1273      1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1274      1.10     itohy 			    CMPCI_REG_WSMUTE);
   1275      1.10     itohy 		return;
   1276      1.10     itohy 	case CMPCI_FM_MUTE:
   1277      1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1278      1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1279      1.10     itohy 			    CMPCI_REG_FMMUTE);
   1280      1.10     itohy 		else
   1281      1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1282      1.10     itohy 			    CMPCI_REG_FMMUTE);
   1283      1.10     itohy 		return;
   1284      1.10     itohy 	case CMPCI_AUX_IN_MUTE:
   1285      1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1286      1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
   1287      1.10     itohy 			    CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM);
   1288      1.10     itohy 		else
   1289      1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
   1290      1.10     itohy 			    CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM);
   1291      1.10     itohy 		return;
   1292      1.10     itohy 	case CMPCI_CD_MUTE:
   1293      1.10     itohy 		mask = CMPCI_SB16_SW_CD;
   1294      1.10     itohy 		goto sbmute;
   1295      1.10     itohy 	case CMPCI_MIC_MUTE:
   1296      1.10     itohy 		mask = CMPCI_SB16_SW_MIC;
   1297      1.10     itohy 		goto sbmute;
   1298      1.10     itohy 	case CMPCI_LINE_IN_MUTE:
   1299      1.10     itohy 		mask = CMPCI_SB16_SW_LINE;
   1300      1.10     itohy 	sbmute:
   1301      1.10     itohy 		bits = cmpci_mixerreg_read(sc, CMPCI_SB16_MIXER_OUTMIX);
   1302      1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1303      1.10     itohy 			bits = bits & ~mask;
   1304      1.10     itohy 		else
   1305      1.10     itohy 			bits = bits | mask;
   1306      1.10     itohy 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, bits);
   1307       1.8     itohy 		return;
   1308      1.10     itohy 
   1309      1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
   1310      1.10     itohy 	case CMPCI_MONITOR_DAC:
   1311      1.10     itohy 	case CMPCI_PLAYBACK_MODE:
   1312       1.7  tshiozak 	case CMPCI_SPDIF_LOOP:
   1313      1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
   1314       1.7  tshiozak 		cmpci_set_out_ports(sc);
   1315       1.7  tshiozak 		return;
   1316       1.7  tshiozak 	case CMPCI_SPDIF_OUT_VOLTAGE:
   1317       1.7  tshiozak 		if (CMPCI_ISCAP(sc, SPDOUT_VOLTAGE)) {
   1318      1.10     itohy 			if (sc->sc_gain[CMPCI_SPDIF_OUT_VOLTAGE][CMPCI_LR]
   1319      1.21     itohy 			    == CMPCI_SPDIF_OUT_VOLTAGE_HIGH)
   1320      1.21     itohy 				cmpci_reg_clear_reg_misc(sc, CMPCI_REG_5V);
   1321      1.10     itohy 			else
   1322      1.21     itohy 				cmpci_reg_set_reg_misc(sc, CMPCI_REG_5V);
   1323       1.7  tshiozak 		}
   1324       1.7  tshiozak 		return;
   1325       1.7  tshiozak 	case CMPCI_SURROUND:
   1326       1.7  tshiozak 		if (CMPCI_ISCAP(sc, SURROUND)) {
   1327       1.7  tshiozak 			if (sc->sc_gain[CMPCI_SURROUND][CMPCI_LR])
   1328       1.7  tshiozak 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1329       1.7  tshiozak 						CMPCI_REG_SURROUND);
   1330       1.7  tshiozak 			else
   1331       1.7  tshiozak 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1332       1.7  tshiozak 						  CMPCI_REG_SURROUND);
   1333       1.7  tshiozak 		}
   1334       1.7  tshiozak 		return;
   1335       1.7  tshiozak 	case CMPCI_REAR:
   1336       1.7  tshiozak 		if (CMPCI_ISCAP(sc, REAR)) {
   1337       1.7  tshiozak 			if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
   1338      1.21     itohy 				cmpci_reg_set_reg_misc(sc, CMPCI_REG_N4SPK3D);
   1339       1.7  tshiozak 			else
   1340      1.21     itohy 				cmpci_reg_clear_reg_misc(sc, CMPCI_REG_N4SPK3D);
   1341       1.7  tshiozak 		}
   1342       1.7  tshiozak 		return;
   1343       1.7  tshiozak 	case CMPCI_INDIVIDUAL:
   1344       1.7  tshiozak 		if (CMPCI_ISCAP(sc, INDIVIDUAL_REAR)) {
   1345       1.7  tshiozak 			if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
   1346       1.7  tshiozak 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1347       1.7  tshiozak 						CMPCI_REG_INDIVIDUAL);
   1348       1.7  tshiozak 			else
   1349       1.7  tshiozak 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1350       1.7  tshiozak 						  CMPCI_REG_INDIVIDUAL);
   1351       1.7  tshiozak 		}
   1352       1.7  tshiozak 		return;
   1353       1.7  tshiozak 	case CMPCI_REVERSE:
   1354       1.7  tshiozak 		if (CMPCI_ISCAP(sc, REVERSE_FR)) {
   1355       1.7  tshiozak 			if (sc->sc_gain[CMPCI_REVERSE][CMPCI_LR])
   1356       1.7  tshiozak 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1357       1.7  tshiozak 						CMPCI_REG_REVERSE_FR);
   1358       1.7  tshiozak 			else
   1359       1.7  tshiozak 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1360       1.7  tshiozak 						  CMPCI_REG_REVERSE_FR);
   1361       1.7  tshiozak 		}
   1362       1.7  tshiozak 		return;
   1363       1.7  tshiozak 	case CMPCI_SPDIF_IN_PHASE:
   1364       1.7  tshiozak 		if (CMPCI_ISCAP(sc, SPDIN_PHASE)) {
   1365      1.10     itohy 			if (sc->sc_gain[CMPCI_SPDIF_IN_PHASE][CMPCI_LR]
   1366      1.10     itohy 			    == CMPCI_SPDIF_IN_PHASE_POSITIVE)
   1367      1.10     itohy 				cmpci_reg_clear_1(sc, CMPCI_REG_CHANNEL_FORMAT,
   1368      1.10     itohy 						  CMPCI_REG_SPDIN_PHASE);
   1369      1.10     itohy 			else
   1370       1.8     itohy 				cmpci_reg_set_1(sc, CMPCI_REG_CHANNEL_FORMAT,
   1371       1.8     itohy 						CMPCI_REG_SPDIN_PHASE);
   1372       1.7  tshiozak 		}
   1373       1.1  augustss 		return;
   1374       1.1  augustss 	default:
   1375       1.1  augustss 		return;
   1376       1.1  augustss 	}
   1377      1.10     itohy 
   1378      1.10     itohy 	cmpci_mixerreg_write(sc, src,
   1379      1.10     itohy 	    CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT]));
   1380       1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_L_TO_R(src),
   1381      1.10     itohy 	    CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_RIGHT]));
   1382       1.7  tshiozak }
   1383       1.7  tshiozak 
   1384       1.7  tshiozak static void
   1385       1.7  tshiozak cmpci_set_out_ports(sc)
   1386       1.7  tshiozak 	struct cmpci_softc *sc;
   1387       1.7  tshiozak {
   1388      1.10     itohy 	u_int8_t v;
   1389      1.10     itohy 	int enspdout = 0;
   1390      1.10     itohy 
   1391       1.7  tshiozak 	if (!CMPCI_ISCAP(sc, SPDLOOP))
   1392       1.7  tshiozak 		return;
   1393      1.10     itohy 
   1394      1.10     itohy 	/* SPDIF/out select */
   1395      1.10     itohy 	if (sc->sc_gain[CMPCI_SPDIF_LOOP][CMPCI_LR] == CMPCI_SPDIF_LOOP_OFF) {
   1396      1.10     itohy 		/* playback */
   1397      1.10     itohy 		cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP);
   1398      1.10     itohy 	} else {
   1399      1.10     itohy 		/* monitor SPDIF/in */
   1400      1.10     itohy 		cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP);
   1401      1.10     itohy 	}
   1402      1.10     itohy 
   1403      1.10     itohy 	/* SPDIF in select */
   1404      1.10     itohy 	v = sc->sc_gain[CMPCI_SPDIF_IN_SELECT][CMPCI_LR];
   1405      1.10     itohy 	if (v & CMPCI_SPDIFIN_SPDIFIN2)
   1406      1.21     itohy 		cmpci_reg_set_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN);
   1407      1.10     itohy 	else
   1408      1.21     itohy 		cmpci_reg_clear_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN);
   1409      1.10     itohy 	if (v & CMPCI_SPDIFIN_SPDIFOUT)
   1410      1.21     itohy 		cmpci_reg_set_reg_misc(sc, CMPCI_REG_SPDFLOOPI);
   1411      1.10     itohy 	else
   1412      1.21     itohy 		cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPDFLOOPI);
   1413      1.10     itohy 
   1414      1.10     itohy 	/* playback to ... */
   1415      1.10     itohy 	if (CMPCI_ISCAP(sc, SPDOUT) &&
   1416      1.10     itohy 	    sc->sc_gain[CMPCI_PLAYBACK_MODE][CMPCI_LR]
   1417      1.10     itohy 		== CMPCI_PLAYBACK_MODE_SPDIF &&
   1418      1.10     itohy 	    (sc->sc_play.md_divide == CMPCI_REG_RATE_44100 ||
   1419      1.10     itohy 		(CMPCI_ISCAP(sc, SPDOUT_48K) &&
   1420      1.10     itohy 		    sc->sc_play.md_divide==CMPCI_REG_RATE_48000))) {
   1421      1.10     itohy 		/* playback to SPDIF */
   1422      1.10     itohy 		cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE);
   1423      1.10     itohy 		enspdout = 1;
   1424      1.10     itohy 		if (sc->sc_play.md_divide==CMPCI_REG_RATE_48000)
   1425      1.21     itohy 			cmpci_reg_set_reg_misc(sc,
   1426      1.21     itohy 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
   1427      1.10     itohy 		else
   1428      1.21     itohy 			cmpci_reg_clear_reg_misc(sc,
   1429      1.21     itohy 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
   1430      1.10     itohy 	} else {
   1431      1.10     itohy 		/* playback to DAC */
   1432       1.7  tshiozak 		cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
   1433      1.10     itohy 				  CMPCI_REG_SPDIF0_ENABLE);
   1434      1.10     itohy 		if (CMPCI_ISCAP(sc, SPDOUT_48K))
   1435      1.21     itohy 			cmpci_reg_clear_reg_misc(sc,
   1436      1.21     itohy 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
   1437      1.10     itohy 	}
   1438      1.10     itohy 
   1439      1.10     itohy 	/* legacy to SPDIF/out or not */
   1440      1.10     itohy 	if (CMPCI_ISCAP(sc, SPDLEGACY)) {
   1441      1.10     itohy 		if (sc->sc_gain[CMPCI_SPDIF_OUT_PLAYBACK][CMPCI_LR]
   1442      1.10     itohy 		    == CMPCI_SPDIF_OUT_PLAYBACK_WAVE)
   1443      1.10     itohy 			cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL,
   1444      1.10     itohy 					CMPCI_REG_LEGACY_SPDIF_ENABLE);
   1445      1.10     itohy 		else {
   1446      1.10     itohy 			cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL,
   1447      1.10     itohy 					CMPCI_REG_LEGACY_SPDIF_ENABLE);
   1448      1.10     itohy 			enspdout = 1;
   1449      1.10     itohy 		}
   1450      1.10     itohy 	}
   1451      1.10     itohy 
   1452      1.10     itohy 	/* enable/disable SPDIF/out */
   1453      1.10     itohy 	if (CMPCI_ISCAP(sc, XSPDOUT) && enspdout)
   1454      1.10     itohy 		cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL,
   1455      1.10     itohy 				CMPCI_REG_XSPDIF_ENABLE);
   1456      1.10     itohy 	else
   1457       1.7  tshiozak 		cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL,
   1458      1.10     itohy 				CMPCI_REG_XSPDIF_ENABLE);
   1459      1.10     itohy 
   1460      1.25   xtraeme 	/* SPDIF monitor (digital to analog output) */
   1461      1.10     itohy 	if (CMPCI_ISCAP(sc, SPDIN_MONITOR)) {
   1462      1.10     itohy 		v = sc->sc_gain[CMPCI_MONITOR_DAC][CMPCI_LR];
   1463      1.10     itohy 		if (!(v & CMPCI_MONDAC_ENABLE))
   1464      1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1465      1.10     itohy 					CMPCI_REG_SPDIN_MONITOR);
   1466      1.10     itohy 		if (v & CMPCI_MONDAC_SPDOUT)
   1467       1.7  tshiozak 			cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1,
   1468      1.10     itohy 					CMPCI_REG_SPDIFOUT_DAC);
   1469      1.10     itohy 		else
   1470       1.7  tshiozak 			cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
   1471      1.10     itohy 					CMPCI_REG_SPDIFOUT_DAC);
   1472      1.10     itohy 		if (v & CMPCI_MONDAC_ENABLE)
   1473      1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1474      1.10     itohy 					CMPCI_REG_SPDIN_MONITOR);
   1475       1.7  tshiozak 	}
   1476       1.1  augustss }
   1477       1.1  augustss 
   1478       1.1  augustss static int
   1479      1.10     itohy cmpci_set_in_ports(sc)
   1480       1.1  augustss 	struct cmpci_softc *sc;
   1481      1.10     itohy {
   1482       1.1  augustss 	int mask;
   1483       1.1  augustss 	int bitsl, bitsr;
   1484       1.1  augustss 
   1485      1.10     itohy 	mask = sc->sc_in_mask;
   1486      1.10     itohy 
   1487      1.10     itohy 	/*
   1488      1.10     itohy 	 * Note CMPCI_RECORD_SOURCE_CD, CMPCI_RECORD_SOURCE_LINE_IN and
   1489      1.10     itohy 	 * CMPCI_RECORD_SOURCE_FM are defined to the corresponding bit
   1490      1.10     itohy 	 * of the mixer register.
   1491      1.10     itohy 	 */
   1492      1.10     itohy 	bitsr = mask & (CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN |
   1493      1.10     itohy 	    CMPCI_RECORD_SOURCE_FM);
   1494      1.10     itohy 
   1495       1.1  augustss 	bitsl = CMPCI_SB16_MIXER_SRC_R_TO_L(bitsr);
   1496       1.8     itohy 	if (mask & CMPCI_RECORD_SOURCE_MIC) {
   1497       1.1  augustss 		bitsl |= CMPCI_SB16_MIXER_MIC_SRC;
   1498       1.1  augustss 		bitsr |= CMPCI_SB16_MIXER_MIC_SRC;
   1499       1.1  augustss 	}
   1500       1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, bitsl);
   1501       1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, bitsr);
   1502      1.10     itohy 
   1503      1.10     itohy 	if (mask & CMPCI_RECORD_SOURCE_AUX_IN)
   1504      1.10     itohy 		cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
   1505      1.10     itohy 		    CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN);
   1506      1.10     itohy 	else
   1507      1.10     itohy 		cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
   1508      1.10     itohy 		    CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN);
   1509      1.10     itohy 
   1510      1.10     itohy 	if (mask & CMPCI_RECORD_SOURCE_WAVE)
   1511      1.10     itohy 		cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1512      1.10     itohy 		    CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR);
   1513      1.10     itohy 	else
   1514      1.10     itohy 		cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1515      1.10     itohy 		    CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR);
   1516      1.10     itohy 
   1517       1.7  tshiozak 	if (CMPCI_ISCAP(sc, SPDIN) &&
   1518      1.10     itohy 	    (sc->sc_rec.md_divide == CMPCI_REG_RATE_44100 ||
   1519      1.10     itohy 		(CMPCI_ISCAP(sc, SPDOUT_48K) &&
   1520      1.10     itohy 		    sc->sc_rec.md_divide == CMPCI_REG_RATE_48000/* XXX? */))) {
   1521       1.8     itohy 		if (mask & CMPCI_RECORD_SOURCE_SPDIF) {
   1522       1.7  tshiozak 			/* enable SPDIF/in */
   1523       1.7  tshiozak 			cmpci_reg_set_4(sc,
   1524       1.7  tshiozak 					CMPCI_REG_FUNC_1,
   1525       1.7  tshiozak 					CMPCI_REG_SPDIF1_ENABLE);
   1526       1.7  tshiozak 		} else {
   1527       1.7  tshiozak 			cmpci_reg_clear_4(sc,
   1528       1.7  tshiozak 					CMPCI_REG_FUNC_1,
   1529       1.7  tshiozak 					CMPCI_REG_SPDIF1_ENABLE);
   1530       1.7  tshiozak 		}
   1531       1.7  tshiozak 	}
   1532       1.1  augustss 
   1533       1.1  augustss 	return 0;
   1534       1.1  augustss }
   1535       1.1  augustss 
   1536       1.1  augustss static int
   1537       1.1  augustss cmpci_set_port(handle, cp)
   1538       1.1  augustss 	void *handle;
   1539       1.1  augustss 	mixer_ctrl_t *cp;
   1540       1.1  augustss {
   1541       1.1  augustss 	struct cmpci_softc *sc = handle;
   1542       1.1  augustss 	int lgain, rgain;
   1543      1.10     itohy 
   1544       1.1  augustss 	switch (cp->dev) {
   1545      1.10     itohy 	case CMPCI_MIC_VOL:
   1546       1.1  augustss 	case CMPCI_PCSPEAKER:
   1547      1.10     itohy 	case CMPCI_MIC_RECVOL:
   1548      1.10     itohy 		if (cp->un.value.num_channels != 1)
   1549      1.10     itohy 			return EINVAL;
   1550      1.10     itohy 		/* FALLTHROUGH */
   1551      1.10     itohy 	case CMPCI_DAC_VOL:
   1552       1.1  augustss 	case CMPCI_FM_VOL:
   1553       1.1  augustss 	case CMPCI_CD_VOL:
   1554      1.10     itohy 	case CMPCI_LINE_IN_VOL:
   1555      1.10     itohy 	case CMPCI_AUX_IN_VOL:
   1556       1.1  augustss 	case CMPCI_MASTER_VOL:
   1557       1.1  augustss 		if (cp->type != AUDIO_MIXER_VALUE)
   1558       1.1  augustss 			return EINVAL;
   1559      1.10     itohy 		switch (cp->un.value.num_channels) {
   1560      1.10     itohy 		case 1:
   1561       1.1  augustss 			lgain = rgain =
   1562      1.10     itohy 			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
   1563       1.1  augustss 			break;
   1564      1.10     itohy 		case 2:
   1565      1.10     itohy 			lgain = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT];
   1566      1.10     itohy 			rgain = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT];
   1567       1.1  augustss 			break;
   1568       1.1  augustss 		default:
   1569      1.10     itohy 			return EINVAL;
   1570       1.1  augustss 		}
   1571       1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_LEFT]  = lgain;
   1572       1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_RIGHT] = rgain;
   1573       1.1  augustss 
   1574       1.1  augustss 		cmpci_set_mixer_gain(sc, cp->dev);
   1575       1.1  augustss 		break;
   1576       1.1  augustss 
   1577       1.1  augustss 	case CMPCI_RECORD_SOURCE:
   1578       1.1  augustss 		if (cp->type != AUDIO_MIXER_SET)
   1579       1.1  augustss 			return EINVAL;
   1580       1.8     itohy 
   1581      1.10     itohy 		if (cp->un.mask & ~(CMPCI_RECORD_SOURCE_MIC |
   1582      1.10     itohy 		    CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN |
   1583      1.10     itohy 		    CMPCI_RECORD_SOURCE_AUX_IN | CMPCI_RECORD_SOURCE_WAVE |
   1584      1.10     itohy 		    CMPCI_RECORD_SOURCE_FM | CMPCI_RECORD_SOURCE_SPDIF))
   1585      1.10     itohy 			return EINVAL;
   1586      1.10     itohy 
   1587       1.8     itohy 		if (cp->un.mask & CMPCI_RECORD_SOURCE_SPDIF)
   1588       1.8     itohy 			cp->un.mask = CMPCI_RECORD_SOURCE_SPDIF;
   1589       1.8     itohy 
   1590      1.10     itohy 		sc->sc_in_mask = cp->un.mask;
   1591      1.10     itohy 		return cmpci_set_in_ports(sc);
   1592       1.1  augustss 
   1593      1.10     itohy 	/* boolean */
   1594      1.10     itohy 	case CMPCI_DAC_MUTE:
   1595      1.10     itohy 	case CMPCI_FM_MUTE:
   1596      1.10     itohy 	case CMPCI_CD_MUTE:
   1597      1.10     itohy 	case CMPCI_LINE_IN_MUTE:
   1598      1.10     itohy 	case CMPCI_AUX_IN_MUTE:
   1599      1.10     itohy 	case CMPCI_MIC_MUTE:
   1600      1.10     itohy 	case CMPCI_MIC_PREAMP:
   1601      1.10     itohy 	case CMPCI_PLAYBACK_MODE:
   1602      1.10     itohy 	case CMPCI_SPDIF_IN_PHASE:
   1603      1.10     itohy 	case CMPCI_SPDIF_LOOP:
   1604      1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
   1605      1.10     itohy 	case CMPCI_SPDIF_OUT_VOLTAGE:
   1606      1.10     itohy 	case CMPCI_REAR:
   1607      1.10     itohy 	case CMPCI_INDIVIDUAL:
   1608      1.10     itohy 	case CMPCI_REVERSE:
   1609      1.10     itohy 	case CMPCI_SURROUND:
   1610       1.1  augustss 		if (cp->type != AUDIO_MIXER_ENUM)
   1611       1.1  augustss 			return EINVAL;
   1612       1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord != 0;
   1613      1.10     itohy 		cmpci_set_mixer_gain(sc, cp->dev);
   1614       1.1  augustss 		break;
   1615       1.1  augustss 
   1616      1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
   1617      1.10     itohy 		switch (cp->un.ord) {
   1618      1.10     itohy 		case CMPCI_SPDIF_IN_SPDIN1:
   1619      1.10     itohy 		case CMPCI_SPDIF_IN_SPDIN2:
   1620      1.10     itohy 		case CMPCI_SPDIF_IN_SPDOUT:
   1621      1.10     itohy 			break;
   1622      1.10     itohy 		default:
   1623       1.1  augustss 			return EINVAL;
   1624       1.1  augustss 		}
   1625      1.10     itohy 		goto xenum;
   1626      1.10     itohy 	case CMPCI_MONITOR_DAC:
   1627      1.10     itohy 		switch (cp->un.ord) {
   1628      1.10     itohy 		case CMPCI_MONITOR_DAC_OFF:
   1629      1.10     itohy 		case CMPCI_MONITOR_DAC_SPDIN:
   1630      1.10     itohy 		case CMPCI_MONITOR_DAC_SPDOUT:
   1631      1.10     itohy 			break;
   1632      1.10     itohy 		default:
   1633      1.10     itohy 			return EINVAL;
   1634       1.1  augustss 		}
   1635      1.10     itohy 	xenum:
   1636      1.10     itohy 		if (cp->type != AUDIO_MIXER_ENUM)
   1637      1.10     itohy 			return EINVAL;
   1638       1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord;
   1639      1.10     itohy 		cmpci_set_mixer_gain(sc, cp->dev);
   1640       1.7  tshiozak 		break;
   1641      1.10     itohy 
   1642       1.1  augustss 	default:
   1643       1.1  augustss 	    return EINVAL;
   1644       1.1  augustss 	}
   1645      1.10     itohy 
   1646       1.1  augustss 	return 0;
   1647       1.1  augustss }
   1648       1.1  augustss 
   1649       1.1  augustss static int
   1650       1.1  augustss cmpci_get_port(handle, cp)
   1651       1.1  augustss 	void *handle;
   1652       1.1  augustss 	mixer_ctrl_t *cp;
   1653       1.1  augustss {
   1654       1.1  augustss 	struct cmpci_softc *sc = handle;
   1655      1.10     itohy 
   1656       1.1  augustss 	switch (cp->dev) {
   1657       1.1  augustss 	case CMPCI_MIC_VOL:
   1658      1.10     itohy 	case CMPCI_PCSPEAKER:
   1659      1.10     itohy 	case CMPCI_MIC_RECVOL:
   1660       1.1  augustss 		if (cp->un.value.num_channels != 1)
   1661       1.1  augustss 			return EINVAL;
   1662      1.12     itohy 		/*FALLTHROUGH*/
   1663      1.10     itohy 	case CMPCI_DAC_VOL:
   1664       1.1  augustss 	case CMPCI_FM_VOL:
   1665       1.1  augustss 	case CMPCI_CD_VOL:
   1666      1.10     itohy 	case CMPCI_LINE_IN_VOL:
   1667      1.10     itohy 	case CMPCI_AUX_IN_VOL:
   1668       1.1  augustss 	case CMPCI_MASTER_VOL:
   1669       1.1  augustss 		switch (cp->un.value.num_channels) {
   1670       1.1  augustss 		case 1:
   1671      1.10     itohy 			cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
   1672       1.7  tshiozak 				sc->sc_gain[cp->dev][CMPCI_LEFT];
   1673       1.1  augustss 			break;
   1674       1.1  augustss 		case 2:
   1675      1.10     itohy 			cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
   1676       1.7  tshiozak 				sc->sc_gain[cp->dev][CMPCI_LEFT];
   1677      1.10     itohy 			cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
   1678       1.7  tshiozak 				sc->sc_gain[cp->dev][CMPCI_RIGHT];
   1679       1.1  augustss 			break;
   1680       1.1  augustss 		default:
   1681       1.1  augustss 			return EINVAL;
   1682       1.1  augustss 		}
   1683       1.1  augustss 		break;
   1684      1.10     itohy 
   1685       1.1  augustss 	case CMPCI_RECORD_SOURCE:
   1686       1.7  tshiozak 		cp->un.mask = sc->sc_in_mask;
   1687       1.1  augustss 		break;
   1688       1.1  augustss 
   1689      1.10     itohy 	case CMPCI_DAC_MUTE:
   1690      1.10     itohy 	case CMPCI_FM_MUTE:
   1691      1.10     itohy 	case CMPCI_CD_MUTE:
   1692       1.1  augustss 	case CMPCI_LINE_IN_MUTE:
   1693      1.10     itohy 	case CMPCI_AUX_IN_MUTE:
   1694      1.10     itohy 	case CMPCI_MIC_MUTE:
   1695      1.10     itohy 	case CMPCI_MIC_PREAMP:
   1696      1.10     itohy 	case CMPCI_PLAYBACK_MODE:
   1697      1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
   1698      1.10     itohy 	case CMPCI_SPDIF_IN_PHASE:
   1699       1.7  tshiozak 	case CMPCI_SPDIF_LOOP:
   1700      1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
   1701       1.7  tshiozak 	case CMPCI_SPDIF_OUT_VOLTAGE:
   1702      1.10     itohy 	case CMPCI_MONITOR_DAC:
   1703       1.7  tshiozak 	case CMPCI_REAR:
   1704       1.7  tshiozak 	case CMPCI_INDIVIDUAL:
   1705       1.7  tshiozak 	case CMPCI_REVERSE:
   1706       1.7  tshiozak 	case CMPCI_SURROUND:
   1707       1.7  tshiozak 		cp->un.ord = sc->sc_gain[cp->dev][CMPCI_LR];
   1708       1.1  augustss 		break;
   1709       1.1  augustss 
   1710       1.1  augustss 	default:
   1711       1.1  augustss 		return EINVAL;
   1712       1.1  augustss 	}
   1713       1.1  augustss 
   1714       1.1  augustss 	return 0;
   1715       1.1  augustss }
   1716       1.1  augustss 
   1717       1.1  augustss /* ARGSUSED */
   1718       1.1  augustss static size_t
   1719       1.1  augustss cmpci_round_buffersize(handle, direction, bufsize)
   1720       1.1  augustss 	void *handle;
   1721       1.1  augustss 	int direction;
   1722       1.1  augustss 	size_t bufsize;
   1723       1.1  augustss {
   1724       1.1  augustss 	if (bufsize > 0x10000)
   1725       1.1  augustss 		bufsize = 0x10000;
   1726      1.10     itohy 
   1727       1.1  augustss 	return bufsize;
   1728       1.1  augustss }
   1729       1.1  augustss 
   1730       1.1  augustss 
   1731       1.4    simonb static paddr_t
   1732       1.1  augustss cmpci_mappage(handle, addr, offset, prot)
   1733       1.1  augustss 	void *handle;
   1734       1.1  augustss 	void *addr;
   1735       1.4    simonb 	off_t offset;
   1736       1.4    simonb 	int prot;
   1737       1.1  augustss {
   1738       1.1  augustss 	struct cmpci_softc *sc = handle;
   1739       1.1  augustss 	struct cmpci_dmanode *p;
   1740      1.10     itohy 
   1741       1.1  augustss 	if (offset < 0 || NULL == (p = cmpci_find_dmamem(sc, addr)))
   1742       1.1  augustss 		return -1;
   1743       1.1  augustss 
   1744       1.1  augustss 	return bus_dmamem_mmap(p->cd_tag, p->cd_segs,
   1745       1.7  tshiozak 		   sizeof(p->cd_segs)/sizeof(p->cd_segs[0]),
   1746       1.7  tshiozak 		   offset, prot, BUS_DMA_WAITOK);
   1747       1.1  augustss }
   1748       1.1  augustss 
   1749       1.1  augustss 
   1750       1.1  augustss /* ARGSUSED */
   1751       1.1  augustss static int
   1752       1.1  augustss cmpci_get_props(handle)
   1753       1.1  augustss 	void *handle;
   1754       1.1  augustss {
   1755       1.1  augustss 	return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX;
   1756       1.1  augustss }
   1757       1.1  augustss 
   1758       1.1  augustss 
   1759       1.1  augustss static int
   1760       1.1  augustss cmpci_trigger_output(handle, start, end, blksize, intr, arg, param)
   1761       1.7  tshiozak 	void *handle;
   1762       1.7  tshiozak 	void *start, *end;
   1763       1.7  tshiozak 	int blksize;
   1764       1.7  tshiozak 	void (*intr) __P((void *));
   1765       1.7  tshiozak 	void *arg;
   1766  1.26.2.1      kent 	const audio_params_t *param;
   1767       1.1  augustss {
   1768       1.1  augustss 	struct cmpci_softc *sc = handle;
   1769       1.1  augustss 	struct cmpci_dmanode *p;
   1770       1.1  augustss 	int bps;
   1771       1.1  augustss 
   1772       1.1  augustss 	sc->sc_play.intr = intr;
   1773       1.1  augustss 	sc->sc_play.intr_arg = arg;
   1774  1.26.2.1      kent 	bps = param->channels * param->precision / 8;
   1775       1.1  augustss 	if (!bps)
   1776       1.1  augustss 		return EINVAL;
   1777       1.1  augustss 
   1778       1.1  augustss 	/* set DMA frame */
   1779       1.1  augustss 	if (!(p = cmpci_find_dmamem(sc, start)))
   1780       1.1  augustss 		return EINVAL;
   1781       1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BASE,
   1782       1.1  augustss 	    DMAADDR(p));
   1783       1.1  augustss 	delay(10);
   1784       1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BYTES,
   1785       1.7  tshiozak 	    ((caddr_t)end - (caddr_t)start + 1) / bps - 1);
   1786       1.1  augustss 	delay(10);
   1787       1.1  augustss 
   1788       1.1  augustss 	/* set interrupt count */
   1789       1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_SAMPLES,
   1790       1.1  augustss 			  (blksize + bps - 1) / bps - 1);
   1791       1.1  augustss 	delay(10);
   1792       1.1  augustss 
   1793       1.1  augustss 	/* start DMA */
   1794       1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); /* PLAY */
   1795       1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE);
   1796       1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE);
   1797      1.10     itohy 
   1798       1.1  augustss 	return 0;
   1799       1.1  augustss }
   1800       1.1  augustss 
   1801       1.1  augustss static int
   1802       1.1  augustss cmpci_trigger_input(handle, start, end, blksize, intr, arg, param)
   1803       1.7  tshiozak 	void *handle;
   1804       1.7  tshiozak 	void *start, *end;
   1805       1.7  tshiozak 	int blksize;
   1806       1.7  tshiozak 	void (*intr) __P((void *));
   1807       1.7  tshiozak 	void *arg;
   1808  1.26.2.1      kent 	const audio_params_t *param;
   1809       1.1  augustss {
   1810       1.1  augustss 	struct cmpci_softc *sc = handle;
   1811       1.1  augustss 	struct cmpci_dmanode *p;
   1812       1.1  augustss 	int bps;
   1813       1.1  augustss 
   1814       1.1  augustss 	sc->sc_rec.intr = intr;
   1815       1.1  augustss 	sc->sc_rec.intr_arg = arg;
   1816  1.26.2.1      kent 	bps = param->channels * param->precision / 8;
   1817       1.1  augustss 	if (!bps)
   1818       1.1  augustss 		return EINVAL;
   1819       1.1  augustss 
   1820       1.1  augustss 	/* set DMA frame */
   1821       1.1  augustss 	if (!(p=cmpci_find_dmamem(sc, start)))
   1822       1.1  augustss 		return EINVAL;
   1823       1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BASE,
   1824       1.1  augustss 	    DMAADDR(p));
   1825       1.1  augustss 	delay(10);
   1826       1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BYTES,
   1827       1.7  tshiozak 	    ((caddr_t)end - (caddr_t)start + 1) / bps - 1);
   1828       1.1  augustss 	delay(10);
   1829       1.1  augustss 
   1830       1.1  augustss 	/* set interrupt count */
   1831       1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_SAMPLES,
   1832       1.7  tshiozak 	    (blksize + bps - 1) / bps - 1);
   1833       1.1  augustss 	delay(10);
   1834       1.1  augustss 
   1835       1.1  augustss 	/* start DMA */
   1836       1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_DIR); /* REC */
   1837       1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE);
   1838       1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE);
   1839      1.10     itohy 
   1840       1.1  augustss 	return 0;
   1841       1.1  augustss }
   1842       1.1  augustss 
   1843       1.1  augustss 
   1844       1.1  augustss /* end of file */
   1845