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cmpci.c revision 1.30.12.1
      1  1.30.12.1      tron /*	$NetBSD: cmpci.c,v 1.30.12.1 2006/05/24 15:50:27 tron Exp $	*/
      2        1.1  augustss 
      3        1.1  augustss /*
      4       1.10     itohy  * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
      5        1.1  augustss  * All rights reserved.
      6        1.1  augustss  *
      7        1.1  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8       1.22    keihan  * by Takuya SHIOZAKI <tshiozak (at) NetBSD.org> .
      9        1.1  augustss  *
     10       1.10     itohy  * This code is derived from software contributed to The NetBSD Foundation
     11       1.10     itohy  * by ITOH Yasufumi.
     12       1.10     itohy  *
     13        1.1  augustss  * Redistribution and use in source and binary forms, with or without
     14        1.1  augustss  * modification, are permitted provided that the following conditions
     15        1.1  augustss  * are met:
     16        1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     17        1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     18        1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     19        1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     20        1.1  augustss  *    documentation and/or other materials provided with the distribution.
     21        1.1  augustss  *
     22        1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     23        1.1  augustss  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24        1.1  augustss  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25        1.1  augustss  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     26        1.1  augustss  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27        1.1  augustss  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28        1.1  augustss  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29        1.1  augustss  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30        1.1  augustss  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31        1.1  augustss  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32        1.1  augustss  * SUCH DAMAGE.
     33        1.1  augustss  *
     34        1.1  augustss  */
     35        1.1  augustss 
     36        1.1  augustss /*
     37        1.1  augustss  * C-Media CMI8x38 Audio Chip Support.
     38        1.1  augustss  *
     39        1.1  augustss  * TODO:
     40       1.10     itohy  *   - 4ch / 6ch support.
     41       1.10     itohy  *   - Joystick support.
     42        1.1  augustss  *
     43        1.1  augustss  */
     44       1.11     lukem 
     45       1.11     lukem #include <sys/cdefs.h>
     46  1.30.12.1      tron __KERNEL_RCSID(0, "$NetBSD: cmpci.c,v 1.30.12.1 2006/05/24 15:50:27 tron Exp $");
     47        1.1  augustss 
     48        1.1  augustss #if defined(AUDIO_DEBUG) || defined(DEBUG)
     49        1.7  tshiozak #define DPRINTF(x) if (cmpcidebug) printf x
     50        1.7  tshiozak int cmpcidebug = 0;
     51        1.1  augustss #else
     52        1.1  augustss #define DPRINTF(x)
     53        1.1  augustss #endif
     54        1.1  augustss 
     55        1.8     itohy #include "mpu.h"
     56        1.8     itohy 
     57        1.1  augustss #include <sys/param.h>
     58        1.1  augustss #include <sys/systm.h>
     59        1.1  augustss #include <sys/kernel.h>
     60        1.1  augustss #include <sys/malloc.h>
     61        1.1  augustss #include <sys/device.h>
     62        1.1  augustss #include <sys/proc.h>
     63        1.1  augustss 
     64        1.1  augustss #include <dev/pci/pcidevs.h>
     65        1.1  augustss #include <dev/pci/pcivar.h>
     66        1.1  augustss 
     67        1.1  augustss #include <sys/audioio.h>
     68        1.1  augustss #include <dev/audio_if.h>
     69        1.1  augustss #include <dev/midi_if.h>
     70        1.1  augustss 
     71        1.1  augustss #include <dev/mulaw.h>
     72        1.1  augustss #include <dev/auconv.h>
     73        1.1  augustss #include <dev/pci/cmpcireg.h>
     74        1.1  augustss #include <dev/pci/cmpcivar.h>
     75        1.1  augustss 
     76        1.1  augustss #include <dev/ic/mpuvar.h>
     77        1.1  augustss #include <machine/bus.h>
     78        1.1  augustss #include <machine/intr.h>
     79        1.1  augustss 
     80        1.1  augustss /*
     81        1.1  augustss  * Low-level HW interface
     82        1.1  augustss  */
     83       1.30     perry static inline uint8_t cmpci_mixerreg_read(struct cmpci_softc *, uint8_t);
     84       1.30     perry static inline void cmpci_mixerreg_write(struct cmpci_softc *,
     85       1.28      kent 	uint8_t, uint8_t);
     86       1.30     perry static inline void cmpci_reg_partial_write_1(struct cmpci_softc *, int, int,
     87       1.28      kent 	unsigned, unsigned);
     88       1.30     perry static inline void cmpci_reg_partial_write_4(struct cmpci_softc *, int, int,
     89       1.28      kent 	uint32_t, uint32_t);
     90       1.30     perry static inline void cmpci_reg_set_1(struct cmpci_softc *, int, uint8_t);
     91       1.30     perry static inline void cmpci_reg_clear_1(struct cmpci_softc *, int, uint8_t);
     92       1.30     perry static inline void cmpci_reg_set_4(struct cmpci_softc *, int, uint32_t);
     93       1.30     perry static inline void cmpci_reg_clear_4(struct cmpci_softc *, int, uint32_t);
     94       1.30     perry static inline void cmpci_reg_set_reg_misc(struct cmpci_softc *, uint32_t);
     95       1.30     perry static inline void cmpci_reg_clear_reg_misc(struct cmpci_softc *, uint32_t);
     96       1.28      kent static int cmpci_rate_to_index(int);
     97       1.30     perry static inline int cmpci_index_to_rate(int);
     98       1.30     perry static inline int cmpci_index_to_divider(int);
     99       1.28      kent 
    100       1.28      kent static int cmpci_adjust(int, int);
    101       1.28      kent static void cmpci_set_mixer_gain(struct cmpci_softc *, int);
    102       1.28      kent static void cmpci_set_out_ports(struct cmpci_softc *);
    103       1.28      kent static int cmpci_set_in_ports(struct cmpci_softc *);
    104        1.1  augustss 
    105        1.1  augustss 
    106        1.1  augustss /*
    107        1.1  augustss  * autoconf interface
    108        1.1  augustss  */
    109       1.28      kent static int cmpci_match(struct device *, struct cfdata *, void *);
    110       1.28      kent static void cmpci_attach(struct device *, struct device *, void *);
    111        1.1  augustss 
    112       1.15   thorpej CFATTACH_DECL(cmpci, sizeof (struct cmpci_softc),
    113       1.16   thorpej     cmpci_match, cmpci_attach, NULL, NULL);
    114        1.1  augustss 
    115        1.1  augustss /* interrupt */
    116       1.28      kent static int cmpci_intr(void *);
    117        1.1  augustss 
    118        1.1  augustss 
    119        1.1  augustss /*
    120        1.1  augustss  * DMA stuffs
    121        1.1  augustss  */
    122       1.28      kent static int cmpci_alloc_dmamem(struct cmpci_softc *, size_t,
    123       1.28      kent 	struct malloc_type *, int, caddr_t *);
    124       1.28      kent static int cmpci_free_dmamem(struct cmpci_softc *, caddr_t,
    125       1.28      kent 	struct malloc_type *);
    126       1.28      kent static struct cmpci_dmanode * cmpci_find_dmamem(struct cmpci_softc *,
    127       1.28      kent 	caddr_t);
    128        1.1  augustss 
    129        1.1  augustss 
    130        1.1  augustss /*
    131        1.1  augustss  * interface to machine independent layer
    132        1.1  augustss  */
    133       1.28      kent static int cmpci_query_encoding(void *, struct audio_encoding *);
    134       1.28      kent static int cmpci_set_params(void *, int, int, audio_params_t *,
    135       1.28      kent 	audio_params_t *, stream_filter_list_t *, stream_filter_list_t *);
    136       1.28      kent static int cmpci_round_blocksize(void *, int, int, const audio_params_t *);
    137       1.28      kent static int cmpci_halt_output(void *);
    138       1.28      kent static int cmpci_halt_input(void *);
    139       1.28      kent static int cmpci_getdev(void *, struct audio_device *);
    140       1.28      kent static int cmpci_set_port(void *, mixer_ctrl_t *);
    141       1.28      kent static int cmpci_get_port(void *, mixer_ctrl_t *);
    142       1.28      kent static int cmpci_query_devinfo(void *, mixer_devinfo_t *);
    143       1.28      kent static void *cmpci_allocm(void *, int, size_t, struct malloc_type *, int);
    144       1.28      kent static void cmpci_freem(void *, void *, struct malloc_type *);
    145       1.28      kent static size_t cmpci_round_buffersize(void *, int, size_t);
    146       1.28      kent static paddr_t cmpci_mappage(void *, void *, off_t, int);
    147       1.28      kent static int cmpci_get_props(void *);
    148       1.28      kent static int cmpci_trigger_output(void *, void *, void *, int,
    149       1.28      kent 	void (*)(void *), void *, const audio_params_t *);
    150       1.28      kent static int cmpci_trigger_input(void *, void *, void *, int,
    151       1.28      kent 	void (*)(void *), void *, const audio_params_t *);
    152        1.1  augustss 
    153       1.26      yamt static const struct audio_hw_if cmpci_hw_if = {
    154       1.27      kent 	NULL,			/* open */
    155       1.27      kent 	NULL,			/* close */
    156        1.1  augustss 	NULL,			/* drain */
    157        1.3  gmcgarry 	cmpci_query_encoding,	/* query_encoding */
    158        1.3  gmcgarry 	cmpci_set_params,	/* set_params */
    159        1.3  gmcgarry 	cmpci_round_blocksize,	/* round_blocksize */
    160        1.1  augustss 	NULL,			/* commit_settings */
    161        1.1  augustss 	NULL,			/* init_output */
    162        1.1  augustss 	NULL,			/* init_input */
    163        1.1  augustss 	NULL,			/* start_output */
    164        1.1  augustss 	NULL,			/* start_input */
    165        1.3  gmcgarry 	cmpci_halt_output,	/* halt_output */
    166        1.3  gmcgarry 	cmpci_halt_input,	/* halt_input */
    167        1.1  augustss 	NULL,			/* speaker_ctl */
    168        1.3  gmcgarry 	cmpci_getdev,		/* getdev */
    169        1.1  augustss 	NULL,			/* setfd */
    170        1.3  gmcgarry 	cmpci_set_port,		/* set_port */
    171        1.3  gmcgarry 	cmpci_get_port,		/* get_port */
    172        1.3  gmcgarry 	cmpci_query_devinfo,	/* query_devinfo */
    173        1.3  gmcgarry 	cmpci_allocm,		/* allocm */
    174        1.3  gmcgarry 	cmpci_freem,		/* freem */
    175        1.3  gmcgarry 	cmpci_round_buffersize,/* round_buffersize */
    176        1.3  gmcgarry 	cmpci_mappage,		/* mappage */
    177        1.3  gmcgarry 	cmpci_get_props,	/* get_props */
    178        1.3  gmcgarry 	cmpci_trigger_output,	/* trigger_output */
    179        1.9  augustss 	cmpci_trigger_input,	/* trigger_input */
    180        1.9  augustss 	NULL,			/* dev_ioctl */
    181        1.1  augustss };
    182        1.1  augustss 
    183       1.27      kent #define CMPCI_NFORMATS	4
    184       1.27      kent static const struct audio_format cmpci_formats[CMPCI_NFORMATS] = {
    185       1.27      kent 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
    186       1.27      kent 	 2, AUFMT_STEREO, 0, {5512, 48000}},
    187       1.27      kent 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
    188       1.27      kent 	 1, AUFMT_MONAURAL, 0, {5512, 48000}},
    189       1.27      kent 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
    190       1.27      kent 	 2, AUFMT_STEREO, 0, {5512, 48000}},
    191       1.27      kent 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
    192       1.27      kent 	 1, AUFMT_MONAURAL, 0, {5512, 48000}},
    193       1.27      kent };
    194       1.27      kent 
    195        1.1  augustss 
    196        1.1  augustss /*
    197        1.1  augustss  * Low-level HW interface
    198        1.1  augustss  */
    199        1.1  augustss 
    200        1.1  augustss /* mixer register read/write */
    201       1.30     perry static inline uint8_t
    202       1.28      kent cmpci_mixerreg_read(struct cmpci_softc *sc, uint8_t no)
    203        1.1  augustss {
    204        1.1  augustss 	uint8_t ret;
    205        1.1  augustss 
    206        1.1  augustss 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no);
    207        1.1  augustss 	delay(10);
    208        1.1  augustss 	ret = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA);
    209        1.1  augustss 	delay(10);
    210        1.1  augustss 	return ret;
    211        1.1  augustss }
    212        1.1  augustss 
    213       1.30     perry static inline void
    214       1.28      kent cmpci_mixerreg_write(struct cmpci_softc *sc, uint8_t no, uint8_t val)
    215        1.1  augustss {
    216       1.28      kent 
    217        1.1  augustss 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no);
    218        1.1  augustss 	delay(10);
    219        1.1  augustss 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA, val);
    220        1.1  augustss 	delay(10);
    221        1.1  augustss }
    222        1.1  augustss 
    223        1.1  augustss 
    224        1.1  augustss /* register partial write */
    225       1.30     perry static inline void
    226       1.28      kent cmpci_reg_partial_write_1(struct cmpci_softc *sc, int no, int shift,
    227       1.28      kent 			  unsigned mask, unsigned val)
    228       1.10     itohy {
    229       1.28      kent 
    230       1.10     itohy 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
    231       1.10     itohy 	    (val<<shift) |
    232       1.10     itohy 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
    233       1.10     itohy 	delay(10);
    234       1.10     itohy }
    235       1.10     itohy 
    236       1.30     perry static inline void
    237       1.28      kent cmpci_reg_partial_write_4(struct cmpci_softc *sc, int no, int shift,
    238       1.28      kent 			  uint32_t mask, uint32_t val)
    239        1.1  augustss {
    240       1.28      kent 
    241        1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
    242        1.1  augustss 	    (val<<shift) |
    243        1.1  augustss 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
    244        1.1  augustss 	delay(10);
    245        1.1  augustss }
    246        1.1  augustss 
    247        1.1  augustss /* register set/clear bit */
    248       1.30     perry static inline void
    249       1.28      kent cmpci_reg_set_1(struct cmpci_softc *sc, int no, uint8_t mask)
    250        1.7  tshiozak {
    251       1.28      kent 
    252        1.7  tshiozak 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
    253        1.7  tshiozak 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) | mask));
    254        1.7  tshiozak 	delay(10);
    255        1.7  tshiozak }
    256        1.7  tshiozak 
    257       1.30     perry static inline void
    258       1.28      kent cmpci_reg_clear_1(struct cmpci_softc *sc, int no, uint8_t mask)
    259        1.7  tshiozak {
    260       1.28      kent 
    261        1.7  tshiozak 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
    262        1.7  tshiozak 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~mask));
    263        1.7  tshiozak 	delay(10);
    264        1.7  tshiozak }
    265        1.7  tshiozak 
    266       1.30     perry static inline void
    267       1.28      kent cmpci_reg_set_4(struct cmpci_softc *sc, int no, uint32_t mask)
    268        1.1  augustss {
    269       1.28      kent 
    270       1.21     itohy 	/* use cmpci_reg_set_reg_misc() for CMPCI_REG_MISC */
    271       1.21     itohy 	KDASSERT(no != CMPCI_REG_MISC);
    272       1.21     itohy 
    273        1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
    274        1.7  tshiozak 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) | mask));
    275        1.1  augustss 	delay(10);
    276        1.1  augustss }
    277        1.1  augustss 
    278       1.30     perry static inline void
    279       1.28      kent cmpci_reg_clear_4(struct cmpci_softc *sc, int no, uint32_t mask)
    280        1.1  augustss {
    281       1.28      kent 
    282       1.21     itohy 	/* use cmpci_reg_clear_reg_misc() for CMPCI_REG_MISC */
    283       1.21     itohy 	KDASSERT(no != CMPCI_REG_MISC);
    284       1.21     itohy 
    285        1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
    286        1.7  tshiozak 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~mask));
    287        1.1  augustss 	delay(10);
    288        1.1  augustss }
    289        1.1  augustss 
    290       1.21     itohy /*
    291       1.21     itohy  * The CMPCI_REG_MISC register needs special handling, since one of
    292       1.21     itohy  * its bits has different read/write values.
    293       1.21     itohy  */
    294       1.30     perry static inline void
    295       1.28      kent cmpci_reg_set_reg_misc(struct cmpci_softc *sc, uint32_t mask)
    296       1.21     itohy {
    297       1.28      kent 
    298       1.21     itohy 	sc->sc_reg_misc |= mask;
    299       1.21     itohy 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC,
    300       1.21     itohy 	    sc->sc_reg_misc);
    301       1.21     itohy 	delay(10);
    302       1.21     itohy }
    303       1.21     itohy 
    304       1.30     perry static inline void
    305       1.28      kent cmpci_reg_clear_reg_misc(struct cmpci_softc *sc, uint32_t mask)
    306       1.21     itohy {
    307       1.28      kent 
    308       1.21     itohy 	sc->sc_reg_misc &= ~mask;
    309       1.21     itohy 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC,
    310       1.21     itohy 	    sc->sc_reg_misc);
    311       1.21     itohy 	delay(10);
    312       1.21     itohy }
    313       1.21     itohy 
    314        1.1  augustss /* rate */
    315        1.6  jdolecek static const struct {
    316        1.1  augustss 	int rate;
    317        1.1  augustss 	int divider;
    318        1.1  augustss } cmpci_rate_table[CMPCI_REG_NUMRATE] = {
    319        1.1  augustss #define _RATE(n) { n, CMPCI_REG_RATE_ ## n }
    320        1.1  augustss 	_RATE(5512),
    321        1.1  augustss 	_RATE(8000),
    322        1.1  augustss 	_RATE(11025),
    323        1.1  augustss 	_RATE(16000),
    324        1.1  augustss 	_RATE(22050),
    325        1.1  augustss 	_RATE(32000),
    326        1.1  augustss 	_RATE(44100),
    327        1.1  augustss 	_RATE(48000)
    328        1.7  tshiozak #undef	_RATE
    329        1.1  augustss };
    330        1.1  augustss 
    331        1.1  augustss static int
    332       1.28      kent cmpci_rate_to_index(int rate)
    333        1.1  augustss {
    334        1.1  augustss 	int i;
    335        1.1  augustss 
    336       1.13  augustss 	for (i = 0; i < CMPCI_REG_NUMRATE - 1; i++)
    337        1.1  augustss 		if (rate <=
    338        1.1  augustss 		    (cmpci_rate_table[i].rate+cmpci_rate_table[i+1].rate) / 2)
    339        1.1  augustss 			return i;
    340        1.1  augustss 	return i;  /* 48000 */
    341        1.1  augustss }
    342        1.1  augustss 
    343       1.30     perry static inline int
    344       1.28      kent cmpci_index_to_rate(int index)
    345        1.1  augustss {
    346       1.28      kent 
    347        1.1  augustss 	return cmpci_rate_table[index].rate;
    348        1.1  augustss }
    349        1.1  augustss 
    350       1.30     perry static inline int
    351       1.28      kent cmpci_index_to_divider(int index)
    352        1.1  augustss {
    353       1.28      kent 
    354        1.1  augustss 	return cmpci_rate_table[index].divider;
    355        1.1  augustss }
    356        1.1  augustss 
    357        1.1  augustss /*
    358        1.1  augustss  * interface to configure the device.
    359        1.1  augustss  */
    360        1.1  augustss static int
    361       1.28      kent cmpci_match(struct device *parent, struct cfdata *match, void *aux)
    362        1.1  augustss {
    363       1.28      kent 	struct pci_attach_args *pa;
    364        1.1  augustss 
    365       1.28      kent 	pa = (struct pci_attach_args *)aux;
    366        1.1  augustss 	if ( PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CMEDIA &&
    367        1.1  augustss 	     (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338A ||
    368        1.1  augustss 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338B ||
    369        1.7  tshiozak 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738 ||
    370        1.7  tshiozak 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738B) )
    371        1.1  augustss 		return 1;
    372        1.1  augustss 
    373        1.1  augustss 	return 0;
    374        1.1  augustss }
    375        1.1  augustss 
    376        1.1  augustss static void
    377       1.28      kent cmpci_attach(struct device *parent, struct device *self, void *aux)
    378        1.1  augustss {
    379       1.28      kent 	struct cmpci_softc *sc;
    380       1.28      kent 	struct pci_attach_args *pa;
    381        1.8     itohy 	struct audio_attach_args aa;
    382        1.1  augustss 	pci_intr_handle_t ih;
    383        1.1  augustss 	char const *strintr;
    384        1.7  tshiozak 	char devinfo[256];
    385        1.1  augustss 	int i, v;
    386        1.1  augustss 
    387       1.28      kent 	sc = (struct cmpci_softc *)self;
    388       1.28      kent 	pa = (struct pci_attach_args *)aux;
    389       1.17   thorpej 	aprint_naive(": Audio controller\n");
    390       1.17   thorpej 
    391        1.7  tshiozak 	sc->sc_id = pa->pa_id;
    392        1.7  tshiozak 	sc->sc_class = pa->pa_class;
    393       1.24    itojun 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
    394       1.17   thorpej 	aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
    395       1.17   thorpej 	    PCI_REVISION(sc->sc_class));
    396        1.7  tshiozak 	switch (PCI_PRODUCT(sc->sc_id)) {
    397        1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338A:
    398        1.7  tshiozak 		/*FALLTHROUGH*/
    399        1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338B:
    400        1.7  tshiozak 		sc->sc_capable = CMPCI_CAP_CMI8338;
    401        1.1  augustss 		break;
    402        1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8738:
    403        1.7  tshiozak 		/*FALLTHROUGH*/
    404        1.7  tshiozak 	case PCI_PRODUCT_CMEDIA_CMI8738B:
    405        1.7  tshiozak 		sc->sc_capable = CMPCI_CAP_CMI8738;
    406        1.1  augustss 		break;
    407        1.1  augustss 	}
    408        1.1  augustss 
    409        1.2  augustss 	/* map I/O space */
    410        1.1  augustss 	if (pci_mapreg_map(pa, CMPCI_PCI_IOBASEREG, PCI_MAPREG_TYPE_IO, 0,
    411        1.7  tshiozak 		&sc->sc_iot, &sc->sc_ioh, NULL, NULL)) {
    412       1.17   thorpej 		aprint_error("%s: failed to map I/O space\n",
    413       1.17   thorpej 		    sc->sc_dev.dv_xname);
    414        1.1  augustss 		return;
    415        1.1  augustss 	}
    416        1.1  augustss 
    417        1.2  augustss 	/* interrupt */
    418        1.5  sommerfe 	if (pci_intr_map(pa, &ih)) {
    419       1.17   thorpej 		aprint_error("%s: failed to map interrupt\n",
    420       1.17   thorpej 		    sc->sc_dev.dv_xname);
    421        1.1  augustss 		return;
    422        1.1  augustss 	}
    423        1.1  augustss 	strintr = pci_intr_string(pa->pa_pc, ih);
    424        1.1  augustss 	sc->sc_ih=pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, cmpci_intr, sc);
    425        1.1  augustss 	if (sc->sc_ih == NULL) {
    426       1.17   thorpej 		aprint_error("%s: failed to establish interrupt",
    427        1.1  augustss 		    sc->sc_dev.dv_xname);
    428        1.1  augustss 		if (strintr != NULL)
    429       1.17   thorpej 			aprint_normal(" at %s", strintr);
    430       1.17   thorpej 		aprint_normal("\n");
    431        1.1  augustss 		return;
    432        1.1  augustss 	}
    433       1.17   thorpej 	aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, strintr);
    434        1.1  augustss 
    435        1.1  augustss 	sc->sc_dmat = pa->pa_dmat;
    436        1.1  augustss 
    437        1.1  augustss 	audio_attach_mi(&cmpci_hw_if, sc, &sc->sc_dev);
    438        1.1  augustss 
    439        1.8     itohy 	/* attach OPL device */
    440        1.8     itohy 	aa.type = AUDIODEV_TYPE_OPL;
    441        1.8     itohy 	aa.hwif = NULL;
    442        1.8     itohy 	aa.hdl = NULL;
    443        1.8     itohy 	(void)config_found(&sc->sc_dev, &aa, audioprint);
    444        1.8     itohy 
    445        1.8     itohy 	/* attach MPU-401 device */
    446        1.8     itohy 	aa.type = AUDIODEV_TYPE_MPU;
    447        1.8     itohy 	aa.hwif = NULL;
    448        1.8     itohy 	aa.hdl = NULL;
    449        1.8     itohy 	if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
    450        1.8     itohy 	    CMPCI_REG_MPU_BASE, CMPCI_REG_MPU_SIZE, &sc->sc_mpu_ioh) == 0)
    451        1.8     itohy 		sc->sc_mpudev = config_found(&sc->sc_dev, &aa, audioprint);
    452        1.8     itohy 
    453       1.21     itohy 	/* get initial value (this is 0 and may be omitted but just in case) */
    454       1.21     itohy 	sc->sc_reg_misc = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
    455       1.21     itohy 	    CMPCI_REG_MISC) & ~CMPCI_REG_SPDIF48K;
    456       1.21     itohy 
    457        1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_RESET, 0);
    458        1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0);
    459        1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0);
    460        1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX,
    461        1.1  augustss 	    CMPCI_SB16_SW_CD|CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE);
    462        1.1  augustss 	for (i = 0; i < CMPCI_NDEVS; i++) {
    463        1.1  augustss 		switch(i) {
    464       1.10     itohy 		/*
    465       1.10     itohy 		 * CMI8738 defaults are
    466       1.10     itohy 		 *  master:	0xe0	(0x00 - 0xf8)
    467       1.12     itohy 		 *  FM, DAC:	0xc0	(0x00 - 0xf8)
    468       1.10     itohy 		 *  PC speaker:	0x80	(0x00 - 0xc0)
    469       1.10     itohy 		 *  others:	0
    470       1.10     itohy 		 */
    471       1.10     itohy 		/* volume */
    472        1.8     itohy 		case CMPCI_MASTER_VOL:
    473       1.10     itohy 			v = 128;	/* 224 */
    474       1.10     itohy 			break;
    475        1.8     itohy 		case CMPCI_FM_VOL:
    476       1.10     itohy 		case CMPCI_DAC_VOL:
    477       1.10     itohy 			v = 192;
    478       1.10     itohy 			break;
    479        1.8     itohy 		case CMPCI_PCSPEAKER:
    480       1.10     itohy 			v = 128;
    481        1.1  augustss 			break;
    482        1.8     itohy 
    483        1.8     itohy 		/* booleans, set to true */
    484       1.10     itohy 		case CMPCI_CD_MUTE:
    485       1.10     itohy 		case CMPCI_MIC_MUTE:
    486       1.10     itohy 		case CMPCI_LINE_IN_MUTE:
    487       1.10     itohy 		case CMPCI_AUX_IN_MUTE:
    488        1.8     itohy 			v = 1;
    489        1.1  augustss 			break;
    490       1.10     itohy 
    491       1.10     itohy 		/* volume with inital value 0 */
    492       1.10     itohy 		case CMPCI_CD_VOL:
    493       1.10     itohy 		case CMPCI_LINE_IN_VOL:
    494       1.10     itohy 		case CMPCI_AUX_IN_VOL:
    495       1.10     itohy 		case CMPCI_MIC_VOL:
    496       1.10     itohy 		case CMPCI_MIC_RECVOL:
    497       1.10     itohy 			/* FALLTHROUGH */
    498       1.10     itohy 
    499        1.8     itohy 		/* others are cleared */
    500       1.10     itohy 		case CMPCI_MIC_PREAMP:
    501        1.8     itohy 		case CMPCI_RECORD_SOURCE:
    502       1.10     itohy 		case CMPCI_PLAYBACK_MODE:
    503       1.10     itohy 		case CMPCI_SPDIF_IN_SELECT:
    504       1.10     itohy 		case CMPCI_SPDIF_IN_PHASE:
    505        1.7  tshiozak 		case CMPCI_SPDIF_LOOP:
    506       1.10     itohy 		case CMPCI_SPDIF_OUT_PLAYBACK:
    507        1.7  tshiozak 		case CMPCI_SPDIF_OUT_VOLTAGE:
    508       1.10     itohy 		case CMPCI_MONITOR_DAC:
    509        1.7  tshiozak 		case CMPCI_REAR:
    510        1.7  tshiozak 		case CMPCI_INDIVIDUAL:
    511        1.7  tshiozak 		case CMPCI_REVERSE:
    512        1.7  tshiozak 		case CMPCI_SURROUND:
    513        1.8     itohy 		default:
    514        1.1  augustss 			v = 0;
    515        1.1  augustss 			break;
    516        1.1  augustss 		}
    517        1.7  tshiozak 		sc->sc_gain[i][CMPCI_LEFT] = sc->sc_gain[i][CMPCI_RIGHT] = v;
    518        1.1  augustss 		cmpci_set_mixer_gain(sc, i);
    519        1.1  augustss 	}
    520        1.1  augustss }
    521        1.1  augustss 
    522        1.1  augustss static int
    523       1.28      kent cmpci_intr(void *handle)
    524        1.1  augustss {
    525       1.28      kent 	struct cmpci_softc *sc;
    526        1.1  augustss 	uint32_t intrstat;
    527        1.1  augustss 
    528       1.28      kent 	sc = handle;
    529        1.1  augustss 	intrstat = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
    530        1.1  augustss 	    CMPCI_REG_INTR_STATUS);
    531        1.1  augustss 
    532        1.1  augustss 	if (!(intrstat & CMPCI_REG_ANY_INTR))
    533        1.1  augustss 		return 0;
    534        1.1  augustss 
    535        1.8     itohy 	delay(10);
    536        1.8     itohy 
    537        1.1  augustss 	/* disable and reset intr */
    538        1.1  augustss 	if (intrstat & CMPCI_REG_CH0_INTR)
    539        1.1  augustss 		cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL,
    540        1.1  augustss 		   CMPCI_REG_CH0_INTR_ENABLE);
    541        1.1  augustss 	if (intrstat & CMPCI_REG_CH1_INTR)
    542        1.1  augustss 		cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL,
    543        1.1  augustss 		    CMPCI_REG_CH1_INTR_ENABLE);
    544        1.1  augustss 
    545        1.1  augustss 	if (intrstat & CMPCI_REG_CH0_INTR) {
    546        1.1  augustss 		if (sc->sc_play.intr != NULL)
    547        1.1  augustss 			(*sc->sc_play.intr)(sc->sc_play.intr_arg);
    548        1.1  augustss 	}
    549        1.1  augustss 	if (intrstat & CMPCI_REG_CH1_INTR) {
    550        1.1  augustss 		if (sc->sc_rec.intr != NULL)
    551        1.1  augustss 			(*sc->sc_rec.intr)(sc->sc_rec.intr_arg);
    552        1.1  augustss 	}
    553        1.1  augustss 
    554        1.1  augustss 	/* enable intr */
    555        1.1  augustss 	if (intrstat & CMPCI_REG_CH0_INTR)
    556        1.1  augustss 		cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL,
    557        1.1  augustss 		    CMPCI_REG_CH0_INTR_ENABLE);
    558        1.1  augustss 	if (intrstat & CMPCI_REG_CH1_INTR)
    559        1.1  augustss 		cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL,
    560        1.1  augustss 		    CMPCI_REG_CH1_INTR_ENABLE);
    561        1.8     itohy 
    562        1.8     itohy #if NMPU > 0
    563        1.8     itohy 	if (intrstat & CMPCI_REG_UART_INTR && sc->sc_mpudev != NULL)
    564        1.8     itohy 		mpu_intr(sc->sc_mpudev);
    565        1.8     itohy #endif
    566        1.8     itohy 
    567        1.8     itohy 	return 1;
    568        1.1  augustss }
    569        1.1  augustss 
    570        1.1  augustss static int
    571       1.28      kent cmpci_query_encoding(void *handle, struct audio_encoding *fp)
    572        1.1  augustss {
    573       1.28      kent 
    574        1.1  augustss 	switch (fp->index) {
    575        1.1  augustss 	case 0:
    576        1.1  augustss 		strcpy(fp->name, AudioEulinear);
    577        1.1  augustss 		fp->encoding = AUDIO_ENCODING_ULINEAR;
    578        1.1  augustss 		fp->precision = 8;
    579        1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    580        1.1  augustss 		break;
    581        1.1  augustss 	case 1:
    582        1.1  augustss 		strcpy(fp->name, AudioEmulaw);
    583        1.1  augustss 		fp->encoding = AUDIO_ENCODING_ULAW;
    584        1.1  augustss 		fp->precision = 8;
    585        1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    586        1.1  augustss 		break;
    587        1.1  augustss 	case 2:
    588        1.1  augustss 		strcpy(fp->name, AudioEalaw);
    589        1.1  augustss 		fp->encoding = AUDIO_ENCODING_ALAW;
    590        1.1  augustss 		fp->precision = 8;
    591        1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    592        1.1  augustss 		break;
    593        1.1  augustss 	case 3:
    594        1.1  augustss 		strcpy(fp->name, AudioEslinear);
    595        1.1  augustss 		fp->encoding = AUDIO_ENCODING_SLINEAR;
    596        1.1  augustss 		fp->precision = 8;
    597        1.1  augustss 		fp->flags = 0;
    598        1.1  augustss 		break;
    599        1.1  augustss 	case 4:
    600        1.1  augustss 		strcpy(fp->name, AudioEslinear_le);
    601        1.1  augustss 		fp->encoding = AUDIO_ENCODING_SLINEAR_LE;
    602        1.1  augustss 		fp->precision = 16;
    603        1.1  augustss 		fp->flags = 0;
    604        1.1  augustss 		break;
    605        1.1  augustss 	case 5:
    606        1.1  augustss 		strcpy(fp->name, AudioEulinear_le);
    607        1.1  augustss 		fp->encoding = AUDIO_ENCODING_ULINEAR_LE;
    608        1.1  augustss 		fp->precision = 16;
    609        1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    610        1.1  augustss 		break;
    611        1.1  augustss 	case 6:
    612        1.1  augustss 		strcpy(fp->name, AudioEslinear_be);
    613        1.1  augustss 		fp->encoding = AUDIO_ENCODING_SLINEAR_BE;
    614        1.1  augustss 		fp->precision = 16;
    615        1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    616        1.1  augustss 		break;
    617        1.1  augustss 	case 7:
    618        1.1  augustss 		strcpy(fp->name, AudioEulinear_be);
    619        1.1  augustss 		fp->encoding = AUDIO_ENCODING_ULINEAR_BE;
    620        1.1  augustss 		fp->precision = 16;
    621        1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    622        1.1  augustss 		break;
    623        1.1  augustss 	default:
    624        1.1  augustss 		return EINVAL;
    625        1.1  augustss 	}
    626        1.1  augustss 	return 0;
    627        1.1  augustss }
    628        1.1  augustss 
    629        1.1  augustss 
    630        1.1  augustss static int
    631       1.28      kent cmpci_set_params(void *handle, int setmode, int usemode,
    632       1.28      kent 		 audio_params_t *play, audio_params_t *rec,
    633       1.28      kent 		 stream_filter_list_t *pfil, stream_filter_list_t *rfil)
    634        1.1  augustss {
    635        1.1  augustss 	int i;
    636       1.28      kent 	struct cmpci_softc *sc;
    637        1.1  augustss 
    638       1.28      kent 	sc = handle;
    639        1.1  augustss 	for (i = 0; i < 2; i++) {
    640        1.1  augustss 		int md_format;
    641        1.1  augustss 		int md_divide;
    642        1.1  augustss 		int md_index;
    643        1.1  augustss 		int mode;
    644       1.27      kent 		audio_params_t *p;
    645       1.27      kent 		stream_filter_list_t *fil;
    646       1.27      kent 		int ind;
    647       1.10     itohy 
    648        1.1  augustss 		switch (i) {
    649        1.1  augustss 		case 0:
    650        1.1  augustss 			mode = AUMODE_PLAY;
    651        1.1  augustss 			p = play;
    652       1.27      kent 			fil = pfil;
    653        1.1  augustss 			break;
    654        1.1  augustss 		case 1:
    655        1.1  augustss 			mode = AUMODE_RECORD;
    656        1.1  augustss 			p = rec;
    657       1.27      kent 			fil = rfil;
    658        1.1  augustss 			break;
    659       1.19  christos 		default:
    660       1.19  christos 			return EINVAL;
    661        1.1  augustss 		}
    662       1.10     itohy 
    663        1.1  augustss 		if (!(setmode & mode))
    664        1.1  augustss 			continue;
    665        1.1  augustss 
    666       1.27      kent 		md_index = cmpci_rate_to_index(p->sample_rate);
    667       1.27      kent 		md_divide = cmpci_index_to_divider(md_index);
    668       1.27      kent 		p->sample_rate = cmpci_index_to_rate(md_index);
    669       1.27      kent 		DPRINTF(("%s: sample:%u, divider=%d\n",
    670       1.27      kent 			 sc->sc_dev.dv_xname, p->sample_rate, md_divide));
    671       1.27      kent 
    672       1.27      kent 		ind = auconv_set_converter(cmpci_formats, CMPCI_NFORMATS,
    673       1.27      kent 					   mode, p, FALSE, fil);
    674       1.27      kent 		if (ind < 0)
    675       1.27      kent 			return EINVAL;
    676       1.27      kent 		if (fil->req_size > 0)
    677       1.27      kent 			p = &fil->filters[0].param;
    678        1.1  augustss 
    679        1.1  augustss 		/* format */
    680       1.27      kent 		md_format = p->channels == 1
    681       1.27      kent 			? CMPCI_REG_FORMAT_MONO : CMPCI_REG_FORMAT_STEREO;
    682       1.27      kent 		md_format |= p->precision == 16
    683       1.27      kent 			? CMPCI_REG_FORMAT_16BIT : CMPCI_REG_FORMAT_8BIT;
    684       1.27      kent 		if (mode & AUMODE_PLAY) {
    685        1.1  augustss 			cmpci_reg_partial_write_4(sc,
    686        1.7  tshiozak 			   CMPCI_REG_CHANNEL_FORMAT,
    687        1.7  tshiozak 			   CMPCI_REG_CH0_FORMAT_SHIFT,
    688        1.7  tshiozak 			   CMPCI_REG_CH0_FORMAT_MASK, md_format);
    689        1.1  augustss 			cmpci_reg_partial_write_4(sc,
    690        1.1  augustss 			    CMPCI_REG_FUNC_1, CMPCI_REG_DAC_FS_SHIFT,
    691        1.1  augustss 			    CMPCI_REG_DAC_FS_MASK, md_divide);
    692        1.7  tshiozak 			sc->sc_play.md_divide = md_divide;
    693        1.1  augustss 		} else {
    694        1.1  augustss 			cmpci_reg_partial_write_4(sc,
    695       1.27      kent 			   CMPCI_REG_CHANNEL_FORMAT,
    696       1.27      kent 			   CMPCI_REG_CH1_FORMAT_SHIFT,
    697       1.27      kent 			   CMPCI_REG_CH1_FORMAT_MASK, md_format);
    698       1.27      kent 			cmpci_reg_partial_write_4(sc,
    699        1.1  augustss 			    CMPCI_REG_FUNC_1, CMPCI_REG_ADC_FS_SHIFT,
    700        1.1  augustss 			    CMPCI_REG_ADC_FS_MASK, md_divide);
    701        1.7  tshiozak 			sc->sc_rec.md_divide = md_divide;
    702        1.1  augustss 		}
    703       1.10     itohy 		cmpci_set_out_ports(sc);
    704       1.10     itohy 		cmpci_set_in_ports(sc);
    705        1.1  augustss 	}
    706        1.1  augustss 	return 0;
    707        1.1  augustss }
    708        1.1  augustss 
    709        1.1  augustss /* ARGSUSED */
    710        1.1  augustss static int
    711       1.28      kent cmpci_round_blocksize(void *handle, int block,
    712       1.28      kent 		      int mode, const audio_params_t *param)
    713        1.1  augustss {
    714       1.28      kent 
    715       1.28      kent 	return block & -4;
    716        1.1  augustss }
    717        1.1  augustss 
    718        1.1  augustss static int
    719       1.28      kent cmpci_halt_output(void *handle)
    720        1.1  augustss {
    721       1.28      kent 	struct cmpci_softc *sc;
    722        1.1  augustss 	int s;
    723        1.1  augustss 
    724       1.28      kent 	sc = handle;
    725        1.1  augustss 	s = splaudio();
    726        1.1  augustss 	sc->sc_play.intr = NULL;
    727        1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE);
    728        1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE);
    729        1.1  augustss 	/* wait for reset DMA */
    730        1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET);
    731        1.1  augustss 	delay(10);
    732        1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET);
    733        1.1  augustss 	splx(s);
    734       1.10     itohy 
    735        1.1  augustss 	return 0;
    736        1.1  augustss }
    737        1.1  augustss 
    738        1.1  augustss static int
    739       1.28      kent cmpci_halt_input(void *handle)
    740        1.1  augustss {
    741       1.28      kent 	struct cmpci_softc *sc;
    742        1.1  augustss 	int s;
    743       1.10     itohy 
    744       1.28      kent 	sc = handle;
    745        1.1  augustss 	s = splaudio();
    746        1.1  augustss 	sc->sc_rec.intr = NULL;
    747        1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE);
    748        1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE);
    749        1.1  augustss 	/* wait for reset DMA */
    750        1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET);
    751        1.1  augustss 	delay(10);
    752        1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET);
    753        1.1  augustss 	splx(s);
    754       1.10     itohy 
    755        1.1  augustss 	return 0;
    756        1.1  augustss }
    757        1.1  augustss 
    758        1.1  augustss /* get audio device information */
    759        1.1  augustss static int
    760       1.28      kent cmpci_getdev(void *handle, struct audio_device *ad)
    761        1.1  augustss {
    762       1.28      kent 	struct cmpci_softc *sc;
    763        1.1  augustss 
    764       1.28      kent 	sc = handle;
    765        1.1  augustss 	strncpy(ad->name, "CMI PCI Audio", sizeof(ad->name));
    766        1.7  tshiozak 	snprintf(ad->version, sizeof(ad->version), "0x%02x",
    767        1.7  tshiozak 		 PCI_REVISION(sc->sc_class));
    768        1.7  tshiozak 	switch (PCI_PRODUCT(sc->sc_id)) {
    769        1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338A:
    770        1.1  augustss 		strncpy(ad->config, "CMI8338A", sizeof(ad->config));
    771        1.1  augustss 		break;
    772        1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338B:
    773        1.1  augustss 		strncpy(ad->config, "CMI8338B", sizeof(ad->config));
    774        1.1  augustss 		break;
    775        1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8738:
    776        1.1  augustss 		strncpy(ad->config, "CMI8738", sizeof(ad->config));
    777        1.1  augustss 		break;
    778        1.7  tshiozak 	case PCI_PRODUCT_CMEDIA_CMI8738B:
    779        1.7  tshiozak 		strncpy(ad->config, "CMI8738B", sizeof(ad->config));
    780        1.7  tshiozak 		break;
    781        1.1  augustss 	default:
    782        1.1  augustss 		strncpy(ad->config, "unknown", sizeof(ad->config));
    783        1.1  augustss 	}
    784        1.1  augustss 
    785        1.1  augustss 	return 0;
    786        1.1  augustss }
    787        1.1  augustss 
    788        1.1  augustss /* mixer device information */
    789        1.1  augustss int
    790       1.28      kent cmpci_query_devinfo(void *handle, mixer_devinfo_t *dip)
    791        1.1  augustss {
    792       1.10     itohy 	static const char *const mixer_port_names[] = {
    793       1.10     itohy 		AudioNdac, AudioNfmsynth, AudioNcd, AudioNline, AudioNaux,
    794       1.10     itohy 		AudioNmicrophone
    795       1.10     itohy 	};
    796       1.10     itohy 	static const char *const mixer_classes[] = {
    797       1.10     itohy 		AudioCinputs, AudioCoutputs, AudioCrecord, CmpciCplayback,
    798       1.10     itohy 		CmpciCspdif
    799       1.10     itohy 	};
    800       1.28      kent 	struct cmpci_softc *sc;
    801       1.10     itohy 	int i;
    802       1.10     itohy 
    803       1.28      kent 	sc = handle;
    804       1.10     itohy 	dip->prev = dip->next = AUDIO_MIXER_LAST;
    805       1.10     itohy 
    806        1.1  augustss 	switch (dip->index) {
    807       1.10     itohy 	case CMPCI_INPUT_CLASS:
    808       1.10     itohy 	case CMPCI_OUTPUT_CLASS:
    809       1.10     itohy 	case CMPCI_RECORD_CLASS:
    810       1.10     itohy 	case CMPCI_PLAYBACK_CLASS:
    811       1.10     itohy 	case CMPCI_SPDIF_CLASS:
    812       1.10     itohy 		dip->type = AUDIO_MIXER_CLASS;
    813       1.10     itohy 		dip->mixer_class = dip->index;
    814       1.10     itohy 		strcpy(dip->label.name,
    815       1.10     itohy 		    mixer_classes[dip->index - CMPCI_INPUT_CLASS]);
    816        1.1  augustss 		return 0;
    817       1.10     itohy 
    818       1.10     itohy 	case CMPCI_AUX_IN_VOL:
    819       1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_REG_AUX_VALBITS);
    820       1.10     itohy 		goto vol1;
    821       1.10     itohy 	case CMPCI_DAC_VOL:
    822        1.1  augustss 	case CMPCI_FM_VOL:
    823       1.10     itohy 	case CMPCI_CD_VOL:
    824       1.10     itohy 	case CMPCI_LINE_IN_VOL:
    825       1.10     itohy 	case CMPCI_MIC_VOL:
    826       1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS);
    827       1.10     itohy 	vol1:	dip->mixer_class = CMPCI_INPUT_CLASS;
    828       1.10     itohy 		dip->next = dip->index + 6;	/* CMPCI_xxx_MUTE */
    829       1.10     itohy 		strcpy(dip->label.name, mixer_port_names[dip->index]);
    830       1.10     itohy 		dip->un.v.num_channels = (dip->index == CMPCI_MIC_VOL ? 1 : 2);
    831       1.10     itohy 	vol:
    832        1.1  augustss 		dip->type = AUDIO_MIXER_VALUE;
    833        1.1  augustss 		strcpy(dip->un.v.units.name, AudioNvolume);
    834        1.1  augustss 		return 0;
    835       1.10     itohy 
    836       1.10     itohy 	case CMPCI_MIC_MUTE:
    837       1.10     itohy 		dip->next = CMPCI_MIC_PREAMP;
    838       1.10     itohy 		/* FALLTHROUGH */
    839       1.10     itohy 	case CMPCI_DAC_MUTE:
    840       1.10     itohy 	case CMPCI_FM_MUTE:
    841       1.10     itohy 	case CMPCI_CD_MUTE:
    842       1.10     itohy 	case CMPCI_LINE_IN_MUTE:
    843       1.10     itohy 	case CMPCI_AUX_IN_MUTE:
    844       1.10     itohy 		dip->prev = dip->index - 6;	/* CMPCI_xxx_VOL */
    845        1.1  augustss 		dip->mixer_class = CMPCI_INPUT_CLASS;
    846       1.10     itohy 		strcpy(dip->label.name, AudioNmute);
    847       1.10     itohy 		goto on_off;
    848       1.10     itohy 	on_off:
    849       1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    850       1.10     itohy 		dip->un.e.num_mem = 2;
    851       1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
    852       1.10     itohy 		dip->un.e.member[0].ord = 0;
    853       1.10     itohy 		strcpy(dip->un.e.member[1].label.name, AudioNon);
    854       1.10     itohy 		dip->un.e.member[1].ord = 1;
    855        1.1  augustss 		return 0;
    856       1.10     itohy 
    857       1.10     itohy 	case CMPCI_MIC_PREAMP:
    858        1.1  augustss 		dip->mixer_class = CMPCI_INPUT_CLASS;
    859       1.10     itohy 		dip->prev = CMPCI_MIC_MUTE;
    860       1.10     itohy 		strcpy(dip->label.name, AudioNpreamp);
    861       1.10     itohy 		goto on_off;
    862       1.10     itohy 	case CMPCI_PCSPEAKER:
    863        1.1  augustss 		dip->mixer_class = CMPCI_INPUT_CLASS;
    864       1.10     itohy 		strcpy(dip->label.name, AudioNspeaker);
    865        1.1  augustss 		dip->un.v.num_channels = 1;
    866       1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_SPEAKER_VALBITS);
    867       1.10     itohy 		goto vol;
    868        1.1  augustss 	case CMPCI_RECORD_SOURCE:
    869        1.1  augustss 		dip->mixer_class = CMPCI_RECORD_CLASS;
    870        1.1  augustss 		strcpy(dip->label.name, AudioNsource);
    871        1.1  augustss 		dip->type = AUDIO_MIXER_SET;
    872       1.10     itohy 		dip->un.s.num_mem = 7;
    873        1.1  augustss 		strcpy(dip->un.s.member[0].label.name, AudioNmicrophone);
    874        1.8     itohy 		dip->un.s.member[0].mask = CMPCI_RECORD_SOURCE_MIC;
    875        1.1  augustss 		strcpy(dip->un.s.member[1].label.name, AudioNcd);
    876        1.8     itohy 		dip->un.s.member[1].mask = CMPCI_RECORD_SOURCE_CD;
    877        1.1  augustss 		strcpy(dip->un.s.member[2].label.name, AudioNline);
    878        1.8     itohy 		dip->un.s.member[2].mask = CMPCI_RECORD_SOURCE_LINE_IN;
    879       1.10     itohy 		strcpy(dip->un.s.member[3].label.name, AudioNaux);
    880       1.10     itohy 		dip->un.s.member[3].mask = CMPCI_RECORD_SOURCE_AUX_IN;
    881       1.10     itohy 		strcpy(dip->un.s.member[4].label.name, AudioNwave);
    882       1.10     itohy 		dip->un.s.member[4].mask = CMPCI_RECORD_SOURCE_WAVE;
    883       1.10     itohy 		strcpy(dip->un.s.member[5].label.name, AudioNfmsynth);
    884       1.10     itohy 		dip->un.s.member[5].mask = CMPCI_RECORD_SOURCE_FM;
    885       1.10     itohy 		strcpy(dip->un.s.member[6].label.name, CmpciNspdif);
    886       1.10     itohy 		dip->un.s.member[6].mask = CMPCI_RECORD_SOURCE_SPDIF;
    887        1.1  augustss 		return 0;
    888       1.10     itohy 	case CMPCI_MIC_RECVOL:
    889        1.1  augustss 		dip->mixer_class = CMPCI_RECORD_CLASS;
    890       1.10     itohy 		strcpy(dip->label.name, AudioNmicrophone);
    891        1.1  augustss 		dip->un.v.num_channels = 1;
    892       1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_REG_ADMIC_VALBITS);
    893       1.10     itohy 		goto vol;
    894       1.10     itohy 
    895       1.10     itohy 	case CMPCI_PLAYBACK_MODE:
    896       1.10     itohy 		dip->mixer_class = CMPCI_PLAYBACK_CLASS;
    897       1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    898       1.10     itohy 		strcpy(dip->label.name, AudioNmode);
    899       1.10     itohy 		dip->un.e.num_mem = 2;
    900       1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNdac);
    901       1.10     itohy 		dip->un.e.member[0].ord = CMPCI_PLAYBACK_MODE_WAVE;
    902       1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNspdif);
    903       1.10     itohy 		dip->un.e.member[1].ord = CMPCI_PLAYBACK_MODE_SPDIF;
    904        1.1  augustss 		return 0;
    905       1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
    906       1.10     itohy 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    907       1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    908       1.10     itohy 		dip->next = CMPCI_SPDIF_IN_PHASE;
    909        1.1  augustss 		strcpy(dip->label.name, AudioNinput);
    910       1.10     itohy 		i = 0;
    911       1.10     itohy 		strcpy(dip->un.e.member[i].label.name, CmpciNspdin1);
    912       1.10     itohy 		dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN1;
    913       1.10     itohy 		if (CMPCI_ISCAP(sc, 2ND_SPDIN)) {
    914       1.10     itohy 			strcpy(dip->un.e.member[i].label.name, CmpciNspdin2);
    915       1.10     itohy 			dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN2;
    916       1.10     itohy 		}
    917       1.10     itohy 		strcpy(dip->un.e.member[i].label.name, CmpciNspdout);
    918       1.10     itohy 		dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDOUT;
    919       1.10     itohy 		dip->un.e.num_mem = i;
    920       1.10     itohy 		return 0;
    921       1.10     itohy 	case CMPCI_SPDIF_IN_PHASE:
    922       1.10     itohy 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    923       1.10     itohy 		dip->prev = CMPCI_SPDIF_IN_SELECT;
    924       1.10     itohy 		strcpy(dip->label.name, CmpciNphase);
    925       1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    926       1.10     itohy 		dip->un.e.num_mem = 2;
    927       1.10     itohy 		strcpy(dip->un.e.member[0].label.name, CmpciNpositive);
    928       1.10     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_IN_PHASE_POSITIVE;
    929       1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNnegative);
    930       1.10     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_IN_PHASE_NEGATIVE;
    931        1.1  augustss 		return 0;
    932       1.10     itohy 	case CMPCI_SPDIF_LOOP:
    933       1.10     itohy 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    934       1.10     itohy 		dip->next = CMPCI_SPDIF_OUT_PLAYBACK;
    935        1.1  augustss 		strcpy(dip->label.name, AudioNoutput);
    936        1.1  augustss 		dip->type = AUDIO_MIXER_ENUM;
    937       1.10     itohy 		dip->un.e.num_mem = 2;
    938       1.10     itohy 		strcpy(dip->un.e.member[0].label.name, CmpciNplayback);
    939       1.10     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_LOOP_OFF;
    940       1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNspdin);
    941       1.10     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_LOOP_ON;
    942        1.7  tshiozak 		return 0;
    943       1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
    944        1.7  tshiozak 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    945       1.10     itohy 		dip->prev = CMPCI_SPDIF_LOOP;
    946       1.10     itohy 		dip->next = CMPCI_SPDIF_OUT_VOLTAGE;
    947       1.10     itohy 		strcpy(dip->label.name, CmpciNplayback);
    948       1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    949       1.10     itohy 		dip->un.e.num_mem = 2;
    950       1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNwave);
    951       1.10     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_PLAYBACK_WAVE;
    952       1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNlegacy);
    953       1.10     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_PLAYBACK_LEGACY;
    954        1.7  tshiozak 		return 0;
    955        1.7  tshiozak 	case CMPCI_SPDIF_OUT_VOLTAGE:
    956        1.7  tshiozak 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    957       1.10     itohy 		dip->prev = CMPCI_SPDIF_OUT_PLAYBACK;
    958       1.10     itohy 		strcpy(dip->label.name, CmpciNvoltage);
    959        1.7  tshiozak 		dip->type = AUDIO_MIXER_ENUM;
    960        1.7  tshiozak 		dip->un.e.num_mem = 2;
    961       1.21     itohy 		strcpy(dip->un.e.member[0].label.name, CmpciNhigh_v);
    962       1.21     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_VOLTAGE_HIGH;
    963       1.21     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNlow_v);
    964       1.21     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_VOLTAGE_LOW;
    965        1.7  tshiozak 		return 0;
    966       1.10     itohy 	case CMPCI_MONITOR_DAC:
    967        1.7  tshiozak 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    968       1.10     itohy 		strcpy(dip->label.name, AudioNmonitor);
    969       1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    970       1.10     itohy 		dip->un.e.num_mem = 3;
    971       1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
    972       1.10     itohy 		dip->un.e.member[0].ord = CMPCI_MONITOR_DAC_OFF;
    973       1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNspdin);
    974       1.10     itohy 		dip->un.e.member[1].ord = CMPCI_MONITOR_DAC_SPDIN;
    975       1.10     itohy 		strcpy(dip->un.e.member[2].label.name, CmpciNspdout);
    976       1.10     itohy 		dip->un.e.member[2].ord = CMPCI_MONITOR_DAC_SPDOUT;
    977       1.10     itohy 		return 0;
    978       1.10     itohy 
    979       1.10     itohy 	case CMPCI_MASTER_VOL:
    980       1.10     itohy 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
    981       1.10     itohy 		strcpy(dip->label.name, AudioNmaster);
    982       1.10     itohy 		dip->un.v.num_channels = 2;
    983       1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS);
    984       1.10     itohy 		goto vol;
    985        1.7  tshiozak 	case CMPCI_REAR:
    986        1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
    987        1.7  tshiozak 		dip->next = CMPCI_INDIVIDUAL;
    988        1.7  tshiozak 		strcpy(dip->label.name, CmpciNrear);
    989        1.7  tshiozak 		goto on_off;
    990        1.7  tshiozak 	case CMPCI_INDIVIDUAL:
    991        1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
    992        1.7  tshiozak 		dip->prev = CMPCI_REAR;
    993        1.7  tshiozak 		dip->next = CMPCI_REVERSE;
    994        1.7  tshiozak 		strcpy(dip->label.name, CmpciNindividual);
    995        1.7  tshiozak 		goto on_off;
    996        1.7  tshiozak 	case CMPCI_REVERSE:
    997        1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
    998        1.7  tshiozak 		dip->prev = CMPCI_INDIVIDUAL;
    999        1.7  tshiozak 		strcpy(dip->label.name, CmpciNreverse);
   1000       1.10     itohy 		goto on_off;
   1001        1.7  tshiozak 	case CMPCI_SURROUND:
   1002        1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
   1003        1.7  tshiozak 		strcpy(dip->label.name, CmpciNsurround);
   1004        1.7  tshiozak 		goto on_off;
   1005       1.10     itohy 	}
   1006        1.7  tshiozak 
   1007        1.1  augustss 	return ENXIO;
   1008        1.1  augustss }
   1009        1.1  augustss 
   1010        1.1  augustss static int
   1011       1.28      kent cmpci_alloc_dmamem(struct cmpci_softc *sc, size_t size, struct malloc_type *type,
   1012       1.28      kent 		   int flags, caddr_t *r_addr)
   1013        1.1  augustss {
   1014       1.28      kent 	int error;
   1015        1.1  augustss 	struct cmpci_dmanode *n;
   1016        1.1  augustss 	int w;
   1017        1.1  augustss 
   1018       1.28      kent 	error = 0;
   1019        1.1  augustss 	n = malloc(sizeof(struct cmpci_dmanode), type, flags);
   1020        1.1  augustss 	if (n == NULL) {
   1021        1.1  augustss 		error = ENOMEM;
   1022        1.1  augustss 		goto quit;
   1023        1.1  augustss 	}
   1024        1.1  augustss 
   1025        1.1  augustss 	w = (flags & M_NOWAIT) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK;
   1026        1.1  augustss #define CMPCI_DMABUF_ALIGN    0x4
   1027        1.1  augustss #define CMPCI_DMABUF_BOUNDARY 0x0
   1028        1.1  augustss 	n->cd_tag = sc->sc_dmat;
   1029        1.1  augustss 	n->cd_size = size;
   1030        1.1  augustss 	error = bus_dmamem_alloc(n->cd_tag, n->cd_size,
   1031        1.1  augustss 	    CMPCI_DMABUF_ALIGN, CMPCI_DMABUF_BOUNDARY, n->cd_segs,
   1032        1.7  tshiozak 	    sizeof(n->cd_segs)/sizeof(n->cd_segs[0]), &n->cd_nsegs, w);
   1033        1.1  augustss 	if (error)
   1034        1.1  augustss 		goto mfree;
   1035        1.1  augustss 	error = bus_dmamem_map(n->cd_tag, n->cd_segs, n->cd_nsegs, n->cd_size,
   1036        1.1  augustss 	    &n->cd_addr, w | BUS_DMA_COHERENT);
   1037        1.1  augustss 	if (error)
   1038        1.1  augustss 		goto dmafree;
   1039        1.1  augustss 	error = bus_dmamap_create(n->cd_tag, n->cd_size, 1, n->cd_size, 0,
   1040        1.1  augustss 	    w, &n->cd_map);
   1041        1.1  augustss 	if (error)
   1042        1.1  augustss 		goto unmap;
   1043        1.1  augustss 	error = bus_dmamap_load(n->cd_tag, n->cd_map, n->cd_addr, n->cd_size,
   1044        1.1  augustss 	    NULL, w);
   1045        1.1  augustss 	if (error)
   1046        1.1  augustss 		goto destroy;
   1047       1.10     itohy 
   1048        1.1  augustss 	n->cd_next = sc->sc_dmap;
   1049        1.1  augustss 	sc->sc_dmap = n;
   1050        1.1  augustss 	*r_addr = KVADDR(n);
   1051        1.1  augustss 	return 0;
   1052       1.10     itohy 
   1053        1.1  augustss  destroy:
   1054        1.1  augustss 	bus_dmamap_destroy(n->cd_tag, n->cd_map);
   1055        1.1  augustss  unmap:
   1056        1.1  augustss 	bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size);
   1057        1.1  augustss  dmafree:
   1058        1.1  augustss 	bus_dmamem_free(n->cd_tag,
   1059        1.1  augustss 			n->cd_segs, sizeof(n->cd_segs)/sizeof(n->cd_segs[0]));
   1060        1.1  augustss  mfree:
   1061        1.1  augustss 	free(n, type);
   1062        1.1  augustss  quit:
   1063        1.1  augustss 	return error;
   1064        1.1  augustss }
   1065        1.1  augustss 
   1066        1.1  augustss static int
   1067       1.28      kent cmpci_free_dmamem(struct cmpci_softc *sc, caddr_t addr, struct malloc_type *type)
   1068        1.1  augustss {
   1069        1.1  augustss 	struct cmpci_dmanode **nnp;
   1070       1.10     itohy 
   1071        1.1  augustss 	for (nnp = &sc->sc_dmap; *nnp; nnp= &(*nnp)->cd_next) {
   1072        1.1  augustss 		if ((*nnp)->cd_addr == addr) {
   1073        1.1  augustss 			struct cmpci_dmanode *n = *nnp;
   1074        1.1  augustss 			bus_dmamap_unload(n->cd_tag, n->cd_map);
   1075        1.1  augustss 			bus_dmamap_destroy(n->cd_tag, n->cd_map);
   1076        1.1  augustss 			bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size);
   1077        1.1  augustss 			bus_dmamem_free(n->cd_tag, n->cd_segs,
   1078        1.1  augustss 			    sizeof(n->cd_segs)/sizeof(n->cd_segs[0]));
   1079        1.1  augustss 			free(n, type);
   1080        1.1  augustss 			return 0;
   1081        1.1  augustss 		}
   1082        1.1  augustss 	}
   1083        1.1  augustss 	return -1;
   1084        1.1  augustss }
   1085        1.1  augustss 
   1086        1.1  augustss static struct cmpci_dmanode *
   1087       1.28      kent cmpci_find_dmamem(struct cmpci_softc *sc, caddr_t addr)
   1088        1.1  augustss {
   1089        1.1  augustss 	struct cmpci_dmanode *p;
   1090       1.10     itohy 
   1091       1.28      kent 	for (p = sc->sc_dmap; p; p = p->cd_next)
   1092       1.28      kent 		if (KVADDR(p) == (void *)addr)
   1093        1.1  augustss 			break;
   1094        1.1  augustss 	return p;
   1095        1.1  augustss }
   1096        1.1  augustss 
   1097        1.1  augustss #if 0
   1098        1.1  augustss static void
   1099       1.28      kent cmpci_print_dmamem(struct cmpci_dmanode *);
   1100        1.1  augustss static void
   1101       1.28      kent cmpci_print_dmamem(struct cmpci_dmanode *p)
   1102        1.1  augustss {
   1103       1.28      kent 
   1104        1.1  augustss 	DPRINTF(("DMA at virt:%p, dmaseg:%p, mapseg:%p, size:%p\n",
   1105        1.1  augustss 		 (void *)p->cd_addr, (void *)p->cd_segs[0].ds_addr,
   1106        1.1  augustss 		 (void *)DMAADDR(p), (void *)p->cd_size));
   1107        1.1  augustss }
   1108        1.1  augustss #endif /* DEBUG */
   1109        1.1  augustss 
   1110        1.1  augustss static void *
   1111       1.28      kent cmpci_allocm(void *handle, int direction, size_t size,
   1112       1.28      kent 	     struct malloc_type *type, int flags)
   1113        1.1  augustss {
   1114        1.1  augustss 	caddr_t addr;
   1115       1.10     itohy 
   1116  1.30.12.1      tron 	addr = NULL;	/* XXX gcc */
   1117  1.30.12.1      tron 
   1118       1.28      kent 	if (cmpci_alloc_dmamem(handle, size, type, flags, &addr))
   1119        1.1  augustss 		return NULL;
   1120        1.1  augustss 	return addr;
   1121        1.1  augustss }
   1122        1.1  augustss 
   1123        1.1  augustss static void
   1124       1.28      kent cmpci_freem(void *handle, void *addr, struct malloc_type *type)
   1125        1.1  augustss {
   1126       1.10     itohy 
   1127       1.28      kent 	cmpci_free_dmamem(handle, addr, type);
   1128        1.1  augustss }
   1129        1.1  augustss 
   1130        1.1  augustss #define MAXVAL 256
   1131        1.1  augustss static int
   1132       1.28      kent cmpci_adjust(int val, int mask)
   1133        1.1  augustss {
   1134       1.28      kent 
   1135        1.1  augustss 	val += (MAXVAL - mask) >> 1;
   1136        1.1  augustss 	if (val >= MAXVAL)
   1137        1.1  augustss 		val = MAXVAL-1;
   1138        1.1  augustss 	return val & mask;
   1139        1.1  augustss }
   1140        1.1  augustss 
   1141        1.1  augustss static void
   1142       1.28      kent cmpci_set_mixer_gain(struct cmpci_softc *sc, int port)
   1143        1.1  augustss {
   1144       1.23     itohy 	int src;
   1145       1.10     itohy 	int bits, mask;
   1146        1.1  augustss 
   1147        1.1  augustss 	switch (port) {
   1148        1.1  augustss 	case CMPCI_MIC_VOL:
   1149       1.10     itohy 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_MIC,
   1150       1.10     itohy 		    CMPCI_ADJUST_MIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
   1151       1.23     itohy 		return;
   1152        1.1  augustss 	case CMPCI_MASTER_VOL:
   1153        1.1  augustss 		src = CMPCI_SB16_MIXER_MASTER_L;
   1154        1.1  augustss 		break;
   1155        1.1  augustss 	case CMPCI_LINE_IN_VOL:
   1156        1.1  augustss 		src = CMPCI_SB16_MIXER_LINE_L;
   1157        1.1  augustss 		break;
   1158       1.10     itohy 	case CMPCI_AUX_IN_VOL:
   1159       1.10     itohy 		bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MIXER_AUX,
   1160       1.10     itohy 		    CMPCI_ADJUST_AUX_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT],
   1161       1.10     itohy 					      sc->sc_gain[port][CMPCI_RIGHT]));
   1162       1.10     itohy 		return;
   1163       1.10     itohy 	case CMPCI_MIC_RECVOL:
   1164       1.10     itohy 		cmpci_reg_partial_write_1(sc, CMPCI_REG_MIXER25,
   1165       1.10     itohy 		    CMPCI_REG_ADMIC_SHIFT, CMPCI_REG_ADMIC_MASK,
   1166       1.10     itohy 		    CMPCI_ADJUST_ADMIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
   1167       1.10     itohy 		return;
   1168       1.10     itohy 	case CMPCI_DAC_VOL:
   1169        1.1  augustss 		src = CMPCI_SB16_MIXER_VOICE_L;
   1170        1.1  augustss 		break;
   1171        1.1  augustss 	case CMPCI_FM_VOL:
   1172        1.1  augustss 		src = CMPCI_SB16_MIXER_FM_L;
   1173        1.1  augustss 		break;
   1174        1.1  augustss 	case CMPCI_CD_VOL:
   1175        1.1  augustss 		src = CMPCI_SB16_MIXER_CDDA_L;
   1176        1.1  augustss 		break;
   1177        1.1  augustss 	case CMPCI_PCSPEAKER:
   1178        1.1  augustss 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_SPEAKER,
   1179       1.10     itohy 		    CMPCI_ADJUST_2_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
   1180       1.10     itohy 		return;
   1181       1.10     itohy 	case CMPCI_MIC_PREAMP:
   1182       1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1183       1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
   1184       1.10     itohy 			    CMPCI_REG_MICGAINZ);
   1185       1.10     itohy 		else
   1186       1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
   1187       1.10     itohy 			    CMPCI_REG_MICGAINZ);
   1188        1.7  tshiozak 		return;
   1189       1.10     itohy 
   1190       1.10     itohy 	case CMPCI_DAC_MUTE:
   1191       1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1192       1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1193       1.10     itohy 			    CMPCI_REG_WSMUTE);
   1194       1.10     itohy 		else
   1195       1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1196       1.10     itohy 			    CMPCI_REG_WSMUTE);
   1197       1.10     itohy 		return;
   1198       1.10     itohy 	case CMPCI_FM_MUTE:
   1199       1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1200       1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1201       1.10     itohy 			    CMPCI_REG_FMMUTE);
   1202       1.10     itohy 		else
   1203       1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1204       1.10     itohy 			    CMPCI_REG_FMMUTE);
   1205       1.10     itohy 		return;
   1206       1.10     itohy 	case CMPCI_AUX_IN_MUTE:
   1207       1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1208       1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
   1209       1.10     itohy 			    CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM);
   1210       1.10     itohy 		else
   1211       1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
   1212       1.10     itohy 			    CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM);
   1213       1.10     itohy 		return;
   1214       1.10     itohy 	case CMPCI_CD_MUTE:
   1215       1.10     itohy 		mask = CMPCI_SB16_SW_CD;
   1216       1.10     itohy 		goto sbmute;
   1217       1.10     itohy 	case CMPCI_MIC_MUTE:
   1218       1.10     itohy 		mask = CMPCI_SB16_SW_MIC;
   1219       1.10     itohy 		goto sbmute;
   1220       1.10     itohy 	case CMPCI_LINE_IN_MUTE:
   1221       1.10     itohy 		mask = CMPCI_SB16_SW_LINE;
   1222       1.10     itohy 	sbmute:
   1223       1.10     itohy 		bits = cmpci_mixerreg_read(sc, CMPCI_SB16_MIXER_OUTMIX);
   1224       1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1225       1.10     itohy 			bits = bits & ~mask;
   1226       1.10     itohy 		else
   1227       1.10     itohy 			bits = bits | mask;
   1228       1.10     itohy 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, bits);
   1229        1.8     itohy 		return;
   1230       1.10     itohy 
   1231       1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
   1232       1.10     itohy 	case CMPCI_MONITOR_DAC:
   1233       1.10     itohy 	case CMPCI_PLAYBACK_MODE:
   1234        1.7  tshiozak 	case CMPCI_SPDIF_LOOP:
   1235       1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
   1236        1.7  tshiozak 		cmpci_set_out_ports(sc);
   1237        1.7  tshiozak 		return;
   1238        1.7  tshiozak 	case CMPCI_SPDIF_OUT_VOLTAGE:
   1239        1.7  tshiozak 		if (CMPCI_ISCAP(sc, SPDOUT_VOLTAGE)) {
   1240       1.10     itohy 			if (sc->sc_gain[CMPCI_SPDIF_OUT_VOLTAGE][CMPCI_LR]
   1241       1.21     itohy 			    == CMPCI_SPDIF_OUT_VOLTAGE_HIGH)
   1242       1.21     itohy 				cmpci_reg_clear_reg_misc(sc, CMPCI_REG_5V);
   1243       1.10     itohy 			else
   1244       1.21     itohy 				cmpci_reg_set_reg_misc(sc, CMPCI_REG_5V);
   1245        1.7  tshiozak 		}
   1246        1.7  tshiozak 		return;
   1247        1.7  tshiozak 	case CMPCI_SURROUND:
   1248        1.7  tshiozak 		if (CMPCI_ISCAP(sc, SURROUND)) {
   1249        1.7  tshiozak 			if (sc->sc_gain[CMPCI_SURROUND][CMPCI_LR])
   1250        1.7  tshiozak 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1251        1.7  tshiozak 						CMPCI_REG_SURROUND);
   1252        1.7  tshiozak 			else
   1253        1.7  tshiozak 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1254        1.7  tshiozak 						  CMPCI_REG_SURROUND);
   1255        1.7  tshiozak 		}
   1256        1.7  tshiozak 		return;
   1257        1.7  tshiozak 	case CMPCI_REAR:
   1258        1.7  tshiozak 		if (CMPCI_ISCAP(sc, REAR)) {
   1259        1.7  tshiozak 			if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
   1260       1.21     itohy 				cmpci_reg_set_reg_misc(sc, CMPCI_REG_N4SPK3D);
   1261        1.7  tshiozak 			else
   1262       1.21     itohy 				cmpci_reg_clear_reg_misc(sc, CMPCI_REG_N4SPK3D);
   1263        1.7  tshiozak 		}
   1264        1.7  tshiozak 		return;
   1265        1.7  tshiozak 	case CMPCI_INDIVIDUAL:
   1266        1.7  tshiozak 		if (CMPCI_ISCAP(sc, INDIVIDUAL_REAR)) {
   1267        1.7  tshiozak 			if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
   1268        1.7  tshiozak 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1269        1.7  tshiozak 						CMPCI_REG_INDIVIDUAL);
   1270        1.7  tshiozak 			else
   1271        1.7  tshiozak 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1272        1.7  tshiozak 						  CMPCI_REG_INDIVIDUAL);
   1273        1.7  tshiozak 		}
   1274        1.7  tshiozak 		return;
   1275        1.7  tshiozak 	case CMPCI_REVERSE:
   1276        1.7  tshiozak 		if (CMPCI_ISCAP(sc, REVERSE_FR)) {
   1277        1.7  tshiozak 			if (sc->sc_gain[CMPCI_REVERSE][CMPCI_LR])
   1278        1.7  tshiozak 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1279        1.7  tshiozak 						CMPCI_REG_REVERSE_FR);
   1280        1.7  tshiozak 			else
   1281        1.7  tshiozak 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1282        1.7  tshiozak 						  CMPCI_REG_REVERSE_FR);
   1283        1.7  tshiozak 		}
   1284        1.7  tshiozak 		return;
   1285        1.7  tshiozak 	case CMPCI_SPDIF_IN_PHASE:
   1286        1.7  tshiozak 		if (CMPCI_ISCAP(sc, SPDIN_PHASE)) {
   1287       1.10     itohy 			if (sc->sc_gain[CMPCI_SPDIF_IN_PHASE][CMPCI_LR]
   1288       1.10     itohy 			    == CMPCI_SPDIF_IN_PHASE_POSITIVE)
   1289       1.10     itohy 				cmpci_reg_clear_1(sc, CMPCI_REG_CHANNEL_FORMAT,
   1290       1.10     itohy 						  CMPCI_REG_SPDIN_PHASE);
   1291       1.10     itohy 			else
   1292        1.8     itohy 				cmpci_reg_set_1(sc, CMPCI_REG_CHANNEL_FORMAT,
   1293        1.8     itohy 						CMPCI_REG_SPDIN_PHASE);
   1294        1.7  tshiozak 		}
   1295        1.1  augustss 		return;
   1296        1.1  augustss 	default:
   1297        1.1  augustss 		return;
   1298        1.1  augustss 	}
   1299       1.10     itohy 
   1300       1.10     itohy 	cmpci_mixerreg_write(sc, src,
   1301       1.10     itohy 	    CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT]));
   1302        1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_L_TO_R(src),
   1303       1.10     itohy 	    CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_RIGHT]));
   1304        1.7  tshiozak }
   1305        1.7  tshiozak 
   1306        1.7  tshiozak static void
   1307       1.28      kent cmpci_set_out_ports(struct cmpci_softc *sc)
   1308        1.7  tshiozak {
   1309       1.28      kent 	uint8_t v;
   1310       1.28      kent 	int enspdout;
   1311       1.10     itohy 
   1312        1.7  tshiozak 	if (!CMPCI_ISCAP(sc, SPDLOOP))
   1313        1.7  tshiozak 		return;
   1314       1.10     itohy 
   1315       1.10     itohy 	/* SPDIF/out select */
   1316       1.10     itohy 	if (sc->sc_gain[CMPCI_SPDIF_LOOP][CMPCI_LR] == CMPCI_SPDIF_LOOP_OFF) {
   1317       1.10     itohy 		/* playback */
   1318       1.10     itohy 		cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP);
   1319       1.10     itohy 	} else {
   1320       1.10     itohy 		/* monitor SPDIF/in */
   1321       1.10     itohy 		cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP);
   1322       1.10     itohy 	}
   1323       1.10     itohy 
   1324       1.10     itohy 	/* SPDIF in select */
   1325       1.10     itohy 	v = sc->sc_gain[CMPCI_SPDIF_IN_SELECT][CMPCI_LR];
   1326       1.10     itohy 	if (v & CMPCI_SPDIFIN_SPDIFIN2)
   1327       1.21     itohy 		cmpci_reg_set_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN);
   1328       1.10     itohy 	else
   1329       1.21     itohy 		cmpci_reg_clear_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN);
   1330       1.10     itohy 	if (v & CMPCI_SPDIFIN_SPDIFOUT)
   1331       1.21     itohy 		cmpci_reg_set_reg_misc(sc, CMPCI_REG_SPDFLOOPI);
   1332       1.10     itohy 	else
   1333       1.21     itohy 		cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPDFLOOPI);
   1334       1.10     itohy 
   1335       1.28      kent 	enspdout = 0;
   1336       1.10     itohy 	/* playback to ... */
   1337       1.10     itohy 	if (CMPCI_ISCAP(sc, SPDOUT) &&
   1338       1.10     itohy 	    sc->sc_gain[CMPCI_PLAYBACK_MODE][CMPCI_LR]
   1339       1.10     itohy 		== CMPCI_PLAYBACK_MODE_SPDIF &&
   1340       1.10     itohy 	    (sc->sc_play.md_divide == CMPCI_REG_RATE_44100 ||
   1341       1.10     itohy 		(CMPCI_ISCAP(sc, SPDOUT_48K) &&
   1342       1.10     itohy 		    sc->sc_play.md_divide==CMPCI_REG_RATE_48000))) {
   1343       1.10     itohy 		/* playback to SPDIF */
   1344       1.10     itohy 		cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE);
   1345       1.10     itohy 		enspdout = 1;
   1346       1.10     itohy 		if (sc->sc_play.md_divide==CMPCI_REG_RATE_48000)
   1347       1.21     itohy 			cmpci_reg_set_reg_misc(sc,
   1348       1.21     itohy 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
   1349       1.10     itohy 		else
   1350       1.21     itohy 			cmpci_reg_clear_reg_misc(sc,
   1351       1.21     itohy 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
   1352       1.10     itohy 	} else {
   1353       1.10     itohy 		/* playback to DAC */
   1354        1.7  tshiozak 		cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
   1355       1.10     itohy 				  CMPCI_REG_SPDIF0_ENABLE);
   1356       1.10     itohy 		if (CMPCI_ISCAP(sc, SPDOUT_48K))
   1357       1.21     itohy 			cmpci_reg_clear_reg_misc(sc,
   1358       1.21     itohy 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
   1359       1.10     itohy 	}
   1360       1.10     itohy 
   1361       1.10     itohy 	/* legacy to SPDIF/out or not */
   1362       1.10     itohy 	if (CMPCI_ISCAP(sc, SPDLEGACY)) {
   1363       1.10     itohy 		if (sc->sc_gain[CMPCI_SPDIF_OUT_PLAYBACK][CMPCI_LR]
   1364       1.10     itohy 		    == CMPCI_SPDIF_OUT_PLAYBACK_WAVE)
   1365       1.10     itohy 			cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL,
   1366       1.10     itohy 					CMPCI_REG_LEGACY_SPDIF_ENABLE);
   1367       1.10     itohy 		else {
   1368       1.10     itohy 			cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL,
   1369       1.10     itohy 					CMPCI_REG_LEGACY_SPDIF_ENABLE);
   1370       1.10     itohy 			enspdout = 1;
   1371       1.10     itohy 		}
   1372       1.10     itohy 	}
   1373       1.10     itohy 
   1374       1.10     itohy 	/* enable/disable SPDIF/out */
   1375       1.10     itohy 	if (CMPCI_ISCAP(sc, XSPDOUT) && enspdout)
   1376       1.10     itohy 		cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL,
   1377       1.10     itohy 				CMPCI_REG_XSPDIF_ENABLE);
   1378       1.10     itohy 	else
   1379        1.7  tshiozak 		cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL,
   1380       1.10     itohy 				CMPCI_REG_XSPDIF_ENABLE);
   1381       1.10     itohy 
   1382       1.25   xtraeme 	/* SPDIF monitor (digital to analog output) */
   1383       1.10     itohy 	if (CMPCI_ISCAP(sc, SPDIN_MONITOR)) {
   1384       1.10     itohy 		v = sc->sc_gain[CMPCI_MONITOR_DAC][CMPCI_LR];
   1385       1.10     itohy 		if (!(v & CMPCI_MONDAC_ENABLE))
   1386       1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1387       1.10     itohy 					CMPCI_REG_SPDIN_MONITOR);
   1388       1.10     itohy 		if (v & CMPCI_MONDAC_SPDOUT)
   1389        1.7  tshiozak 			cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1,
   1390       1.10     itohy 					CMPCI_REG_SPDIFOUT_DAC);
   1391       1.10     itohy 		else
   1392        1.7  tshiozak 			cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
   1393       1.10     itohy 					CMPCI_REG_SPDIFOUT_DAC);
   1394       1.10     itohy 		if (v & CMPCI_MONDAC_ENABLE)
   1395       1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1396       1.10     itohy 					CMPCI_REG_SPDIN_MONITOR);
   1397        1.7  tshiozak 	}
   1398        1.1  augustss }
   1399        1.1  augustss 
   1400        1.1  augustss static int
   1401       1.28      kent cmpci_set_in_ports(struct cmpci_softc *sc)
   1402       1.10     itohy {
   1403        1.1  augustss 	int mask;
   1404        1.1  augustss 	int bitsl, bitsr;
   1405        1.1  augustss 
   1406       1.10     itohy 	mask = sc->sc_in_mask;
   1407       1.10     itohy 
   1408       1.10     itohy 	/*
   1409       1.10     itohy 	 * Note CMPCI_RECORD_SOURCE_CD, CMPCI_RECORD_SOURCE_LINE_IN and
   1410       1.10     itohy 	 * CMPCI_RECORD_SOURCE_FM are defined to the corresponding bit
   1411       1.10     itohy 	 * of the mixer register.
   1412       1.10     itohy 	 */
   1413       1.10     itohy 	bitsr = mask & (CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN |
   1414       1.10     itohy 	    CMPCI_RECORD_SOURCE_FM);
   1415       1.10     itohy 
   1416        1.1  augustss 	bitsl = CMPCI_SB16_MIXER_SRC_R_TO_L(bitsr);
   1417        1.8     itohy 	if (mask & CMPCI_RECORD_SOURCE_MIC) {
   1418        1.1  augustss 		bitsl |= CMPCI_SB16_MIXER_MIC_SRC;
   1419        1.1  augustss 		bitsr |= CMPCI_SB16_MIXER_MIC_SRC;
   1420        1.1  augustss 	}
   1421        1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, bitsl);
   1422        1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, bitsr);
   1423       1.10     itohy 
   1424       1.10     itohy 	if (mask & CMPCI_RECORD_SOURCE_AUX_IN)
   1425       1.10     itohy 		cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
   1426       1.10     itohy 		    CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN);
   1427       1.10     itohy 	else
   1428       1.10     itohy 		cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
   1429       1.10     itohy 		    CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN);
   1430       1.10     itohy 
   1431       1.10     itohy 	if (mask & CMPCI_RECORD_SOURCE_WAVE)
   1432       1.10     itohy 		cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1433       1.10     itohy 		    CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR);
   1434       1.10     itohy 	else
   1435       1.10     itohy 		cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1436       1.10     itohy 		    CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR);
   1437       1.10     itohy 
   1438        1.7  tshiozak 	if (CMPCI_ISCAP(sc, SPDIN) &&
   1439       1.10     itohy 	    (sc->sc_rec.md_divide == CMPCI_REG_RATE_44100 ||
   1440       1.10     itohy 		(CMPCI_ISCAP(sc, SPDOUT_48K) &&
   1441       1.10     itohy 		    sc->sc_rec.md_divide == CMPCI_REG_RATE_48000/* XXX? */))) {
   1442        1.8     itohy 		if (mask & CMPCI_RECORD_SOURCE_SPDIF) {
   1443        1.7  tshiozak 			/* enable SPDIF/in */
   1444        1.7  tshiozak 			cmpci_reg_set_4(sc,
   1445        1.7  tshiozak 					CMPCI_REG_FUNC_1,
   1446        1.7  tshiozak 					CMPCI_REG_SPDIF1_ENABLE);
   1447        1.7  tshiozak 		} else {
   1448        1.7  tshiozak 			cmpci_reg_clear_4(sc,
   1449        1.7  tshiozak 					CMPCI_REG_FUNC_1,
   1450        1.7  tshiozak 					CMPCI_REG_SPDIF1_ENABLE);
   1451        1.7  tshiozak 		}
   1452        1.7  tshiozak 	}
   1453        1.1  augustss 
   1454        1.1  augustss 	return 0;
   1455        1.1  augustss }
   1456        1.1  augustss 
   1457        1.1  augustss static int
   1458       1.28      kent cmpci_set_port(void *handle, mixer_ctrl_t *cp)
   1459        1.1  augustss {
   1460       1.28      kent 	struct cmpci_softc *sc;
   1461        1.1  augustss 	int lgain, rgain;
   1462       1.10     itohy 
   1463       1.28      kent 	sc = handle;
   1464        1.1  augustss 	switch (cp->dev) {
   1465       1.10     itohy 	case CMPCI_MIC_VOL:
   1466        1.1  augustss 	case CMPCI_PCSPEAKER:
   1467       1.10     itohy 	case CMPCI_MIC_RECVOL:
   1468       1.10     itohy 		if (cp->un.value.num_channels != 1)
   1469       1.10     itohy 			return EINVAL;
   1470       1.10     itohy 		/* FALLTHROUGH */
   1471       1.10     itohy 	case CMPCI_DAC_VOL:
   1472        1.1  augustss 	case CMPCI_FM_VOL:
   1473        1.1  augustss 	case CMPCI_CD_VOL:
   1474       1.10     itohy 	case CMPCI_LINE_IN_VOL:
   1475       1.10     itohy 	case CMPCI_AUX_IN_VOL:
   1476        1.1  augustss 	case CMPCI_MASTER_VOL:
   1477        1.1  augustss 		if (cp->type != AUDIO_MIXER_VALUE)
   1478        1.1  augustss 			return EINVAL;
   1479       1.10     itohy 		switch (cp->un.value.num_channels) {
   1480       1.10     itohy 		case 1:
   1481        1.1  augustss 			lgain = rgain =
   1482       1.10     itohy 			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
   1483        1.1  augustss 			break;
   1484       1.10     itohy 		case 2:
   1485       1.10     itohy 			lgain = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT];
   1486       1.10     itohy 			rgain = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT];
   1487        1.1  augustss 			break;
   1488        1.1  augustss 		default:
   1489       1.10     itohy 			return EINVAL;
   1490        1.1  augustss 		}
   1491        1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_LEFT]  = lgain;
   1492        1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_RIGHT] = rgain;
   1493        1.1  augustss 
   1494        1.1  augustss 		cmpci_set_mixer_gain(sc, cp->dev);
   1495        1.1  augustss 		break;
   1496        1.1  augustss 
   1497        1.1  augustss 	case CMPCI_RECORD_SOURCE:
   1498        1.1  augustss 		if (cp->type != AUDIO_MIXER_SET)
   1499        1.1  augustss 			return EINVAL;
   1500        1.8     itohy 
   1501       1.10     itohy 		if (cp->un.mask & ~(CMPCI_RECORD_SOURCE_MIC |
   1502       1.10     itohy 		    CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN |
   1503       1.10     itohy 		    CMPCI_RECORD_SOURCE_AUX_IN | CMPCI_RECORD_SOURCE_WAVE |
   1504       1.10     itohy 		    CMPCI_RECORD_SOURCE_FM | CMPCI_RECORD_SOURCE_SPDIF))
   1505       1.10     itohy 			return EINVAL;
   1506       1.10     itohy 
   1507        1.8     itohy 		if (cp->un.mask & CMPCI_RECORD_SOURCE_SPDIF)
   1508        1.8     itohy 			cp->un.mask = CMPCI_RECORD_SOURCE_SPDIF;
   1509        1.8     itohy 
   1510       1.10     itohy 		sc->sc_in_mask = cp->un.mask;
   1511       1.10     itohy 		return cmpci_set_in_ports(sc);
   1512        1.1  augustss 
   1513       1.10     itohy 	/* boolean */
   1514       1.10     itohy 	case CMPCI_DAC_MUTE:
   1515       1.10     itohy 	case CMPCI_FM_MUTE:
   1516       1.10     itohy 	case CMPCI_CD_MUTE:
   1517       1.10     itohy 	case CMPCI_LINE_IN_MUTE:
   1518       1.10     itohy 	case CMPCI_AUX_IN_MUTE:
   1519       1.10     itohy 	case CMPCI_MIC_MUTE:
   1520       1.10     itohy 	case CMPCI_MIC_PREAMP:
   1521       1.10     itohy 	case CMPCI_PLAYBACK_MODE:
   1522       1.10     itohy 	case CMPCI_SPDIF_IN_PHASE:
   1523       1.10     itohy 	case CMPCI_SPDIF_LOOP:
   1524       1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
   1525       1.10     itohy 	case CMPCI_SPDIF_OUT_VOLTAGE:
   1526       1.10     itohy 	case CMPCI_REAR:
   1527       1.10     itohy 	case CMPCI_INDIVIDUAL:
   1528       1.10     itohy 	case CMPCI_REVERSE:
   1529       1.10     itohy 	case CMPCI_SURROUND:
   1530        1.1  augustss 		if (cp->type != AUDIO_MIXER_ENUM)
   1531        1.1  augustss 			return EINVAL;
   1532        1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord != 0;
   1533       1.10     itohy 		cmpci_set_mixer_gain(sc, cp->dev);
   1534        1.1  augustss 		break;
   1535        1.1  augustss 
   1536       1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
   1537       1.10     itohy 		switch (cp->un.ord) {
   1538       1.10     itohy 		case CMPCI_SPDIF_IN_SPDIN1:
   1539       1.10     itohy 		case CMPCI_SPDIF_IN_SPDIN2:
   1540       1.10     itohy 		case CMPCI_SPDIF_IN_SPDOUT:
   1541       1.10     itohy 			break;
   1542       1.10     itohy 		default:
   1543        1.1  augustss 			return EINVAL;
   1544        1.1  augustss 		}
   1545       1.10     itohy 		goto xenum;
   1546       1.10     itohy 	case CMPCI_MONITOR_DAC:
   1547       1.10     itohy 		switch (cp->un.ord) {
   1548       1.10     itohy 		case CMPCI_MONITOR_DAC_OFF:
   1549       1.10     itohy 		case CMPCI_MONITOR_DAC_SPDIN:
   1550       1.10     itohy 		case CMPCI_MONITOR_DAC_SPDOUT:
   1551       1.10     itohy 			break;
   1552       1.10     itohy 		default:
   1553       1.10     itohy 			return EINVAL;
   1554        1.1  augustss 		}
   1555       1.10     itohy 	xenum:
   1556       1.10     itohy 		if (cp->type != AUDIO_MIXER_ENUM)
   1557       1.10     itohy 			return EINVAL;
   1558        1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord;
   1559       1.10     itohy 		cmpci_set_mixer_gain(sc, cp->dev);
   1560        1.7  tshiozak 		break;
   1561       1.10     itohy 
   1562        1.1  augustss 	default:
   1563        1.1  augustss 	    return EINVAL;
   1564        1.1  augustss 	}
   1565       1.10     itohy 
   1566        1.1  augustss 	return 0;
   1567        1.1  augustss }
   1568        1.1  augustss 
   1569        1.1  augustss static int
   1570       1.28      kent cmpci_get_port(void *handle, mixer_ctrl_t *cp)
   1571        1.1  augustss {
   1572       1.28      kent 	struct cmpci_softc *sc;
   1573       1.10     itohy 
   1574       1.28      kent 	sc = handle;
   1575        1.1  augustss 	switch (cp->dev) {
   1576        1.1  augustss 	case CMPCI_MIC_VOL:
   1577       1.10     itohy 	case CMPCI_PCSPEAKER:
   1578       1.10     itohy 	case CMPCI_MIC_RECVOL:
   1579        1.1  augustss 		if (cp->un.value.num_channels != 1)
   1580        1.1  augustss 			return EINVAL;
   1581       1.12     itohy 		/*FALLTHROUGH*/
   1582       1.10     itohy 	case CMPCI_DAC_VOL:
   1583        1.1  augustss 	case CMPCI_FM_VOL:
   1584        1.1  augustss 	case CMPCI_CD_VOL:
   1585       1.10     itohy 	case CMPCI_LINE_IN_VOL:
   1586       1.10     itohy 	case CMPCI_AUX_IN_VOL:
   1587        1.1  augustss 	case CMPCI_MASTER_VOL:
   1588        1.1  augustss 		switch (cp->un.value.num_channels) {
   1589        1.1  augustss 		case 1:
   1590       1.10     itohy 			cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
   1591        1.7  tshiozak 				sc->sc_gain[cp->dev][CMPCI_LEFT];
   1592        1.1  augustss 			break;
   1593        1.1  augustss 		case 2:
   1594       1.10     itohy 			cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
   1595        1.7  tshiozak 				sc->sc_gain[cp->dev][CMPCI_LEFT];
   1596       1.10     itohy 			cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
   1597        1.7  tshiozak 				sc->sc_gain[cp->dev][CMPCI_RIGHT];
   1598        1.1  augustss 			break;
   1599        1.1  augustss 		default:
   1600        1.1  augustss 			return EINVAL;
   1601        1.1  augustss 		}
   1602        1.1  augustss 		break;
   1603       1.10     itohy 
   1604        1.1  augustss 	case CMPCI_RECORD_SOURCE:
   1605        1.7  tshiozak 		cp->un.mask = sc->sc_in_mask;
   1606        1.1  augustss 		break;
   1607        1.1  augustss 
   1608       1.10     itohy 	case CMPCI_DAC_MUTE:
   1609       1.10     itohy 	case CMPCI_FM_MUTE:
   1610       1.10     itohy 	case CMPCI_CD_MUTE:
   1611        1.1  augustss 	case CMPCI_LINE_IN_MUTE:
   1612       1.10     itohy 	case CMPCI_AUX_IN_MUTE:
   1613       1.10     itohy 	case CMPCI_MIC_MUTE:
   1614       1.10     itohy 	case CMPCI_MIC_PREAMP:
   1615       1.10     itohy 	case CMPCI_PLAYBACK_MODE:
   1616       1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
   1617       1.10     itohy 	case CMPCI_SPDIF_IN_PHASE:
   1618        1.7  tshiozak 	case CMPCI_SPDIF_LOOP:
   1619       1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
   1620        1.7  tshiozak 	case CMPCI_SPDIF_OUT_VOLTAGE:
   1621       1.10     itohy 	case CMPCI_MONITOR_DAC:
   1622        1.7  tshiozak 	case CMPCI_REAR:
   1623        1.7  tshiozak 	case CMPCI_INDIVIDUAL:
   1624        1.7  tshiozak 	case CMPCI_REVERSE:
   1625        1.7  tshiozak 	case CMPCI_SURROUND:
   1626        1.7  tshiozak 		cp->un.ord = sc->sc_gain[cp->dev][CMPCI_LR];
   1627        1.1  augustss 		break;
   1628        1.1  augustss 
   1629        1.1  augustss 	default:
   1630        1.1  augustss 		return EINVAL;
   1631        1.1  augustss 	}
   1632        1.1  augustss 
   1633        1.1  augustss 	return 0;
   1634        1.1  augustss }
   1635        1.1  augustss 
   1636        1.1  augustss /* ARGSUSED */
   1637        1.1  augustss static size_t
   1638       1.28      kent cmpci_round_buffersize(void *handle, int direction, size_t bufsize)
   1639        1.1  augustss {
   1640       1.28      kent 
   1641        1.1  augustss 	if (bufsize > 0x10000)
   1642        1.1  augustss 		bufsize = 0x10000;
   1643       1.10     itohy 
   1644        1.1  augustss 	return bufsize;
   1645        1.1  augustss }
   1646        1.1  augustss 
   1647        1.4    simonb static paddr_t
   1648       1.28      kent cmpci_mappage(void *handle, void *addr, off_t offset, int prot)
   1649        1.1  augustss {
   1650        1.1  augustss 	struct cmpci_dmanode *p;
   1651       1.10     itohy 
   1652       1.28      kent 	if (offset < 0 || NULL == (p = cmpci_find_dmamem(handle, addr)))
   1653        1.1  augustss 		return -1;
   1654        1.1  augustss 
   1655        1.1  augustss 	return bus_dmamem_mmap(p->cd_tag, p->cd_segs,
   1656        1.7  tshiozak 		   sizeof(p->cd_segs)/sizeof(p->cd_segs[0]),
   1657        1.7  tshiozak 		   offset, prot, BUS_DMA_WAITOK);
   1658        1.1  augustss }
   1659        1.1  augustss 
   1660        1.1  augustss /* ARGSUSED */
   1661        1.1  augustss static int
   1662       1.28      kent cmpci_get_props(void *handle)
   1663        1.1  augustss {
   1664       1.28      kent 
   1665        1.1  augustss 	return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX;
   1666        1.1  augustss }
   1667        1.1  augustss 
   1668        1.1  augustss static int
   1669       1.28      kent cmpci_trigger_output(void *handle, void *start, void *end, int blksize,
   1670       1.28      kent 		     void (*intr)(void *), void *arg,
   1671       1.28      kent 		     const audio_params_t *param)
   1672        1.1  augustss {
   1673       1.28      kent 	struct cmpci_softc *sc;
   1674        1.1  augustss 	struct cmpci_dmanode *p;
   1675        1.1  augustss 	int bps;
   1676        1.1  augustss 
   1677       1.28      kent 	sc = handle;
   1678        1.1  augustss 	sc->sc_play.intr = intr;
   1679        1.1  augustss 	sc->sc_play.intr_arg = arg;
   1680       1.27      kent 	bps = param->channels * param->precision / 8;
   1681        1.1  augustss 	if (!bps)
   1682        1.1  augustss 		return EINVAL;
   1683        1.1  augustss 
   1684        1.1  augustss 	/* set DMA frame */
   1685        1.1  augustss 	if (!(p = cmpci_find_dmamem(sc, start)))
   1686        1.1  augustss 		return EINVAL;
   1687        1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BASE,
   1688        1.1  augustss 	    DMAADDR(p));
   1689        1.1  augustss 	delay(10);
   1690        1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BYTES,
   1691        1.7  tshiozak 	    ((caddr_t)end - (caddr_t)start + 1) / bps - 1);
   1692        1.1  augustss 	delay(10);
   1693        1.1  augustss 
   1694        1.1  augustss 	/* set interrupt count */
   1695        1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_SAMPLES,
   1696        1.1  augustss 			  (blksize + bps - 1) / bps - 1);
   1697        1.1  augustss 	delay(10);
   1698        1.1  augustss 
   1699        1.1  augustss 	/* start DMA */
   1700        1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); /* PLAY */
   1701        1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE);
   1702        1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE);
   1703       1.10     itohy 
   1704        1.1  augustss 	return 0;
   1705        1.1  augustss }
   1706        1.1  augustss 
   1707        1.1  augustss static int
   1708       1.28      kent cmpci_trigger_input(void *handle, void *start, void *end, int blksize,
   1709       1.28      kent 		    void (*intr)(void *), void *arg,
   1710       1.28      kent 		    const audio_params_t *param)
   1711        1.1  augustss {
   1712       1.28      kent 	struct cmpci_softc *sc;
   1713        1.1  augustss 	struct cmpci_dmanode *p;
   1714        1.1  augustss 	int bps;
   1715        1.1  augustss 
   1716       1.28      kent 	sc = handle;
   1717        1.1  augustss 	sc->sc_rec.intr = intr;
   1718        1.1  augustss 	sc->sc_rec.intr_arg = arg;
   1719       1.27      kent 	bps = param->channels * param->precision / 8;
   1720        1.1  augustss 	if (!bps)
   1721        1.1  augustss 		return EINVAL;
   1722        1.1  augustss 
   1723        1.1  augustss 	/* set DMA frame */
   1724        1.1  augustss 	if (!(p=cmpci_find_dmamem(sc, start)))
   1725        1.1  augustss 		return EINVAL;
   1726        1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BASE,
   1727        1.1  augustss 	    DMAADDR(p));
   1728        1.1  augustss 	delay(10);
   1729        1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BYTES,
   1730        1.7  tshiozak 	    ((caddr_t)end - (caddr_t)start + 1) / bps - 1);
   1731        1.1  augustss 	delay(10);
   1732        1.1  augustss 
   1733        1.1  augustss 	/* set interrupt count */
   1734        1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_SAMPLES,
   1735        1.7  tshiozak 	    (blksize + bps - 1) / bps - 1);
   1736        1.1  augustss 	delay(10);
   1737        1.1  augustss 
   1738        1.1  augustss 	/* start DMA */
   1739        1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_DIR); /* REC */
   1740        1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE);
   1741        1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE);
   1742       1.10     itohy 
   1743        1.1  augustss 	return 0;
   1744        1.1  augustss }
   1745        1.1  augustss 
   1746        1.1  augustss /* end of file */
   1747