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cmpci.c revision 1.34.6.1
      1  1.34.6.1        ad /*	$NetBSD: cmpci.c,v 1.34.6.1 2007/02/27 14:16:19 ad Exp $	*/
      2       1.1  augustss 
      3       1.1  augustss /*
      4  1.34.6.1        ad  * Copyright (c) 2000, 2001, 2007 The NetBSD Foundation, Inc.
      5       1.1  augustss  * All rights reserved.
      6       1.1  augustss  *
      7       1.1  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8      1.22    keihan  * by Takuya SHIOZAKI <tshiozak (at) NetBSD.org> .
      9       1.1  augustss  *
     10      1.10     itohy  * This code is derived from software contributed to The NetBSD Foundation
     11      1.10     itohy  * by ITOH Yasufumi.
     12      1.10     itohy  *
     13       1.1  augustss  * Redistribution and use in source and binary forms, with or without
     14       1.1  augustss  * modification, are permitted provided that the following conditions
     15       1.1  augustss  * are met:
     16       1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     17       1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     18       1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     19       1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     20       1.1  augustss  *    documentation and/or other materials provided with the distribution.
     21       1.1  augustss  *
     22       1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     23       1.1  augustss  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24       1.1  augustss  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25       1.1  augustss  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     26       1.1  augustss  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27       1.1  augustss  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28       1.1  augustss  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29       1.1  augustss  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30       1.1  augustss  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31       1.1  augustss  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32       1.1  augustss  * SUCH DAMAGE.
     33       1.1  augustss  *
     34       1.1  augustss  */
     35       1.1  augustss 
     36       1.1  augustss /*
     37       1.1  augustss  * C-Media CMI8x38 Audio Chip Support.
     38       1.1  augustss  *
     39       1.1  augustss  * TODO:
     40      1.10     itohy  *   - 4ch / 6ch support.
     41      1.10     itohy  *   - Joystick support.
     42       1.1  augustss  *
     43       1.1  augustss  */
     44      1.11     lukem 
     45      1.11     lukem #include <sys/cdefs.h>
     46  1.34.6.1        ad __KERNEL_RCSID(0, "$NetBSD: cmpci.c,v 1.34.6.1 2007/02/27 14:16:19 ad Exp $");
     47       1.1  augustss 
     48       1.1  augustss #if defined(AUDIO_DEBUG) || defined(DEBUG)
     49       1.7  tshiozak #define DPRINTF(x) if (cmpcidebug) printf x
     50       1.7  tshiozak int cmpcidebug = 0;
     51       1.1  augustss #else
     52       1.1  augustss #define DPRINTF(x)
     53       1.1  augustss #endif
     54       1.1  augustss 
     55       1.8     itohy #include "mpu.h"
     56       1.8     itohy 
     57       1.1  augustss #include <sys/param.h>
     58       1.1  augustss #include <sys/systm.h>
     59       1.1  augustss #include <sys/kernel.h>
     60       1.1  augustss #include <sys/malloc.h>
     61       1.1  augustss #include <sys/device.h>
     62       1.1  augustss #include <sys/proc.h>
     63       1.1  augustss 
     64       1.1  augustss #include <dev/pci/pcidevs.h>
     65       1.1  augustss #include <dev/pci/pcivar.h>
     66       1.1  augustss 
     67       1.1  augustss #include <sys/audioio.h>
     68       1.1  augustss #include <dev/audio_if.h>
     69       1.1  augustss #include <dev/midi_if.h>
     70       1.1  augustss 
     71       1.1  augustss #include <dev/mulaw.h>
     72       1.1  augustss #include <dev/auconv.h>
     73       1.1  augustss #include <dev/pci/cmpcireg.h>
     74       1.1  augustss #include <dev/pci/cmpcivar.h>
     75       1.1  augustss 
     76       1.1  augustss #include <dev/ic/mpuvar.h>
     77       1.1  augustss #include <machine/bus.h>
     78       1.1  augustss #include <machine/intr.h>
     79       1.1  augustss 
     80       1.1  augustss /*
     81       1.1  augustss  * Low-level HW interface
     82       1.1  augustss  */
     83      1.30     perry static inline uint8_t cmpci_mixerreg_read(struct cmpci_softc *, uint8_t);
     84      1.30     perry static inline void cmpci_mixerreg_write(struct cmpci_softc *,
     85      1.28      kent 	uint8_t, uint8_t);
     86      1.30     perry static inline void cmpci_reg_partial_write_1(struct cmpci_softc *, int, int,
     87      1.28      kent 	unsigned, unsigned);
     88      1.30     perry static inline void cmpci_reg_partial_write_4(struct cmpci_softc *, int, int,
     89      1.28      kent 	uint32_t, uint32_t);
     90      1.30     perry static inline void cmpci_reg_set_1(struct cmpci_softc *, int, uint8_t);
     91      1.30     perry static inline void cmpci_reg_clear_1(struct cmpci_softc *, int, uint8_t);
     92      1.30     perry static inline void cmpci_reg_set_4(struct cmpci_softc *, int, uint32_t);
     93      1.30     perry static inline void cmpci_reg_clear_4(struct cmpci_softc *, int, uint32_t);
     94      1.30     perry static inline void cmpci_reg_set_reg_misc(struct cmpci_softc *, uint32_t);
     95      1.30     perry static inline void cmpci_reg_clear_reg_misc(struct cmpci_softc *, uint32_t);
     96      1.28      kent static int cmpci_rate_to_index(int);
     97      1.30     perry static inline int cmpci_index_to_rate(int);
     98      1.30     perry static inline int cmpci_index_to_divider(int);
     99      1.28      kent 
    100      1.28      kent static int cmpci_adjust(int, int);
    101      1.28      kent static void cmpci_set_mixer_gain(struct cmpci_softc *, int);
    102      1.28      kent static void cmpci_set_out_ports(struct cmpci_softc *);
    103      1.28      kent static int cmpci_set_in_ports(struct cmpci_softc *);
    104       1.1  augustss 
    105       1.1  augustss 
    106       1.1  augustss /*
    107       1.1  augustss  * autoconf interface
    108       1.1  augustss  */
    109      1.28      kent static int cmpci_match(struct device *, struct cfdata *, void *);
    110      1.28      kent static void cmpci_attach(struct device *, struct device *, void *);
    111       1.1  augustss 
    112      1.15   thorpej CFATTACH_DECL(cmpci, sizeof (struct cmpci_softc),
    113      1.16   thorpej     cmpci_match, cmpci_attach, NULL, NULL);
    114       1.1  augustss 
    115       1.1  augustss /* interrupt */
    116      1.28      kent static int cmpci_intr(void *);
    117       1.1  augustss 
    118       1.1  augustss 
    119       1.1  augustss /*
    120       1.1  augustss  * DMA stuffs
    121       1.1  augustss  */
    122      1.28      kent static int cmpci_alloc_dmamem(struct cmpci_softc *, size_t,
    123      1.28      kent 	struct malloc_type *, int, caddr_t *);
    124      1.28      kent static int cmpci_free_dmamem(struct cmpci_softc *, caddr_t,
    125      1.28      kent 	struct malloc_type *);
    126      1.28      kent static struct cmpci_dmanode * cmpci_find_dmamem(struct cmpci_softc *,
    127      1.28      kent 	caddr_t);
    128       1.1  augustss 
    129       1.1  augustss 
    130       1.1  augustss /*
    131       1.1  augustss  * interface to machine independent layer
    132       1.1  augustss  */
    133      1.28      kent static int cmpci_query_encoding(void *, struct audio_encoding *);
    134      1.28      kent static int cmpci_set_params(void *, int, int, audio_params_t *,
    135      1.28      kent 	audio_params_t *, stream_filter_list_t *, stream_filter_list_t *);
    136      1.28      kent static int cmpci_round_blocksize(void *, int, int, const audio_params_t *);
    137      1.28      kent static int cmpci_halt_output(void *);
    138      1.28      kent static int cmpci_halt_input(void *);
    139      1.28      kent static int cmpci_getdev(void *, struct audio_device *);
    140      1.28      kent static int cmpci_set_port(void *, mixer_ctrl_t *);
    141      1.28      kent static int cmpci_get_port(void *, mixer_ctrl_t *);
    142      1.28      kent static int cmpci_query_devinfo(void *, mixer_devinfo_t *);
    143      1.28      kent static void *cmpci_allocm(void *, int, size_t, struct malloc_type *, int);
    144      1.28      kent static void cmpci_freem(void *, void *, struct malloc_type *);
    145      1.28      kent static size_t cmpci_round_buffersize(void *, int, size_t);
    146      1.28      kent static paddr_t cmpci_mappage(void *, void *, off_t, int);
    147      1.28      kent static int cmpci_get_props(void *);
    148      1.28      kent static int cmpci_trigger_output(void *, void *, void *, int,
    149      1.28      kent 	void (*)(void *), void *, const audio_params_t *);
    150      1.28      kent static int cmpci_trigger_input(void *, void *, void *, int,
    151      1.28      kent 	void (*)(void *), void *, const audio_params_t *);
    152       1.1  augustss 
    153  1.34.6.1        ad static void cmpci_get_locks(void *, kmutex_t **, kmutex_t **);
    154  1.34.6.1        ad 
    155      1.26      yamt static const struct audio_hw_if cmpci_hw_if = {
    156      1.27      kent 	NULL,			/* open */
    157      1.27      kent 	NULL,			/* close */
    158       1.1  augustss 	NULL,			/* drain */
    159       1.3  gmcgarry 	cmpci_query_encoding,	/* query_encoding */
    160       1.3  gmcgarry 	cmpci_set_params,	/* set_params */
    161       1.3  gmcgarry 	cmpci_round_blocksize,	/* round_blocksize */
    162       1.1  augustss 	NULL,			/* commit_settings */
    163       1.1  augustss 	NULL,			/* init_output */
    164       1.1  augustss 	NULL,			/* init_input */
    165       1.1  augustss 	NULL,			/* start_output */
    166       1.1  augustss 	NULL,			/* start_input */
    167       1.3  gmcgarry 	cmpci_halt_output,	/* halt_output */
    168       1.3  gmcgarry 	cmpci_halt_input,	/* halt_input */
    169       1.1  augustss 	NULL,			/* speaker_ctl */
    170       1.3  gmcgarry 	cmpci_getdev,		/* getdev */
    171       1.1  augustss 	NULL,			/* setfd */
    172       1.3  gmcgarry 	cmpci_set_port,		/* set_port */
    173       1.3  gmcgarry 	cmpci_get_port,		/* get_port */
    174       1.3  gmcgarry 	cmpci_query_devinfo,	/* query_devinfo */
    175       1.3  gmcgarry 	cmpci_allocm,		/* allocm */
    176       1.3  gmcgarry 	cmpci_freem,		/* freem */
    177       1.3  gmcgarry 	cmpci_round_buffersize,/* round_buffersize */
    178       1.3  gmcgarry 	cmpci_mappage,		/* mappage */
    179       1.3  gmcgarry 	cmpci_get_props,	/* get_props */
    180       1.3  gmcgarry 	cmpci_trigger_output,	/* trigger_output */
    181       1.9  augustss 	cmpci_trigger_input,	/* trigger_input */
    182       1.9  augustss 	NULL,			/* dev_ioctl */
    183      1.32  christos 	NULL,			/* powerstate */
    184  1.34.6.1        ad 	cmpci_get_locks,	/* get_locks */
    185       1.1  augustss };
    186       1.1  augustss 
    187      1.27      kent #define CMPCI_NFORMATS	4
    188      1.27      kent static const struct audio_format cmpci_formats[CMPCI_NFORMATS] = {
    189      1.27      kent 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
    190      1.27      kent 	 2, AUFMT_STEREO, 0, {5512, 48000}},
    191      1.27      kent 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
    192      1.27      kent 	 1, AUFMT_MONAURAL, 0, {5512, 48000}},
    193      1.27      kent 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
    194      1.27      kent 	 2, AUFMT_STEREO, 0, {5512, 48000}},
    195      1.27      kent 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
    196      1.27      kent 	 1, AUFMT_MONAURAL, 0, {5512, 48000}},
    197      1.27      kent };
    198      1.27      kent 
    199       1.1  augustss 
    200       1.1  augustss /*
    201       1.1  augustss  * Low-level HW interface
    202       1.1  augustss  */
    203       1.1  augustss 
    204       1.1  augustss /* mixer register read/write */
    205      1.30     perry static inline uint8_t
    206      1.28      kent cmpci_mixerreg_read(struct cmpci_softc *sc, uint8_t no)
    207       1.1  augustss {
    208       1.1  augustss 	uint8_t ret;
    209       1.1  augustss 
    210       1.1  augustss 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no);
    211       1.1  augustss 	delay(10);
    212       1.1  augustss 	ret = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA);
    213       1.1  augustss 	delay(10);
    214       1.1  augustss 	return ret;
    215       1.1  augustss }
    216       1.1  augustss 
    217      1.30     perry static inline void
    218      1.28      kent cmpci_mixerreg_write(struct cmpci_softc *sc, uint8_t no, uint8_t val)
    219       1.1  augustss {
    220      1.28      kent 
    221       1.1  augustss 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no);
    222       1.1  augustss 	delay(10);
    223       1.1  augustss 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA, val);
    224       1.1  augustss 	delay(10);
    225       1.1  augustss }
    226       1.1  augustss 
    227       1.1  augustss 
    228       1.1  augustss /* register partial write */
    229      1.30     perry static inline void
    230      1.28      kent cmpci_reg_partial_write_1(struct cmpci_softc *sc, int no, int shift,
    231      1.28      kent 			  unsigned mask, unsigned val)
    232      1.10     itohy {
    233      1.28      kent 
    234      1.10     itohy 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
    235      1.10     itohy 	    (val<<shift) |
    236      1.10     itohy 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
    237      1.10     itohy 	delay(10);
    238      1.10     itohy }
    239      1.10     itohy 
    240      1.30     perry static inline void
    241      1.28      kent cmpci_reg_partial_write_4(struct cmpci_softc *sc, int no, int shift,
    242      1.28      kent 			  uint32_t mask, uint32_t val)
    243       1.1  augustss {
    244      1.28      kent 
    245       1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
    246       1.1  augustss 	    (val<<shift) |
    247       1.1  augustss 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
    248       1.1  augustss 	delay(10);
    249       1.1  augustss }
    250       1.1  augustss 
    251       1.1  augustss /* register set/clear bit */
    252      1.30     perry static inline void
    253      1.28      kent cmpci_reg_set_1(struct cmpci_softc *sc, int no, uint8_t mask)
    254       1.7  tshiozak {
    255      1.28      kent 
    256       1.7  tshiozak 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
    257       1.7  tshiozak 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) | mask));
    258       1.7  tshiozak 	delay(10);
    259       1.7  tshiozak }
    260       1.7  tshiozak 
    261      1.30     perry static inline void
    262      1.28      kent cmpci_reg_clear_1(struct cmpci_softc *sc, int no, uint8_t mask)
    263       1.7  tshiozak {
    264      1.28      kent 
    265       1.7  tshiozak 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
    266       1.7  tshiozak 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~mask));
    267       1.7  tshiozak 	delay(10);
    268       1.7  tshiozak }
    269       1.7  tshiozak 
    270      1.30     perry static inline void
    271      1.28      kent cmpci_reg_set_4(struct cmpci_softc *sc, int no, uint32_t mask)
    272       1.1  augustss {
    273      1.28      kent 
    274      1.21     itohy 	/* use cmpci_reg_set_reg_misc() for CMPCI_REG_MISC */
    275      1.21     itohy 	KDASSERT(no != CMPCI_REG_MISC);
    276      1.21     itohy 
    277       1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
    278       1.7  tshiozak 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) | mask));
    279       1.1  augustss 	delay(10);
    280       1.1  augustss }
    281       1.1  augustss 
    282      1.30     perry static inline void
    283      1.28      kent cmpci_reg_clear_4(struct cmpci_softc *sc, int no, uint32_t mask)
    284       1.1  augustss {
    285      1.28      kent 
    286      1.21     itohy 	/* use cmpci_reg_clear_reg_misc() for CMPCI_REG_MISC */
    287      1.21     itohy 	KDASSERT(no != CMPCI_REG_MISC);
    288      1.21     itohy 
    289       1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
    290       1.7  tshiozak 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~mask));
    291       1.1  augustss 	delay(10);
    292       1.1  augustss }
    293       1.1  augustss 
    294      1.21     itohy /*
    295      1.21     itohy  * The CMPCI_REG_MISC register needs special handling, since one of
    296      1.21     itohy  * its bits has different read/write values.
    297      1.21     itohy  */
    298      1.30     perry static inline void
    299      1.28      kent cmpci_reg_set_reg_misc(struct cmpci_softc *sc, uint32_t mask)
    300      1.21     itohy {
    301      1.28      kent 
    302      1.21     itohy 	sc->sc_reg_misc |= mask;
    303      1.21     itohy 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC,
    304      1.21     itohy 	    sc->sc_reg_misc);
    305      1.21     itohy 	delay(10);
    306      1.21     itohy }
    307      1.21     itohy 
    308      1.30     perry static inline void
    309      1.28      kent cmpci_reg_clear_reg_misc(struct cmpci_softc *sc, uint32_t mask)
    310      1.21     itohy {
    311      1.28      kent 
    312      1.21     itohy 	sc->sc_reg_misc &= ~mask;
    313      1.21     itohy 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC,
    314      1.21     itohy 	    sc->sc_reg_misc);
    315      1.21     itohy 	delay(10);
    316      1.21     itohy }
    317      1.21     itohy 
    318       1.1  augustss /* rate */
    319       1.6  jdolecek static const struct {
    320       1.1  augustss 	int rate;
    321       1.1  augustss 	int divider;
    322       1.1  augustss } cmpci_rate_table[CMPCI_REG_NUMRATE] = {
    323       1.1  augustss #define _RATE(n) { n, CMPCI_REG_RATE_ ## n }
    324       1.1  augustss 	_RATE(5512),
    325       1.1  augustss 	_RATE(8000),
    326       1.1  augustss 	_RATE(11025),
    327       1.1  augustss 	_RATE(16000),
    328       1.1  augustss 	_RATE(22050),
    329       1.1  augustss 	_RATE(32000),
    330       1.1  augustss 	_RATE(44100),
    331       1.1  augustss 	_RATE(48000)
    332       1.7  tshiozak #undef	_RATE
    333       1.1  augustss };
    334       1.1  augustss 
    335       1.1  augustss static int
    336      1.28      kent cmpci_rate_to_index(int rate)
    337       1.1  augustss {
    338       1.1  augustss 	int i;
    339       1.1  augustss 
    340      1.13  augustss 	for (i = 0; i < CMPCI_REG_NUMRATE - 1; i++)
    341       1.1  augustss 		if (rate <=
    342       1.1  augustss 		    (cmpci_rate_table[i].rate+cmpci_rate_table[i+1].rate) / 2)
    343       1.1  augustss 			return i;
    344       1.1  augustss 	return i;  /* 48000 */
    345       1.1  augustss }
    346       1.1  augustss 
    347      1.30     perry static inline int
    348      1.28      kent cmpci_index_to_rate(int index)
    349       1.1  augustss {
    350      1.28      kent 
    351       1.1  augustss 	return cmpci_rate_table[index].rate;
    352       1.1  augustss }
    353       1.1  augustss 
    354      1.30     perry static inline int
    355      1.28      kent cmpci_index_to_divider(int index)
    356       1.1  augustss {
    357      1.28      kent 
    358       1.1  augustss 	return cmpci_rate_table[index].divider;
    359       1.1  augustss }
    360       1.1  augustss 
    361       1.1  augustss /*
    362       1.1  augustss  * interface to configure the device.
    363       1.1  augustss  */
    364       1.1  augustss static int
    365      1.34  christos cmpci_match(struct device *parent, struct cfdata *match,
    366      1.33  christos     void *aux)
    367       1.1  augustss {
    368      1.28      kent 	struct pci_attach_args *pa;
    369       1.1  augustss 
    370      1.28      kent 	pa = (struct pci_attach_args *)aux;
    371       1.1  augustss 	if ( PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CMEDIA &&
    372       1.1  augustss 	     (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338A ||
    373       1.1  augustss 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338B ||
    374       1.7  tshiozak 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738 ||
    375       1.7  tshiozak 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738B) )
    376       1.1  augustss 		return 1;
    377       1.1  augustss 
    378       1.1  augustss 	return 0;
    379       1.1  augustss }
    380       1.1  augustss 
    381       1.1  augustss static void
    382      1.34  christos cmpci_attach(struct device *parent, struct device *self, void *aux)
    383       1.1  augustss {
    384      1.28      kent 	struct cmpci_softc *sc;
    385      1.28      kent 	struct pci_attach_args *pa;
    386       1.8     itohy 	struct audio_attach_args aa;
    387       1.1  augustss 	pci_intr_handle_t ih;
    388       1.1  augustss 	char const *strintr;
    389       1.7  tshiozak 	char devinfo[256];
    390       1.1  augustss 	int i, v;
    391       1.1  augustss 
    392      1.28      kent 	sc = (struct cmpci_softc *)self;
    393      1.28      kent 	pa = (struct pci_attach_args *)aux;
    394      1.17   thorpej 	aprint_naive(": Audio controller\n");
    395      1.17   thorpej 
    396       1.7  tshiozak 	sc->sc_id = pa->pa_id;
    397       1.7  tshiozak 	sc->sc_class = pa->pa_class;
    398      1.24    itojun 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
    399      1.17   thorpej 	aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
    400      1.17   thorpej 	    PCI_REVISION(sc->sc_class));
    401       1.7  tshiozak 	switch (PCI_PRODUCT(sc->sc_id)) {
    402       1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338A:
    403       1.7  tshiozak 		/*FALLTHROUGH*/
    404       1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338B:
    405       1.7  tshiozak 		sc->sc_capable = CMPCI_CAP_CMI8338;
    406       1.1  augustss 		break;
    407       1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8738:
    408       1.7  tshiozak 		/*FALLTHROUGH*/
    409       1.7  tshiozak 	case PCI_PRODUCT_CMEDIA_CMI8738B:
    410       1.7  tshiozak 		sc->sc_capable = CMPCI_CAP_CMI8738;
    411       1.1  augustss 		break;
    412       1.1  augustss 	}
    413       1.1  augustss 
    414       1.2  augustss 	/* map I/O space */
    415       1.1  augustss 	if (pci_mapreg_map(pa, CMPCI_PCI_IOBASEREG, PCI_MAPREG_TYPE_IO, 0,
    416       1.7  tshiozak 		&sc->sc_iot, &sc->sc_ioh, NULL, NULL)) {
    417      1.17   thorpej 		aprint_error("%s: failed to map I/O space\n",
    418      1.17   thorpej 		    sc->sc_dev.dv_xname);
    419       1.1  augustss 		return;
    420       1.1  augustss 	}
    421       1.1  augustss 
    422  1.34.6.1        ad 	mutex_init(&sc->sc_lock, MUTEX_DRIVER, IPL_NONE);
    423  1.34.6.1        ad 	mutex_init(&sc->sc_intr_lock, MUTEX_DRIVER, IPL_AUDIO);
    424  1.34.6.1        ad 
    425       1.2  augustss 	/* interrupt */
    426       1.5  sommerfe 	if (pci_intr_map(pa, &ih)) {
    427      1.17   thorpej 		aprint_error("%s: failed to map interrupt\n",
    428      1.17   thorpej 		    sc->sc_dev.dv_xname);
    429       1.1  augustss 		return;
    430       1.1  augustss 	}
    431       1.1  augustss 	strintr = pci_intr_string(pa->pa_pc, ih);
    432       1.1  augustss 	sc->sc_ih=pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, cmpci_intr, sc);
    433       1.1  augustss 	if (sc->sc_ih == NULL) {
    434      1.17   thorpej 		aprint_error("%s: failed to establish interrupt",
    435       1.1  augustss 		    sc->sc_dev.dv_xname);
    436       1.1  augustss 		if (strintr != NULL)
    437      1.17   thorpej 			aprint_normal(" at %s", strintr);
    438      1.17   thorpej 		aprint_normal("\n");
    439       1.1  augustss 		return;
    440       1.1  augustss 	}
    441      1.17   thorpej 	aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, strintr);
    442       1.1  augustss 
    443       1.1  augustss 	sc->sc_dmat = pa->pa_dmat;
    444       1.1  augustss 
    445       1.1  augustss 	audio_attach_mi(&cmpci_hw_if, sc, &sc->sc_dev);
    446       1.1  augustss 
    447       1.8     itohy 	/* attach OPL device */
    448       1.8     itohy 	aa.type = AUDIODEV_TYPE_OPL;
    449       1.8     itohy 	aa.hwif = NULL;
    450       1.8     itohy 	aa.hdl = NULL;
    451       1.8     itohy 	(void)config_found(&sc->sc_dev, &aa, audioprint);
    452       1.8     itohy 
    453       1.8     itohy 	/* attach MPU-401 device */
    454       1.8     itohy 	aa.type = AUDIODEV_TYPE_MPU;
    455       1.8     itohy 	aa.hwif = NULL;
    456       1.8     itohy 	aa.hdl = NULL;
    457       1.8     itohy 	if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
    458       1.8     itohy 	    CMPCI_REG_MPU_BASE, CMPCI_REG_MPU_SIZE, &sc->sc_mpu_ioh) == 0)
    459       1.8     itohy 		sc->sc_mpudev = config_found(&sc->sc_dev, &aa, audioprint);
    460       1.8     itohy 
    461      1.21     itohy 	/* get initial value (this is 0 and may be omitted but just in case) */
    462      1.21     itohy 	sc->sc_reg_misc = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
    463      1.21     itohy 	    CMPCI_REG_MISC) & ~CMPCI_REG_SPDIF48K;
    464      1.21     itohy 
    465       1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_RESET, 0);
    466       1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0);
    467       1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0);
    468       1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX,
    469       1.1  augustss 	    CMPCI_SB16_SW_CD|CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE);
    470       1.1  augustss 	for (i = 0; i < CMPCI_NDEVS; i++) {
    471       1.1  augustss 		switch(i) {
    472      1.10     itohy 		/*
    473      1.10     itohy 		 * CMI8738 defaults are
    474      1.10     itohy 		 *  master:	0xe0	(0x00 - 0xf8)
    475      1.12     itohy 		 *  FM, DAC:	0xc0	(0x00 - 0xf8)
    476      1.10     itohy 		 *  PC speaker:	0x80	(0x00 - 0xc0)
    477      1.10     itohy 		 *  others:	0
    478      1.10     itohy 		 */
    479      1.10     itohy 		/* volume */
    480       1.8     itohy 		case CMPCI_MASTER_VOL:
    481      1.10     itohy 			v = 128;	/* 224 */
    482      1.10     itohy 			break;
    483       1.8     itohy 		case CMPCI_FM_VOL:
    484      1.10     itohy 		case CMPCI_DAC_VOL:
    485      1.10     itohy 			v = 192;
    486      1.10     itohy 			break;
    487       1.8     itohy 		case CMPCI_PCSPEAKER:
    488      1.10     itohy 			v = 128;
    489       1.1  augustss 			break;
    490       1.8     itohy 
    491       1.8     itohy 		/* booleans, set to true */
    492      1.10     itohy 		case CMPCI_CD_MUTE:
    493      1.10     itohy 		case CMPCI_MIC_MUTE:
    494      1.10     itohy 		case CMPCI_LINE_IN_MUTE:
    495      1.10     itohy 		case CMPCI_AUX_IN_MUTE:
    496       1.8     itohy 			v = 1;
    497       1.1  augustss 			break;
    498      1.10     itohy 
    499      1.10     itohy 		/* volume with inital value 0 */
    500      1.10     itohy 		case CMPCI_CD_VOL:
    501      1.10     itohy 		case CMPCI_LINE_IN_VOL:
    502      1.10     itohy 		case CMPCI_AUX_IN_VOL:
    503      1.10     itohy 		case CMPCI_MIC_VOL:
    504      1.10     itohy 		case CMPCI_MIC_RECVOL:
    505      1.10     itohy 			/* FALLTHROUGH */
    506      1.10     itohy 
    507       1.8     itohy 		/* others are cleared */
    508      1.10     itohy 		case CMPCI_MIC_PREAMP:
    509       1.8     itohy 		case CMPCI_RECORD_SOURCE:
    510      1.10     itohy 		case CMPCI_PLAYBACK_MODE:
    511      1.10     itohy 		case CMPCI_SPDIF_IN_SELECT:
    512      1.10     itohy 		case CMPCI_SPDIF_IN_PHASE:
    513       1.7  tshiozak 		case CMPCI_SPDIF_LOOP:
    514      1.10     itohy 		case CMPCI_SPDIF_OUT_PLAYBACK:
    515       1.7  tshiozak 		case CMPCI_SPDIF_OUT_VOLTAGE:
    516      1.10     itohy 		case CMPCI_MONITOR_DAC:
    517       1.7  tshiozak 		case CMPCI_REAR:
    518       1.7  tshiozak 		case CMPCI_INDIVIDUAL:
    519       1.7  tshiozak 		case CMPCI_REVERSE:
    520       1.7  tshiozak 		case CMPCI_SURROUND:
    521       1.8     itohy 		default:
    522       1.1  augustss 			v = 0;
    523       1.1  augustss 			break;
    524       1.1  augustss 		}
    525       1.7  tshiozak 		sc->sc_gain[i][CMPCI_LEFT] = sc->sc_gain[i][CMPCI_RIGHT] = v;
    526       1.1  augustss 		cmpci_set_mixer_gain(sc, i);
    527       1.1  augustss 	}
    528       1.1  augustss }
    529       1.1  augustss 
    530       1.1  augustss static int
    531      1.28      kent cmpci_intr(void *handle)
    532       1.1  augustss {
    533      1.28      kent 	struct cmpci_softc *sc;
    534       1.1  augustss 	uint32_t intrstat;
    535       1.1  augustss 
    536      1.28      kent 	sc = handle;
    537  1.34.6.1        ad 	mutex_enter(&sc->sc_intr_lock);
    538  1.34.6.1        ad 
    539       1.1  augustss 	intrstat = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
    540       1.1  augustss 	    CMPCI_REG_INTR_STATUS);
    541       1.1  augustss 
    542  1.34.6.1        ad 	if (!(intrstat & CMPCI_REG_ANY_INTR)) {
    543  1.34.6.1        ad 		mutex_exit(&sc->sc_intr_lock);
    544       1.1  augustss 		return 0;
    545  1.34.6.1        ad 	}
    546       1.1  augustss 
    547       1.8     itohy 	delay(10);
    548       1.8     itohy 
    549       1.1  augustss 	/* disable and reset intr */
    550       1.1  augustss 	if (intrstat & CMPCI_REG_CH0_INTR)
    551       1.1  augustss 		cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL,
    552       1.1  augustss 		   CMPCI_REG_CH0_INTR_ENABLE);
    553       1.1  augustss 	if (intrstat & CMPCI_REG_CH1_INTR)
    554       1.1  augustss 		cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL,
    555       1.1  augustss 		    CMPCI_REG_CH1_INTR_ENABLE);
    556       1.1  augustss 
    557       1.1  augustss 	if (intrstat & CMPCI_REG_CH0_INTR) {
    558       1.1  augustss 		if (sc->sc_play.intr != NULL)
    559       1.1  augustss 			(*sc->sc_play.intr)(sc->sc_play.intr_arg);
    560       1.1  augustss 	}
    561       1.1  augustss 	if (intrstat & CMPCI_REG_CH1_INTR) {
    562       1.1  augustss 		if (sc->sc_rec.intr != NULL)
    563       1.1  augustss 			(*sc->sc_rec.intr)(sc->sc_rec.intr_arg);
    564       1.1  augustss 	}
    565       1.1  augustss 
    566       1.1  augustss 	/* enable intr */
    567       1.1  augustss 	if (intrstat & CMPCI_REG_CH0_INTR)
    568       1.1  augustss 		cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL,
    569       1.1  augustss 		    CMPCI_REG_CH0_INTR_ENABLE);
    570       1.1  augustss 	if (intrstat & CMPCI_REG_CH1_INTR)
    571       1.1  augustss 		cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL,
    572       1.1  augustss 		    CMPCI_REG_CH1_INTR_ENABLE);
    573       1.8     itohy 
    574       1.8     itohy #if NMPU > 0
    575       1.8     itohy 	if (intrstat & CMPCI_REG_UART_INTR && sc->sc_mpudev != NULL)
    576       1.8     itohy 		mpu_intr(sc->sc_mpudev);
    577       1.8     itohy #endif
    578       1.8     itohy 
    579  1.34.6.1        ad 	mutex_exit(&sc->sc_intr_lock);
    580       1.8     itohy 	return 1;
    581       1.1  augustss }
    582       1.1  augustss 
    583       1.1  augustss static int
    584      1.34  christos cmpci_query_encoding(void *handle, struct audio_encoding *fp)
    585       1.1  augustss {
    586      1.28      kent 
    587       1.1  augustss 	switch (fp->index) {
    588       1.1  augustss 	case 0:
    589       1.1  augustss 		strcpy(fp->name, AudioEulinear);
    590       1.1  augustss 		fp->encoding = AUDIO_ENCODING_ULINEAR;
    591       1.1  augustss 		fp->precision = 8;
    592       1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    593       1.1  augustss 		break;
    594       1.1  augustss 	case 1:
    595       1.1  augustss 		strcpy(fp->name, AudioEmulaw);
    596       1.1  augustss 		fp->encoding = AUDIO_ENCODING_ULAW;
    597       1.1  augustss 		fp->precision = 8;
    598       1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    599       1.1  augustss 		break;
    600       1.1  augustss 	case 2:
    601       1.1  augustss 		strcpy(fp->name, AudioEalaw);
    602       1.1  augustss 		fp->encoding = AUDIO_ENCODING_ALAW;
    603       1.1  augustss 		fp->precision = 8;
    604       1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    605       1.1  augustss 		break;
    606       1.1  augustss 	case 3:
    607       1.1  augustss 		strcpy(fp->name, AudioEslinear);
    608       1.1  augustss 		fp->encoding = AUDIO_ENCODING_SLINEAR;
    609       1.1  augustss 		fp->precision = 8;
    610       1.1  augustss 		fp->flags = 0;
    611       1.1  augustss 		break;
    612       1.1  augustss 	case 4:
    613       1.1  augustss 		strcpy(fp->name, AudioEslinear_le);
    614       1.1  augustss 		fp->encoding = AUDIO_ENCODING_SLINEAR_LE;
    615       1.1  augustss 		fp->precision = 16;
    616       1.1  augustss 		fp->flags = 0;
    617       1.1  augustss 		break;
    618       1.1  augustss 	case 5:
    619       1.1  augustss 		strcpy(fp->name, AudioEulinear_le);
    620       1.1  augustss 		fp->encoding = AUDIO_ENCODING_ULINEAR_LE;
    621       1.1  augustss 		fp->precision = 16;
    622       1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    623       1.1  augustss 		break;
    624       1.1  augustss 	case 6:
    625       1.1  augustss 		strcpy(fp->name, AudioEslinear_be);
    626       1.1  augustss 		fp->encoding = AUDIO_ENCODING_SLINEAR_BE;
    627       1.1  augustss 		fp->precision = 16;
    628       1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    629       1.1  augustss 		break;
    630       1.1  augustss 	case 7:
    631       1.1  augustss 		strcpy(fp->name, AudioEulinear_be);
    632       1.1  augustss 		fp->encoding = AUDIO_ENCODING_ULINEAR_BE;
    633       1.1  augustss 		fp->precision = 16;
    634       1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    635       1.1  augustss 		break;
    636       1.1  augustss 	default:
    637       1.1  augustss 		return EINVAL;
    638       1.1  augustss 	}
    639       1.1  augustss 	return 0;
    640       1.1  augustss }
    641       1.1  augustss 
    642       1.1  augustss 
    643       1.1  augustss static int
    644      1.34  christos cmpci_set_params(void *handle, int setmode, int usemode,
    645      1.33  christos     audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil,
    646      1.33  christos     stream_filter_list_t *rfil)
    647       1.1  augustss {
    648       1.1  augustss 	int i;
    649      1.28      kent 	struct cmpci_softc *sc;
    650       1.1  augustss 
    651      1.28      kent 	sc = handle;
    652       1.1  augustss 	for (i = 0; i < 2; i++) {
    653       1.1  augustss 		int md_format;
    654       1.1  augustss 		int md_divide;
    655       1.1  augustss 		int md_index;
    656       1.1  augustss 		int mode;
    657      1.27      kent 		audio_params_t *p;
    658      1.27      kent 		stream_filter_list_t *fil;
    659      1.27      kent 		int ind;
    660      1.10     itohy 
    661       1.1  augustss 		switch (i) {
    662       1.1  augustss 		case 0:
    663       1.1  augustss 			mode = AUMODE_PLAY;
    664       1.1  augustss 			p = play;
    665      1.27      kent 			fil = pfil;
    666       1.1  augustss 			break;
    667       1.1  augustss 		case 1:
    668       1.1  augustss 			mode = AUMODE_RECORD;
    669       1.1  augustss 			p = rec;
    670      1.27      kent 			fil = rfil;
    671       1.1  augustss 			break;
    672      1.19  christos 		default:
    673      1.19  christos 			return EINVAL;
    674       1.1  augustss 		}
    675      1.10     itohy 
    676       1.1  augustss 		if (!(setmode & mode))
    677       1.1  augustss 			continue;
    678       1.1  augustss 
    679      1.27      kent 		md_index = cmpci_rate_to_index(p->sample_rate);
    680      1.27      kent 		md_divide = cmpci_index_to_divider(md_index);
    681      1.27      kent 		p->sample_rate = cmpci_index_to_rate(md_index);
    682      1.27      kent 		DPRINTF(("%s: sample:%u, divider=%d\n",
    683      1.27      kent 			 sc->sc_dev.dv_xname, p->sample_rate, md_divide));
    684      1.27      kent 
    685      1.27      kent 		ind = auconv_set_converter(cmpci_formats, CMPCI_NFORMATS,
    686      1.27      kent 					   mode, p, FALSE, fil);
    687      1.27      kent 		if (ind < 0)
    688      1.27      kent 			return EINVAL;
    689      1.27      kent 		if (fil->req_size > 0)
    690      1.27      kent 			p = &fil->filters[0].param;
    691       1.1  augustss 
    692       1.1  augustss 		/* format */
    693      1.27      kent 		md_format = p->channels == 1
    694      1.27      kent 			? CMPCI_REG_FORMAT_MONO : CMPCI_REG_FORMAT_STEREO;
    695      1.27      kent 		md_format |= p->precision == 16
    696      1.27      kent 			? CMPCI_REG_FORMAT_16BIT : CMPCI_REG_FORMAT_8BIT;
    697      1.27      kent 		if (mode & AUMODE_PLAY) {
    698       1.1  augustss 			cmpci_reg_partial_write_4(sc,
    699       1.7  tshiozak 			   CMPCI_REG_CHANNEL_FORMAT,
    700       1.7  tshiozak 			   CMPCI_REG_CH0_FORMAT_SHIFT,
    701       1.7  tshiozak 			   CMPCI_REG_CH0_FORMAT_MASK, md_format);
    702       1.1  augustss 			cmpci_reg_partial_write_4(sc,
    703       1.1  augustss 			    CMPCI_REG_FUNC_1, CMPCI_REG_DAC_FS_SHIFT,
    704       1.1  augustss 			    CMPCI_REG_DAC_FS_MASK, md_divide);
    705       1.7  tshiozak 			sc->sc_play.md_divide = md_divide;
    706       1.1  augustss 		} else {
    707       1.1  augustss 			cmpci_reg_partial_write_4(sc,
    708      1.27      kent 			   CMPCI_REG_CHANNEL_FORMAT,
    709      1.27      kent 			   CMPCI_REG_CH1_FORMAT_SHIFT,
    710      1.27      kent 			   CMPCI_REG_CH1_FORMAT_MASK, md_format);
    711      1.27      kent 			cmpci_reg_partial_write_4(sc,
    712       1.1  augustss 			    CMPCI_REG_FUNC_1, CMPCI_REG_ADC_FS_SHIFT,
    713       1.1  augustss 			    CMPCI_REG_ADC_FS_MASK, md_divide);
    714       1.7  tshiozak 			sc->sc_rec.md_divide = md_divide;
    715       1.1  augustss 		}
    716      1.10     itohy 		cmpci_set_out_ports(sc);
    717      1.10     itohy 		cmpci_set_in_ports(sc);
    718       1.1  augustss 	}
    719       1.1  augustss 	return 0;
    720       1.1  augustss }
    721       1.1  augustss 
    722       1.1  augustss /* ARGSUSED */
    723       1.1  augustss static int
    724      1.34  christos cmpci_round_blocksize(void *handle, int block,
    725      1.34  christos     int mode, const audio_params_t *param)
    726       1.1  augustss {
    727      1.28      kent 
    728      1.28      kent 	return block & -4;
    729       1.1  augustss }
    730       1.1  augustss 
    731       1.1  augustss static int
    732      1.28      kent cmpci_halt_output(void *handle)
    733       1.1  augustss {
    734      1.28      kent 	struct cmpci_softc *sc;
    735       1.1  augustss 
    736      1.28      kent 	sc = handle;
    737       1.1  augustss 	sc->sc_play.intr = NULL;
    738       1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE);
    739       1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE);
    740       1.1  augustss 	/* wait for reset DMA */
    741       1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET);
    742       1.1  augustss 	delay(10);
    743       1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET);
    744      1.10     itohy 
    745       1.1  augustss 	return 0;
    746       1.1  augustss }
    747       1.1  augustss 
    748       1.1  augustss static int
    749      1.28      kent cmpci_halt_input(void *handle)
    750       1.1  augustss {
    751      1.28      kent 	struct cmpci_softc *sc;
    752      1.10     itohy 
    753      1.28      kent 	sc = handle;
    754       1.1  augustss 	sc->sc_rec.intr = NULL;
    755       1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE);
    756       1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE);
    757       1.1  augustss 	/* wait for reset DMA */
    758       1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET);
    759       1.1  augustss 	delay(10);
    760       1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET);
    761      1.10     itohy 
    762       1.1  augustss 	return 0;
    763       1.1  augustss }
    764       1.1  augustss 
    765       1.1  augustss /* get audio device information */
    766       1.1  augustss static int
    767      1.28      kent cmpci_getdev(void *handle, struct audio_device *ad)
    768       1.1  augustss {
    769      1.28      kent 	struct cmpci_softc *sc;
    770       1.1  augustss 
    771      1.28      kent 	sc = handle;
    772       1.1  augustss 	strncpy(ad->name, "CMI PCI Audio", sizeof(ad->name));
    773       1.7  tshiozak 	snprintf(ad->version, sizeof(ad->version), "0x%02x",
    774       1.7  tshiozak 		 PCI_REVISION(sc->sc_class));
    775       1.7  tshiozak 	switch (PCI_PRODUCT(sc->sc_id)) {
    776       1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338A:
    777       1.1  augustss 		strncpy(ad->config, "CMI8338A", sizeof(ad->config));
    778       1.1  augustss 		break;
    779       1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338B:
    780       1.1  augustss 		strncpy(ad->config, "CMI8338B", sizeof(ad->config));
    781       1.1  augustss 		break;
    782       1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8738:
    783       1.1  augustss 		strncpy(ad->config, "CMI8738", sizeof(ad->config));
    784       1.1  augustss 		break;
    785       1.7  tshiozak 	case PCI_PRODUCT_CMEDIA_CMI8738B:
    786       1.7  tshiozak 		strncpy(ad->config, "CMI8738B", sizeof(ad->config));
    787       1.7  tshiozak 		break;
    788       1.1  augustss 	default:
    789       1.1  augustss 		strncpy(ad->config, "unknown", sizeof(ad->config));
    790       1.1  augustss 	}
    791       1.1  augustss 
    792       1.1  augustss 	return 0;
    793       1.1  augustss }
    794       1.1  augustss 
    795       1.1  augustss /* mixer device information */
    796       1.1  augustss int
    797      1.28      kent cmpci_query_devinfo(void *handle, mixer_devinfo_t *dip)
    798       1.1  augustss {
    799      1.10     itohy 	static const char *const mixer_port_names[] = {
    800      1.10     itohy 		AudioNdac, AudioNfmsynth, AudioNcd, AudioNline, AudioNaux,
    801      1.10     itohy 		AudioNmicrophone
    802      1.10     itohy 	};
    803      1.10     itohy 	static const char *const mixer_classes[] = {
    804      1.10     itohy 		AudioCinputs, AudioCoutputs, AudioCrecord, CmpciCplayback,
    805      1.10     itohy 		CmpciCspdif
    806      1.10     itohy 	};
    807      1.28      kent 	struct cmpci_softc *sc;
    808      1.10     itohy 	int i;
    809      1.10     itohy 
    810      1.28      kent 	sc = handle;
    811      1.10     itohy 	dip->prev = dip->next = AUDIO_MIXER_LAST;
    812      1.10     itohy 
    813       1.1  augustss 	switch (dip->index) {
    814      1.10     itohy 	case CMPCI_INPUT_CLASS:
    815      1.10     itohy 	case CMPCI_OUTPUT_CLASS:
    816      1.10     itohy 	case CMPCI_RECORD_CLASS:
    817      1.10     itohy 	case CMPCI_PLAYBACK_CLASS:
    818      1.10     itohy 	case CMPCI_SPDIF_CLASS:
    819      1.10     itohy 		dip->type = AUDIO_MIXER_CLASS;
    820      1.10     itohy 		dip->mixer_class = dip->index;
    821      1.10     itohy 		strcpy(dip->label.name,
    822      1.10     itohy 		    mixer_classes[dip->index - CMPCI_INPUT_CLASS]);
    823       1.1  augustss 		return 0;
    824      1.10     itohy 
    825      1.10     itohy 	case CMPCI_AUX_IN_VOL:
    826      1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_REG_AUX_VALBITS);
    827      1.10     itohy 		goto vol1;
    828      1.10     itohy 	case CMPCI_DAC_VOL:
    829       1.1  augustss 	case CMPCI_FM_VOL:
    830      1.10     itohy 	case CMPCI_CD_VOL:
    831      1.10     itohy 	case CMPCI_LINE_IN_VOL:
    832      1.10     itohy 	case CMPCI_MIC_VOL:
    833      1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS);
    834      1.10     itohy 	vol1:	dip->mixer_class = CMPCI_INPUT_CLASS;
    835      1.10     itohy 		dip->next = dip->index + 6;	/* CMPCI_xxx_MUTE */
    836      1.10     itohy 		strcpy(dip->label.name, mixer_port_names[dip->index]);
    837      1.10     itohy 		dip->un.v.num_channels = (dip->index == CMPCI_MIC_VOL ? 1 : 2);
    838      1.10     itohy 	vol:
    839       1.1  augustss 		dip->type = AUDIO_MIXER_VALUE;
    840       1.1  augustss 		strcpy(dip->un.v.units.name, AudioNvolume);
    841       1.1  augustss 		return 0;
    842      1.10     itohy 
    843      1.10     itohy 	case CMPCI_MIC_MUTE:
    844      1.10     itohy 		dip->next = CMPCI_MIC_PREAMP;
    845      1.10     itohy 		/* FALLTHROUGH */
    846      1.10     itohy 	case CMPCI_DAC_MUTE:
    847      1.10     itohy 	case CMPCI_FM_MUTE:
    848      1.10     itohy 	case CMPCI_CD_MUTE:
    849      1.10     itohy 	case CMPCI_LINE_IN_MUTE:
    850      1.10     itohy 	case CMPCI_AUX_IN_MUTE:
    851      1.10     itohy 		dip->prev = dip->index - 6;	/* CMPCI_xxx_VOL */
    852       1.1  augustss 		dip->mixer_class = CMPCI_INPUT_CLASS;
    853      1.10     itohy 		strcpy(dip->label.name, AudioNmute);
    854      1.10     itohy 		goto on_off;
    855      1.10     itohy 	on_off:
    856      1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    857      1.10     itohy 		dip->un.e.num_mem = 2;
    858      1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
    859      1.10     itohy 		dip->un.e.member[0].ord = 0;
    860      1.10     itohy 		strcpy(dip->un.e.member[1].label.name, AudioNon);
    861      1.10     itohy 		dip->un.e.member[1].ord = 1;
    862       1.1  augustss 		return 0;
    863      1.10     itohy 
    864      1.10     itohy 	case CMPCI_MIC_PREAMP:
    865       1.1  augustss 		dip->mixer_class = CMPCI_INPUT_CLASS;
    866      1.10     itohy 		dip->prev = CMPCI_MIC_MUTE;
    867      1.10     itohy 		strcpy(dip->label.name, AudioNpreamp);
    868      1.10     itohy 		goto on_off;
    869      1.10     itohy 	case CMPCI_PCSPEAKER:
    870       1.1  augustss 		dip->mixer_class = CMPCI_INPUT_CLASS;
    871      1.10     itohy 		strcpy(dip->label.name, AudioNspeaker);
    872       1.1  augustss 		dip->un.v.num_channels = 1;
    873      1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_SPEAKER_VALBITS);
    874      1.10     itohy 		goto vol;
    875       1.1  augustss 	case CMPCI_RECORD_SOURCE:
    876       1.1  augustss 		dip->mixer_class = CMPCI_RECORD_CLASS;
    877       1.1  augustss 		strcpy(dip->label.name, AudioNsource);
    878       1.1  augustss 		dip->type = AUDIO_MIXER_SET;
    879      1.10     itohy 		dip->un.s.num_mem = 7;
    880       1.1  augustss 		strcpy(dip->un.s.member[0].label.name, AudioNmicrophone);
    881       1.8     itohy 		dip->un.s.member[0].mask = CMPCI_RECORD_SOURCE_MIC;
    882       1.1  augustss 		strcpy(dip->un.s.member[1].label.name, AudioNcd);
    883       1.8     itohy 		dip->un.s.member[1].mask = CMPCI_RECORD_SOURCE_CD;
    884       1.1  augustss 		strcpy(dip->un.s.member[2].label.name, AudioNline);
    885       1.8     itohy 		dip->un.s.member[2].mask = CMPCI_RECORD_SOURCE_LINE_IN;
    886      1.10     itohy 		strcpy(dip->un.s.member[3].label.name, AudioNaux);
    887      1.10     itohy 		dip->un.s.member[3].mask = CMPCI_RECORD_SOURCE_AUX_IN;
    888      1.10     itohy 		strcpy(dip->un.s.member[4].label.name, AudioNwave);
    889      1.10     itohy 		dip->un.s.member[4].mask = CMPCI_RECORD_SOURCE_WAVE;
    890      1.10     itohy 		strcpy(dip->un.s.member[5].label.name, AudioNfmsynth);
    891      1.10     itohy 		dip->un.s.member[5].mask = CMPCI_RECORD_SOURCE_FM;
    892      1.10     itohy 		strcpy(dip->un.s.member[6].label.name, CmpciNspdif);
    893      1.10     itohy 		dip->un.s.member[6].mask = CMPCI_RECORD_SOURCE_SPDIF;
    894       1.1  augustss 		return 0;
    895      1.10     itohy 	case CMPCI_MIC_RECVOL:
    896       1.1  augustss 		dip->mixer_class = CMPCI_RECORD_CLASS;
    897      1.10     itohy 		strcpy(dip->label.name, AudioNmicrophone);
    898       1.1  augustss 		dip->un.v.num_channels = 1;
    899      1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_REG_ADMIC_VALBITS);
    900      1.10     itohy 		goto vol;
    901      1.10     itohy 
    902      1.10     itohy 	case CMPCI_PLAYBACK_MODE:
    903      1.10     itohy 		dip->mixer_class = CMPCI_PLAYBACK_CLASS;
    904      1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    905      1.10     itohy 		strcpy(dip->label.name, AudioNmode);
    906      1.10     itohy 		dip->un.e.num_mem = 2;
    907      1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNdac);
    908      1.10     itohy 		dip->un.e.member[0].ord = CMPCI_PLAYBACK_MODE_WAVE;
    909      1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNspdif);
    910      1.10     itohy 		dip->un.e.member[1].ord = CMPCI_PLAYBACK_MODE_SPDIF;
    911       1.1  augustss 		return 0;
    912      1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
    913      1.10     itohy 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    914      1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    915      1.10     itohy 		dip->next = CMPCI_SPDIF_IN_PHASE;
    916       1.1  augustss 		strcpy(dip->label.name, AudioNinput);
    917      1.10     itohy 		i = 0;
    918      1.10     itohy 		strcpy(dip->un.e.member[i].label.name, CmpciNspdin1);
    919      1.10     itohy 		dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN1;
    920      1.10     itohy 		if (CMPCI_ISCAP(sc, 2ND_SPDIN)) {
    921      1.10     itohy 			strcpy(dip->un.e.member[i].label.name, CmpciNspdin2);
    922      1.10     itohy 			dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN2;
    923      1.10     itohy 		}
    924      1.10     itohy 		strcpy(dip->un.e.member[i].label.name, CmpciNspdout);
    925      1.10     itohy 		dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDOUT;
    926      1.10     itohy 		dip->un.e.num_mem = i;
    927      1.10     itohy 		return 0;
    928      1.10     itohy 	case CMPCI_SPDIF_IN_PHASE:
    929      1.10     itohy 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    930      1.10     itohy 		dip->prev = CMPCI_SPDIF_IN_SELECT;
    931      1.10     itohy 		strcpy(dip->label.name, CmpciNphase);
    932      1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    933      1.10     itohy 		dip->un.e.num_mem = 2;
    934      1.10     itohy 		strcpy(dip->un.e.member[0].label.name, CmpciNpositive);
    935      1.10     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_IN_PHASE_POSITIVE;
    936      1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNnegative);
    937      1.10     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_IN_PHASE_NEGATIVE;
    938       1.1  augustss 		return 0;
    939      1.10     itohy 	case CMPCI_SPDIF_LOOP:
    940      1.10     itohy 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    941      1.10     itohy 		dip->next = CMPCI_SPDIF_OUT_PLAYBACK;
    942       1.1  augustss 		strcpy(dip->label.name, AudioNoutput);
    943       1.1  augustss 		dip->type = AUDIO_MIXER_ENUM;
    944      1.10     itohy 		dip->un.e.num_mem = 2;
    945      1.10     itohy 		strcpy(dip->un.e.member[0].label.name, CmpciNplayback);
    946      1.10     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_LOOP_OFF;
    947      1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNspdin);
    948      1.10     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_LOOP_ON;
    949       1.7  tshiozak 		return 0;
    950      1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
    951       1.7  tshiozak 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    952      1.10     itohy 		dip->prev = CMPCI_SPDIF_LOOP;
    953      1.10     itohy 		dip->next = CMPCI_SPDIF_OUT_VOLTAGE;
    954      1.10     itohy 		strcpy(dip->label.name, CmpciNplayback);
    955      1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    956      1.10     itohy 		dip->un.e.num_mem = 2;
    957      1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNwave);
    958      1.10     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_PLAYBACK_WAVE;
    959      1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNlegacy);
    960      1.10     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_PLAYBACK_LEGACY;
    961       1.7  tshiozak 		return 0;
    962       1.7  tshiozak 	case CMPCI_SPDIF_OUT_VOLTAGE:
    963       1.7  tshiozak 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    964      1.10     itohy 		dip->prev = CMPCI_SPDIF_OUT_PLAYBACK;
    965      1.10     itohy 		strcpy(dip->label.name, CmpciNvoltage);
    966       1.7  tshiozak 		dip->type = AUDIO_MIXER_ENUM;
    967       1.7  tshiozak 		dip->un.e.num_mem = 2;
    968      1.21     itohy 		strcpy(dip->un.e.member[0].label.name, CmpciNhigh_v);
    969      1.21     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_VOLTAGE_HIGH;
    970      1.21     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNlow_v);
    971      1.21     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_VOLTAGE_LOW;
    972       1.7  tshiozak 		return 0;
    973      1.10     itohy 	case CMPCI_MONITOR_DAC:
    974       1.7  tshiozak 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    975      1.10     itohy 		strcpy(dip->label.name, AudioNmonitor);
    976      1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    977      1.10     itohy 		dip->un.e.num_mem = 3;
    978      1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
    979      1.10     itohy 		dip->un.e.member[0].ord = CMPCI_MONITOR_DAC_OFF;
    980      1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNspdin);
    981      1.10     itohy 		dip->un.e.member[1].ord = CMPCI_MONITOR_DAC_SPDIN;
    982      1.10     itohy 		strcpy(dip->un.e.member[2].label.name, CmpciNspdout);
    983      1.10     itohy 		dip->un.e.member[2].ord = CMPCI_MONITOR_DAC_SPDOUT;
    984      1.10     itohy 		return 0;
    985      1.10     itohy 
    986      1.10     itohy 	case CMPCI_MASTER_VOL:
    987      1.10     itohy 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
    988      1.10     itohy 		strcpy(dip->label.name, AudioNmaster);
    989      1.10     itohy 		dip->un.v.num_channels = 2;
    990      1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS);
    991      1.10     itohy 		goto vol;
    992       1.7  tshiozak 	case CMPCI_REAR:
    993       1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
    994       1.7  tshiozak 		dip->next = CMPCI_INDIVIDUAL;
    995       1.7  tshiozak 		strcpy(dip->label.name, CmpciNrear);
    996       1.7  tshiozak 		goto on_off;
    997       1.7  tshiozak 	case CMPCI_INDIVIDUAL:
    998       1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
    999       1.7  tshiozak 		dip->prev = CMPCI_REAR;
   1000       1.7  tshiozak 		dip->next = CMPCI_REVERSE;
   1001       1.7  tshiozak 		strcpy(dip->label.name, CmpciNindividual);
   1002       1.7  tshiozak 		goto on_off;
   1003       1.7  tshiozak 	case CMPCI_REVERSE:
   1004       1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
   1005       1.7  tshiozak 		dip->prev = CMPCI_INDIVIDUAL;
   1006       1.7  tshiozak 		strcpy(dip->label.name, CmpciNreverse);
   1007      1.10     itohy 		goto on_off;
   1008       1.7  tshiozak 	case CMPCI_SURROUND:
   1009       1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
   1010       1.7  tshiozak 		strcpy(dip->label.name, CmpciNsurround);
   1011       1.7  tshiozak 		goto on_off;
   1012      1.10     itohy 	}
   1013       1.7  tshiozak 
   1014       1.1  augustss 	return ENXIO;
   1015       1.1  augustss }
   1016       1.1  augustss 
   1017       1.1  augustss static int
   1018      1.28      kent cmpci_alloc_dmamem(struct cmpci_softc *sc, size_t size, struct malloc_type *type,
   1019      1.28      kent 		   int flags, caddr_t *r_addr)
   1020       1.1  augustss {
   1021      1.28      kent 	int error;
   1022       1.1  augustss 	struct cmpci_dmanode *n;
   1023       1.1  augustss 	int w;
   1024       1.1  augustss 
   1025      1.28      kent 	error = 0;
   1026       1.1  augustss 	n = malloc(sizeof(struct cmpci_dmanode), type, flags);
   1027       1.1  augustss 	if (n == NULL) {
   1028       1.1  augustss 		error = ENOMEM;
   1029       1.1  augustss 		goto quit;
   1030       1.1  augustss 	}
   1031       1.1  augustss 
   1032       1.1  augustss 	w = (flags & M_NOWAIT) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK;
   1033       1.1  augustss #define CMPCI_DMABUF_ALIGN    0x4
   1034       1.1  augustss #define CMPCI_DMABUF_BOUNDARY 0x0
   1035       1.1  augustss 	n->cd_tag = sc->sc_dmat;
   1036       1.1  augustss 	n->cd_size = size;
   1037       1.1  augustss 	error = bus_dmamem_alloc(n->cd_tag, n->cd_size,
   1038       1.1  augustss 	    CMPCI_DMABUF_ALIGN, CMPCI_DMABUF_BOUNDARY, n->cd_segs,
   1039       1.7  tshiozak 	    sizeof(n->cd_segs)/sizeof(n->cd_segs[0]), &n->cd_nsegs, w);
   1040       1.1  augustss 	if (error)
   1041       1.1  augustss 		goto mfree;
   1042       1.1  augustss 	error = bus_dmamem_map(n->cd_tag, n->cd_segs, n->cd_nsegs, n->cd_size,
   1043       1.1  augustss 	    &n->cd_addr, w | BUS_DMA_COHERENT);
   1044       1.1  augustss 	if (error)
   1045       1.1  augustss 		goto dmafree;
   1046       1.1  augustss 	error = bus_dmamap_create(n->cd_tag, n->cd_size, 1, n->cd_size, 0,
   1047       1.1  augustss 	    w, &n->cd_map);
   1048       1.1  augustss 	if (error)
   1049       1.1  augustss 		goto unmap;
   1050       1.1  augustss 	error = bus_dmamap_load(n->cd_tag, n->cd_map, n->cd_addr, n->cd_size,
   1051       1.1  augustss 	    NULL, w);
   1052       1.1  augustss 	if (error)
   1053       1.1  augustss 		goto destroy;
   1054      1.10     itohy 
   1055       1.1  augustss 	n->cd_next = sc->sc_dmap;
   1056       1.1  augustss 	sc->sc_dmap = n;
   1057       1.1  augustss 	*r_addr = KVADDR(n);
   1058       1.1  augustss 	return 0;
   1059      1.10     itohy 
   1060       1.1  augustss  destroy:
   1061       1.1  augustss 	bus_dmamap_destroy(n->cd_tag, n->cd_map);
   1062       1.1  augustss  unmap:
   1063       1.1  augustss 	bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size);
   1064       1.1  augustss  dmafree:
   1065       1.1  augustss 	bus_dmamem_free(n->cd_tag,
   1066       1.1  augustss 			n->cd_segs, sizeof(n->cd_segs)/sizeof(n->cd_segs[0]));
   1067       1.1  augustss  mfree:
   1068       1.1  augustss 	free(n, type);
   1069       1.1  augustss  quit:
   1070       1.1  augustss 	return error;
   1071       1.1  augustss }
   1072       1.1  augustss 
   1073       1.1  augustss static int
   1074      1.28      kent cmpci_free_dmamem(struct cmpci_softc *sc, caddr_t addr, struct malloc_type *type)
   1075       1.1  augustss {
   1076       1.1  augustss 	struct cmpci_dmanode **nnp;
   1077      1.10     itohy 
   1078       1.1  augustss 	for (nnp = &sc->sc_dmap; *nnp; nnp= &(*nnp)->cd_next) {
   1079       1.1  augustss 		if ((*nnp)->cd_addr == addr) {
   1080       1.1  augustss 			struct cmpci_dmanode *n = *nnp;
   1081       1.1  augustss 			bus_dmamap_unload(n->cd_tag, n->cd_map);
   1082       1.1  augustss 			bus_dmamap_destroy(n->cd_tag, n->cd_map);
   1083       1.1  augustss 			bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size);
   1084       1.1  augustss 			bus_dmamem_free(n->cd_tag, n->cd_segs,
   1085       1.1  augustss 			    sizeof(n->cd_segs)/sizeof(n->cd_segs[0]));
   1086       1.1  augustss 			free(n, type);
   1087       1.1  augustss 			return 0;
   1088       1.1  augustss 		}
   1089       1.1  augustss 	}
   1090       1.1  augustss 	return -1;
   1091       1.1  augustss }
   1092       1.1  augustss 
   1093       1.1  augustss static struct cmpci_dmanode *
   1094      1.28      kent cmpci_find_dmamem(struct cmpci_softc *sc, caddr_t addr)
   1095       1.1  augustss {
   1096       1.1  augustss 	struct cmpci_dmanode *p;
   1097      1.10     itohy 
   1098      1.28      kent 	for (p = sc->sc_dmap; p; p = p->cd_next)
   1099      1.28      kent 		if (KVADDR(p) == (void *)addr)
   1100       1.1  augustss 			break;
   1101       1.1  augustss 	return p;
   1102       1.1  augustss }
   1103       1.1  augustss 
   1104       1.1  augustss #if 0
   1105       1.1  augustss static void
   1106      1.28      kent cmpci_print_dmamem(struct cmpci_dmanode *);
   1107       1.1  augustss static void
   1108      1.28      kent cmpci_print_dmamem(struct cmpci_dmanode *p)
   1109       1.1  augustss {
   1110      1.28      kent 
   1111       1.1  augustss 	DPRINTF(("DMA at virt:%p, dmaseg:%p, mapseg:%p, size:%p\n",
   1112       1.1  augustss 		 (void *)p->cd_addr, (void *)p->cd_segs[0].ds_addr,
   1113       1.1  augustss 		 (void *)DMAADDR(p), (void *)p->cd_size));
   1114       1.1  augustss }
   1115       1.1  augustss #endif /* DEBUG */
   1116       1.1  augustss 
   1117       1.1  augustss static void *
   1118      1.34  christos cmpci_allocm(void *handle, int direction, size_t size,
   1119      1.28      kent 	     struct malloc_type *type, int flags)
   1120       1.1  augustss {
   1121       1.1  augustss 	caddr_t addr;
   1122      1.10     itohy 
   1123      1.31       mrg 	addr = NULL;	/* XXX gcc */
   1124      1.31       mrg 
   1125      1.28      kent 	if (cmpci_alloc_dmamem(handle, size, type, flags, &addr))
   1126       1.1  augustss 		return NULL;
   1127       1.1  augustss 	return addr;
   1128       1.1  augustss }
   1129       1.1  augustss 
   1130       1.1  augustss static void
   1131      1.28      kent cmpci_freem(void *handle, void *addr, struct malloc_type *type)
   1132       1.1  augustss {
   1133      1.10     itohy 
   1134      1.28      kent 	cmpci_free_dmamem(handle, addr, type);
   1135       1.1  augustss }
   1136       1.1  augustss 
   1137       1.1  augustss #define MAXVAL 256
   1138       1.1  augustss static int
   1139      1.28      kent cmpci_adjust(int val, int mask)
   1140       1.1  augustss {
   1141      1.28      kent 
   1142       1.1  augustss 	val += (MAXVAL - mask) >> 1;
   1143       1.1  augustss 	if (val >= MAXVAL)
   1144       1.1  augustss 		val = MAXVAL-1;
   1145       1.1  augustss 	return val & mask;
   1146       1.1  augustss }
   1147       1.1  augustss 
   1148       1.1  augustss static void
   1149      1.28      kent cmpci_set_mixer_gain(struct cmpci_softc *sc, int port)
   1150       1.1  augustss {
   1151      1.23     itohy 	int src;
   1152      1.10     itohy 	int bits, mask;
   1153       1.1  augustss 
   1154       1.1  augustss 	switch (port) {
   1155       1.1  augustss 	case CMPCI_MIC_VOL:
   1156      1.10     itohy 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_MIC,
   1157      1.10     itohy 		    CMPCI_ADJUST_MIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
   1158      1.23     itohy 		return;
   1159       1.1  augustss 	case CMPCI_MASTER_VOL:
   1160       1.1  augustss 		src = CMPCI_SB16_MIXER_MASTER_L;
   1161       1.1  augustss 		break;
   1162       1.1  augustss 	case CMPCI_LINE_IN_VOL:
   1163       1.1  augustss 		src = CMPCI_SB16_MIXER_LINE_L;
   1164       1.1  augustss 		break;
   1165      1.10     itohy 	case CMPCI_AUX_IN_VOL:
   1166      1.10     itohy 		bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MIXER_AUX,
   1167      1.10     itohy 		    CMPCI_ADJUST_AUX_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT],
   1168      1.10     itohy 					      sc->sc_gain[port][CMPCI_RIGHT]));
   1169      1.10     itohy 		return;
   1170      1.10     itohy 	case CMPCI_MIC_RECVOL:
   1171      1.10     itohy 		cmpci_reg_partial_write_1(sc, CMPCI_REG_MIXER25,
   1172      1.10     itohy 		    CMPCI_REG_ADMIC_SHIFT, CMPCI_REG_ADMIC_MASK,
   1173      1.10     itohy 		    CMPCI_ADJUST_ADMIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
   1174      1.10     itohy 		return;
   1175      1.10     itohy 	case CMPCI_DAC_VOL:
   1176       1.1  augustss 		src = CMPCI_SB16_MIXER_VOICE_L;
   1177       1.1  augustss 		break;
   1178       1.1  augustss 	case CMPCI_FM_VOL:
   1179       1.1  augustss 		src = CMPCI_SB16_MIXER_FM_L;
   1180       1.1  augustss 		break;
   1181       1.1  augustss 	case CMPCI_CD_VOL:
   1182       1.1  augustss 		src = CMPCI_SB16_MIXER_CDDA_L;
   1183       1.1  augustss 		break;
   1184       1.1  augustss 	case CMPCI_PCSPEAKER:
   1185       1.1  augustss 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_SPEAKER,
   1186      1.10     itohy 		    CMPCI_ADJUST_2_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
   1187      1.10     itohy 		return;
   1188      1.10     itohy 	case CMPCI_MIC_PREAMP:
   1189      1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1190      1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
   1191      1.10     itohy 			    CMPCI_REG_MICGAINZ);
   1192      1.10     itohy 		else
   1193      1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
   1194      1.10     itohy 			    CMPCI_REG_MICGAINZ);
   1195       1.7  tshiozak 		return;
   1196      1.10     itohy 
   1197      1.10     itohy 	case CMPCI_DAC_MUTE:
   1198      1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1199      1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1200      1.10     itohy 			    CMPCI_REG_WSMUTE);
   1201      1.10     itohy 		else
   1202      1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1203      1.10     itohy 			    CMPCI_REG_WSMUTE);
   1204      1.10     itohy 		return;
   1205      1.10     itohy 	case CMPCI_FM_MUTE:
   1206      1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1207      1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1208      1.10     itohy 			    CMPCI_REG_FMMUTE);
   1209      1.10     itohy 		else
   1210      1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1211      1.10     itohy 			    CMPCI_REG_FMMUTE);
   1212      1.10     itohy 		return;
   1213      1.10     itohy 	case CMPCI_AUX_IN_MUTE:
   1214      1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1215      1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
   1216      1.10     itohy 			    CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM);
   1217      1.10     itohy 		else
   1218      1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
   1219      1.10     itohy 			    CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM);
   1220      1.10     itohy 		return;
   1221      1.10     itohy 	case CMPCI_CD_MUTE:
   1222      1.10     itohy 		mask = CMPCI_SB16_SW_CD;
   1223      1.10     itohy 		goto sbmute;
   1224      1.10     itohy 	case CMPCI_MIC_MUTE:
   1225      1.10     itohy 		mask = CMPCI_SB16_SW_MIC;
   1226      1.10     itohy 		goto sbmute;
   1227      1.10     itohy 	case CMPCI_LINE_IN_MUTE:
   1228      1.10     itohy 		mask = CMPCI_SB16_SW_LINE;
   1229      1.10     itohy 	sbmute:
   1230      1.10     itohy 		bits = cmpci_mixerreg_read(sc, CMPCI_SB16_MIXER_OUTMIX);
   1231      1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1232      1.10     itohy 			bits = bits & ~mask;
   1233      1.10     itohy 		else
   1234      1.10     itohy 			bits = bits | mask;
   1235      1.10     itohy 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, bits);
   1236       1.8     itohy 		return;
   1237      1.10     itohy 
   1238      1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
   1239      1.10     itohy 	case CMPCI_MONITOR_DAC:
   1240      1.10     itohy 	case CMPCI_PLAYBACK_MODE:
   1241       1.7  tshiozak 	case CMPCI_SPDIF_LOOP:
   1242      1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
   1243       1.7  tshiozak 		cmpci_set_out_ports(sc);
   1244       1.7  tshiozak 		return;
   1245       1.7  tshiozak 	case CMPCI_SPDIF_OUT_VOLTAGE:
   1246       1.7  tshiozak 		if (CMPCI_ISCAP(sc, SPDOUT_VOLTAGE)) {
   1247      1.10     itohy 			if (sc->sc_gain[CMPCI_SPDIF_OUT_VOLTAGE][CMPCI_LR]
   1248      1.21     itohy 			    == CMPCI_SPDIF_OUT_VOLTAGE_HIGH)
   1249      1.21     itohy 				cmpci_reg_clear_reg_misc(sc, CMPCI_REG_5V);
   1250      1.10     itohy 			else
   1251      1.21     itohy 				cmpci_reg_set_reg_misc(sc, CMPCI_REG_5V);
   1252       1.7  tshiozak 		}
   1253       1.7  tshiozak 		return;
   1254       1.7  tshiozak 	case CMPCI_SURROUND:
   1255       1.7  tshiozak 		if (CMPCI_ISCAP(sc, SURROUND)) {
   1256       1.7  tshiozak 			if (sc->sc_gain[CMPCI_SURROUND][CMPCI_LR])
   1257       1.7  tshiozak 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1258       1.7  tshiozak 						CMPCI_REG_SURROUND);
   1259       1.7  tshiozak 			else
   1260       1.7  tshiozak 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1261       1.7  tshiozak 						  CMPCI_REG_SURROUND);
   1262       1.7  tshiozak 		}
   1263       1.7  tshiozak 		return;
   1264       1.7  tshiozak 	case CMPCI_REAR:
   1265       1.7  tshiozak 		if (CMPCI_ISCAP(sc, REAR)) {
   1266       1.7  tshiozak 			if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
   1267      1.21     itohy 				cmpci_reg_set_reg_misc(sc, CMPCI_REG_N4SPK3D);
   1268       1.7  tshiozak 			else
   1269      1.21     itohy 				cmpci_reg_clear_reg_misc(sc, CMPCI_REG_N4SPK3D);
   1270       1.7  tshiozak 		}
   1271       1.7  tshiozak 		return;
   1272       1.7  tshiozak 	case CMPCI_INDIVIDUAL:
   1273       1.7  tshiozak 		if (CMPCI_ISCAP(sc, INDIVIDUAL_REAR)) {
   1274       1.7  tshiozak 			if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
   1275       1.7  tshiozak 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1276       1.7  tshiozak 						CMPCI_REG_INDIVIDUAL);
   1277       1.7  tshiozak 			else
   1278       1.7  tshiozak 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1279       1.7  tshiozak 						  CMPCI_REG_INDIVIDUAL);
   1280       1.7  tshiozak 		}
   1281       1.7  tshiozak 		return;
   1282       1.7  tshiozak 	case CMPCI_REVERSE:
   1283       1.7  tshiozak 		if (CMPCI_ISCAP(sc, REVERSE_FR)) {
   1284       1.7  tshiozak 			if (sc->sc_gain[CMPCI_REVERSE][CMPCI_LR])
   1285       1.7  tshiozak 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1286       1.7  tshiozak 						CMPCI_REG_REVERSE_FR);
   1287       1.7  tshiozak 			else
   1288       1.7  tshiozak 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1289       1.7  tshiozak 						  CMPCI_REG_REVERSE_FR);
   1290       1.7  tshiozak 		}
   1291       1.7  tshiozak 		return;
   1292       1.7  tshiozak 	case CMPCI_SPDIF_IN_PHASE:
   1293       1.7  tshiozak 		if (CMPCI_ISCAP(sc, SPDIN_PHASE)) {
   1294      1.10     itohy 			if (sc->sc_gain[CMPCI_SPDIF_IN_PHASE][CMPCI_LR]
   1295      1.10     itohy 			    == CMPCI_SPDIF_IN_PHASE_POSITIVE)
   1296      1.10     itohy 				cmpci_reg_clear_1(sc, CMPCI_REG_CHANNEL_FORMAT,
   1297      1.10     itohy 						  CMPCI_REG_SPDIN_PHASE);
   1298      1.10     itohy 			else
   1299       1.8     itohy 				cmpci_reg_set_1(sc, CMPCI_REG_CHANNEL_FORMAT,
   1300       1.8     itohy 						CMPCI_REG_SPDIN_PHASE);
   1301       1.7  tshiozak 		}
   1302       1.1  augustss 		return;
   1303       1.1  augustss 	default:
   1304       1.1  augustss 		return;
   1305       1.1  augustss 	}
   1306      1.10     itohy 
   1307      1.10     itohy 	cmpci_mixerreg_write(sc, src,
   1308      1.10     itohy 	    CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT]));
   1309       1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_L_TO_R(src),
   1310      1.10     itohy 	    CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_RIGHT]));
   1311       1.7  tshiozak }
   1312       1.7  tshiozak 
   1313       1.7  tshiozak static void
   1314      1.28      kent cmpci_set_out_ports(struct cmpci_softc *sc)
   1315       1.7  tshiozak {
   1316      1.28      kent 	uint8_t v;
   1317      1.28      kent 	int enspdout;
   1318      1.10     itohy 
   1319       1.7  tshiozak 	if (!CMPCI_ISCAP(sc, SPDLOOP))
   1320       1.7  tshiozak 		return;
   1321      1.10     itohy 
   1322      1.10     itohy 	/* SPDIF/out select */
   1323      1.10     itohy 	if (sc->sc_gain[CMPCI_SPDIF_LOOP][CMPCI_LR] == CMPCI_SPDIF_LOOP_OFF) {
   1324      1.10     itohy 		/* playback */
   1325      1.10     itohy 		cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP);
   1326      1.10     itohy 	} else {
   1327      1.10     itohy 		/* monitor SPDIF/in */
   1328      1.10     itohy 		cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP);
   1329      1.10     itohy 	}
   1330      1.10     itohy 
   1331      1.10     itohy 	/* SPDIF in select */
   1332      1.10     itohy 	v = sc->sc_gain[CMPCI_SPDIF_IN_SELECT][CMPCI_LR];
   1333      1.10     itohy 	if (v & CMPCI_SPDIFIN_SPDIFIN2)
   1334      1.21     itohy 		cmpci_reg_set_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN);
   1335      1.10     itohy 	else
   1336      1.21     itohy 		cmpci_reg_clear_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN);
   1337      1.10     itohy 	if (v & CMPCI_SPDIFIN_SPDIFOUT)
   1338      1.21     itohy 		cmpci_reg_set_reg_misc(sc, CMPCI_REG_SPDFLOOPI);
   1339      1.10     itohy 	else
   1340      1.21     itohy 		cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPDFLOOPI);
   1341      1.10     itohy 
   1342      1.28      kent 	enspdout = 0;
   1343      1.10     itohy 	/* playback to ... */
   1344      1.10     itohy 	if (CMPCI_ISCAP(sc, SPDOUT) &&
   1345      1.10     itohy 	    sc->sc_gain[CMPCI_PLAYBACK_MODE][CMPCI_LR]
   1346      1.10     itohy 		== CMPCI_PLAYBACK_MODE_SPDIF &&
   1347      1.10     itohy 	    (sc->sc_play.md_divide == CMPCI_REG_RATE_44100 ||
   1348      1.10     itohy 		(CMPCI_ISCAP(sc, SPDOUT_48K) &&
   1349      1.10     itohy 		    sc->sc_play.md_divide==CMPCI_REG_RATE_48000))) {
   1350      1.10     itohy 		/* playback to SPDIF */
   1351      1.10     itohy 		cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE);
   1352      1.10     itohy 		enspdout = 1;
   1353      1.10     itohy 		if (sc->sc_play.md_divide==CMPCI_REG_RATE_48000)
   1354      1.21     itohy 			cmpci_reg_set_reg_misc(sc,
   1355      1.21     itohy 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
   1356      1.10     itohy 		else
   1357      1.21     itohy 			cmpci_reg_clear_reg_misc(sc,
   1358      1.21     itohy 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
   1359      1.10     itohy 	} else {
   1360      1.10     itohy 		/* playback to DAC */
   1361       1.7  tshiozak 		cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
   1362      1.10     itohy 				  CMPCI_REG_SPDIF0_ENABLE);
   1363      1.10     itohy 		if (CMPCI_ISCAP(sc, SPDOUT_48K))
   1364      1.21     itohy 			cmpci_reg_clear_reg_misc(sc,
   1365      1.21     itohy 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
   1366      1.10     itohy 	}
   1367      1.10     itohy 
   1368      1.10     itohy 	/* legacy to SPDIF/out or not */
   1369      1.10     itohy 	if (CMPCI_ISCAP(sc, SPDLEGACY)) {
   1370      1.10     itohy 		if (sc->sc_gain[CMPCI_SPDIF_OUT_PLAYBACK][CMPCI_LR]
   1371      1.10     itohy 		    == CMPCI_SPDIF_OUT_PLAYBACK_WAVE)
   1372      1.10     itohy 			cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL,
   1373      1.10     itohy 					CMPCI_REG_LEGACY_SPDIF_ENABLE);
   1374      1.10     itohy 		else {
   1375      1.10     itohy 			cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL,
   1376      1.10     itohy 					CMPCI_REG_LEGACY_SPDIF_ENABLE);
   1377      1.10     itohy 			enspdout = 1;
   1378      1.10     itohy 		}
   1379      1.10     itohy 	}
   1380      1.10     itohy 
   1381      1.10     itohy 	/* enable/disable SPDIF/out */
   1382      1.10     itohy 	if (CMPCI_ISCAP(sc, XSPDOUT) && enspdout)
   1383      1.10     itohy 		cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL,
   1384      1.10     itohy 				CMPCI_REG_XSPDIF_ENABLE);
   1385      1.10     itohy 	else
   1386       1.7  tshiozak 		cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL,
   1387      1.10     itohy 				CMPCI_REG_XSPDIF_ENABLE);
   1388      1.10     itohy 
   1389      1.25   xtraeme 	/* SPDIF monitor (digital to analog output) */
   1390      1.10     itohy 	if (CMPCI_ISCAP(sc, SPDIN_MONITOR)) {
   1391      1.10     itohy 		v = sc->sc_gain[CMPCI_MONITOR_DAC][CMPCI_LR];
   1392      1.10     itohy 		if (!(v & CMPCI_MONDAC_ENABLE))
   1393      1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1394      1.10     itohy 					CMPCI_REG_SPDIN_MONITOR);
   1395      1.10     itohy 		if (v & CMPCI_MONDAC_SPDOUT)
   1396       1.7  tshiozak 			cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1,
   1397      1.10     itohy 					CMPCI_REG_SPDIFOUT_DAC);
   1398      1.10     itohy 		else
   1399       1.7  tshiozak 			cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
   1400      1.10     itohy 					CMPCI_REG_SPDIFOUT_DAC);
   1401      1.10     itohy 		if (v & CMPCI_MONDAC_ENABLE)
   1402      1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1403      1.10     itohy 					CMPCI_REG_SPDIN_MONITOR);
   1404       1.7  tshiozak 	}
   1405       1.1  augustss }
   1406       1.1  augustss 
   1407       1.1  augustss static int
   1408      1.28      kent cmpci_set_in_ports(struct cmpci_softc *sc)
   1409      1.10     itohy {
   1410       1.1  augustss 	int mask;
   1411       1.1  augustss 	int bitsl, bitsr;
   1412       1.1  augustss 
   1413      1.10     itohy 	mask = sc->sc_in_mask;
   1414      1.10     itohy 
   1415      1.10     itohy 	/*
   1416      1.10     itohy 	 * Note CMPCI_RECORD_SOURCE_CD, CMPCI_RECORD_SOURCE_LINE_IN and
   1417      1.10     itohy 	 * CMPCI_RECORD_SOURCE_FM are defined to the corresponding bit
   1418      1.10     itohy 	 * of the mixer register.
   1419      1.10     itohy 	 */
   1420      1.10     itohy 	bitsr = mask & (CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN |
   1421      1.10     itohy 	    CMPCI_RECORD_SOURCE_FM);
   1422      1.10     itohy 
   1423       1.1  augustss 	bitsl = CMPCI_SB16_MIXER_SRC_R_TO_L(bitsr);
   1424       1.8     itohy 	if (mask & CMPCI_RECORD_SOURCE_MIC) {
   1425       1.1  augustss 		bitsl |= CMPCI_SB16_MIXER_MIC_SRC;
   1426       1.1  augustss 		bitsr |= CMPCI_SB16_MIXER_MIC_SRC;
   1427       1.1  augustss 	}
   1428       1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, bitsl);
   1429       1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, bitsr);
   1430      1.10     itohy 
   1431      1.10     itohy 	if (mask & CMPCI_RECORD_SOURCE_AUX_IN)
   1432      1.10     itohy 		cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
   1433      1.10     itohy 		    CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN);
   1434      1.10     itohy 	else
   1435      1.10     itohy 		cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
   1436      1.10     itohy 		    CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN);
   1437      1.10     itohy 
   1438      1.10     itohy 	if (mask & CMPCI_RECORD_SOURCE_WAVE)
   1439      1.10     itohy 		cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1440      1.10     itohy 		    CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR);
   1441      1.10     itohy 	else
   1442      1.10     itohy 		cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1443      1.10     itohy 		    CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR);
   1444      1.10     itohy 
   1445       1.7  tshiozak 	if (CMPCI_ISCAP(sc, SPDIN) &&
   1446      1.10     itohy 	    (sc->sc_rec.md_divide == CMPCI_REG_RATE_44100 ||
   1447      1.10     itohy 		(CMPCI_ISCAP(sc, SPDOUT_48K) &&
   1448      1.10     itohy 		    sc->sc_rec.md_divide == CMPCI_REG_RATE_48000/* XXX? */))) {
   1449       1.8     itohy 		if (mask & CMPCI_RECORD_SOURCE_SPDIF) {
   1450       1.7  tshiozak 			/* enable SPDIF/in */
   1451       1.7  tshiozak 			cmpci_reg_set_4(sc,
   1452       1.7  tshiozak 					CMPCI_REG_FUNC_1,
   1453       1.7  tshiozak 					CMPCI_REG_SPDIF1_ENABLE);
   1454       1.7  tshiozak 		} else {
   1455       1.7  tshiozak 			cmpci_reg_clear_4(sc,
   1456       1.7  tshiozak 					CMPCI_REG_FUNC_1,
   1457       1.7  tshiozak 					CMPCI_REG_SPDIF1_ENABLE);
   1458       1.7  tshiozak 		}
   1459       1.7  tshiozak 	}
   1460       1.1  augustss 
   1461       1.1  augustss 	return 0;
   1462       1.1  augustss }
   1463       1.1  augustss 
   1464       1.1  augustss static int
   1465      1.28      kent cmpci_set_port(void *handle, mixer_ctrl_t *cp)
   1466       1.1  augustss {
   1467      1.28      kent 	struct cmpci_softc *sc;
   1468       1.1  augustss 	int lgain, rgain;
   1469      1.10     itohy 
   1470      1.28      kent 	sc = handle;
   1471       1.1  augustss 	switch (cp->dev) {
   1472      1.10     itohy 	case CMPCI_MIC_VOL:
   1473       1.1  augustss 	case CMPCI_PCSPEAKER:
   1474      1.10     itohy 	case CMPCI_MIC_RECVOL:
   1475      1.10     itohy 		if (cp->un.value.num_channels != 1)
   1476      1.10     itohy 			return EINVAL;
   1477      1.10     itohy 		/* FALLTHROUGH */
   1478      1.10     itohy 	case CMPCI_DAC_VOL:
   1479       1.1  augustss 	case CMPCI_FM_VOL:
   1480       1.1  augustss 	case CMPCI_CD_VOL:
   1481      1.10     itohy 	case CMPCI_LINE_IN_VOL:
   1482      1.10     itohy 	case CMPCI_AUX_IN_VOL:
   1483       1.1  augustss 	case CMPCI_MASTER_VOL:
   1484       1.1  augustss 		if (cp->type != AUDIO_MIXER_VALUE)
   1485       1.1  augustss 			return EINVAL;
   1486      1.10     itohy 		switch (cp->un.value.num_channels) {
   1487      1.10     itohy 		case 1:
   1488       1.1  augustss 			lgain = rgain =
   1489      1.10     itohy 			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
   1490       1.1  augustss 			break;
   1491      1.10     itohy 		case 2:
   1492      1.10     itohy 			lgain = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT];
   1493      1.10     itohy 			rgain = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT];
   1494       1.1  augustss 			break;
   1495       1.1  augustss 		default:
   1496      1.10     itohy 			return EINVAL;
   1497       1.1  augustss 		}
   1498       1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_LEFT]  = lgain;
   1499       1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_RIGHT] = rgain;
   1500       1.1  augustss 
   1501       1.1  augustss 		cmpci_set_mixer_gain(sc, cp->dev);
   1502       1.1  augustss 		break;
   1503       1.1  augustss 
   1504       1.1  augustss 	case CMPCI_RECORD_SOURCE:
   1505       1.1  augustss 		if (cp->type != AUDIO_MIXER_SET)
   1506       1.1  augustss 			return EINVAL;
   1507       1.8     itohy 
   1508      1.10     itohy 		if (cp->un.mask & ~(CMPCI_RECORD_SOURCE_MIC |
   1509      1.10     itohy 		    CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN |
   1510      1.10     itohy 		    CMPCI_RECORD_SOURCE_AUX_IN | CMPCI_RECORD_SOURCE_WAVE |
   1511      1.10     itohy 		    CMPCI_RECORD_SOURCE_FM | CMPCI_RECORD_SOURCE_SPDIF))
   1512      1.10     itohy 			return EINVAL;
   1513      1.10     itohy 
   1514       1.8     itohy 		if (cp->un.mask & CMPCI_RECORD_SOURCE_SPDIF)
   1515       1.8     itohy 			cp->un.mask = CMPCI_RECORD_SOURCE_SPDIF;
   1516       1.8     itohy 
   1517      1.10     itohy 		sc->sc_in_mask = cp->un.mask;
   1518      1.10     itohy 		return cmpci_set_in_ports(sc);
   1519       1.1  augustss 
   1520      1.10     itohy 	/* boolean */
   1521      1.10     itohy 	case CMPCI_DAC_MUTE:
   1522      1.10     itohy 	case CMPCI_FM_MUTE:
   1523      1.10     itohy 	case CMPCI_CD_MUTE:
   1524      1.10     itohy 	case CMPCI_LINE_IN_MUTE:
   1525      1.10     itohy 	case CMPCI_AUX_IN_MUTE:
   1526      1.10     itohy 	case CMPCI_MIC_MUTE:
   1527      1.10     itohy 	case CMPCI_MIC_PREAMP:
   1528      1.10     itohy 	case CMPCI_PLAYBACK_MODE:
   1529      1.10     itohy 	case CMPCI_SPDIF_IN_PHASE:
   1530      1.10     itohy 	case CMPCI_SPDIF_LOOP:
   1531      1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
   1532      1.10     itohy 	case CMPCI_SPDIF_OUT_VOLTAGE:
   1533      1.10     itohy 	case CMPCI_REAR:
   1534      1.10     itohy 	case CMPCI_INDIVIDUAL:
   1535      1.10     itohy 	case CMPCI_REVERSE:
   1536      1.10     itohy 	case CMPCI_SURROUND:
   1537       1.1  augustss 		if (cp->type != AUDIO_MIXER_ENUM)
   1538       1.1  augustss 			return EINVAL;
   1539       1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord != 0;
   1540      1.10     itohy 		cmpci_set_mixer_gain(sc, cp->dev);
   1541       1.1  augustss 		break;
   1542       1.1  augustss 
   1543      1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
   1544      1.10     itohy 		switch (cp->un.ord) {
   1545      1.10     itohy 		case CMPCI_SPDIF_IN_SPDIN1:
   1546      1.10     itohy 		case CMPCI_SPDIF_IN_SPDIN2:
   1547      1.10     itohy 		case CMPCI_SPDIF_IN_SPDOUT:
   1548      1.10     itohy 			break;
   1549      1.10     itohy 		default:
   1550       1.1  augustss 			return EINVAL;
   1551       1.1  augustss 		}
   1552      1.10     itohy 		goto xenum;
   1553      1.10     itohy 	case CMPCI_MONITOR_DAC:
   1554      1.10     itohy 		switch (cp->un.ord) {
   1555      1.10     itohy 		case CMPCI_MONITOR_DAC_OFF:
   1556      1.10     itohy 		case CMPCI_MONITOR_DAC_SPDIN:
   1557      1.10     itohy 		case CMPCI_MONITOR_DAC_SPDOUT:
   1558      1.10     itohy 			break;
   1559      1.10     itohy 		default:
   1560      1.10     itohy 			return EINVAL;
   1561       1.1  augustss 		}
   1562      1.10     itohy 	xenum:
   1563      1.10     itohy 		if (cp->type != AUDIO_MIXER_ENUM)
   1564      1.10     itohy 			return EINVAL;
   1565       1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord;
   1566      1.10     itohy 		cmpci_set_mixer_gain(sc, cp->dev);
   1567       1.7  tshiozak 		break;
   1568      1.10     itohy 
   1569       1.1  augustss 	default:
   1570       1.1  augustss 	    return EINVAL;
   1571       1.1  augustss 	}
   1572      1.10     itohy 
   1573       1.1  augustss 	return 0;
   1574       1.1  augustss }
   1575       1.1  augustss 
   1576       1.1  augustss static int
   1577      1.28      kent cmpci_get_port(void *handle, mixer_ctrl_t *cp)
   1578       1.1  augustss {
   1579      1.28      kent 	struct cmpci_softc *sc;
   1580      1.10     itohy 
   1581      1.28      kent 	sc = handle;
   1582       1.1  augustss 	switch (cp->dev) {
   1583       1.1  augustss 	case CMPCI_MIC_VOL:
   1584      1.10     itohy 	case CMPCI_PCSPEAKER:
   1585      1.10     itohy 	case CMPCI_MIC_RECVOL:
   1586       1.1  augustss 		if (cp->un.value.num_channels != 1)
   1587       1.1  augustss 			return EINVAL;
   1588      1.12     itohy 		/*FALLTHROUGH*/
   1589      1.10     itohy 	case CMPCI_DAC_VOL:
   1590       1.1  augustss 	case CMPCI_FM_VOL:
   1591       1.1  augustss 	case CMPCI_CD_VOL:
   1592      1.10     itohy 	case CMPCI_LINE_IN_VOL:
   1593      1.10     itohy 	case CMPCI_AUX_IN_VOL:
   1594       1.1  augustss 	case CMPCI_MASTER_VOL:
   1595       1.1  augustss 		switch (cp->un.value.num_channels) {
   1596       1.1  augustss 		case 1:
   1597      1.10     itohy 			cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
   1598       1.7  tshiozak 				sc->sc_gain[cp->dev][CMPCI_LEFT];
   1599       1.1  augustss 			break;
   1600       1.1  augustss 		case 2:
   1601      1.10     itohy 			cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
   1602       1.7  tshiozak 				sc->sc_gain[cp->dev][CMPCI_LEFT];
   1603      1.10     itohy 			cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
   1604       1.7  tshiozak 				sc->sc_gain[cp->dev][CMPCI_RIGHT];
   1605       1.1  augustss 			break;
   1606       1.1  augustss 		default:
   1607       1.1  augustss 			return EINVAL;
   1608       1.1  augustss 		}
   1609       1.1  augustss 		break;
   1610      1.10     itohy 
   1611       1.1  augustss 	case CMPCI_RECORD_SOURCE:
   1612       1.7  tshiozak 		cp->un.mask = sc->sc_in_mask;
   1613       1.1  augustss 		break;
   1614       1.1  augustss 
   1615      1.10     itohy 	case CMPCI_DAC_MUTE:
   1616      1.10     itohy 	case CMPCI_FM_MUTE:
   1617      1.10     itohy 	case CMPCI_CD_MUTE:
   1618       1.1  augustss 	case CMPCI_LINE_IN_MUTE:
   1619      1.10     itohy 	case CMPCI_AUX_IN_MUTE:
   1620      1.10     itohy 	case CMPCI_MIC_MUTE:
   1621      1.10     itohy 	case CMPCI_MIC_PREAMP:
   1622      1.10     itohy 	case CMPCI_PLAYBACK_MODE:
   1623      1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
   1624      1.10     itohy 	case CMPCI_SPDIF_IN_PHASE:
   1625       1.7  tshiozak 	case CMPCI_SPDIF_LOOP:
   1626      1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
   1627       1.7  tshiozak 	case CMPCI_SPDIF_OUT_VOLTAGE:
   1628      1.10     itohy 	case CMPCI_MONITOR_DAC:
   1629       1.7  tshiozak 	case CMPCI_REAR:
   1630       1.7  tshiozak 	case CMPCI_INDIVIDUAL:
   1631       1.7  tshiozak 	case CMPCI_REVERSE:
   1632       1.7  tshiozak 	case CMPCI_SURROUND:
   1633       1.7  tshiozak 		cp->un.ord = sc->sc_gain[cp->dev][CMPCI_LR];
   1634       1.1  augustss 		break;
   1635       1.1  augustss 
   1636       1.1  augustss 	default:
   1637       1.1  augustss 		return EINVAL;
   1638       1.1  augustss 	}
   1639       1.1  augustss 
   1640       1.1  augustss 	return 0;
   1641       1.1  augustss }
   1642       1.1  augustss 
   1643       1.1  augustss /* ARGSUSED */
   1644       1.1  augustss static size_t
   1645      1.34  christos cmpci_round_buffersize(void *handle, int direction,
   1646      1.33  christos     size_t bufsize)
   1647       1.1  augustss {
   1648      1.28      kent 
   1649       1.1  augustss 	if (bufsize > 0x10000)
   1650       1.1  augustss 		bufsize = 0x10000;
   1651      1.10     itohy 
   1652       1.1  augustss 	return bufsize;
   1653       1.1  augustss }
   1654       1.1  augustss 
   1655       1.4    simonb static paddr_t
   1656      1.28      kent cmpci_mappage(void *handle, void *addr, off_t offset, int prot)
   1657       1.1  augustss {
   1658       1.1  augustss 	struct cmpci_dmanode *p;
   1659  1.34.6.1        ad 	struct cmpci_softc *sc;
   1660  1.34.6.1        ad 	paddr_t pa;
   1661  1.34.6.1        ad 
   1662  1.34.6.1        ad 	sc = handle;
   1663      1.10     itohy 
   1664      1.28      kent 	if (offset < 0 || NULL == (p = cmpci_find_dmamem(handle, addr)))
   1665       1.1  augustss 		return -1;
   1666       1.1  augustss 
   1667  1.34.6.1        ad 	mutex_exit(&sc->sc_lock);
   1668  1.34.6.1        ad 	pa = bus_dmamem_mmap(p->cd_tag, p->cd_segs,
   1669       1.7  tshiozak 		   sizeof(p->cd_segs)/sizeof(p->cd_segs[0]),
   1670       1.7  tshiozak 		   offset, prot, BUS_DMA_WAITOK);
   1671  1.34.6.1        ad 	mutex_enter(&sc->sc_lock);
   1672  1.34.6.1        ad 
   1673  1.34.6.1        ad 	return pa;
   1674       1.1  augustss }
   1675       1.1  augustss 
   1676       1.1  augustss /* ARGSUSED */
   1677       1.1  augustss static int
   1678      1.34  christos cmpci_get_props(void *handle)
   1679       1.1  augustss {
   1680      1.28      kent 
   1681       1.1  augustss 	return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX;
   1682       1.1  augustss }
   1683       1.1  augustss 
   1684       1.1  augustss static int
   1685      1.28      kent cmpci_trigger_output(void *handle, void *start, void *end, int blksize,
   1686      1.28      kent 		     void (*intr)(void *), void *arg,
   1687      1.28      kent 		     const audio_params_t *param)
   1688       1.1  augustss {
   1689      1.28      kent 	struct cmpci_softc *sc;
   1690       1.1  augustss 	struct cmpci_dmanode *p;
   1691       1.1  augustss 	int bps;
   1692       1.1  augustss 
   1693      1.28      kent 	sc = handle;
   1694       1.1  augustss 	sc->sc_play.intr = intr;
   1695       1.1  augustss 	sc->sc_play.intr_arg = arg;
   1696      1.27      kent 	bps = param->channels * param->precision / 8;
   1697       1.1  augustss 	if (!bps)
   1698       1.1  augustss 		return EINVAL;
   1699       1.1  augustss 
   1700       1.1  augustss 	/* set DMA frame */
   1701       1.1  augustss 	if (!(p = cmpci_find_dmamem(sc, start)))
   1702       1.1  augustss 		return EINVAL;
   1703       1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BASE,
   1704       1.1  augustss 	    DMAADDR(p));
   1705       1.1  augustss 	delay(10);
   1706       1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BYTES,
   1707       1.7  tshiozak 	    ((caddr_t)end - (caddr_t)start + 1) / bps - 1);
   1708       1.1  augustss 	delay(10);
   1709       1.1  augustss 
   1710       1.1  augustss 	/* set interrupt count */
   1711       1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_SAMPLES,
   1712       1.1  augustss 			  (blksize + bps - 1) / bps - 1);
   1713       1.1  augustss 	delay(10);
   1714       1.1  augustss 
   1715       1.1  augustss 	/* start DMA */
   1716       1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); /* PLAY */
   1717       1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE);
   1718       1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE);
   1719      1.10     itohy 
   1720       1.1  augustss 	return 0;
   1721       1.1  augustss }
   1722       1.1  augustss 
   1723       1.1  augustss static int
   1724      1.28      kent cmpci_trigger_input(void *handle, void *start, void *end, int blksize,
   1725      1.28      kent 		    void (*intr)(void *), void *arg,
   1726      1.28      kent 		    const audio_params_t *param)
   1727       1.1  augustss {
   1728      1.28      kent 	struct cmpci_softc *sc;
   1729       1.1  augustss 	struct cmpci_dmanode *p;
   1730       1.1  augustss 	int bps;
   1731       1.1  augustss 
   1732      1.28      kent 	sc = handle;
   1733       1.1  augustss 	sc->sc_rec.intr = intr;
   1734       1.1  augustss 	sc->sc_rec.intr_arg = arg;
   1735      1.27      kent 	bps = param->channels * param->precision / 8;
   1736       1.1  augustss 	if (!bps)
   1737       1.1  augustss 		return EINVAL;
   1738       1.1  augustss 
   1739       1.1  augustss 	/* set DMA frame */
   1740       1.1  augustss 	if (!(p=cmpci_find_dmamem(sc, start)))
   1741       1.1  augustss 		return EINVAL;
   1742       1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BASE,
   1743       1.1  augustss 	    DMAADDR(p));
   1744       1.1  augustss 	delay(10);
   1745       1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BYTES,
   1746       1.7  tshiozak 	    ((caddr_t)end - (caddr_t)start + 1) / bps - 1);
   1747       1.1  augustss 	delay(10);
   1748       1.1  augustss 
   1749       1.1  augustss 	/* set interrupt count */
   1750       1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_SAMPLES,
   1751       1.7  tshiozak 	    (blksize + bps - 1) / bps - 1);
   1752       1.1  augustss 	delay(10);
   1753       1.1  augustss 
   1754       1.1  augustss 	/* start DMA */
   1755       1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_DIR); /* REC */
   1756       1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE);
   1757       1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE);
   1758      1.10     itohy 
   1759       1.1  augustss 	return 0;
   1760       1.1  augustss }
   1761       1.1  augustss 
   1762  1.34.6.1        ad static void
   1763  1.34.6.1        ad cmpci_get_locks(void *addr, kmutex_t **intr, kmutex_t **proc)
   1764  1.34.6.1        ad {
   1765  1.34.6.1        ad 	struct cmpci_softc *sc;
   1766  1.34.6.1        ad 
   1767  1.34.6.1        ad 	sc = addr;
   1768  1.34.6.1        ad 	*intr = &sc->sc_intr_lock;
   1769  1.34.6.1        ad 	*proc = &sc->sc_lock;
   1770  1.34.6.1        ad }
   1771  1.34.6.1        ad 
   1772       1.1  augustss /* end of file */
   1773