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cmpci.c revision 1.50.10.2
      1  1.50.10.2    martin /*	$NetBSD: cmpci.c,v 1.50.10.2 2020/04/08 14:08:08 martin Exp $	*/
      2        1.1  augustss 
      3        1.1  augustss /*
      4       1.43  jmcneill  * Copyright (c) 2000, 2001, 2008 The NetBSD Foundation, Inc.
      5        1.1  augustss  * All rights reserved.
      6        1.1  augustss  *
      7        1.1  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8       1.22    keihan  * by Takuya SHIOZAKI <tshiozak (at) NetBSD.org> .
      9        1.1  augustss  *
     10       1.10     itohy  * This code is derived from software contributed to The NetBSD Foundation
     11       1.10     itohy  * by ITOH Yasufumi.
     12       1.10     itohy  *
     13        1.1  augustss  * Redistribution and use in source and binary forms, with or without
     14        1.1  augustss  * modification, are permitted provided that the following conditions
     15        1.1  augustss  * are met:
     16        1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     17        1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     18        1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     19        1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     20        1.1  augustss  *    documentation and/or other materials provided with the distribution.
     21        1.1  augustss  *
     22        1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     23        1.1  augustss  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24        1.1  augustss  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25        1.1  augustss  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     26        1.1  augustss  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27        1.1  augustss  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28        1.1  augustss  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29        1.1  augustss  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30        1.1  augustss  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31        1.1  augustss  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32        1.1  augustss  * SUCH DAMAGE.
     33        1.1  augustss  *
     34        1.1  augustss  */
     35        1.1  augustss 
     36        1.1  augustss /*
     37        1.1  augustss  * C-Media CMI8x38 Audio Chip Support.
     38        1.1  augustss  *
     39        1.1  augustss  * TODO:
     40       1.10     itohy  *   - 4ch / 6ch support.
     41       1.10     itohy  *   - Joystick support.
     42        1.1  augustss  *
     43        1.1  augustss  */
     44       1.11     lukem 
     45       1.11     lukem #include <sys/cdefs.h>
     46  1.50.10.2    martin __KERNEL_RCSID(0, "$NetBSD: cmpci.c,v 1.50.10.2 2020/04/08 14:08:08 martin Exp $");
     47        1.1  augustss 
     48        1.1  augustss #if defined(AUDIO_DEBUG) || defined(DEBUG)
     49        1.7  tshiozak #define DPRINTF(x) if (cmpcidebug) printf x
     50        1.7  tshiozak int cmpcidebug = 0;
     51        1.1  augustss #else
     52        1.1  augustss #define DPRINTF(x)
     53        1.1  augustss #endif
     54        1.1  augustss 
     55        1.8     itohy #include "mpu.h"
     56        1.8     itohy 
     57        1.1  augustss #include <sys/param.h>
     58        1.1  augustss #include <sys/systm.h>
     59        1.1  augustss #include <sys/kernel.h>
     60       1.43  jmcneill #include <sys/kmem.h>
     61        1.1  augustss #include <sys/device.h>
     62        1.1  augustss #include <sys/proc.h>
     63        1.1  augustss 
     64        1.1  augustss #include <dev/pci/pcidevs.h>
     65        1.1  augustss #include <dev/pci/pcivar.h>
     66        1.1  augustss 
     67        1.1  augustss #include <sys/audioio.h>
     68  1.50.10.1  christos #include <dev/audio/audio_if.h>
     69        1.1  augustss #include <dev/midi_if.h>
     70        1.1  augustss 
     71        1.1  augustss #include <dev/pci/cmpcireg.h>
     72        1.1  augustss #include <dev/pci/cmpcivar.h>
     73        1.1  augustss 
     74        1.1  augustss #include <dev/ic/mpuvar.h>
     75       1.36        ad #include <sys/bus.h>
     76       1.36        ad #include <sys/intr.h>
     77        1.1  augustss 
     78        1.1  augustss /*
     79        1.1  augustss  * Low-level HW interface
     80        1.1  augustss  */
     81       1.30     perry static inline uint8_t cmpci_mixerreg_read(struct cmpci_softc *, uint8_t);
     82       1.30     perry static inline void cmpci_mixerreg_write(struct cmpci_softc *,
     83       1.28      kent 	uint8_t, uint8_t);
     84       1.30     perry static inline void cmpci_reg_partial_write_1(struct cmpci_softc *, int, int,
     85       1.28      kent 	unsigned, unsigned);
     86       1.30     perry static inline void cmpci_reg_partial_write_4(struct cmpci_softc *, int, int,
     87       1.28      kent 	uint32_t, uint32_t);
     88       1.30     perry static inline void cmpci_reg_set_1(struct cmpci_softc *, int, uint8_t);
     89       1.30     perry static inline void cmpci_reg_clear_1(struct cmpci_softc *, int, uint8_t);
     90       1.30     perry static inline void cmpci_reg_set_4(struct cmpci_softc *, int, uint32_t);
     91       1.30     perry static inline void cmpci_reg_clear_4(struct cmpci_softc *, int, uint32_t);
     92       1.30     perry static inline void cmpci_reg_set_reg_misc(struct cmpci_softc *, uint32_t);
     93       1.30     perry static inline void cmpci_reg_clear_reg_misc(struct cmpci_softc *, uint32_t);
     94       1.28      kent static int cmpci_rate_to_index(int);
     95       1.30     perry static inline int cmpci_index_to_divider(int);
     96       1.28      kent 
     97       1.28      kent static int cmpci_adjust(int, int);
     98       1.28      kent static void cmpci_set_mixer_gain(struct cmpci_softc *, int);
     99       1.28      kent static void cmpci_set_out_ports(struct cmpci_softc *);
    100       1.28      kent static int cmpci_set_in_ports(struct cmpci_softc *);
    101        1.1  augustss 
    102        1.1  augustss 
    103        1.1  augustss /*
    104        1.1  augustss  * autoconf interface
    105        1.1  augustss  */
    106       1.40    cegger static int cmpci_match(device_t, cfdata_t, void *);
    107       1.40    cegger static void cmpci_attach(device_t, device_t, void *);
    108        1.1  augustss 
    109       1.46       chs CFATTACH_DECL_NEW(cmpci, sizeof (struct cmpci_softc),
    110       1.16   thorpej     cmpci_match, cmpci_attach, NULL, NULL);
    111        1.1  augustss 
    112        1.1  augustss /* interrupt */
    113       1.28      kent static int cmpci_intr(void *);
    114        1.1  augustss 
    115        1.1  augustss 
    116        1.1  augustss /*
    117        1.1  augustss  * DMA stuffs
    118        1.1  augustss  */
    119       1.43  jmcneill static int cmpci_alloc_dmamem(struct cmpci_softc *, size_t, void **);
    120       1.43  jmcneill static int cmpci_free_dmamem(struct cmpci_softc *, void *, size_t);
    121       1.28      kent static struct cmpci_dmanode * cmpci_find_dmamem(struct cmpci_softc *,
    122       1.35  christos 	void *);
    123        1.1  augustss 
    124        1.1  augustss 
    125        1.1  augustss /*
    126        1.1  augustss  * interface to machine independent layer
    127        1.1  augustss  */
    128  1.50.10.1  christos static int cmpci_query_format(void *, audio_format_query_t *);
    129  1.50.10.1  christos static int cmpci_set_format(void *, int,
    130  1.50.10.1  christos     const audio_params_t *, const audio_params_t *,
    131  1.50.10.1  christos     audio_filter_reg_t *, audio_filter_reg_t *);
    132       1.28      kent static int cmpci_halt_output(void *);
    133       1.28      kent static int cmpci_halt_input(void *);
    134       1.28      kent static int cmpci_getdev(void *, struct audio_device *);
    135       1.28      kent static int cmpci_set_port(void *, mixer_ctrl_t *);
    136       1.28      kent static int cmpci_get_port(void *, mixer_ctrl_t *);
    137       1.28      kent static int cmpci_query_devinfo(void *, mixer_devinfo_t *);
    138       1.43  jmcneill static void *cmpci_allocm(void *, int, size_t);
    139       1.43  jmcneill static void cmpci_freem(void *, void *, size_t);
    140       1.28      kent static size_t cmpci_round_buffersize(void *, int, size_t);
    141       1.28      kent static int cmpci_get_props(void *);
    142       1.28      kent static int cmpci_trigger_output(void *, void *, void *, int,
    143       1.28      kent 	void (*)(void *), void *, const audio_params_t *);
    144       1.28      kent static int cmpci_trigger_input(void *, void *, void *, int,
    145       1.28      kent 	void (*)(void *), void *, const audio_params_t *);
    146       1.43  jmcneill static void cmpci_get_locks(void *, kmutex_t **, kmutex_t **);
    147        1.1  augustss 
    148       1.26      yamt static const struct audio_hw_if cmpci_hw_if = {
    149  1.50.10.1  christos 	.query_format		= cmpci_query_format,
    150  1.50.10.1  christos 	.set_format		= cmpci_set_format,
    151  1.50.10.1  christos 	.halt_output		= cmpci_halt_output,
    152  1.50.10.1  christos 	.halt_input		= cmpci_halt_input,
    153  1.50.10.1  christos 	.getdev			= cmpci_getdev,
    154  1.50.10.1  christos 	.set_port		= cmpci_set_port,
    155  1.50.10.1  christos 	.get_port		= cmpci_get_port,
    156  1.50.10.1  christos 	.query_devinfo		= cmpci_query_devinfo,
    157  1.50.10.1  christos 	.allocm			= cmpci_allocm,
    158  1.50.10.1  christos 	.freem			= cmpci_freem,
    159  1.50.10.1  christos 	.round_buffersize	= cmpci_round_buffersize,
    160  1.50.10.1  christos 	.get_props		= cmpci_get_props,
    161  1.50.10.1  christos 	.trigger_output		= cmpci_trigger_output,
    162  1.50.10.1  christos 	.trigger_input		= cmpci_trigger_input,
    163  1.50.10.1  christos 	.get_locks		= cmpci_get_locks,
    164        1.1  augustss };
    165        1.1  augustss 
    166  1.50.10.1  christos static const struct audio_format cmpci_formats[] = {
    167  1.50.10.1  christos 	{
    168  1.50.10.1  christos 		.mode		= AUMODE_PLAY | AUMODE_RECORD,
    169  1.50.10.1  christos 		.encoding	= AUDIO_ENCODING_SLINEAR_LE,
    170  1.50.10.1  christos 		.validbits	= 16,
    171  1.50.10.1  christos 		.precision	= 16,
    172  1.50.10.1  christos 		.channels	= 2,
    173  1.50.10.1  christos 		.channel_mask	= AUFMT_STEREO,
    174  1.50.10.1  christos 		.frequency_type	= 8,
    175  1.50.10.1  christos 		.frequency	=
    176  1.50.10.1  christos 		    { 5512, 8000, 11025, 16000, 22050, 32000, 44100, 48000 },
    177  1.50.10.1  christos 	},
    178       1.27      kent };
    179  1.50.10.1  christos #define CMPCI_NFORMATS __arraycount(cmpci_formats)
    180       1.27      kent 
    181        1.1  augustss 
    182        1.1  augustss /*
    183        1.1  augustss  * Low-level HW interface
    184        1.1  augustss  */
    185        1.1  augustss 
    186        1.1  augustss /* mixer register read/write */
    187       1.30     perry static inline uint8_t
    188       1.28      kent cmpci_mixerreg_read(struct cmpci_softc *sc, uint8_t no)
    189        1.1  augustss {
    190        1.1  augustss 	uint8_t ret;
    191        1.1  augustss 
    192        1.1  augustss 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no);
    193        1.1  augustss 	delay(10);
    194        1.1  augustss 	ret = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA);
    195        1.1  augustss 	delay(10);
    196        1.1  augustss 	return ret;
    197        1.1  augustss }
    198        1.1  augustss 
    199       1.30     perry static inline void
    200       1.28      kent cmpci_mixerreg_write(struct cmpci_softc *sc, uint8_t no, uint8_t val)
    201        1.1  augustss {
    202       1.28      kent 
    203        1.1  augustss 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no);
    204        1.1  augustss 	delay(10);
    205        1.1  augustss 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA, val);
    206        1.1  augustss 	delay(10);
    207        1.1  augustss }
    208        1.1  augustss 
    209        1.1  augustss 
    210        1.1  augustss /* register partial write */
    211       1.30     perry static inline void
    212       1.28      kent cmpci_reg_partial_write_1(struct cmpci_softc *sc, int no, int shift,
    213       1.28      kent 			  unsigned mask, unsigned val)
    214       1.10     itohy {
    215       1.28      kent 
    216       1.10     itohy 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
    217       1.10     itohy 	    (val<<shift) |
    218       1.10     itohy 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
    219       1.10     itohy 	delay(10);
    220       1.10     itohy }
    221       1.10     itohy 
    222       1.30     perry static inline void
    223       1.28      kent cmpci_reg_partial_write_4(struct cmpci_softc *sc, int no, int shift,
    224       1.28      kent 			  uint32_t mask, uint32_t val)
    225        1.1  augustss {
    226       1.28      kent 
    227        1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
    228        1.1  augustss 	    (val<<shift) |
    229        1.1  augustss 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
    230        1.1  augustss 	delay(10);
    231        1.1  augustss }
    232        1.1  augustss 
    233        1.1  augustss /* register set/clear bit */
    234       1.30     perry static inline void
    235       1.28      kent cmpci_reg_set_1(struct cmpci_softc *sc, int no, uint8_t mask)
    236        1.7  tshiozak {
    237       1.28      kent 
    238        1.7  tshiozak 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
    239        1.7  tshiozak 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) | mask));
    240        1.7  tshiozak 	delay(10);
    241        1.7  tshiozak }
    242        1.7  tshiozak 
    243       1.30     perry static inline void
    244       1.28      kent cmpci_reg_clear_1(struct cmpci_softc *sc, int no, uint8_t mask)
    245        1.7  tshiozak {
    246       1.28      kent 
    247        1.7  tshiozak 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
    248        1.7  tshiozak 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~mask));
    249        1.7  tshiozak 	delay(10);
    250        1.7  tshiozak }
    251        1.7  tshiozak 
    252       1.30     perry static inline void
    253       1.28      kent cmpci_reg_set_4(struct cmpci_softc *sc, int no, uint32_t mask)
    254        1.1  augustss {
    255       1.28      kent 
    256       1.21     itohy 	/* use cmpci_reg_set_reg_misc() for CMPCI_REG_MISC */
    257       1.21     itohy 	KDASSERT(no != CMPCI_REG_MISC);
    258       1.21     itohy 
    259        1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
    260        1.7  tshiozak 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) | mask));
    261        1.1  augustss 	delay(10);
    262        1.1  augustss }
    263        1.1  augustss 
    264       1.30     perry static inline void
    265       1.28      kent cmpci_reg_clear_4(struct cmpci_softc *sc, int no, uint32_t mask)
    266        1.1  augustss {
    267       1.28      kent 
    268       1.21     itohy 	/* use cmpci_reg_clear_reg_misc() for CMPCI_REG_MISC */
    269       1.21     itohy 	KDASSERT(no != CMPCI_REG_MISC);
    270       1.21     itohy 
    271        1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
    272        1.7  tshiozak 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~mask));
    273        1.1  augustss 	delay(10);
    274        1.1  augustss }
    275        1.1  augustss 
    276       1.21     itohy /*
    277       1.21     itohy  * The CMPCI_REG_MISC register needs special handling, since one of
    278       1.21     itohy  * its bits has different read/write values.
    279       1.21     itohy  */
    280       1.30     perry static inline void
    281       1.28      kent cmpci_reg_set_reg_misc(struct cmpci_softc *sc, uint32_t mask)
    282       1.21     itohy {
    283       1.28      kent 
    284       1.21     itohy 	sc->sc_reg_misc |= mask;
    285       1.21     itohy 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC,
    286       1.21     itohy 	    sc->sc_reg_misc);
    287       1.21     itohy 	delay(10);
    288       1.21     itohy }
    289       1.21     itohy 
    290       1.30     perry static inline void
    291       1.28      kent cmpci_reg_clear_reg_misc(struct cmpci_softc *sc, uint32_t mask)
    292       1.21     itohy {
    293       1.28      kent 
    294       1.21     itohy 	sc->sc_reg_misc &= ~mask;
    295       1.21     itohy 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC,
    296       1.21     itohy 	    sc->sc_reg_misc);
    297       1.21     itohy 	delay(10);
    298       1.21     itohy }
    299       1.21     itohy 
    300        1.1  augustss /* rate */
    301        1.6  jdolecek static const struct {
    302        1.1  augustss 	int rate;
    303        1.1  augustss 	int divider;
    304        1.1  augustss } cmpci_rate_table[CMPCI_REG_NUMRATE] = {
    305        1.1  augustss #define _RATE(n) { n, CMPCI_REG_RATE_ ## n }
    306        1.1  augustss 	_RATE(5512),
    307        1.1  augustss 	_RATE(8000),
    308        1.1  augustss 	_RATE(11025),
    309        1.1  augustss 	_RATE(16000),
    310        1.1  augustss 	_RATE(22050),
    311        1.1  augustss 	_RATE(32000),
    312        1.1  augustss 	_RATE(44100),
    313        1.1  augustss 	_RATE(48000)
    314        1.7  tshiozak #undef	_RATE
    315        1.1  augustss };
    316        1.1  augustss 
    317        1.1  augustss static int
    318       1.28      kent cmpci_rate_to_index(int rate)
    319        1.1  augustss {
    320        1.1  augustss 	int i;
    321        1.1  augustss 
    322       1.13  augustss 	for (i = 0; i < CMPCI_REG_NUMRATE - 1; i++)
    323  1.50.10.1  christos 		if (rate == cmpci_rate_table[i].rate)
    324        1.1  augustss 			return i;
    325        1.1  augustss 	return i;  /* 48000 */
    326        1.1  augustss }
    327        1.1  augustss 
    328       1.30     perry static inline int
    329       1.28      kent cmpci_index_to_divider(int index)
    330        1.1  augustss {
    331       1.28      kent 
    332        1.1  augustss 	return cmpci_rate_table[index].divider;
    333        1.1  augustss }
    334        1.1  augustss 
    335        1.1  augustss /*
    336        1.1  augustss  * interface to configure the device.
    337        1.1  augustss  */
    338        1.1  augustss static int
    339       1.40    cegger cmpci_match(device_t parent, cfdata_t match, void *aux)
    340        1.1  augustss {
    341       1.28      kent 	struct pci_attach_args *pa;
    342        1.1  augustss 
    343       1.28      kent 	pa = (struct pci_attach_args *)aux;
    344        1.1  augustss 	if ( PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CMEDIA &&
    345        1.1  augustss 	     (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338A ||
    346        1.1  augustss 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338B ||
    347        1.7  tshiozak 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738 ||
    348        1.7  tshiozak 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738B) )
    349        1.1  augustss 		return 1;
    350        1.1  augustss 
    351        1.1  augustss 	return 0;
    352        1.1  augustss }
    353        1.1  augustss 
    354        1.1  augustss static void
    355       1.40    cegger cmpci_attach(device_t parent, device_t self, void *aux)
    356        1.1  augustss {
    357       1.28      kent 	struct cmpci_softc *sc;
    358       1.28      kent 	struct pci_attach_args *pa;
    359        1.8     itohy 	struct audio_attach_args aa;
    360        1.1  augustss 	pci_intr_handle_t ih;
    361        1.1  augustss 	char const *strintr;
    362        1.1  augustss 	int i, v;
    363       1.47  christos 	char intrbuf[PCI_INTRSTR_LEN];
    364        1.1  augustss 
    365       1.41    cegger 	sc = device_private(self);
    366       1.46       chs 	sc->sc_dev = self;
    367       1.28      kent 	pa = (struct pci_attach_args *)aux;
    368       1.17   thorpej 
    369        1.7  tshiozak 	sc->sc_id = pa->pa_id;
    370        1.7  tshiozak 	sc->sc_class = pa->pa_class;
    371       1.45  drochner 	pci_aprint_devinfo(pa, "Audio controller");
    372        1.7  tshiozak 	switch (PCI_PRODUCT(sc->sc_id)) {
    373        1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338A:
    374        1.7  tshiozak 		/*FALLTHROUGH*/
    375        1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338B:
    376        1.7  tshiozak 		sc->sc_capable = CMPCI_CAP_CMI8338;
    377        1.1  augustss 		break;
    378        1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8738:
    379        1.7  tshiozak 		/*FALLTHROUGH*/
    380        1.7  tshiozak 	case PCI_PRODUCT_CMEDIA_CMI8738B:
    381        1.7  tshiozak 		sc->sc_capable = CMPCI_CAP_CMI8738;
    382        1.1  augustss 		break;
    383        1.1  augustss 	}
    384        1.1  augustss 
    385        1.2  augustss 	/* map I/O space */
    386        1.1  augustss 	if (pci_mapreg_map(pa, CMPCI_PCI_IOBASEREG, PCI_MAPREG_TYPE_IO, 0,
    387        1.7  tshiozak 		&sc->sc_iot, &sc->sc_ioh, NULL, NULL)) {
    388       1.46       chs 		aprint_error_dev(sc->sc_dev, "failed to map I/O space\n");
    389        1.1  augustss 		return;
    390        1.1  augustss 	}
    391        1.1  augustss 
    392       1.43  jmcneill 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
    393       1.44       mrg 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO);
    394       1.43  jmcneill 
    395        1.2  augustss 	/* interrupt */
    396        1.5  sommerfe 	if (pci_intr_map(pa, &ih)) {
    397       1.46       chs 		aprint_error_dev(sc->sc_dev, "failed to map interrupt\n");
    398        1.1  augustss 		return;
    399        1.1  augustss 	}
    400       1.47  christos 	strintr = pci_intr_string(pa->pa_pc, ih, intrbuf, sizeof(intrbuf));
    401  1.50.10.1  christos 	sc->sc_ih = pci_intr_establish_xname(pa->pa_pc, ih, IPL_AUDIO,
    402  1.50.10.1  christos 	    cmpci_intr, sc, device_xname(self));
    403        1.1  augustss 	if (sc->sc_ih == NULL) {
    404       1.46       chs 		aprint_error_dev(sc->sc_dev, "failed to establish interrupt");
    405        1.1  augustss 		if (strintr != NULL)
    406       1.42     njoly 			aprint_error(" at %s", strintr);
    407       1.42     njoly 		aprint_error("\n");
    408       1.43  jmcneill 		mutex_destroy(&sc->sc_lock);
    409       1.43  jmcneill 		mutex_destroy(&sc->sc_intr_lock);
    410        1.1  augustss 		return;
    411        1.1  augustss 	}
    412       1.46       chs 	aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", strintr);
    413        1.1  augustss 
    414        1.1  augustss 	sc->sc_dmat = pa->pa_dmat;
    415        1.1  augustss 
    416       1.46       chs 	audio_attach_mi(&cmpci_hw_if, sc, sc->sc_dev);
    417        1.1  augustss 
    418        1.8     itohy 	/* attach OPL device */
    419        1.8     itohy 	aa.type = AUDIODEV_TYPE_OPL;
    420        1.8     itohy 	aa.hwif = NULL;
    421        1.8     itohy 	aa.hdl = NULL;
    422       1.46       chs 	(void)config_found(sc->sc_dev, &aa, audioprint);
    423        1.8     itohy 
    424        1.8     itohy 	/* attach MPU-401 device */
    425        1.8     itohy 	aa.type = AUDIODEV_TYPE_MPU;
    426        1.8     itohy 	aa.hwif = NULL;
    427        1.8     itohy 	aa.hdl = NULL;
    428        1.8     itohy 	if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
    429        1.8     itohy 	    CMPCI_REG_MPU_BASE, CMPCI_REG_MPU_SIZE, &sc->sc_mpu_ioh) == 0)
    430       1.46       chs 		sc->sc_mpudev = config_found(sc->sc_dev, &aa, audioprint);
    431        1.8     itohy 
    432       1.21     itohy 	/* get initial value (this is 0 and may be omitted but just in case) */
    433       1.21     itohy 	sc->sc_reg_misc = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
    434       1.21     itohy 	    CMPCI_REG_MISC) & ~CMPCI_REG_SPDIF48K;
    435       1.21     itohy 
    436        1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_RESET, 0);
    437        1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0);
    438        1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0);
    439        1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX,
    440        1.1  augustss 	    CMPCI_SB16_SW_CD|CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE);
    441        1.1  augustss 	for (i = 0; i < CMPCI_NDEVS; i++) {
    442       1.48   msaitoh 		switch (i) {
    443       1.10     itohy 		/*
    444       1.10     itohy 		 * CMI8738 defaults are
    445       1.10     itohy 		 *  master:	0xe0	(0x00 - 0xf8)
    446       1.12     itohy 		 *  FM, DAC:	0xc0	(0x00 - 0xf8)
    447       1.10     itohy 		 *  PC speaker:	0x80	(0x00 - 0xc0)
    448       1.10     itohy 		 *  others:	0
    449       1.10     itohy 		 */
    450       1.10     itohy 		/* volume */
    451        1.8     itohy 		case CMPCI_MASTER_VOL:
    452       1.10     itohy 			v = 128;	/* 224 */
    453       1.10     itohy 			break;
    454        1.8     itohy 		case CMPCI_FM_VOL:
    455       1.10     itohy 		case CMPCI_DAC_VOL:
    456       1.10     itohy 			v = 192;
    457       1.10     itohy 			break;
    458        1.8     itohy 		case CMPCI_PCSPEAKER:
    459       1.10     itohy 			v = 128;
    460        1.1  augustss 			break;
    461        1.8     itohy 
    462        1.8     itohy 		/* booleans, set to true */
    463       1.10     itohy 		case CMPCI_CD_MUTE:
    464       1.10     itohy 		case CMPCI_MIC_MUTE:
    465       1.10     itohy 		case CMPCI_LINE_IN_MUTE:
    466       1.10     itohy 		case CMPCI_AUX_IN_MUTE:
    467        1.8     itohy 			v = 1;
    468        1.1  augustss 			break;
    469       1.10     itohy 
    470       1.10     itohy 		/* volume with inital value 0 */
    471       1.10     itohy 		case CMPCI_CD_VOL:
    472       1.10     itohy 		case CMPCI_LINE_IN_VOL:
    473       1.10     itohy 		case CMPCI_AUX_IN_VOL:
    474       1.10     itohy 		case CMPCI_MIC_VOL:
    475       1.10     itohy 		case CMPCI_MIC_RECVOL:
    476       1.10     itohy 			/* FALLTHROUGH */
    477       1.10     itohy 
    478        1.8     itohy 		/* others are cleared */
    479       1.10     itohy 		case CMPCI_MIC_PREAMP:
    480        1.8     itohy 		case CMPCI_RECORD_SOURCE:
    481       1.10     itohy 		case CMPCI_PLAYBACK_MODE:
    482       1.10     itohy 		case CMPCI_SPDIF_IN_SELECT:
    483       1.10     itohy 		case CMPCI_SPDIF_IN_PHASE:
    484        1.7  tshiozak 		case CMPCI_SPDIF_LOOP:
    485       1.10     itohy 		case CMPCI_SPDIF_OUT_PLAYBACK:
    486        1.7  tshiozak 		case CMPCI_SPDIF_OUT_VOLTAGE:
    487       1.10     itohy 		case CMPCI_MONITOR_DAC:
    488        1.7  tshiozak 		case CMPCI_REAR:
    489        1.7  tshiozak 		case CMPCI_INDIVIDUAL:
    490        1.7  tshiozak 		case CMPCI_REVERSE:
    491        1.7  tshiozak 		case CMPCI_SURROUND:
    492        1.8     itohy 		default:
    493        1.1  augustss 			v = 0;
    494        1.1  augustss 			break;
    495        1.1  augustss 		}
    496        1.7  tshiozak 		sc->sc_gain[i][CMPCI_LEFT] = sc->sc_gain[i][CMPCI_RIGHT] = v;
    497        1.1  augustss 		cmpci_set_mixer_gain(sc, i);
    498        1.1  augustss 	}
    499        1.1  augustss }
    500        1.1  augustss 
    501        1.1  augustss static int
    502       1.28      kent cmpci_intr(void *handle)
    503        1.1  augustss {
    504       1.37   xtraeme 	struct cmpci_softc *sc = handle;
    505       1.37   xtraeme #if NMPU > 0
    506       1.37   xtraeme 	struct mpu_softc *sc_mpu = device_private(sc->sc_mpudev);
    507       1.37   xtraeme #endif
    508        1.1  augustss 	uint32_t intrstat;
    509        1.1  augustss 
    510       1.43  jmcneill 	mutex_spin_enter(&sc->sc_intr_lock);
    511       1.43  jmcneill 
    512        1.1  augustss 	intrstat = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
    513        1.1  augustss 	    CMPCI_REG_INTR_STATUS);
    514        1.1  augustss 
    515       1.43  jmcneill 	if (!(intrstat & CMPCI_REG_ANY_INTR)) {
    516       1.43  jmcneill 		mutex_spin_exit(&sc->sc_intr_lock);
    517        1.1  augustss 		return 0;
    518       1.43  jmcneill 	}
    519        1.1  augustss 
    520        1.8     itohy 	delay(10);
    521        1.8     itohy 
    522        1.1  augustss 	/* disable and reset intr */
    523        1.1  augustss 	if (intrstat & CMPCI_REG_CH0_INTR)
    524        1.1  augustss 		cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL,
    525        1.1  augustss 		   CMPCI_REG_CH0_INTR_ENABLE);
    526        1.1  augustss 	if (intrstat & CMPCI_REG_CH1_INTR)
    527        1.1  augustss 		cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL,
    528        1.1  augustss 		    CMPCI_REG_CH1_INTR_ENABLE);
    529        1.1  augustss 
    530        1.1  augustss 	if (intrstat & CMPCI_REG_CH0_INTR) {
    531        1.1  augustss 		if (sc->sc_play.intr != NULL)
    532        1.1  augustss 			(*sc->sc_play.intr)(sc->sc_play.intr_arg);
    533        1.1  augustss 	}
    534        1.1  augustss 	if (intrstat & CMPCI_REG_CH1_INTR) {
    535        1.1  augustss 		if (sc->sc_rec.intr != NULL)
    536        1.1  augustss 			(*sc->sc_rec.intr)(sc->sc_rec.intr_arg);
    537        1.1  augustss 	}
    538        1.1  augustss 
    539        1.1  augustss 	/* enable intr */
    540        1.1  augustss 	if (intrstat & CMPCI_REG_CH0_INTR)
    541        1.1  augustss 		cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL,
    542        1.1  augustss 		    CMPCI_REG_CH0_INTR_ENABLE);
    543        1.1  augustss 	if (intrstat & CMPCI_REG_CH1_INTR)
    544        1.1  augustss 		cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL,
    545        1.1  augustss 		    CMPCI_REG_CH1_INTR_ENABLE);
    546        1.8     itohy 
    547        1.8     itohy #if NMPU > 0
    548       1.37   xtraeme 	if (intrstat & CMPCI_REG_UART_INTR && sc_mpu != NULL)
    549       1.37   xtraeme 		mpu_intr(sc_mpu);
    550        1.8     itohy #endif
    551        1.8     itohy 
    552       1.43  jmcneill 	mutex_spin_exit(&sc->sc_intr_lock);
    553        1.8     itohy 	return 1;
    554        1.1  augustss }
    555        1.1  augustss 
    556        1.1  augustss static int
    557  1.50.10.1  christos cmpci_query_format(void *handle, audio_format_query_t *afp)
    558        1.1  augustss {
    559       1.28      kent 
    560  1.50.10.1  christos 	return audio_query_format(cmpci_formats, CMPCI_NFORMATS, afp);
    561        1.1  augustss }
    562        1.1  augustss 
    563        1.1  augustss static int
    564  1.50.10.1  christos cmpci_set_format(void *handle, int setmode,
    565  1.50.10.1  christos     const audio_params_t *play, const audio_params_t *rec,
    566  1.50.10.1  christos     audio_filter_reg_t *pfil, audio_filter_reg_t *rfil)
    567        1.1  augustss {
    568        1.1  augustss 	int i;
    569       1.28      kent 	struct cmpci_softc *sc;
    570        1.1  augustss 
    571       1.28      kent 	sc = handle;
    572        1.1  augustss 	for (i = 0; i < 2; i++) {
    573        1.1  augustss 		int md_format;
    574        1.1  augustss 		int md_divide;
    575        1.1  augustss 		int md_index;
    576        1.1  augustss 		int mode;
    577  1.50.10.1  christos 		const audio_params_t *p;
    578       1.10     itohy 
    579        1.1  augustss 		switch (i) {
    580        1.1  augustss 		case 0:
    581        1.1  augustss 			mode = AUMODE_PLAY;
    582        1.1  augustss 			p = play;
    583        1.1  augustss 			break;
    584        1.1  augustss 		case 1:
    585        1.1  augustss 			mode = AUMODE_RECORD;
    586        1.1  augustss 			p = rec;
    587        1.1  augustss 			break;
    588       1.19  christos 		default:
    589       1.19  christos 			return EINVAL;
    590        1.1  augustss 		}
    591       1.10     itohy 
    592        1.1  augustss 		if (!(setmode & mode))
    593        1.1  augustss 			continue;
    594        1.1  augustss 
    595       1.27      kent 		md_index = cmpci_rate_to_index(p->sample_rate);
    596       1.27      kent 		md_divide = cmpci_index_to_divider(md_index);
    597       1.27      kent 		DPRINTF(("%s: sample:%u, divider=%d\n",
    598       1.46       chs 			 device_xname(sc->sc_dev), p->sample_rate, md_divide));
    599       1.27      kent 
    600        1.1  augustss 		/* format */
    601       1.27      kent 		md_format = p->channels == 1
    602       1.27      kent 			? CMPCI_REG_FORMAT_MONO : CMPCI_REG_FORMAT_STEREO;
    603       1.27      kent 		md_format |= p->precision == 16
    604       1.27      kent 			? CMPCI_REG_FORMAT_16BIT : CMPCI_REG_FORMAT_8BIT;
    605       1.27      kent 		if (mode & AUMODE_PLAY) {
    606        1.1  augustss 			cmpci_reg_partial_write_4(sc,
    607        1.7  tshiozak 			   CMPCI_REG_CHANNEL_FORMAT,
    608        1.7  tshiozak 			   CMPCI_REG_CH0_FORMAT_SHIFT,
    609        1.7  tshiozak 			   CMPCI_REG_CH0_FORMAT_MASK, md_format);
    610        1.1  augustss 			cmpci_reg_partial_write_4(sc,
    611        1.1  augustss 			    CMPCI_REG_FUNC_1, CMPCI_REG_DAC_FS_SHIFT,
    612        1.1  augustss 			    CMPCI_REG_DAC_FS_MASK, md_divide);
    613        1.7  tshiozak 			sc->sc_play.md_divide = md_divide;
    614        1.1  augustss 		} else {
    615        1.1  augustss 			cmpci_reg_partial_write_4(sc,
    616       1.27      kent 			   CMPCI_REG_CHANNEL_FORMAT,
    617       1.27      kent 			   CMPCI_REG_CH1_FORMAT_SHIFT,
    618       1.27      kent 			   CMPCI_REG_CH1_FORMAT_MASK, md_format);
    619       1.27      kent 			cmpci_reg_partial_write_4(sc,
    620        1.1  augustss 			    CMPCI_REG_FUNC_1, CMPCI_REG_ADC_FS_SHIFT,
    621        1.1  augustss 			    CMPCI_REG_ADC_FS_MASK, md_divide);
    622        1.7  tshiozak 			sc->sc_rec.md_divide = md_divide;
    623        1.1  augustss 		}
    624       1.10     itohy 		cmpci_set_out_ports(sc);
    625       1.10     itohy 		cmpci_set_in_ports(sc);
    626        1.1  augustss 	}
    627        1.1  augustss 	return 0;
    628        1.1  augustss }
    629        1.1  augustss 
    630        1.1  augustss static int
    631       1.28      kent cmpci_halt_output(void *handle)
    632        1.1  augustss {
    633       1.28      kent 	struct cmpci_softc *sc;
    634        1.1  augustss 
    635       1.28      kent 	sc = handle;
    636        1.1  augustss 	sc->sc_play.intr = NULL;
    637        1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE);
    638        1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE);
    639        1.1  augustss 	/* wait for reset DMA */
    640        1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET);
    641        1.1  augustss 	delay(10);
    642        1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET);
    643       1.10     itohy 
    644        1.1  augustss 	return 0;
    645        1.1  augustss }
    646        1.1  augustss 
    647        1.1  augustss static int
    648       1.28      kent cmpci_halt_input(void *handle)
    649        1.1  augustss {
    650       1.28      kent 	struct cmpci_softc *sc;
    651       1.10     itohy 
    652       1.28      kent 	sc = handle;
    653        1.1  augustss 	sc->sc_rec.intr = NULL;
    654        1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE);
    655        1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE);
    656        1.1  augustss 	/* wait for reset DMA */
    657        1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET);
    658        1.1  augustss 	delay(10);
    659        1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET);
    660       1.10     itohy 
    661        1.1  augustss 	return 0;
    662        1.1  augustss }
    663        1.1  augustss 
    664        1.1  augustss /* get audio device information */
    665        1.1  augustss static int
    666       1.28      kent cmpci_getdev(void *handle, struct audio_device *ad)
    667        1.1  augustss {
    668       1.28      kent 	struct cmpci_softc *sc;
    669        1.1  augustss 
    670       1.28      kent 	sc = handle;
    671        1.1  augustss 	strncpy(ad->name, "CMI PCI Audio", sizeof(ad->name));
    672        1.7  tshiozak 	snprintf(ad->version, sizeof(ad->version), "0x%02x",
    673        1.7  tshiozak 		 PCI_REVISION(sc->sc_class));
    674        1.7  tshiozak 	switch (PCI_PRODUCT(sc->sc_id)) {
    675        1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338A:
    676        1.1  augustss 		strncpy(ad->config, "CMI8338A", sizeof(ad->config));
    677        1.1  augustss 		break;
    678        1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338B:
    679        1.1  augustss 		strncpy(ad->config, "CMI8338B", sizeof(ad->config));
    680        1.1  augustss 		break;
    681        1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8738:
    682        1.1  augustss 		strncpy(ad->config, "CMI8738", sizeof(ad->config));
    683        1.1  augustss 		break;
    684        1.7  tshiozak 	case PCI_PRODUCT_CMEDIA_CMI8738B:
    685        1.7  tshiozak 		strncpy(ad->config, "CMI8738B", sizeof(ad->config));
    686        1.7  tshiozak 		break;
    687        1.1  augustss 	default:
    688        1.1  augustss 		strncpy(ad->config, "unknown", sizeof(ad->config));
    689        1.1  augustss 	}
    690        1.1  augustss 
    691        1.1  augustss 	return 0;
    692        1.1  augustss }
    693        1.1  augustss 
    694        1.1  augustss /* mixer device information */
    695        1.1  augustss int
    696       1.28      kent cmpci_query_devinfo(void *handle, mixer_devinfo_t *dip)
    697        1.1  augustss {
    698       1.10     itohy 	static const char *const mixer_port_names[] = {
    699       1.10     itohy 		AudioNdac, AudioNfmsynth, AudioNcd, AudioNline, AudioNaux,
    700       1.10     itohy 		AudioNmicrophone
    701       1.10     itohy 	};
    702       1.10     itohy 	static const char *const mixer_classes[] = {
    703       1.10     itohy 		AudioCinputs, AudioCoutputs, AudioCrecord, CmpciCplayback,
    704       1.10     itohy 		CmpciCspdif
    705       1.10     itohy 	};
    706       1.28      kent 	struct cmpci_softc *sc;
    707       1.10     itohy 	int i;
    708       1.10     itohy 
    709       1.28      kent 	sc = handle;
    710       1.10     itohy 	dip->prev = dip->next = AUDIO_MIXER_LAST;
    711       1.10     itohy 
    712        1.1  augustss 	switch (dip->index) {
    713       1.10     itohy 	case CMPCI_INPUT_CLASS:
    714       1.10     itohy 	case CMPCI_OUTPUT_CLASS:
    715       1.10     itohy 	case CMPCI_RECORD_CLASS:
    716       1.10     itohy 	case CMPCI_PLAYBACK_CLASS:
    717       1.10     itohy 	case CMPCI_SPDIF_CLASS:
    718       1.10     itohy 		dip->type = AUDIO_MIXER_CLASS;
    719       1.10     itohy 		dip->mixer_class = dip->index;
    720       1.10     itohy 		strcpy(dip->label.name,
    721       1.10     itohy 		    mixer_classes[dip->index - CMPCI_INPUT_CLASS]);
    722        1.1  augustss 		return 0;
    723       1.10     itohy 
    724       1.10     itohy 	case CMPCI_AUX_IN_VOL:
    725       1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_REG_AUX_VALBITS);
    726       1.10     itohy 		goto vol1;
    727       1.10     itohy 	case CMPCI_DAC_VOL:
    728        1.1  augustss 	case CMPCI_FM_VOL:
    729       1.10     itohy 	case CMPCI_CD_VOL:
    730       1.10     itohy 	case CMPCI_LINE_IN_VOL:
    731       1.10     itohy 	case CMPCI_MIC_VOL:
    732       1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS);
    733       1.10     itohy 	vol1:	dip->mixer_class = CMPCI_INPUT_CLASS;
    734       1.10     itohy 		dip->next = dip->index + 6;	/* CMPCI_xxx_MUTE */
    735       1.10     itohy 		strcpy(dip->label.name, mixer_port_names[dip->index]);
    736       1.10     itohy 		dip->un.v.num_channels = (dip->index == CMPCI_MIC_VOL ? 1 : 2);
    737       1.10     itohy 	vol:
    738        1.1  augustss 		dip->type = AUDIO_MIXER_VALUE;
    739        1.1  augustss 		strcpy(dip->un.v.units.name, AudioNvolume);
    740        1.1  augustss 		return 0;
    741       1.10     itohy 
    742       1.10     itohy 	case CMPCI_MIC_MUTE:
    743       1.10     itohy 		dip->next = CMPCI_MIC_PREAMP;
    744       1.10     itohy 		/* FALLTHROUGH */
    745       1.10     itohy 	case CMPCI_DAC_MUTE:
    746       1.10     itohy 	case CMPCI_FM_MUTE:
    747       1.10     itohy 	case CMPCI_CD_MUTE:
    748       1.10     itohy 	case CMPCI_LINE_IN_MUTE:
    749       1.10     itohy 	case CMPCI_AUX_IN_MUTE:
    750       1.10     itohy 		dip->prev = dip->index - 6;	/* CMPCI_xxx_VOL */
    751        1.1  augustss 		dip->mixer_class = CMPCI_INPUT_CLASS;
    752       1.10     itohy 		strcpy(dip->label.name, AudioNmute);
    753       1.10     itohy 		goto on_off;
    754       1.10     itohy 	on_off:
    755       1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    756       1.10     itohy 		dip->un.e.num_mem = 2;
    757       1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
    758       1.10     itohy 		dip->un.e.member[0].ord = 0;
    759       1.10     itohy 		strcpy(dip->un.e.member[1].label.name, AudioNon);
    760       1.10     itohy 		dip->un.e.member[1].ord = 1;
    761        1.1  augustss 		return 0;
    762       1.10     itohy 
    763       1.10     itohy 	case CMPCI_MIC_PREAMP:
    764        1.1  augustss 		dip->mixer_class = CMPCI_INPUT_CLASS;
    765       1.10     itohy 		dip->prev = CMPCI_MIC_MUTE;
    766       1.10     itohy 		strcpy(dip->label.name, AudioNpreamp);
    767       1.10     itohy 		goto on_off;
    768       1.10     itohy 	case CMPCI_PCSPEAKER:
    769        1.1  augustss 		dip->mixer_class = CMPCI_INPUT_CLASS;
    770       1.10     itohy 		strcpy(dip->label.name, AudioNspeaker);
    771        1.1  augustss 		dip->un.v.num_channels = 1;
    772       1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_SPEAKER_VALBITS);
    773       1.10     itohy 		goto vol;
    774        1.1  augustss 	case CMPCI_RECORD_SOURCE:
    775        1.1  augustss 		dip->mixer_class = CMPCI_RECORD_CLASS;
    776        1.1  augustss 		strcpy(dip->label.name, AudioNsource);
    777        1.1  augustss 		dip->type = AUDIO_MIXER_SET;
    778       1.10     itohy 		dip->un.s.num_mem = 7;
    779        1.1  augustss 		strcpy(dip->un.s.member[0].label.name, AudioNmicrophone);
    780        1.8     itohy 		dip->un.s.member[0].mask = CMPCI_RECORD_SOURCE_MIC;
    781        1.1  augustss 		strcpy(dip->un.s.member[1].label.name, AudioNcd);
    782        1.8     itohy 		dip->un.s.member[1].mask = CMPCI_RECORD_SOURCE_CD;
    783        1.1  augustss 		strcpy(dip->un.s.member[2].label.name, AudioNline);
    784        1.8     itohy 		dip->un.s.member[2].mask = CMPCI_RECORD_SOURCE_LINE_IN;
    785       1.10     itohy 		strcpy(dip->un.s.member[3].label.name, AudioNaux);
    786       1.10     itohy 		dip->un.s.member[3].mask = CMPCI_RECORD_SOURCE_AUX_IN;
    787       1.10     itohy 		strcpy(dip->un.s.member[4].label.name, AudioNwave);
    788       1.10     itohy 		dip->un.s.member[4].mask = CMPCI_RECORD_SOURCE_WAVE;
    789       1.10     itohy 		strcpy(dip->un.s.member[5].label.name, AudioNfmsynth);
    790       1.10     itohy 		dip->un.s.member[5].mask = CMPCI_RECORD_SOURCE_FM;
    791       1.10     itohy 		strcpy(dip->un.s.member[6].label.name, CmpciNspdif);
    792       1.10     itohy 		dip->un.s.member[6].mask = CMPCI_RECORD_SOURCE_SPDIF;
    793        1.1  augustss 		return 0;
    794       1.10     itohy 	case CMPCI_MIC_RECVOL:
    795        1.1  augustss 		dip->mixer_class = CMPCI_RECORD_CLASS;
    796       1.10     itohy 		strcpy(dip->label.name, AudioNmicrophone);
    797        1.1  augustss 		dip->un.v.num_channels = 1;
    798       1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_REG_ADMIC_VALBITS);
    799       1.10     itohy 		goto vol;
    800       1.10     itohy 
    801       1.10     itohy 	case CMPCI_PLAYBACK_MODE:
    802       1.10     itohy 		dip->mixer_class = CMPCI_PLAYBACK_CLASS;
    803       1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    804       1.10     itohy 		strcpy(dip->label.name, AudioNmode);
    805       1.10     itohy 		dip->un.e.num_mem = 2;
    806       1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNdac);
    807       1.10     itohy 		dip->un.e.member[0].ord = CMPCI_PLAYBACK_MODE_WAVE;
    808       1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNspdif);
    809       1.10     itohy 		dip->un.e.member[1].ord = CMPCI_PLAYBACK_MODE_SPDIF;
    810        1.1  augustss 		return 0;
    811       1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
    812       1.10     itohy 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    813       1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    814       1.10     itohy 		dip->next = CMPCI_SPDIF_IN_PHASE;
    815        1.1  augustss 		strcpy(dip->label.name, AudioNinput);
    816       1.10     itohy 		i = 0;
    817       1.10     itohy 		strcpy(dip->un.e.member[i].label.name, CmpciNspdin1);
    818       1.10     itohy 		dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN1;
    819       1.10     itohy 		if (CMPCI_ISCAP(sc, 2ND_SPDIN)) {
    820       1.10     itohy 			strcpy(dip->un.e.member[i].label.name, CmpciNspdin2);
    821       1.10     itohy 			dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN2;
    822       1.10     itohy 		}
    823       1.10     itohy 		strcpy(dip->un.e.member[i].label.name, CmpciNspdout);
    824       1.10     itohy 		dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDOUT;
    825       1.10     itohy 		dip->un.e.num_mem = i;
    826       1.10     itohy 		return 0;
    827       1.10     itohy 	case CMPCI_SPDIF_IN_PHASE:
    828       1.10     itohy 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    829       1.10     itohy 		dip->prev = CMPCI_SPDIF_IN_SELECT;
    830       1.10     itohy 		strcpy(dip->label.name, CmpciNphase);
    831       1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    832       1.10     itohy 		dip->un.e.num_mem = 2;
    833       1.10     itohy 		strcpy(dip->un.e.member[0].label.name, CmpciNpositive);
    834       1.10     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_IN_PHASE_POSITIVE;
    835       1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNnegative);
    836       1.10     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_IN_PHASE_NEGATIVE;
    837        1.1  augustss 		return 0;
    838       1.10     itohy 	case CMPCI_SPDIF_LOOP:
    839       1.10     itohy 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    840       1.10     itohy 		dip->next = CMPCI_SPDIF_OUT_PLAYBACK;
    841        1.1  augustss 		strcpy(dip->label.name, AudioNoutput);
    842        1.1  augustss 		dip->type = AUDIO_MIXER_ENUM;
    843       1.10     itohy 		dip->un.e.num_mem = 2;
    844       1.10     itohy 		strcpy(dip->un.e.member[0].label.name, CmpciNplayback);
    845       1.10     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_LOOP_OFF;
    846       1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNspdin);
    847       1.10     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_LOOP_ON;
    848        1.7  tshiozak 		return 0;
    849       1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
    850        1.7  tshiozak 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    851       1.10     itohy 		dip->prev = CMPCI_SPDIF_LOOP;
    852       1.10     itohy 		dip->next = CMPCI_SPDIF_OUT_VOLTAGE;
    853       1.10     itohy 		strcpy(dip->label.name, CmpciNplayback);
    854       1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    855       1.10     itohy 		dip->un.e.num_mem = 2;
    856       1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNwave);
    857       1.10     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_PLAYBACK_WAVE;
    858       1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNlegacy);
    859       1.10     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_PLAYBACK_LEGACY;
    860        1.7  tshiozak 		return 0;
    861        1.7  tshiozak 	case CMPCI_SPDIF_OUT_VOLTAGE:
    862        1.7  tshiozak 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    863       1.10     itohy 		dip->prev = CMPCI_SPDIF_OUT_PLAYBACK;
    864       1.10     itohy 		strcpy(dip->label.name, CmpciNvoltage);
    865        1.7  tshiozak 		dip->type = AUDIO_MIXER_ENUM;
    866        1.7  tshiozak 		dip->un.e.num_mem = 2;
    867       1.21     itohy 		strcpy(dip->un.e.member[0].label.name, CmpciNhigh_v);
    868       1.21     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_VOLTAGE_HIGH;
    869       1.21     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNlow_v);
    870       1.21     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_VOLTAGE_LOW;
    871        1.7  tshiozak 		return 0;
    872       1.10     itohy 	case CMPCI_MONITOR_DAC:
    873        1.7  tshiozak 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    874       1.10     itohy 		strcpy(dip->label.name, AudioNmonitor);
    875       1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    876       1.10     itohy 		dip->un.e.num_mem = 3;
    877       1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
    878       1.10     itohy 		dip->un.e.member[0].ord = CMPCI_MONITOR_DAC_OFF;
    879       1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNspdin);
    880       1.10     itohy 		dip->un.e.member[1].ord = CMPCI_MONITOR_DAC_SPDIN;
    881       1.10     itohy 		strcpy(dip->un.e.member[2].label.name, CmpciNspdout);
    882       1.10     itohy 		dip->un.e.member[2].ord = CMPCI_MONITOR_DAC_SPDOUT;
    883       1.10     itohy 		return 0;
    884       1.10     itohy 
    885       1.10     itohy 	case CMPCI_MASTER_VOL:
    886       1.10     itohy 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
    887       1.10     itohy 		strcpy(dip->label.name, AudioNmaster);
    888       1.10     itohy 		dip->un.v.num_channels = 2;
    889       1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS);
    890       1.10     itohy 		goto vol;
    891        1.7  tshiozak 	case CMPCI_REAR:
    892        1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
    893        1.7  tshiozak 		dip->next = CMPCI_INDIVIDUAL;
    894        1.7  tshiozak 		strcpy(dip->label.name, CmpciNrear);
    895        1.7  tshiozak 		goto on_off;
    896        1.7  tshiozak 	case CMPCI_INDIVIDUAL:
    897        1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
    898        1.7  tshiozak 		dip->prev = CMPCI_REAR;
    899        1.7  tshiozak 		dip->next = CMPCI_REVERSE;
    900        1.7  tshiozak 		strcpy(dip->label.name, CmpciNindividual);
    901        1.7  tshiozak 		goto on_off;
    902        1.7  tshiozak 	case CMPCI_REVERSE:
    903        1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
    904        1.7  tshiozak 		dip->prev = CMPCI_INDIVIDUAL;
    905        1.7  tshiozak 		strcpy(dip->label.name, CmpciNreverse);
    906       1.10     itohy 		goto on_off;
    907        1.7  tshiozak 	case CMPCI_SURROUND:
    908        1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
    909        1.7  tshiozak 		strcpy(dip->label.name, CmpciNsurround);
    910        1.7  tshiozak 		goto on_off;
    911       1.10     itohy 	}
    912        1.7  tshiozak 
    913        1.1  augustss 	return ENXIO;
    914        1.1  augustss }
    915        1.1  augustss 
    916        1.1  augustss static int
    917       1.43  jmcneill cmpci_alloc_dmamem(struct cmpci_softc *sc, size_t size, void **r_addr)
    918        1.1  augustss {
    919       1.28      kent 	int error;
    920        1.1  augustss 	struct cmpci_dmanode *n;
    921        1.1  augustss 
    922       1.28      kent 	error = 0;
    923       1.49      maxv 	n = kmem_alloc(sizeof(*n), KM_SLEEP);
    924        1.1  augustss 
    925        1.1  augustss #define CMPCI_DMABUF_ALIGN    0x4
    926        1.1  augustss #define CMPCI_DMABUF_BOUNDARY 0x0
    927        1.1  augustss 	n->cd_tag = sc->sc_dmat;
    928        1.1  augustss 	n->cd_size = size;
    929        1.1  augustss 	error = bus_dmamem_alloc(n->cd_tag, n->cd_size,
    930        1.1  augustss 	    CMPCI_DMABUF_ALIGN, CMPCI_DMABUF_BOUNDARY, n->cd_segs,
    931       1.43  jmcneill 	    sizeof(n->cd_segs)/sizeof(n->cd_segs[0]), &n->cd_nsegs,
    932       1.43  jmcneill 	    BUS_DMA_WAITOK);
    933        1.1  augustss 	if (error)
    934        1.1  augustss 		goto mfree;
    935        1.1  augustss 	error = bus_dmamem_map(n->cd_tag, n->cd_segs, n->cd_nsegs, n->cd_size,
    936       1.43  jmcneill 	    &n->cd_addr, BUS_DMA_WAITOK | BUS_DMA_COHERENT);
    937        1.1  augustss 	if (error)
    938        1.1  augustss 		goto dmafree;
    939        1.1  augustss 	error = bus_dmamap_create(n->cd_tag, n->cd_size, 1, n->cd_size, 0,
    940       1.43  jmcneill 	    BUS_DMA_WAITOK, &n->cd_map);
    941        1.1  augustss 	if (error)
    942        1.1  augustss 		goto unmap;
    943        1.1  augustss 	error = bus_dmamap_load(n->cd_tag, n->cd_map, n->cd_addr, n->cd_size,
    944       1.43  jmcneill 	    NULL, BUS_DMA_WAITOK);
    945        1.1  augustss 	if (error)
    946        1.1  augustss 		goto destroy;
    947       1.10     itohy 
    948        1.1  augustss 	n->cd_next = sc->sc_dmap;
    949        1.1  augustss 	sc->sc_dmap = n;
    950        1.1  augustss 	*r_addr = KVADDR(n);
    951        1.1  augustss 	return 0;
    952       1.10     itohy 
    953        1.1  augustss  destroy:
    954        1.1  augustss 	bus_dmamap_destroy(n->cd_tag, n->cd_map);
    955        1.1  augustss  unmap:
    956        1.1  augustss 	bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size);
    957        1.1  augustss  dmafree:
    958        1.1  augustss 	bus_dmamem_free(n->cd_tag,
    959        1.1  augustss 			n->cd_segs, sizeof(n->cd_segs)/sizeof(n->cd_segs[0]));
    960        1.1  augustss  mfree:
    961       1.43  jmcneill 	kmem_free(n, sizeof(*n));
    962        1.1  augustss 	return error;
    963        1.1  augustss }
    964        1.1  augustss 
    965        1.1  augustss static int
    966       1.43  jmcneill cmpci_free_dmamem(struct cmpci_softc *sc, void *addr, size_t size)
    967        1.1  augustss {
    968        1.1  augustss 	struct cmpci_dmanode **nnp;
    969       1.10     itohy 
    970        1.1  augustss 	for (nnp = &sc->sc_dmap; *nnp; nnp= &(*nnp)->cd_next) {
    971        1.1  augustss 		if ((*nnp)->cd_addr == addr) {
    972        1.1  augustss 			struct cmpci_dmanode *n = *nnp;
    973        1.1  augustss 			bus_dmamap_unload(n->cd_tag, n->cd_map);
    974        1.1  augustss 			bus_dmamap_destroy(n->cd_tag, n->cd_map);
    975        1.1  augustss 			bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size);
    976        1.1  augustss 			bus_dmamem_free(n->cd_tag, n->cd_segs,
    977        1.1  augustss 			    sizeof(n->cd_segs)/sizeof(n->cd_segs[0]));
    978       1.43  jmcneill 			kmem_free(n, sizeof(*n));
    979        1.1  augustss 			return 0;
    980        1.1  augustss 		}
    981        1.1  augustss 	}
    982        1.1  augustss 	return -1;
    983        1.1  augustss }
    984        1.1  augustss 
    985        1.1  augustss static struct cmpci_dmanode *
    986       1.35  christos cmpci_find_dmamem(struct cmpci_softc *sc, void *addr)
    987        1.1  augustss {
    988        1.1  augustss 	struct cmpci_dmanode *p;
    989       1.10     itohy 
    990       1.28      kent 	for (p = sc->sc_dmap; p; p = p->cd_next)
    991       1.28      kent 		if (KVADDR(p) == (void *)addr)
    992        1.1  augustss 			break;
    993        1.1  augustss 	return p;
    994        1.1  augustss }
    995        1.1  augustss 
    996        1.1  augustss #if 0
    997        1.1  augustss static void
    998       1.28      kent cmpci_print_dmamem(struct cmpci_dmanode *);
    999        1.1  augustss static void
   1000       1.28      kent cmpci_print_dmamem(struct cmpci_dmanode *p)
   1001        1.1  augustss {
   1002       1.28      kent 
   1003        1.1  augustss 	DPRINTF(("DMA at virt:%p, dmaseg:%p, mapseg:%p, size:%p\n",
   1004        1.1  augustss 		 (void *)p->cd_addr, (void *)p->cd_segs[0].ds_addr,
   1005        1.1  augustss 		 (void *)DMAADDR(p), (void *)p->cd_size));
   1006        1.1  augustss }
   1007        1.1  augustss #endif /* DEBUG */
   1008        1.1  augustss 
   1009        1.1  augustss static void *
   1010       1.43  jmcneill cmpci_allocm(void *handle, int direction, size_t size)
   1011        1.1  augustss {
   1012       1.35  christos 	void *addr;
   1013       1.10     itohy 
   1014       1.31       mrg 	addr = NULL;	/* XXX gcc */
   1015       1.31       mrg 
   1016       1.43  jmcneill 	if (cmpci_alloc_dmamem(handle, size, &addr))
   1017        1.1  augustss 		return NULL;
   1018        1.1  augustss 	return addr;
   1019        1.1  augustss }
   1020        1.1  augustss 
   1021        1.1  augustss static void
   1022       1.43  jmcneill cmpci_freem(void *handle, void *addr, size_t size)
   1023        1.1  augustss {
   1024       1.10     itohy 
   1025       1.43  jmcneill 	cmpci_free_dmamem(handle, addr, size);
   1026        1.1  augustss }
   1027        1.1  augustss 
   1028        1.1  augustss #define MAXVAL 256
   1029        1.1  augustss static int
   1030       1.28      kent cmpci_adjust(int val, int mask)
   1031        1.1  augustss {
   1032       1.28      kent 
   1033        1.1  augustss 	val += (MAXVAL - mask) >> 1;
   1034        1.1  augustss 	if (val >= MAXVAL)
   1035        1.1  augustss 		val = MAXVAL-1;
   1036        1.1  augustss 	return val & mask;
   1037        1.1  augustss }
   1038        1.1  augustss 
   1039        1.1  augustss static void
   1040       1.28      kent cmpci_set_mixer_gain(struct cmpci_softc *sc, int port)
   1041        1.1  augustss {
   1042       1.23     itohy 	int src;
   1043       1.10     itohy 	int bits, mask;
   1044        1.1  augustss 
   1045        1.1  augustss 	switch (port) {
   1046        1.1  augustss 	case CMPCI_MIC_VOL:
   1047       1.10     itohy 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_MIC,
   1048       1.10     itohy 		    CMPCI_ADJUST_MIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
   1049       1.23     itohy 		return;
   1050        1.1  augustss 	case CMPCI_MASTER_VOL:
   1051        1.1  augustss 		src = CMPCI_SB16_MIXER_MASTER_L;
   1052        1.1  augustss 		break;
   1053        1.1  augustss 	case CMPCI_LINE_IN_VOL:
   1054        1.1  augustss 		src = CMPCI_SB16_MIXER_LINE_L;
   1055        1.1  augustss 		break;
   1056       1.10     itohy 	case CMPCI_AUX_IN_VOL:
   1057       1.10     itohy 		bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MIXER_AUX,
   1058       1.10     itohy 		    CMPCI_ADJUST_AUX_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT],
   1059       1.10     itohy 					      sc->sc_gain[port][CMPCI_RIGHT]));
   1060       1.10     itohy 		return;
   1061       1.10     itohy 	case CMPCI_MIC_RECVOL:
   1062       1.10     itohy 		cmpci_reg_partial_write_1(sc, CMPCI_REG_MIXER25,
   1063       1.10     itohy 		    CMPCI_REG_ADMIC_SHIFT, CMPCI_REG_ADMIC_MASK,
   1064       1.10     itohy 		    CMPCI_ADJUST_ADMIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
   1065       1.10     itohy 		return;
   1066       1.10     itohy 	case CMPCI_DAC_VOL:
   1067        1.1  augustss 		src = CMPCI_SB16_MIXER_VOICE_L;
   1068        1.1  augustss 		break;
   1069        1.1  augustss 	case CMPCI_FM_VOL:
   1070        1.1  augustss 		src = CMPCI_SB16_MIXER_FM_L;
   1071        1.1  augustss 		break;
   1072        1.1  augustss 	case CMPCI_CD_VOL:
   1073        1.1  augustss 		src = CMPCI_SB16_MIXER_CDDA_L;
   1074        1.1  augustss 		break;
   1075        1.1  augustss 	case CMPCI_PCSPEAKER:
   1076        1.1  augustss 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_SPEAKER,
   1077       1.10     itohy 		    CMPCI_ADJUST_2_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
   1078       1.10     itohy 		return;
   1079       1.10     itohy 	case CMPCI_MIC_PREAMP:
   1080       1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1081       1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
   1082       1.10     itohy 			    CMPCI_REG_MICGAINZ);
   1083       1.10     itohy 		else
   1084       1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
   1085       1.10     itohy 			    CMPCI_REG_MICGAINZ);
   1086        1.7  tshiozak 		return;
   1087       1.10     itohy 
   1088       1.10     itohy 	case CMPCI_DAC_MUTE:
   1089       1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1090       1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1091       1.10     itohy 			    CMPCI_REG_WSMUTE);
   1092       1.10     itohy 		else
   1093       1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1094       1.10     itohy 			    CMPCI_REG_WSMUTE);
   1095       1.10     itohy 		return;
   1096       1.10     itohy 	case CMPCI_FM_MUTE:
   1097       1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1098       1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1099       1.10     itohy 			    CMPCI_REG_FMMUTE);
   1100       1.10     itohy 		else
   1101       1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1102       1.10     itohy 			    CMPCI_REG_FMMUTE);
   1103       1.10     itohy 		return;
   1104       1.10     itohy 	case CMPCI_AUX_IN_MUTE:
   1105       1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1106       1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
   1107       1.10     itohy 			    CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM);
   1108       1.10     itohy 		else
   1109       1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
   1110       1.10     itohy 			    CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM);
   1111       1.10     itohy 		return;
   1112       1.10     itohy 	case CMPCI_CD_MUTE:
   1113       1.10     itohy 		mask = CMPCI_SB16_SW_CD;
   1114       1.10     itohy 		goto sbmute;
   1115       1.10     itohy 	case CMPCI_MIC_MUTE:
   1116       1.10     itohy 		mask = CMPCI_SB16_SW_MIC;
   1117       1.10     itohy 		goto sbmute;
   1118       1.10     itohy 	case CMPCI_LINE_IN_MUTE:
   1119       1.10     itohy 		mask = CMPCI_SB16_SW_LINE;
   1120       1.10     itohy 	sbmute:
   1121       1.10     itohy 		bits = cmpci_mixerreg_read(sc, CMPCI_SB16_MIXER_OUTMIX);
   1122       1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1123       1.10     itohy 			bits = bits & ~mask;
   1124       1.10     itohy 		else
   1125       1.10     itohy 			bits = bits | mask;
   1126       1.10     itohy 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, bits);
   1127        1.8     itohy 		return;
   1128       1.10     itohy 
   1129       1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
   1130       1.10     itohy 	case CMPCI_MONITOR_DAC:
   1131       1.10     itohy 	case CMPCI_PLAYBACK_MODE:
   1132        1.7  tshiozak 	case CMPCI_SPDIF_LOOP:
   1133       1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
   1134        1.7  tshiozak 		cmpci_set_out_ports(sc);
   1135        1.7  tshiozak 		return;
   1136        1.7  tshiozak 	case CMPCI_SPDIF_OUT_VOLTAGE:
   1137        1.7  tshiozak 		if (CMPCI_ISCAP(sc, SPDOUT_VOLTAGE)) {
   1138       1.10     itohy 			if (sc->sc_gain[CMPCI_SPDIF_OUT_VOLTAGE][CMPCI_LR]
   1139       1.21     itohy 			    == CMPCI_SPDIF_OUT_VOLTAGE_HIGH)
   1140       1.21     itohy 				cmpci_reg_clear_reg_misc(sc, CMPCI_REG_5V);
   1141       1.10     itohy 			else
   1142       1.21     itohy 				cmpci_reg_set_reg_misc(sc, CMPCI_REG_5V);
   1143        1.7  tshiozak 		}
   1144        1.7  tshiozak 		return;
   1145        1.7  tshiozak 	case CMPCI_SURROUND:
   1146        1.7  tshiozak 		if (CMPCI_ISCAP(sc, SURROUND)) {
   1147        1.7  tshiozak 			if (sc->sc_gain[CMPCI_SURROUND][CMPCI_LR])
   1148        1.7  tshiozak 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1149        1.7  tshiozak 						CMPCI_REG_SURROUND);
   1150        1.7  tshiozak 			else
   1151        1.7  tshiozak 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1152        1.7  tshiozak 						  CMPCI_REG_SURROUND);
   1153        1.7  tshiozak 		}
   1154        1.7  tshiozak 		return;
   1155        1.7  tshiozak 	case CMPCI_REAR:
   1156        1.7  tshiozak 		if (CMPCI_ISCAP(sc, REAR)) {
   1157        1.7  tshiozak 			if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
   1158       1.21     itohy 				cmpci_reg_set_reg_misc(sc, CMPCI_REG_N4SPK3D);
   1159        1.7  tshiozak 			else
   1160       1.21     itohy 				cmpci_reg_clear_reg_misc(sc, CMPCI_REG_N4SPK3D);
   1161        1.7  tshiozak 		}
   1162        1.7  tshiozak 		return;
   1163        1.7  tshiozak 	case CMPCI_INDIVIDUAL:
   1164        1.7  tshiozak 		if (CMPCI_ISCAP(sc, INDIVIDUAL_REAR)) {
   1165        1.7  tshiozak 			if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
   1166        1.7  tshiozak 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1167        1.7  tshiozak 						CMPCI_REG_INDIVIDUAL);
   1168        1.7  tshiozak 			else
   1169        1.7  tshiozak 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1170        1.7  tshiozak 						  CMPCI_REG_INDIVIDUAL);
   1171        1.7  tshiozak 		}
   1172        1.7  tshiozak 		return;
   1173        1.7  tshiozak 	case CMPCI_REVERSE:
   1174        1.7  tshiozak 		if (CMPCI_ISCAP(sc, REVERSE_FR)) {
   1175        1.7  tshiozak 			if (sc->sc_gain[CMPCI_REVERSE][CMPCI_LR])
   1176        1.7  tshiozak 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1177        1.7  tshiozak 						CMPCI_REG_REVERSE_FR);
   1178        1.7  tshiozak 			else
   1179        1.7  tshiozak 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1180        1.7  tshiozak 						  CMPCI_REG_REVERSE_FR);
   1181        1.7  tshiozak 		}
   1182        1.7  tshiozak 		return;
   1183        1.7  tshiozak 	case CMPCI_SPDIF_IN_PHASE:
   1184        1.7  tshiozak 		if (CMPCI_ISCAP(sc, SPDIN_PHASE)) {
   1185       1.10     itohy 			if (sc->sc_gain[CMPCI_SPDIF_IN_PHASE][CMPCI_LR]
   1186       1.10     itohy 			    == CMPCI_SPDIF_IN_PHASE_POSITIVE)
   1187       1.10     itohy 				cmpci_reg_clear_1(sc, CMPCI_REG_CHANNEL_FORMAT,
   1188       1.10     itohy 						  CMPCI_REG_SPDIN_PHASE);
   1189       1.10     itohy 			else
   1190        1.8     itohy 				cmpci_reg_set_1(sc, CMPCI_REG_CHANNEL_FORMAT,
   1191        1.8     itohy 						CMPCI_REG_SPDIN_PHASE);
   1192        1.7  tshiozak 		}
   1193        1.1  augustss 		return;
   1194        1.1  augustss 	default:
   1195        1.1  augustss 		return;
   1196        1.1  augustss 	}
   1197       1.10     itohy 
   1198       1.10     itohy 	cmpci_mixerreg_write(sc, src,
   1199       1.10     itohy 	    CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT]));
   1200        1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_L_TO_R(src),
   1201       1.10     itohy 	    CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_RIGHT]));
   1202        1.7  tshiozak }
   1203        1.7  tshiozak 
   1204        1.7  tshiozak static void
   1205       1.28      kent cmpci_set_out_ports(struct cmpci_softc *sc)
   1206        1.7  tshiozak {
   1207       1.28      kent 	uint8_t v;
   1208       1.28      kent 	int enspdout;
   1209       1.10     itohy 
   1210        1.7  tshiozak 	if (!CMPCI_ISCAP(sc, SPDLOOP))
   1211        1.7  tshiozak 		return;
   1212       1.10     itohy 
   1213       1.10     itohy 	/* SPDIF/out select */
   1214       1.10     itohy 	if (sc->sc_gain[CMPCI_SPDIF_LOOP][CMPCI_LR] == CMPCI_SPDIF_LOOP_OFF) {
   1215       1.10     itohy 		/* playback */
   1216       1.10     itohy 		cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP);
   1217       1.10     itohy 	} else {
   1218       1.10     itohy 		/* monitor SPDIF/in */
   1219       1.10     itohy 		cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP);
   1220       1.10     itohy 	}
   1221       1.10     itohy 
   1222       1.10     itohy 	/* SPDIF in select */
   1223       1.10     itohy 	v = sc->sc_gain[CMPCI_SPDIF_IN_SELECT][CMPCI_LR];
   1224       1.10     itohy 	if (v & CMPCI_SPDIFIN_SPDIFIN2)
   1225       1.21     itohy 		cmpci_reg_set_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN);
   1226       1.10     itohy 	else
   1227       1.21     itohy 		cmpci_reg_clear_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN);
   1228       1.10     itohy 	if (v & CMPCI_SPDIFIN_SPDIFOUT)
   1229       1.21     itohy 		cmpci_reg_set_reg_misc(sc, CMPCI_REG_SPDFLOOPI);
   1230       1.10     itohy 	else
   1231       1.21     itohy 		cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPDFLOOPI);
   1232       1.10     itohy 
   1233       1.28      kent 	enspdout = 0;
   1234       1.10     itohy 	/* playback to ... */
   1235       1.10     itohy 	if (CMPCI_ISCAP(sc, SPDOUT) &&
   1236       1.10     itohy 	    sc->sc_gain[CMPCI_PLAYBACK_MODE][CMPCI_LR]
   1237       1.10     itohy 		== CMPCI_PLAYBACK_MODE_SPDIF &&
   1238       1.10     itohy 	    (sc->sc_play.md_divide == CMPCI_REG_RATE_44100 ||
   1239       1.10     itohy 		(CMPCI_ISCAP(sc, SPDOUT_48K) &&
   1240       1.10     itohy 		    sc->sc_play.md_divide==CMPCI_REG_RATE_48000))) {
   1241       1.10     itohy 		/* playback to SPDIF */
   1242       1.10     itohy 		cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE);
   1243       1.10     itohy 		enspdout = 1;
   1244       1.10     itohy 		if (sc->sc_play.md_divide==CMPCI_REG_RATE_48000)
   1245       1.21     itohy 			cmpci_reg_set_reg_misc(sc,
   1246       1.21     itohy 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
   1247       1.10     itohy 		else
   1248       1.21     itohy 			cmpci_reg_clear_reg_misc(sc,
   1249       1.21     itohy 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
   1250       1.10     itohy 	} else {
   1251       1.10     itohy 		/* playback to DAC */
   1252        1.7  tshiozak 		cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
   1253       1.10     itohy 				  CMPCI_REG_SPDIF0_ENABLE);
   1254       1.10     itohy 		if (CMPCI_ISCAP(sc, SPDOUT_48K))
   1255       1.21     itohy 			cmpci_reg_clear_reg_misc(sc,
   1256       1.21     itohy 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
   1257       1.10     itohy 	}
   1258       1.10     itohy 
   1259       1.10     itohy 	/* legacy to SPDIF/out or not */
   1260       1.10     itohy 	if (CMPCI_ISCAP(sc, SPDLEGACY)) {
   1261       1.10     itohy 		if (sc->sc_gain[CMPCI_SPDIF_OUT_PLAYBACK][CMPCI_LR]
   1262       1.10     itohy 		    == CMPCI_SPDIF_OUT_PLAYBACK_WAVE)
   1263       1.10     itohy 			cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL,
   1264       1.10     itohy 					CMPCI_REG_LEGACY_SPDIF_ENABLE);
   1265       1.10     itohy 		else {
   1266       1.10     itohy 			cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL,
   1267       1.10     itohy 					CMPCI_REG_LEGACY_SPDIF_ENABLE);
   1268       1.10     itohy 			enspdout = 1;
   1269       1.10     itohy 		}
   1270       1.10     itohy 	}
   1271       1.10     itohy 
   1272       1.10     itohy 	/* enable/disable SPDIF/out */
   1273       1.10     itohy 	if (CMPCI_ISCAP(sc, XSPDOUT) && enspdout)
   1274       1.10     itohy 		cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL,
   1275       1.10     itohy 				CMPCI_REG_XSPDIF_ENABLE);
   1276       1.10     itohy 	else
   1277        1.7  tshiozak 		cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL,
   1278       1.10     itohy 				CMPCI_REG_XSPDIF_ENABLE);
   1279       1.10     itohy 
   1280       1.25   xtraeme 	/* SPDIF monitor (digital to analog output) */
   1281       1.10     itohy 	if (CMPCI_ISCAP(sc, SPDIN_MONITOR)) {
   1282       1.10     itohy 		v = sc->sc_gain[CMPCI_MONITOR_DAC][CMPCI_LR];
   1283       1.10     itohy 		if (!(v & CMPCI_MONDAC_ENABLE))
   1284       1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1285       1.10     itohy 					CMPCI_REG_SPDIN_MONITOR);
   1286       1.10     itohy 		if (v & CMPCI_MONDAC_SPDOUT)
   1287        1.7  tshiozak 			cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1,
   1288       1.10     itohy 					CMPCI_REG_SPDIFOUT_DAC);
   1289       1.10     itohy 		else
   1290        1.7  tshiozak 			cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
   1291       1.10     itohy 					CMPCI_REG_SPDIFOUT_DAC);
   1292       1.10     itohy 		if (v & CMPCI_MONDAC_ENABLE)
   1293       1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1294       1.10     itohy 					CMPCI_REG_SPDIN_MONITOR);
   1295        1.7  tshiozak 	}
   1296        1.1  augustss }
   1297        1.1  augustss 
   1298        1.1  augustss static int
   1299       1.28      kent cmpci_set_in_ports(struct cmpci_softc *sc)
   1300       1.10     itohy {
   1301        1.1  augustss 	int mask;
   1302        1.1  augustss 	int bitsl, bitsr;
   1303        1.1  augustss 
   1304       1.10     itohy 	mask = sc->sc_in_mask;
   1305       1.10     itohy 
   1306       1.10     itohy 	/*
   1307       1.10     itohy 	 * Note CMPCI_RECORD_SOURCE_CD, CMPCI_RECORD_SOURCE_LINE_IN and
   1308       1.10     itohy 	 * CMPCI_RECORD_SOURCE_FM are defined to the corresponding bit
   1309       1.10     itohy 	 * of the mixer register.
   1310       1.10     itohy 	 */
   1311       1.10     itohy 	bitsr = mask & (CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN |
   1312       1.10     itohy 	    CMPCI_RECORD_SOURCE_FM);
   1313       1.10     itohy 
   1314        1.1  augustss 	bitsl = CMPCI_SB16_MIXER_SRC_R_TO_L(bitsr);
   1315        1.8     itohy 	if (mask & CMPCI_RECORD_SOURCE_MIC) {
   1316        1.1  augustss 		bitsl |= CMPCI_SB16_MIXER_MIC_SRC;
   1317        1.1  augustss 		bitsr |= CMPCI_SB16_MIXER_MIC_SRC;
   1318        1.1  augustss 	}
   1319        1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, bitsl);
   1320        1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, bitsr);
   1321       1.10     itohy 
   1322       1.10     itohy 	if (mask & CMPCI_RECORD_SOURCE_AUX_IN)
   1323       1.10     itohy 		cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
   1324       1.10     itohy 		    CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN);
   1325       1.10     itohy 	else
   1326       1.10     itohy 		cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
   1327       1.10     itohy 		    CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN);
   1328       1.10     itohy 
   1329       1.10     itohy 	if (mask & CMPCI_RECORD_SOURCE_WAVE)
   1330       1.10     itohy 		cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1331       1.10     itohy 		    CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR);
   1332       1.10     itohy 	else
   1333       1.10     itohy 		cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1334       1.10     itohy 		    CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR);
   1335       1.10     itohy 
   1336        1.7  tshiozak 	if (CMPCI_ISCAP(sc, SPDIN) &&
   1337       1.10     itohy 	    (sc->sc_rec.md_divide == CMPCI_REG_RATE_44100 ||
   1338       1.10     itohy 		(CMPCI_ISCAP(sc, SPDOUT_48K) &&
   1339       1.10     itohy 		    sc->sc_rec.md_divide == CMPCI_REG_RATE_48000/* XXX? */))) {
   1340        1.8     itohy 		if (mask & CMPCI_RECORD_SOURCE_SPDIF) {
   1341        1.7  tshiozak 			/* enable SPDIF/in */
   1342        1.7  tshiozak 			cmpci_reg_set_4(sc,
   1343        1.7  tshiozak 					CMPCI_REG_FUNC_1,
   1344        1.7  tshiozak 					CMPCI_REG_SPDIF1_ENABLE);
   1345        1.7  tshiozak 		} else {
   1346        1.7  tshiozak 			cmpci_reg_clear_4(sc,
   1347        1.7  tshiozak 					CMPCI_REG_FUNC_1,
   1348        1.7  tshiozak 					CMPCI_REG_SPDIF1_ENABLE);
   1349        1.7  tshiozak 		}
   1350        1.7  tshiozak 	}
   1351        1.1  augustss 
   1352        1.1  augustss 	return 0;
   1353        1.1  augustss }
   1354        1.1  augustss 
   1355        1.1  augustss static int
   1356       1.28      kent cmpci_set_port(void *handle, mixer_ctrl_t *cp)
   1357        1.1  augustss {
   1358       1.28      kent 	struct cmpci_softc *sc;
   1359        1.1  augustss 	int lgain, rgain;
   1360       1.10     itohy 
   1361       1.28      kent 	sc = handle;
   1362        1.1  augustss 	switch (cp->dev) {
   1363       1.10     itohy 	case CMPCI_MIC_VOL:
   1364        1.1  augustss 	case CMPCI_PCSPEAKER:
   1365       1.10     itohy 	case CMPCI_MIC_RECVOL:
   1366       1.10     itohy 		if (cp->un.value.num_channels != 1)
   1367       1.10     itohy 			return EINVAL;
   1368       1.10     itohy 		/* FALLTHROUGH */
   1369       1.10     itohy 	case CMPCI_DAC_VOL:
   1370        1.1  augustss 	case CMPCI_FM_VOL:
   1371        1.1  augustss 	case CMPCI_CD_VOL:
   1372       1.10     itohy 	case CMPCI_LINE_IN_VOL:
   1373       1.10     itohy 	case CMPCI_AUX_IN_VOL:
   1374        1.1  augustss 	case CMPCI_MASTER_VOL:
   1375        1.1  augustss 		if (cp->type != AUDIO_MIXER_VALUE)
   1376        1.1  augustss 			return EINVAL;
   1377       1.10     itohy 		switch (cp->un.value.num_channels) {
   1378       1.10     itohy 		case 1:
   1379        1.1  augustss 			lgain = rgain =
   1380       1.10     itohy 			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
   1381        1.1  augustss 			break;
   1382       1.10     itohy 		case 2:
   1383       1.10     itohy 			lgain = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT];
   1384       1.10     itohy 			rgain = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT];
   1385        1.1  augustss 			break;
   1386        1.1  augustss 		default:
   1387       1.10     itohy 			return EINVAL;
   1388        1.1  augustss 		}
   1389        1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_LEFT]  = lgain;
   1390        1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_RIGHT] = rgain;
   1391        1.1  augustss 
   1392        1.1  augustss 		cmpci_set_mixer_gain(sc, cp->dev);
   1393        1.1  augustss 		break;
   1394        1.1  augustss 
   1395        1.1  augustss 	case CMPCI_RECORD_SOURCE:
   1396        1.1  augustss 		if (cp->type != AUDIO_MIXER_SET)
   1397        1.1  augustss 			return EINVAL;
   1398        1.8     itohy 
   1399       1.10     itohy 		if (cp->un.mask & ~(CMPCI_RECORD_SOURCE_MIC |
   1400       1.10     itohy 		    CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN |
   1401       1.10     itohy 		    CMPCI_RECORD_SOURCE_AUX_IN | CMPCI_RECORD_SOURCE_WAVE |
   1402       1.10     itohy 		    CMPCI_RECORD_SOURCE_FM | CMPCI_RECORD_SOURCE_SPDIF))
   1403       1.10     itohy 			return EINVAL;
   1404       1.10     itohy 
   1405        1.8     itohy 		if (cp->un.mask & CMPCI_RECORD_SOURCE_SPDIF)
   1406        1.8     itohy 			cp->un.mask = CMPCI_RECORD_SOURCE_SPDIF;
   1407        1.8     itohy 
   1408       1.10     itohy 		sc->sc_in_mask = cp->un.mask;
   1409       1.10     itohy 		return cmpci_set_in_ports(sc);
   1410        1.1  augustss 
   1411       1.10     itohy 	/* boolean */
   1412       1.10     itohy 	case CMPCI_DAC_MUTE:
   1413       1.10     itohy 	case CMPCI_FM_MUTE:
   1414       1.10     itohy 	case CMPCI_CD_MUTE:
   1415       1.10     itohy 	case CMPCI_LINE_IN_MUTE:
   1416       1.10     itohy 	case CMPCI_AUX_IN_MUTE:
   1417       1.10     itohy 	case CMPCI_MIC_MUTE:
   1418       1.10     itohy 	case CMPCI_MIC_PREAMP:
   1419       1.10     itohy 	case CMPCI_PLAYBACK_MODE:
   1420       1.10     itohy 	case CMPCI_SPDIF_IN_PHASE:
   1421       1.10     itohy 	case CMPCI_SPDIF_LOOP:
   1422       1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
   1423       1.10     itohy 	case CMPCI_SPDIF_OUT_VOLTAGE:
   1424       1.10     itohy 	case CMPCI_REAR:
   1425       1.10     itohy 	case CMPCI_INDIVIDUAL:
   1426       1.10     itohy 	case CMPCI_REVERSE:
   1427       1.10     itohy 	case CMPCI_SURROUND:
   1428        1.1  augustss 		if (cp->type != AUDIO_MIXER_ENUM)
   1429        1.1  augustss 			return EINVAL;
   1430        1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord != 0;
   1431       1.10     itohy 		cmpci_set_mixer_gain(sc, cp->dev);
   1432        1.1  augustss 		break;
   1433        1.1  augustss 
   1434       1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
   1435       1.10     itohy 		switch (cp->un.ord) {
   1436       1.10     itohy 		case CMPCI_SPDIF_IN_SPDIN1:
   1437       1.10     itohy 		case CMPCI_SPDIF_IN_SPDIN2:
   1438       1.10     itohy 		case CMPCI_SPDIF_IN_SPDOUT:
   1439       1.10     itohy 			break;
   1440       1.10     itohy 		default:
   1441        1.1  augustss 			return EINVAL;
   1442        1.1  augustss 		}
   1443       1.10     itohy 		goto xenum;
   1444       1.10     itohy 	case CMPCI_MONITOR_DAC:
   1445       1.10     itohy 		switch (cp->un.ord) {
   1446       1.10     itohy 		case CMPCI_MONITOR_DAC_OFF:
   1447       1.10     itohy 		case CMPCI_MONITOR_DAC_SPDIN:
   1448       1.10     itohy 		case CMPCI_MONITOR_DAC_SPDOUT:
   1449       1.10     itohy 			break;
   1450       1.10     itohy 		default:
   1451       1.10     itohy 			return EINVAL;
   1452        1.1  augustss 		}
   1453       1.10     itohy 	xenum:
   1454       1.10     itohy 		if (cp->type != AUDIO_MIXER_ENUM)
   1455       1.10     itohy 			return EINVAL;
   1456        1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord;
   1457       1.10     itohy 		cmpci_set_mixer_gain(sc, cp->dev);
   1458        1.7  tshiozak 		break;
   1459       1.10     itohy 
   1460        1.1  augustss 	default:
   1461        1.1  augustss 	    return EINVAL;
   1462        1.1  augustss 	}
   1463       1.10     itohy 
   1464        1.1  augustss 	return 0;
   1465        1.1  augustss }
   1466        1.1  augustss 
   1467        1.1  augustss static int
   1468       1.28      kent cmpci_get_port(void *handle, mixer_ctrl_t *cp)
   1469        1.1  augustss {
   1470       1.28      kent 	struct cmpci_softc *sc;
   1471       1.10     itohy 
   1472       1.28      kent 	sc = handle;
   1473        1.1  augustss 	switch (cp->dev) {
   1474        1.1  augustss 	case CMPCI_MIC_VOL:
   1475       1.10     itohy 	case CMPCI_PCSPEAKER:
   1476       1.10     itohy 	case CMPCI_MIC_RECVOL:
   1477        1.1  augustss 		if (cp->un.value.num_channels != 1)
   1478        1.1  augustss 			return EINVAL;
   1479       1.12     itohy 		/*FALLTHROUGH*/
   1480       1.10     itohy 	case CMPCI_DAC_VOL:
   1481        1.1  augustss 	case CMPCI_FM_VOL:
   1482        1.1  augustss 	case CMPCI_CD_VOL:
   1483       1.10     itohy 	case CMPCI_LINE_IN_VOL:
   1484       1.10     itohy 	case CMPCI_AUX_IN_VOL:
   1485        1.1  augustss 	case CMPCI_MASTER_VOL:
   1486        1.1  augustss 		switch (cp->un.value.num_channels) {
   1487        1.1  augustss 		case 1:
   1488       1.10     itohy 			cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
   1489        1.7  tshiozak 				sc->sc_gain[cp->dev][CMPCI_LEFT];
   1490        1.1  augustss 			break;
   1491        1.1  augustss 		case 2:
   1492       1.10     itohy 			cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
   1493        1.7  tshiozak 				sc->sc_gain[cp->dev][CMPCI_LEFT];
   1494       1.10     itohy 			cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
   1495        1.7  tshiozak 				sc->sc_gain[cp->dev][CMPCI_RIGHT];
   1496        1.1  augustss 			break;
   1497        1.1  augustss 		default:
   1498        1.1  augustss 			return EINVAL;
   1499        1.1  augustss 		}
   1500        1.1  augustss 		break;
   1501       1.10     itohy 
   1502        1.1  augustss 	case CMPCI_RECORD_SOURCE:
   1503        1.7  tshiozak 		cp->un.mask = sc->sc_in_mask;
   1504        1.1  augustss 		break;
   1505        1.1  augustss 
   1506       1.10     itohy 	case CMPCI_DAC_MUTE:
   1507       1.10     itohy 	case CMPCI_FM_MUTE:
   1508       1.10     itohy 	case CMPCI_CD_MUTE:
   1509        1.1  augustss 	case CMPCI_LINE_IN_MUTE:
   1510       1.10     itohy 	case CMPCI_AUX_IN_MUTE:
   1511       1.10     itohy 	case CMPCI_MIC_MUTE:
   1512       1.10     itohy 	case CMPCI_MIC_PREAMP:
   1513       1.10     itohy 	case CMPCI_PLAYBACK_MODE:
   1514       1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
   1515       1.10     itohy 	case CMPCI_SPDIF_IN_PHASE:
   1516        1.7  tshiozak 	case CMPCI_SPDIF_LOOP:
   1517       1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
   1518        1.7  tshiozak 	case CMPCI_SPDIF_OUT_VOLTAGE:
   1519       1.10     itohy 	case CMPCI_MONITOR_DAC:
   1520        1.7  tshiozak 	case CMPCI_REAR:
   1521        1.7  tshiozak 	case CMPCI_INDIVIDUAL:
   1522        1.7  tshiozak 	case CMPCI_REVERSE:
   1523        1.7  tshiozak 	case CMPCI_SURROUND:
   1524        1.7  tshiozak 		cp->un.ord = sc->sc_gain[cp->dev][CMPCI_LR];
   1525        1.1  augustss 		break;
   1526        1.1  augustss 
   1527        1.1  augustss 	default:
   1528        1.1  augustss 		return EINVAL;
   1529        1.1  augustss 	}
   1530        1.1  augustss 
   1531        1.1  augustss 	return 0;
   1532        1.1  augustss }
   1533        1.1  augustss 
   1534        1.1  augustss /* ARGSUSED */
   1535        1.1  augustss static size_t
   1536       1.34  christos cmpci_round_buffersize(void *handle, int direction,
   1537       1.33  christos     size_t bufsize)
   1538        1.1  augustss {
   1539       1.28      kent 
   1540        1.1  augustss 	if (bufsize > 0x10000)
   1541        1.1  augustss 		bufsize = 0x10000;
   1542       1.10     itohy 
   1543        1.1  augustss 	return bufsize;
   1544        1.1  augustss }
   1545        1.1  augustss 
   1546        1.1  augustss /* ARGSUSED */
   1547        1.1  augustss static int
   1548       1.34  christos cmpci_get_props(void *handle)
   1549        1.1  augustss {
   1550       1.28      kent 
   1551  1.50.10.1  christos 	return AUDIO_PROP_PLAYBACK | AUDIO_PROP_CAPTURE |
   1552  1.50.10.1  christos 	    AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX;
   1553        1.1  augustss }
   1554        1.1  augustss 
   1555        1.1  augustss static int
   1556       1.28      kent cmpci_trigger_output(void *handle, void *start, void *end, int blksize,
   1557       1.28      kent 		     void (*intr)(void *), void *arg,
   1558       1.28      kent 		     const audio_params_t *param)
   1559        1.1  augustss {
   1560       1.28      kent 	struct cmpci_softc *sc;
   1561        1.1  augustss 	struct cmpci_dmanode *p;
   1562        1.1  augustss 	int bps;
   1563        1.1  augustss 
   1564       1.28      kent 	sc = handle;
   1565        1.1  augustss 	sc->sc_play.intr = intr;
   1566        1.1  augustss 	sc->sc_play.intr_arg = arg;
   1567       1.27      kent 	bps = param->channels * param->precision / 8;
   1568        1.1  augustss 	if (!bps)
   1569        1.1  augustss 		return EINVAL;
   1570        1.1  augustss 
   1571        1.1  augustss 	/* set DMA frame */
   1572        1.1  augustss 	if (!(p = cmpci_find_dmamem(sc, start)))
   1573        1.1  augustss 		return EINVAL;
   1574        1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BASE,
   1575        1.1  augustss 	    DMAADDR(p));
   1576        1.1  augustss 	delay(10);
   1577        1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BYTES,
   1578       1.35  christos 	    ((char *)end - (char *)start + 1) / bps - 1);
   1579        1.1  augustss 	delay(10);
   1580        1.1  augustss 
   1581        1.1  augustss 	/* set interrupt count */
   1582        1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_SAMPLES,
   1583        1.1  augustss 			  (blksize + bps - 1) / bps - 1);
   1584        1.1  augustss 	delay(10);
   1585        1.1  augustss 
   1586        1.1  augustss 	/* start DMA */
   1587        1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); /* PLAY */
   1588        1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE);
   1589        1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE);
   1590       1.10     itohy 
   1591        1.1  augustss 	return 0;
   1592        1.1  augustss }
   1593        1.1  augustss 
   1594        1.1  augustss static int
   1595       1.28      kent cmpci_trigger_input(void *handle, void *start, void *end, int blksize,
   1596       1.28      kent 		    void (*intr)(void *), void *arg,
   1597       1.28      kent 		    const audio_params_t *param)
   1598        1.1  augustss {
   1599       1.28      kent 	struct cmpci_softc *sc;
   1600        1.1  augustss 	struct cmpci_dmanode *p;
   1601        1.1  augustss 	int bps;
   1602        1.1  augustss 
   1603       1.28      kent 	sc = handle;
   1604        1.1  augustss 	sc->sc_rec.intr = intr;
   1605        1.1  augustss 	sc->sc_rec.intr_arg = arg;
   1606       1.27      kent 	bps = param->channels * param->precision / 8;
   1607        1.1  augustss 	if (!bps)
   1608        1.1  augustss 		return EINVAL;
   1609        1.1  augustss 
   1610        1.1  augustss 	/* set DMA frame */
   1611        1.1  augustss 	if (!(p=cmpci_find_dmamem(sc, start)))
   1612        1.1  augustss 		return EINVAL;
   1613        1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BASE,
   1614        1.1  augustss 	    DMAADDR(p));
   1615        1.1  augustss 	delay(10);
   1616        1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BYTES,
   1617       1.35  christos 	    ((char *)end - (char *)start + 1) / bps - 1);
   1618        1.1  augustss 	delay(10);
   1619        1.1  augustss 
   1620        1.1  augustss 	/* set interrupt count */
   1621        1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_SAMPLES,
   1622        1.7  tshiozak 	    (blksize + bps - 1) / bps - 1);
   1623        1.1  augustss 	delay(10);
   1624        1.1  augustss 
   1625        1.1  augustss 	/* start DMA */
   1626        1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_DIR); /* REC */
   1627        1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE);
   1628        1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE);
   1629       1.10     itohy 
   1630        1.1  augustss 	return 0;
   1631        1.1  augustss }
   1632        1.1  augustss 
   1633       1.43  jmcneill static void
   1634       1.43  jmcneill cmpci_get_locks(void *addr, kmutex_t **intr, kmutex_t **thread)
   1635       1.43  jmcneill {
   1636       1.43  jmcneill 	struct cmpci_softc *sc;
   1637       1.43  jmcneill 
   1638       1.43  jmcneill 	sc = addr;
   1639       1.43  jmcneill 	*intr = &sc->sc_intr_lock;
   1640       1.43  jmcneill 	*thread = &sc->sc_lock;
   1641       1.43  jmcneill }
   1642       1.43  jmcneill 
   1643        1.1  augustss /* end of file */
   1644