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cmpci.c revision 1.51
      1  1.51  jdolecek /*	$NetBSD: cmpci.c,v 1.51 2018/12/09 11:14:01 jdolecek Exp $	*/
      2   1.1  augustss 
      3   1.1  augustss /*
      4  1.43  jmcneill  * Copyright (c) 2000, 2001, 2008 The NetBSD Foundation, Inc.
      5   1.1  augustss  * All rights reserved.
      6   1.1  augustss  *
      7   1.1  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8  1.22    keihan  * by Takuya SHIOZAKI <tshiozak (at) NetBSD.org> .
      9   1.1  augustss  *
     10  1.10     itohy  * This code is derived from software contributed to The NetBSD Foundation
     11  1.10     itohy  * by ITOH Yasufumi.
     12  1.10     itohy  *
     13   1.1  augustss  * Redistribution and use in source and binary forms, with or without
     14   1.1  augustss  * modification, are permitted provided that the following conditions
     15   1.1  augustss  * are met:
     16   1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     17   1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     18   1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     19   1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     20   1.1  augustss  *    documentation and/or other materials provided with the distribution.
     21   1.1  augustss  *
     22   1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     23   1.1  augustss  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24   1.1  augustss  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25   1.1  augustss  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     26   1.1  augustss  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27   1.1  augustss  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28   1.1  augustss  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29   1.1  augustss  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30   1.1  augustss  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31   1.1  augustss  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32   1.1  augustss  * SUCH DAMAGE.
     33   1.1  augustss  *
     34   1.1  augustss  */
     35   1.1  augustss 
     36   1.1  augustss /*
     37   1.1  augustss  * C-Media CMI8x38 Audio Chip Support.
     38   1.1  augustss  *
     39   1.1  augustss  * TODO:
     40  1.10     itohy  *   - 4ch / 6ch support.
     41  1.10     itohy  *   - Joystick support.
     42   1.1  augustss  *
     43   1.1  augustss  */
     44  1.11     lukem 
     45  1.11     lukem #include <sys/cdefs.h>
     46  1.51  jdolecek __KERNEL_RCSID(0, "$NetBSD: cmpci.c,v 1.51 2018/12/09 11:14:01 jdolecek Exp $");
     47   1.1  augustss 
     48   1.1  augustss #if defined(AUDIO_DEBUG) || defined(DEBUG)
     49   1.7  tshiozak #define DPRINTF(x) if (cmpcidebug) printf x
     50   1.7  tshiozak int cmpcidebug = 0;
     51   1.1  augustss #else
     52   1.1  augustss #define DPRINTF(x)
     53   1.1  augustss #endif
     54   1.1  augustss 
     55   1.8     itohy #include "mpu.h"
     56   1.8     itohy 
     57   1.1  augustss #include <sys/param.h>
     58   1.1  augustss #include <sys/systm.h>
     59   1.1  augustss #include <sys/kernel.h>
     60  1.43  jmcneill #include <sys/kmem.h>
     61   1.1  augustss #include <sys/device.h>
     62   1.1  augustss #include <sys/proc.h>
     63   1.1  augustss 
     64   1.1  augustss #include <dev/pci/pcidevs.h>
     65   1.1  augustss #include <dev/pci/pcivar.h>
     66   1.1  augustss 
     67   1.1  augustss #include <sys/audioio.h>
     68   1.1  augustss #include <dev/audio_if.h>
     69   1.1  augustss #include <dev/midi_if.h>
     70   1.1  augustss 
     71   1.1  augustss #include <dev/mulaw.h>
     72   1.1  augustss #include <dev/auconv.h>
     73   1.1  augustss #include <dev/pci/cmpcireg.h>
     74   1.1  augustss #include <dev/pci/cmpcivar.h>
     75   1.1  augustss 
     76   1.1  augustss #include <dev/ic/mpuvar.h>
     77  1.36        ad #include <sys/bus.h>
     78  1.36        ad #include <sys/intr.h>
     79   1.1  augustss 
     80   1.1  augustss /*
     81   1.1  augustss  * Low-level HW interface
     82   1.1  augustss  */
     83  1.30     perry static inline uint8_t cmpci_mixerreg_read(struct cmpci_softc *, uint8_t);
     84  1.30     perry static inline void cmpci_mixerreg_write(struct cmpci_softc *,
     85  1.28      kent 	uint8_t, uint8_t);
     86  1.30     perry static inline void cmpci_reg_partial_write_1(struct cmpci_softc *, int, int,
     87  1.28      kent 	unsigned, unsigned);
     88  1.30     perry static inline void cmpci_reg_partial_write_4(struct cmpci_softc *, int, int,
     89  1.28      kent 	uint32_t, uint32_t);
     90  1.30     perry static inline void cmpci_reg_set_1(struct cmpci_softc *, int, uint8_t);
     91  1.30     perry static inline void cmpci_reg_clear_1(struct cmpci_softc *, int, uint8_t);
     92  1.30     perry static inline void cmpci_reg_set_4(struct cmpci_softc *, int, uint32_t);
     93  1.30     perry static inline void cmpci_reg_clear_4(struct cmpci_softc *, int, uint32_t);
     94  1.30     perry static inline void cmpci_reg_set_reg_misc(struct cmpci_softc *, uint32_t);
     95  1.30     perry static inline void cmpci_reg_clear_reg_misc(struct cmpci_softc *, uint32_t);
     96  1.28      kent static int cmpci_rate_to_index(int);
     97  1.30     perry static inline int cmpci_index_to_rate(int);
     98  1.30     perry static inline int cmpci_index_to_divider(int);
     99  1.28      kent 
    100  1.28      kent static int cmpci_adjust(int, int);
    101  1.28      kent static void cmpci_set_mixer_gain(struct cmpci_softc *, int);
    102  1.28      kent static void cmpci_set_out_ports(struct cmpci_softc *);
    103  1.28      kent static int cmpci_set_in_ports(struct cmpci_softc *);
    104   1.1  augustss 
    105   1.1  augustss 
    106   1.1  augustss /*
    107   1.1  augustss  * autoconf interface
    108   1.1  augustss  */
    109  1.40    cegger static int cmpci_match(device_t, cfdata_t, void *);
    110  1.40    cegger static void cmpci_attach(device_t, device_t, void *);
    111   1.1  augustss 
    112  1.46       chs CFATTACH_DECL_NEW(cmpci, sizeof (struct cmpci_softc),
    113  1.16   thorpej     cmpci_match, cmpci_attach, NULL, NULL);
    114   1.1  augustss 
    115   1.1  augustss /* interrupt */
    116  1.28      kent static int cmpci_intr(void *);
    117   1.1  augustss 
    118   1.1  augustss 
    119   1.1  augustss /*
    120   1.1  augustss  * DMA stuffs
    121   1.1  augustss  */
    122  1.43  jmcneill static int cmpci_alloc_dmamem(struct cmpci_softc *, size_t, void **);
    123  1.43  jmcneill static int cmpci_free_dmamem(struct cmpci_softc *, void *, size_t);
    124  1.28      kent static struct cmpci_dmanode * cmpci_find_dmamem(struct cmpci_softc *,
    125  1.35  christos 	void *);
    126   1.1  augustss 
    127   1.1  augustss 
    128   1.1  augustss /*
    129   1.1  augustss  * interface to machine independent layer
    130   1.1  augustss  */
    131  1.28      kent static int cmpci_query_encoding(void *, struct audio_encoding *);
    132  1.28      kent static int cmpci_set_params(void *, int, int, audio_params_t *,
    133  1.28      kent 	audio_params_t *, stream_filter_list_t *, stream_filter_list_t *);
    134  1.28      kent static int cmpci_round_blocksize(void *, int, int, const audio_params_t *);
    135  1.28      kent static int cmpci_halt_output(void *);
    136  1.28      kent static int cmpci_halt_input(void *);
    137  1.28      kent static int cmpci_getdev(void *, struct audio_device *);
    138  1.28      kent static int cmpci_set_port(void *, mixer_ctrl_t *);
    139  1.28      kent static int cmpci_get_port(void *, mixer_ctrl_t *);
    140  1.28      kent static int cmpci_query_devinfo(void *, mixer_devinfo_t *);
    141  1.43  jmcneill static void *cmpci_allocm(void *, int, size_t);
    142  1.43  jmcneill static void cmpci_freem(void *, void *, size_t);
    143  1.28      kent static size_t cmpci_round_buffersize(void *, int, size_t);
    144  1.28      kent static paddr_t cmpci_mappage(void *, void *, off_t, int);
    145  1.28      kent static int cmpci_get_props(void *);
    146  1.28      kent static int cmpci_trigger_output(void *, void *, void *, int,
    147  1.28      kent 	void (*)(void *), void *, const audio_params_t *);
    148  1.28      kent static int cmpci_trigger_input(void *, void *, void *, int,
    149  1.28      kent 	void (*)(void *), void *, const audio_params_t *);
    150  1.43  jmcneill static void cmpci_get_locks(void *, kmutex_t **, kmutex_t **);
    151   1.1  augustss 
    152  1.26      yamt static const struct audio_hw_if cmpci_hw_if = {
    153  1.27      kent 	NULL,			/* open */
    154  1.27      kent 	NULL,			/* close */
    155   1.1  augustss 	NULL,			/* drain */
    156   1.3  gmcgarry 	cmpci_query_encoding,	/* query_encoding */
    157   1.3  gmcgarry 	cmpci_set_params,	/* set_params */
    158   1.3  gmcgarry 	cmpci_round_blocksize,	/* round_blocksize */
    159   1.1  augustss 	NULL,			/* commit_settings */
    160   1.1  augustss 	NULL,			/* init_output */
    161   1.1  augustss 	NULL,			/* init_input */
    162   1.1  augustss 	NULL,			/* start_output */
    163   1.1  augustss 	NULL,			/* start_input */
    164   1.3  gmcgarry 	cmpci_halt_output,	/* halt_output */
    165   1.3  gmcgarry 	cmpci_halt_input,	/* halt_input */
    166   1.1  augustss 	NULL,			/* speaker_ctl */
    167   1.3  gmcgarry 	cmpci_getdev,		/* getdev */
    168   1.1  augustss 	NULL,			/* setfd */
    169   1.3  gmcgarry 	cmpci_set_port,		/* set_port */
    170   1.3  gmcgarry 	cmpci_get_port,		/* get_port */
    171   1.3  gmcgarry 	cmpci_query_devinfo,	/* query_devinfo */
    172   1.3  gmcgarry 	cmpci_allocm,		/* allocm */
    173   1.3  gmcgarry 	cmpci_freem,		/* freem */
    174   1.3  gmcgarry 	cmpci_round_buffersize,/* round_buffersize */
    175   1.3  gmcgarry 	cmpci_mappage,		/* mappage */
    176   1.3  gmcgarry 	cmpci_get_props,	/* get_props */
    177   1.3  gmcgarry 	cmpci_trigger_output,	/* trigger_output */
    178   1.9  augustss 	cmpci_trigger_input,	/* trigger_input */
    179   1.9  augustss 	NULL,			/* dev_ioctl */
    180  1.43  jmcneill 	cmpci_get_locks,	/* get_locks */
    181   1.1  augustss };
    182   1.1  augustss 
    183  1.27      kent #define CMPCI_NFORMATS	4
    184  1.27      kent static const struct audio_format cmpci_formats[CMPCI_NFORMATS] = {
    185  1.27      kent 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
    186  1.27      kent 	 2, AUFMT_STEREO, 0, {5512, 48000}},
    187  1.27      kent 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
    188  1.27      kent 	 1, AUFMT_MONAURAL, 0, {5512, 48000}},
    189  1.27      kent 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
    190  1.27      kent 	 2, AUFMT_STEREO, 0, {5512, 48000}},
    191  1.27      kent 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
    192  1.27      kent 	 1, AUFMT_MONAURAL, 0, {5512, 48000}},
    193  1.27      kent };
    194  1.27      kent 
    195   1.1  augustss 
    196   1.1  augustss /*
    197   1.1  augustss  * Low-level HW interface
    198   1.1  augustss  */
    199   1.1  augustss 
    200   1.1  augustss /* mixer register read/write */
    201  1.30     perry static inline uint8_t
    202  1.28      kent cmpci_mixerreg_read(struct cmpci_softc *sc, uint8_t no)
    203   1.1  augustss {
    204   1.1  augustss 	uint8_t ret;
    205   1.1  augustss 
    206   1.1  augustss 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no);
    207   1.1  augustss 	delay(10);
    208   1.1  augustss 	ret = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA);
    209   1.1  augustss 	delay(10);
    210   1.1  augustss 	return ret;
    211   1.1  augustss }
    212   1.1  augustss 
    213  1.30     perry static inline void
    214  1.28      kent cmpci_mixerreg_write(struct cmpci_softc *sc, uint8_t no, uint8_t val)
    215   1.1  augustss {
    216  1.28      kent 
    217   1.1  augustss 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no);
    218   1.1  augustss 	delay(10);
    219   1.1  augustss 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA, val);
    220   1.1  augustss 	delay(10);
    221   1.1  augustss }
    222   1.1  augustss 
    223   1.1  augustss 
    224   1.1  augustss /* register partial write */
    225  1.30     perry static inline void
    226  1.28      kent cmpci_reg_partial_write_1(struct cmpci_softc *sc, int no, int shift,
    227  1.28      kent 			  unsigned mask, unsigned val)
    228  1.10     itohy {
    229  1.28      kent 
    230  1.10     itohy 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
    231  1.10     itohy 	    (val<<shift) |
    232  1.10     itohy 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
    233  1.10     itohy 	delay(10);
    234  1.10     itohy }
    235  1.10     itohy 
    236  1.30     perry static inline void
    237  1.28      kent cmpci_reg_partial_write_4(struct cmpci_softc *sc, int no, int shift,
    238  1.28      kent 			  uint32_t mask, uint32_t val)
    239   1.1  augustss {
    240  1.28      kent 
    241   1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
    242   1.1  augustss 	    (val<<shift) |
    243   1.1  augustss 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
    244   1.1  augustss 	delay(10);
    245   1.1  augustss }
    246   1.1  augustss 
    247   1.1  augustss /* register set/clear bit */
    248  1.30     perry static inline void
    249  1.28      kent cmpci_reg_set_1(struct cmpci_softc *sc, int no, uint8_t mask)
    250   1.7  tshiozak {
    251  1.28      kent 
    252   1.7  tshiozak 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
    253   1.7  tshiozak 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) | mask));
    254   1.7  tshiozak 	delay(10);
    255   1.7  tshiozak }
    256   1.7  tshiozak 
    257  1.30     perry static inline void
    258  1.28      kent cmpci_reg_clear_1(struct cmpci_softc *sc, int no, uint8_t mask)
    259   1.7  tshiozak {
    260  1.28      kent 
    261   1.7  tshiozak 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
    262   1.7  tshiozak 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~mask));
    263   1.7  tshiozak 	delay(10);
    264   1.7  tshiozak }
    265   1.7  tshiozak 
    266  1.30     perry static inline void
    267  1.28      kent cmpci_reg_set_4(struct cmpci_softc *sc, int no, uint32_t mask)
    268   1.1  augustss {
    269  1.28      kent 
    270  1.21     itohy 	/* use cmpci_reg_set_reg_misc() for CMPCI_REG_MISC */
    271  1.21     itohy 	KDASSERT(no != CMPCI_REG_MISC);
    272  1.21     itohy 
    273   1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
    274   1.7  tshiozak 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) | mask));
    275   1.1  augustss 	delay(10);
    276   1.1  augustss }
    277   1.1  augustss 
    278  1.30     perry static inline void
    279  1.28      kent cmpci_reg_clear_4(struct cmpci_softc *sc, int no, uint32_t mask)
    280   1.1  augustss {
    281  1.28      kent 
    282  1.21     itohy 	/* use cmpci_reg_clear_reg_misc() for CMPCI_REG_MISC */
    283  1.21     itohy 	KDASSERT(no != CMPCI_REG_MISC);
    284  1.21     itohy 
    285   1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
    286   1.7  tshiozak 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~mask));
    287   1.1  augustss 	delay(10);
    288   1.1  augustss }
    289   1.1  augustss 
    290  1.21     itohy /*
    291  1.21     itohy  * The CMPCI_REG_MISC register needs special handling, since one of
    292  1.21     itohy  * its bits has different read/write values.
    293  1.21     itohy  */
    294  1.30     perry static inline void
    295  1.28      kent cmpci_reg_set_reg_misc(struct cmpci_softc *sc, uint32_t mask)
    296  1.21     itohy {
    297  1.28      kent 
    298  1.21     itohy 	sc->sc_reg_misc |= mask;
    299  1.21     itohy 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC,
    300  1.21     itohy 	    sc->sc_reg_misc);
    301  1.21     itohy 	delay(10);
    302  1.21     itohy }
    303  1.21     itohy 
    304  1.30     perry static inline void
    305  1.28      kent cmpci_reg_clear_reg_misc(struct cmpci_softc *sc, uint32_t mask)
    306  1.21     itohy {
    307  1.28      kent 
    308  1.21     itohy 	sc->sc_reg_misc &= ~mask;
    309  1.21     itohy 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC,
    310  1.21     itohy 	    sc->sc_reg_misc);
    311  1.21     itohy 	delay(10);
    312  1.21     itohy }
    313  1.21     itohy 
    314   1.1  augustss /* rate */
    315   1.6  jdolecek static const struct {
    316   1.1  augustss 	int rate;
    317   1.1  augustss 	int divider;
    318   1.1  augustss } cmpci_rate_table[CMPCI_REG_NUMRATE] = {
    319   1.1  augustss #define _RATE(n) { n, CMPCI_REG_RATE_ ## n }
    320   1.1  augustss 	_RATE(5512),
    321   1.1  augustss 	_RATE(8000),
    322   1.1  augustss 	_RATE(11025),
    323   1.1  augustss 	_RATE(16000),
    324   1.1  augustss 	_RATE(22050),
    325   1.1  augustss 	_RATE(32000),
    326   1.1  augustss 	_RATE(44100),
    327   1.1  augustss 	_RATE(48000)
    328   1.7  tshiozak #undef	_RATE
    329   1.1  augustss };
    330   1.1  augustss 
    331   1.1  augustss static int
    332  1.28      kent cmpci_rate_to_index(int rate)
    333   1.1  augustss {
    334   1.1  augustss 	int i;
    335   1.1  augustss 
    336  1.13  augustss 	for (i = 0; i < CMPCI_REG_NUMRATE - 1; i++)
    337   1.1  augustss 		if (rate <=
    338   1.1  augustss 		    (cmpci_rate_table[i].rate+cmpci_rate_table[i+1].rate) / 2)
    339   1.1  augustss 			return i;
    340   1.1  augustss 	return i;  /* 48000 */
    341   1.1  augustss }
    342   1.1  augustss 
    343  1.30     perry static inline int
    344  1.28      kent cmpci_index_to_rate(int index)
    345   1.1  augustss {
    346  1.28      kent 
    347   1.1  augustss 	return cmpci_rate_table[index].rate;
    348   1.1  augustss }
    349   1.1  augustss 
    350  1.30     perry static inline int
    351  1.28      kent cmpci_index_to_divider(int index)
    352   1.1  augustss {
    353  1.28      kent 
    354   1.1  augustss 	return cmpci_rate_table[index].divider;
    355   1.1  augustss }
    356   1.1  augustss 
    357   1.1  augustss /*
    358   1.1  augustss  * interface to configure the device.
    359   1.1  augustss  */
    360   1.1  augustss static int
    361  1.40    cegger cmpci_match(device_t parent, cfdata_t match, void *aux)
    362   1.1  augustss {
    363  1.28      kent 	struct pci_attach_args *pa;
    364   1.1  augustss 
    365  1.28      kent 	pa = (struct pci_attach_args *)aux;
    366   1.1  augustss 	if ( PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CMEDIA &&
    367   1.1  augustss 	     (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338A ||
    368   1.1  augustss 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338B ||
    369   1.7  tshiozak 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738 ||
    370   1.7  tshiozak 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738B) )
    371   1.1  augustss 		return 1;
    372   1.1  augustss 
    373   1.1  augustss 	return 0;
    374   1.1  augustss }
    375   1.1  augustss 
    376   1.1  augustss static void
    377  1.40    cegger cmpci_attach(device_t parent, device_t self, void *aux)
    378   1.1  augustss {
    379  1.28      kent 	struct cmpci_softc *sc;
    380  1.28      kent 	struct pci_attach_args *pa;
    381   1.8     itohy 	struct audio_attach_args aa;
    382   1.1  augustss 	pci_intr_handle_t ih;
    383   1.1  augustss 	char const *strintr;
    384   1.1  augustss 	int i, v;
    385  1.47  christos 	char intrbuf[PCI_INTRSTR_LEN];
    386   1.1  augustss 
    387  1.41    cegger 	sc = device_private(self);
    388  1.46       chs 	sc->sc_dev = self;
    389  1.28      kent 	pa = (struct pci_attach_args *)aux;
    390  1.17   thorpej 
    391   1.7  tshiozak 	sc->sc_id = pa->pa_id;
    392   1.7  tshiozak 	sc->sc_class = pa->pa_class;
    393  1.45  drochner 	pci_aprint_devinfo(pa, "Audio controller");
    394   1.7  tshiozak 	switch (PCI_PRODUCT(sc->sc_id)) {
    395   1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338A:
    396   1.7  tshiozak 		/*FALLTHROUGH*/
    397   1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338B:
    398   1.7  tshiozak 		sc->sc_capable = CMPCI_CAP_CMI8338;
    399   1.1  augustss 		break;
    400   1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8738:
    401   1.7  tshiozak 		/*FALLTHROUGH*/
    402   1.7  tshiozak 	case PCI_PRODUCT_CMEDIA_CMI8738B:
    403   1.7  tshiozak 		sc->sc_capable = CMPCI_CAP_CMI8738;
    404   1.1  augustss 		break;
    405   1.1  augustss 	}
    406   1.1  augustss 
    407   1.2  augustss 	/* map I/O space */
    408   1.1  augustss 	if (pci_mapreg_map(pa, CMPCI_PCI_IOBASEREG, PCI_MAPREG_TYPE_IO, 0,
    409   1.7  tshiozak 		&sc->sc_iot, &sc->sc_ioh, NULL, NULL)) {
    410  1.46       chs 		aprint_error_dev(sc->sc_dev, "failed to map I/O space\n");
    411   1.1  augustss 		return;
    412   1.1  augustss 	}
    413   1.1  augustss 
    414  1.43  jmcneill 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
    415  1.44       mrg 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO);
    416  1.43  jmcneill 
    417   1.2  augustss 	/* interrupt */
    418   1.5  sommerfe 	if (pci_intr_map(pa, &ih)) {
    419  1.46       chs 		aprint_error_dev(sc->sc_dev, "failed to map interrupt\n");
    420   1.1  augustss 		return;
    421   1.1  augustss 	}
    422  1.47  christos 	strintr = pci_intr_string(pa->pa_pc, ih, intrbuf, sizeof(intrbuf));
    423  1.51  jdolecek 	sc->sc_ih = pci_intr_establish_xname(pa->pa_pc, ih, IPL_AUDIO,
    424  1.51  jdolecek 	    cmpci_intr, sc, device_xname(self));
    425   1.1  augustss 	if (sc->sc_ih == NULL) {
    426  1.46       chs 		aprint_error_dev(sc->sc_dev, "failed to establish interrupt");
    427   1.1  augustss 		if (strintr != NULL)
    428  1.42     njoly 			aprint_error(" at %s", strintr);
    429  1.42     njoly 		aprint_error("\n");
    430  1.43  jmcneill 		mutex_destroy(&sc->sc_lock);
    431  1.43  jmcneill 		mutex_destroy(&sc->sc_intr_lock);
    432   1.1  augustss 		return;
    433   1.1  augustss 	}
    434  1.46       chs 	aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", strintr);
    435   1.1  augustss 
    436   1.1  augustss 	sc->sc_dmat = pa->pa_dmat;
    437   1.1  augustss 
    438  1.46       chs 	audio_attach_mi(&cmpci_hw_if, sc, sc->sc_dev);
    439   1.1  augustss 
    440   1.8     itohy 	/* attach OPL device */
    441   1.8     itohy 	aa.type = AUDIODEV_TYPE_OPL;
    442   1.8     itohy 	aa.hwif = NULL;
    443   1.8     itohy 	aa.hdl = NULL;
    444  1.46       chs 	(void)config_found(sc->sc_dev, &aa, audioprint);
    445   1.8     itohy 
    446   1.8     itohy 	/* attach MPU-401 device */
    447   1.8     itohy 	aa.type = AUDIODEV_TYPE_MPU;
    448   1.8     itohy 	aa.hwif = NULL;
    449   1.8     itohy 	aa.hdl = NULL;
    450   1.8     itohy 	if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
    451   1.8     itohy 	    CMPCI_REG_MPU_BASE, CMPCI_REG_MPU_SIZE, &sc->sc_mpu_ioh) == 0)
    452  1.46       chs 		sc->sc_mpudev = config_found(sc->sc_dev, &aa, audioprint);
    453   1.8     itohy 
    454  1.21     itohy 	/* get initial value (this is 0 and may be omitted but just in case) */
    455  1.21     itohy 	sc->sc_reg_misc = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
    456  1.21     itohy 	    CMPCI_REG_MISC) & ~CMPCI_REG_SPDIF48K;
    457  1.21     itohy 
    458   1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_RESET, 0);
    459   1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0);
    460   1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0);
    461   1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX,
    462   1.1  augustss 	    CMPCI_SB16_SW_CD|CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE);
    463   1.1  augustss 	for (i = 0; i < CMPCI_NDEVS; i++) {
    464  1.48   msaitoh 		switch (i) {
    465  1.10     itohy 		/*
    466  1.10     itohy 		 * CMI8738 defaults are
    467  1.10     itohy 		 *  master:	0xe0	(0x00 - 0xf8)
    468  1.12     itohy 		 *  FM, DAC:	0xc0	(0x00 - 0xf8)
    469  1.10     itohy 		 *  PC speaker:	0x80	(0x00 - 0xc0)
    470  1.10     itohy 		 *  others:	0
    471  1.10     itohy 		 */
    472  1.10     itohy 		/* volume */
    473   1.8     itohy 		case CMPCI_MASTER_VOL:
    474  1.10     itohy 			v = 128;	/* 224 */
    475  1.10     itohy 			break;
    476   1.8     itohy 		case CMPCI_FM_VOL:
    477  1.10     itohy 		case CMPCI_DAC_VOL:
    478  1.10     itohy 			v = 192;
    479  1.10     itohy 			break;
    480   1.8     itohy 		case CMPCI_PCSPEAKER:
    481  1.10     itohy 			v = 128;
    482   1.1  augustss 			break;
    483   1.8     itohy 
    484   1.8     itohy 		/* booleans, set to true */
    485  1.10     itohy 		case CMPCI_CD_MUTE:
    486  1.10     itohy 		case CMPCI_MIC_MUTE:
    487  1.10     itohy 		case CMPCI_LINE_IN_MUTE:
    488  1.10     itohy 		case CMPCI_AUX_IN_MUTE:
    489   1.8     itohy 			v = 1;
    490   1.1  augustss 			break;
    491  1.10     itohy 
    492  1.10     itohy 		/* volume with inital value 0 */
    493  1.10     itohy 		case CMPCI_CD_VOL:
    494  1.10     itohy 		case CMPCI_LINE_IN_VOL:
    495  1.10     itohy 		case CMPCI_AUX_IN_VOL:
    496  1.10     itohy 		case CMPCI_MIC_VOL:
    497  1.10     itohy 		case CMPCI_MIC_RECVOL:
    498  1.10     itohy 			/* FALLTHROUGH */
    499  1.10     itohy 
    500   1.8     itohy 		/* others are cleared */
    501  1.10     itohy 		case CMPCI_MIC_PREAMP:
    502   1.8     itohy 		case CMPCI_RECORD_SOURCE:
    503  1.10     itohy 		case CMPCI_PLAYBACK_MODE:
    504  1.10     itohy 		case CMPCI_SPDIF_IN_SELECT:
    505  1.10     itohy 		case CMPCI_SPDIF_IN_PHASE:
    506   1.7  tshiozak 		case CMPCI_SPDIF_LOOP:
    507  1.10     itohy 		case CMPCI_SPDIF_OUT_PLAYBACK:
    508   1.7  tshiozak 		case CMPCI_SPDIF_OUT_VOLTAGE:
    509  1.10     itohy 		case CMPCI_MONITOR_DAC:
    510   1.7  tshiozak 		case CMPCI_REAR:
    511   1.7  tshiozak 		case CMPCI_INDIVIDUAL:
    512   1.7  tshiozak 		case CMPCI_REVERSE:
    513   1.7  tshiozak 		case CMPCI_SURROUND:
    514   1.8     itohy 		default:
    515   1.1  augustss 			v = 0;
    516   1.1  augustss 			break;
    517   1.1  augustss 		}
    518   1.7  tshiozak 		sc->sc_gain[i][CMPCI_LEFT] = sc->sc_gain[i][CMPCI_RIGHT] = v;
    519   1.1  augustss 		cmpci_set_mixer_gain(sc, i);
    520   1.1  augustss 	}
    521   1.1  augustss }
    522   1.1  augustss 
    523   1.1  augustss static int
    524  1.28      kent cmpci_intr(void *handle)
    525   1.1  augustss {
    526  1.37   xtraeme 	struct cmpci_softc *sc = handle;
    527  1.37   xtraeme #if NMPU > 0
    528  1.37   xtraeme 	struct mpu_softc *sc_mpu = device_private(sc->sc_mpudev);
    529  1.37   xtraeme #endif
    530   1.1  augustss 	uint32_t intrstat;
    531   1.1  augustss 
    532  1.43  jmcneill 	mutex_spin_enter(&sc->sc_intr_lock);
    533  1.43  jmcneill 
    534   1.1  augustss 	intrstat = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
    535   1.1  augustss 	    CMPCI_REG_INTR_STATUS);
    536   1.1  augustss 
    537  1.43  jmcneill 	if (!(intrstat & CMPCI_REG_ANY_INTR)) {
    538  1.43  jmcneill 		mutex_spin_exit(&sc->sc_intr_lock);
    539   1.1  augustss 		return 0;
    540  1.43  jmcneill 	}
    541   1.1  augustss 
    542   1.8     itohy 	delay(10);
    543   1.8     itohy 
    544   1.1  augustss 	/* disable and reset intr */
    545   1.1  augustss 	if (intrstat & CMPCI_REG_CH0_INTR)
    546   1.1  augustss 		cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL,
    547   1.1  augustss 		   CMPCI_REG_CH0_INTR_ENABLE);
    548   1.1  augustss 	if (intrstat & CMPCI_REG_CH1_INTR)
    549   1.1  augustss 		cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL,
    550   1.1  augustss 		    CMPCI_REG_CH1_INTR_ENABLE);
    551   1.1  augustss 
    552   1.1  augustss 	if (intrstat & CMPCI_REG_CH0_INTR) {
    553   1.1  augustss 		if (sc->sc_play.intr != NULL)
    554   1.1  augustss 			(*sc->sc_play.intr)(sc->sc_play.intr_arg);
    555   1.1  augustss 	}
    556   1.1  augustss 	if (intrstat & CMPCI_REG_CH1_INTR) {
    557   1.1  augustss 		if (sc->sc_rec.intr != NULL)
    558   1.1  augustss 			(*sc->sc_rec.intr)(sc->sc_rec.intr_arg);
    559   1.1  augustss 	}
    560   1.1  augustss 
    561   1.1  augustss 	/* enable intr */
    562   1.1  augustss 	if (intrstat & CMPCI_REG_CH0_INTR)
    563   1.1  augustss 		cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL,
    564   1.1  augustss 		    CMPCI_REG_CH0_INTR_ENABLE);
    565   1.1  augustss 	if (intrstat & CMPCI_REG_CH1_INTR)
    566   1.1  augustss 		cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL,
    567   1.1  augustss 		    CMPCI_REG_CH1_INTR_ENABLE);
    568   1.8     itohy 
    569   1.8     itohy #if NMPU > 0
    570  1.37   xtraeme 	if (intrstat & CMPCI_REG_UART_INTR && sc_mpu != NULL)
    571  1.37   xtraeme 		mpu_intr(sc_mpu);
    572   1.8     itohy #endif
    573   1.8     itohy 
    574  1.43  jmcneill 	mutex_spin_exit(&sc->sc_intr_lock);
    575   1.8     itohy 	return 1;
    576   1.1  augustss }
    577   1.1  augustss 
    578   1.1  augustss static int
    579  1.34  christos cmpci_query_encoding(void *handle, struct audio_encoding *fp)
    580   1.1  augustss {
    581  1.28      kent 
    582   1.1  augustss 	switch (fp->index) {
    583   1.1  augustss 	case 0:
    584   1.1  augustss 		strcpy(fp->name, AudioEulinear);
    585   1.1  augustss 		fp->encoding = AUDIO_ENCODING_ULINEAR;
    586   1.1  augustss 		fp->precision = 8;
    587   1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    588   1.1  augustss 		break;
    589   1.1  augustss 	case 1:
    590   1.1  augustss 		strcpy(fp->name, AudioEmulaw);
    591   1.1  augustss 		fp->encoding = AUDIO_ENCODING_ULAW;
    592   1.1  augustss 		fp->precision = 8;
    593   1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    594   1.1  augustss 		break;
    595   1.1  augustss 	case 2:
    596   1.1  augustss 		strcpy(fp->name, AudioEalaw);
    597   1.1  augustss 		fp->encoding = AUDIO_ENCODING_ALAW;
    598   1.1  augustss 		fp->precision = 8;
    599   1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    600   1.1  augustss 		break;
    601   1.1  augustss 	case 3:
    602   1.1  augustss 		strcpy(fp->name, AudioEslinear);
    603   1.1  augustss 		fp->encoding = AUDIO_ENCODING_SLINEAR;
    604   1.1  augustss 		fp->precision = 8;
    605   1.1  augustss 		fp->flags = 0;
    606   1.1  augustss 		break;
    607   1.1  augustss 	case 4:
    608   1.1  augustss 		strcpy(fp->name, AudioEslinear_le);
    609   1.1  augustss 		fp->encoding = AUDIO_ENCODING_SLINEAR_LE;
    610   1.1  augustss 		fp->precision = 16;
    611   1.1  augustss 		fp->flags = 0;
    612   1.1  augustss 		break;
    613   1.1  augustss 	case 5:
    614   1.1  augustss 		strcpy(fp->name, AudioEulinear_le);
    615   1.1  augustss 		fp->encoding = AUDIO_ENCODING_ULINEAR_LE;
    616   1.1  augustss 		fp->precision = 16;
    617   1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    618   1.1  augustss 		break;
    619   1.1  augustss 	case 6:
    620   1.1  augustss 		strcpy(fp->name, AudioEslinear_be);
    621   1.1  augustss 		fp->encoding = AUDIO_ENCODING_SLINEAR_BE;
    622   1.1  augustss 		fp->precision = 16;
    623   1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    624   1.1  augustss 		break;
    625   1.1  augustss 	case 7:
    626   1.1  augustss 		strcpy(fp->name, AudioEulinear_be);
    627   1.1  augustss 		fp->encoding = AUDIO_ENCODING_ULINEAR_BE;
    628   1.1  augustss 		fp->precision = 16;
    629   1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    630   1.1  augustss 		break;
    631   1.1  augustss 	default:
    632   1.1  augustss 		return EINVAL;
    633   1.1  augustss 	}
    634   1.1  augustss 	return 0;
    635   1.1  augustss }
    636   1.1  augustss 
    637   1.1  augustss 
    638   1.1  augustss static int
    639  1.34  christos cmpci_set_params(void *handle, int setmode, int usemode,
    640  1.33  christos     audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil,
    641  1.33  christos     stream_filter_list_t *rfil)
    642   1.1  augustss {
    643   1.1  augustss 	int i;
    644  1.28      kent 	struct cmpci_softc *sc;
    645   1.1  augustss 
    646  1.28      kent 	sc = handle;
    647   1.1  augustss 	for (i = 0; i < 2; i++) {
    648   1.1  augustss 		int md_format;
    649   1.1  augustss 		int md_divide;
    650   1.1  augustss 		int md_index;
    651   1.1  augustss 		int mode;
    652  1.27      kent 		audio_params_t *p;
    653  1.27      kent 		stream_filter_list_t *fil;
    654  1.27      kent 		int ind;
    655  1.10     itohy 
    656   1.1  augustss 		switch (i) {
    657   1.1  augustss 		case 0:
    658   1.1  augustss 			mode = AUMODE_PLAY;
    659   1.1  augustss 			p = play;
    660  1.27      kent 			fil = pfil;
    661   1.1  augustss 			break;
    662   1.1  augustss 		case 1:
    663   1.1  augustss 			mode = AUMODE_RECORD;
    664   1.1  augustss 			p = rec;
    665  1.27      kent 			fil = rfil;
    666   1.1  augustss 			break;
    667  1.19  christos 		default:
    668  1.19  christos 			return EINVAL;
    669   1.1  augustss 		}
    670  1.10     itohy 
    671   1.1  augustss 		if (!(setmode & mode))
    672   1.1  augustss 			continue;
    673   1.1  augustss 
    674  1.27      kent 		md_index = cmpci_rate_to_index(p->sample_rate);
    675  1.27      kent 		md_divide = cmpci_index_to_divider(md_index);
    676  1.27      kent 		p->sample_rate = cmpci_index_to_rate(md_index);
    677  1.27      kent 		DPRINTF(("%s: sample:%u, divider=%d\n",
    678  1.46       chs 			 device_xname(sc->sc_dev), p->sample_rate, md_divide));
    679  1.27      kent 
    680  1.27      kent 		ind = auconv_set_converter(cmpci_formats, CMPCI_NFORMATS,
    681  1.27      kent 					   mode, p, FALSE, fil);
    682  1.27      kent 		if (ind < 0)
    683  1.27      kent 			return EINVAL;
    684  1.27      kent 		if (fil->req_size > 0)
    685  1.27      kent 			p = &fil->filters[0].param;
    686   1.1  augustss 
    687   1.1  augustss 		/* format */
    688  1.27      kent 		md_format = p->channels == 1
    689  1.27      kent 			? CMPCI_REG_FORMAT_MONO : CMPCI_REG_FORMAT_STEREO;
    690  1.27      kent 		md_format |= p->precision == 16
    691  1.27      kent 			? CMPCI_REG_FORMAT_16BIT : CMPCI_REG_FORMAT_8BIT;
    692  1.27      kent 		if (mode & AUMODE_PLAY) {
    693   1.1  augustss 			cmpci_reg_partial_write_4(sc,
    694   1.7  tshiozak 			   CMPCI_REG_CHANNEL_FORMAT,
    695   1.7  tshiozak 			   CMPCI_REG_CH0_FORMAT_SHIFT,
    696   1.7  tshiozak 			   CMPCI_REG_CH0_FORMAT_MASK, md_format);
    697   1.1  augustss 			cmpci_reg_partial_write_4(sc,
    698   1.1  augustss 			    CMPCI_REG_FUNC_1, CMPCI_REG_DAC_FS_SHIFT,
    699   1.1  augustss 			    CMPCI_REG_DAC_FS_MASK, md_divide);
    700   1.7  tshiozak 			sc->sc_play.md_divide = md_divide;
    701   1.1  augustss 		} else {
    702   1.1  augustss 			cmpci_reg_partial_write_4(sc,
    703  1.27      kent 			   CMPCI_REG_CHANNEL_FORMAT,
    704  1.27      kent 			   CMPCI_REG_CH1_FORMAT_SHIFT,
    705  1.27      kent 			   CMPCI_REG_CH1_FORMAT_MASK, md_format);
    706  1.27      kent 			cmpci_reg_partial_write_4(sc,
    707   1.1  augustss 			    CMPCI_REG_FUNC_1, CMPCI_REG_ADC_FS_SHIFT,
    708   1.1  augustss 			    CMPCI_REG_ADC_FS_MASK, md_divide);
    709   1.7  tshiozak 			sc->sc_rec.md_divide = md_divide;
    710   1.1  augustss 		}
    711  1.10     itohy 		cmpci_set_out_ports(sc);
    712  1.10     itohy 		cmpci_set_in_ports(sc);
    713   1.1  augustss 	}
    714   1.1  augustss 	return 0;
    715   1.1  augustss }
    716   1.1  augustss 
    717   1.1  augustss /* ARGSUSED */
    718   1.1  augustss static int
    719  1.34  christos cmpci_round_blocksize(void *handle, int block,
    720  1.34  christos     int mode, const audio_params_t *param)
    721   1.1  augustss {
    722  1.28      kent 
    723  1.28      kent 	return block & -4;
    724   1.1  augustss }
    725   1.1  augustss 
    726   1.1  augustss static int
    727  1.28      kent cmpci_halt_output(void *handle)
    728   1.1  augustss {
    729  1.28      kent 	struct cmpci_softc *sc;
    730   1.1  augustss 
    731  1.28      kent 	sc = handle;
    732   1.1  augustss 	sc->sc_play.intr = NULL;
    733   1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE);
    734   1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE);
    735   1.1  augustss 	/* wait for reset DMA */
    736   1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET);
    737   1.1  augustss 	delay(10);
    738   1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET);
    739  1.10     itohy 
    740   1.1  augustss 	return 0;
    741   1.1  augustss }
    742   1.1  augustss 
    743   1.1  augustss static int
    744  1.28      kent cmpci_halt_input(void *handle)
    745   1.1  augustss {
    746  1.28      kent 	struct cmpci_softc *sc;
    747  1.10     itohy 
    748  1.28      kent 	sc = handle;
    749   1.1  augustss 	sc->sc_rec.intr = NULL;
    750   1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE);
    751   1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE);
    752   1.1  augustss 	/* wait for reset DMA */
    753   1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET);
    754   1.1  augustss 	delay(10);
    755   1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET);
    756  1.10     itohy 
    757   1.1  augustss 	return 0;
    758   1.1  augustss }
    759   1.1  augustss 
    760   1.1  augustss /* get audio device information */
    761   1.1  augustss static int
    762  1.28      kent cmpci_getdev(void *handle, struct audio_device *ad)
    763   1.1  augustss {
    764  1.28      kent 	struct cmpci_softc *sc;
    765   1.1  augustss 
    766  1.28      kent 	sc = handle;
    767   1.1  augustss 	strncpy(ad->name, "CMI PCI Audio", sizeof(ad->name));
    768   1.7  tshiozak 	snprintf(ad->version, sizeof(ad->version), "0x%02x",
    769   1.7  tshiozak 		 PCI_REVISION(sc->sc_class));
    770   1.7  tshiozak 	switch (PCI_PRODUCT(sc->sc_id)) {
    771   1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338A:
    772   1.1  augustss 		strncpy(ad->config, "CMI8338A", sizeof(ad->config));
    773   1.1  augustss 		break;
    774   1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338B:
    775   1.1  augustss 		strncpy(ad->config, "CMI8338B", sizeof(ad->config));
    776   1.1  augustss 		break;
    777   1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8738:
    778   1.1  augustss 		strncpy(ad->config, "CMI8738", sizeof(ad->config));
    779   1.1  augustss 		break;
    780   1.7  tshiozak 	case PCI_PRODUCT_CMEDIA_CMI8738B:
    781   1.7  tshiozak 		strncpy(ad->config, "CMI8738B", sizeof(ad->config));
    782   1.7  tshiozak 		break;
    783   1.1  augustss 	default:
    784   1.1  augustss 		strncpy(ad->config, "unknown", sizeof(ad->config));
    785   1.1  augustss 	}
    786   1.1  augustss 
    787   1.1  augustss 	return 0;
    788   1.1  augustss }
    789   1.1  augustss 
    790   1.1  augustss /* mixer device information */
    791   1.1  augustss int
    792  1.28      kent cmpci_query_devinfo(void *handle, mixer_devinfo_t *dip)
    793   1.1  augustss {
    794  1.10     itohy 	static const char *const mixer_port_names[] = {
    795  1.10     itohy 		AudioNdac, AudioNfmsynth, AudioNcd, AudioNline, AudioNaux,
    796  1.10     itohy 		AudioNmicrophone
    797  1.10     itohy 	};
    798  1.10     itohy 	static const char *const mixer_classes[] = {
    799  1.10     itohy 		AudioCinputs, AudioCoutputs, AudioCrecord, CmpciCplayback,
    800  1.10     itohy 		CmpciCspdif
    801  1.10     itohy 	};
    802  1.28      kent 	struct cmpci_softc *sc;
    803  1.10     itohy 	int i;
    804  1.10     itohy 
    805  1.28      kent 	sc = handle;
    806  1.10     itohy 	dip->prev = dip->next = AUDIO_MIXER_LAST;
    807  1.10     itohy 
    808   1.1  augustss 	switch (dip->index) {
    809  1.10     itohy 	case CMPCI_INPUT_CLASS:
    810  1.10     itohy 	case CMPCI_OUTPUT_CLASS:
    811  1.10     itohy 	case CMPCI_RECORD_CLASS:
    812  1.10     itohy 	case CMPCI_PLAYBACK_CLASS:
    813  1.10     itohy 	case CMPCI_SPDIF_CLASS:
    814  1.10     itohy 		dip->type = AUDIO_MIXER_CLASS;
    815  1.10     itohy 		dip->mixer_class = dip->index;
    816  1.10     itohy 		strcpy(dip->label.name,
    817  1.10     itohy 		    mixer_classes[dip->index - CMPCI_INPUT_CLASS]);
    818   1.1  augustss 		return 0;
    819  1.10     itohy 
    820  1.10     itohy 	case CMPCI_AUX_IN_VOL:
    821  1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_REG_AUX_VALBITS);
    822  1.10     itohy 		goto vol1;
    823  1.10     itohy 	case CMPCI_DAC_VOL:
    824   1.1  augustss 	case CMPCI_FM_VOL:
    825  1.10     itohy 	case CMPCI_CD_VOL:
    826  1.10     itohy 	case CMPCI_LINE_IN_VOL:
    827  1.10     itohy 	case CMPCI_MIC_VOL:
    828  1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS);
    829  1.10     itohy 	vol1:	dip->mixer_class = CMPCI_INPUT_CLASS;
    830  1.10     itohy 		dip->next = dip->index + 6;	/* CMPCI_xxx_MUTE */
    831  1.10     itohy 		strcpy(dip->label.name, mixer_port_names[dip->index]);
    832  1.10     itohy 		dip->un.v.num_channels = (dip->index == CMPCI_MIC_VOL ? 1 : 2);
    833  1.10     itohy 	vol:
    834   1.1  augustss 		dip->type = AUDIO_MIXER_VALUE;
    835   1.1  augustss 		strcpy(dip->un.v.units.name, AudioNvolume);
    836   1.1  augustss 		return 0;
    837  1.10     itohy 
    838  1.10     itohy 	case CMPCI_MIC_MUTE:
    839  1.10     itohy 		dip->next = CMPCI_MIC_PREAMP;
    840  1.10     itohy 		/* FALLTHROUGH */
    841  1.10     itohy 	case CMPCI_DAC_MUTE:
    842  1.10     itohy 	case CMPCI_FM_MUTE:
    843  1.10     itohy 	case CMPCI_CD_MUTE:
    844  1.10     itohy 	case CMPCI_LINE_IN_MUTE:
    845  1.10     itohy 	case CMPCI_AUX_IN_MUTE:
    846  1.10     itohy 		dip->prev = dip->index - 6;	/* CMPCI_xxx_VOL */
    847   1.1  augustss 		dip->mixer_class = CMPCI_INPUT_CLASS;
    848  1.10     itohy 		strcpy(dip->label.name, AudioNmute);
    849  1.10     itohy 		goto on_off;
    850  1.10     itohy 	on_off:
    851  1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    852  1.10     itohy 		dip->un.e.num_mem = 2;
    853  1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
    854  1.10     itohy 		dip->un.e.member[0].ord = 0;
    855  1.10     itohy 		strcpy(dip->un.e.member[1].label.name, AudioNon);
    856  1.10     itohy 		dip->un.e.member[1].ord = 1;
    857   1.1  augustss 		return 0;
    858  1.10     itohy 
    859  1.10     itohy 	case CMPCI_MIC_PREAMP:
    860   1.1  augustss 		dip->mixer_class = CMPCI_INPUT_CLASS;
    861  1.10     itohy 		dip->prev = CMPCI_MIC_MUTE;
    862  1.10     itohy 		strcpy(dip->label.name, AudioNpreamp);
    863  1.10     itohy 		goto on_off;
    864  1.10     itohy 	case CMPCI_PCSPEAKER:
    865   1.1  augustss 		dip->mixer_class = CMPCI_INPUT_CLASS;
    866  1.10     itohy 		strcpy(dip->label.name, AudioNspeaker);
    867   1.1  augustss 		dip->un.v.num_channels = 1;
    868  1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_SPEAKER_VALBITS);
    869  1.10     itohy 		goto vol;
    870   1.1  augustss 	case CMPCI_RECORD_SOURCE:
    871   1.1  augustss 		dip->mixer_class = CMPCI_RECORD_CLASS;
    872   1.1  augustss 		strcpy(dip->label.name, AudioNsource);
    873   1.1  augustss 		dip->type = AUDIO_MIXER_SET;
    874  1.10     itohy 		dip->un.s.num_mem = 7;
    875   1.1  augustss 		strcpy(dip->un.s.member[0].label.name, AudioNmicrophone);
    876   1.8     itohy 		dip->un.s.member[0].mask = CMPCI_RECORD_SOURCE_MIC;
    877   1.1  augustss 		strcpy(dip->un.s.member[1].label.name, AudioNcd);
    878   1.8     itohy 		dip->un.s.member[1].mask = CMPCI_RECORD_SOURCE_CD;
    879   1.1  augustss 		strcpy(dip->un.s.member[2].label.name, AudioNline);
    880   1.8     itohy 		dip->un.s.member[2].mask = CMPCI_RECORD_SOURCE_LINE_IN;
    881  1.10     itohy 		strcpy(dip->un.s.member[3].label.name, AudioNaux);
    882  1.10     itohy 		dip->un.s.member[3].mask = CMPCI_RECORD_SOURCE_AUX_IN;
    883  1.10     itohy 		strcpy(dip->un.s.member[4].label.name, AudioNwave);
    884  1.10     itohy 		dip->un.s.member[4].mask = CMPCI_RECORD_SOURCE_WAVE;
    885  1.10     itohy 		strcpy(dip->un.s.member[5].label.name, AudioNfmsynth);
    886  1.10     itohy 		dip->un.s.member[5].mask = CMPCI_RECORD_SOURCE_FM;
    887  1.10     itohy 		strcpy(dip->un.s.member[6].label.name, CmpciNspdif);
    888  1.10     itohy 		dip->un.s.member[6].mask = CMPCI_RECORD_SOURCE_SPDIF;
    889   1.1  augustss 		return 0;
    890  1.10     itohy 	case CMPCI_MIC_RECVOL:
    891   1.1  augustss 		dip->mixer_class = CMPCI_RECORD_CLASS;
    892  1.10     itohy 		strcpy(dip->label.name, AudioNmicrophone);
    893   1.1  augustss 		dip->un.v.num_channels = 1;
    894  1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_REG_ADMIC_VALBITS);
    895  1.10     itohy 		goto vol;
    896  1.10     itohy 
    897  1.10     itohy 	case CMPCI_PLAYBACK_MODE:
    898  1.10     itohy 		dip->mixer_class = CMPCI_PLAYBACK_CLASS;
    899  1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    900  1.10     itohy 		strcpy(dip->label.name, AudioNmode);
    901  1.10     itohy 		dip->un.e.num_mem = 2;
    902  1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNdac);
    903  1.10     itohy 		dip->un.e.member[0].ord = CMPCI_PLAYBACK_MODE_WAVE;
    904  1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNspdif);
    905  1.10     itohy 		dip->un.e.member[1].ord = CMPCI_PLAYBACK_MODE_SPDIF;
    906   1.1  augustss 		return 0;
    907  1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
    908  1.10     itohy 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    909  1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    910  1.10     itohy 		dip->next = CMPCI_SPDIF_IN_PHASE;
    911   1.1  augustss 		strcpy(dip->label.name, AudioNinput);
    912  1.10     itohy 		i = 0;
    913  1.10     itohy 		strcpy(dip->un.e.member[i].label.name, CmpciNspdin1);
    914  1.10     itohy 		dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN1;
    915  1.10     itohy 		if (CMPCI_ISCAP(sc, 2ND_SPDIN)) {
    916  1.10     itohy 			strcpy(dip->un.e.member[i].label.name, CmpciNspdin2);
    917  1.10     itohy 			dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN2;
    918  1.10     itohy 		}
    919  1.10     itohy 		strcpy(dip->un.e.member[i].label.name, CmpciNspdout);
    920  1.10     itohy 		dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDOUT;
    921  1.10     itohy 		dip->un.e.num_mem = i;
    922  1.10     itohy 		return 0;
    923  1.10     itohy 	case CMPCI_SPDIF_IN_PHASE:
    924  1.10     itohy 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    925  1.10     itohy 		dip->prev = CMPCI_SPDIF_IN_SELECT;
    926  1.10     itohy 		strcpy(dip->label.name, CmpciNphase);
    927  1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    928  1.10     itohy 		dip->un.e.num_mem = 2;
    929  1.10     itohy 		strcpy(dip->un.e.member[0].label.name, CmpciNpositive);
    930  1.10     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_IN_PHASE_POSITIVE;
    931  1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNnegative);
    932  1.10     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_IN_PHASE_NEGATIVE;
    933   1.1  augustss 		return 0;
    934  1.10     itohy 	case CMPCI_SPDIF_LOOP:
    935  1.10     itohy 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    936  1.10     itohy 		dip->next = CMPCI_SPDIF_OUT_PLAYBACK;
    937   1.1  augustss 		strcpy(dip->label.name, AudioNoutput);
    938   1.1  augustss 		dip->type = AUDIO_MIXER_ENUM;
    939  1.10     itohy 		dip->un.e.num_mem = 2;
    940  1.10     itohy 		strcpy(dip->un.e.member[0].label.name, CmpciNplayback);
    941  1.10     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_LOOP_OFF;
    942  1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNspdin);
    943  1.10     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_LOOP_ON;
    944   1.7  tshiozak 		return 0;
    945  1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
    946   1.7  tshiozak 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    947  1.10     itohy 		dip->prev = CMPCI_SPDIF_LOOP;
    948  1.10     itohy 		dip->next = CMPCI_SPDIF_OUT_VOLTAGE;
    949  1.10     itohy 		strcpy(dip->label.name, CmpciNplayback);
    950  1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    951  1.10     itohy 		dip->un.e.num_mem = 2;
    952  1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNwave);
    953  1.10     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_PLAYBACK_WAVE;
    954  1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNlegacy);
    955  1.10     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_PLAYBACK_LEGACY;
    956   1.7  tshiozak 		return 0;
    957   1.7  tshiozak 	case CMPCI_SPDIF_OUT_VOLTAGE:
    958   1.7  tshiozak 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    959  1.10     itohy 		dip->prev = CMPCI_SPDIF_OUT_PLAYBACK;
    960  1.10     itohy 		strcpy(dip->label.name, CmpciNvoltage);
    961   1.7  tshiozak 		dip->type = AUDIO_MIXER_ENUM;
    962   1.7  tshiozak 		dip->un.e.num_mem = 2;
    963  1.21     itohy 		strcpy(dip->un.e.member[0].label.name, CmpciNhigh_v);
    964  1.21     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_VOLTAGE_HIGH;
    965  1.21     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNlow_v);
    966  1.21     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_VOLTAGE_LOW;
    967   1.7  tshiozak 		return 0;
    968  1.10     itohy 	case CMPCI_MONITOR_DAC:
    969   1.7  tshiozak 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    970  1.10     itohy 		strcpy(dip->label.name, AudioNmonitor);
    971  1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    972  1.10     itohy 		dip->un.e.num_mem = 3;
    973  1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
    974  1.10     itohy 		dip->un.e.member[0].ord = CMPCI_MONITOR_DAC_OFF;
    975  1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNspdin);
    976  1.10     itohy 		dip->un.e.member[1].ord = CMPCI_MONITOR_DAC_SPDIN;
    977  1.10     itohy 		strcpy(dip->un.e.member[2].label.name, CmpciNspdout);
    978  1.10     itohy 		dip->un.e.member[2].ord = CMPCI_MONITOR_DAC_SPDOUT;
    979  1.10     itohy 		return 0;
    980  1.10     itohy 
    981  1.10     itohy 	case CMPCI_MASTER_VOL:
    982  1.10     itohy 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
    983  1.10     itohy 		strcpy(dip->label.name, AudioNmaster);
    984  1.10     itohy 		dip->un.v.num_channels = 2;
    985  1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS);
    986  1.10     itohy 		goto vol;
    987   1.7  tshiozak 	case CMPCI_REAR:
    988   1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
    989   1.7  tshiozak 		dip->next = CMPCI_INDIVIDUAL;
    990   1.7  tshiozak 		strcpy(dip->label.name, CmpciNrear);
    991   1.7  tshiozak 		goto on_off;
    992   1.7  tshiozak 	case CMPCI_INDIVIDUAL:
    993   1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
    994   1.7  tshiozak 		dip->prev = CMPCI_REAR;
    995   1.7  tshiozak 		dip->next = CMPCI_REVERSE;
    996   1.7  tshiozak 		strcpy(dip->label.name, CmpciNindividual);
    997   1.7  tshiozak 		goto on_off;
    998   1.7  tshiozak 	case CMPCI_REVERSE:
    999   1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
   1000   1.7  tshiozak 		dip->prev = CMPCI_INDIVIDUAL;
   1001   1.7  tshiozak 		strcpy(dip->label.name, CmpciNreverse);
   1002  1.10     itohy 		goto on_off;
   1003   1.7  tshiozak 	case CMPCI_SURROUND:
   1004   1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
   1005   1.7  tshiozak 		strcpy(dip->label.name, CmpciNsurround);
   1006   1.7  tshiozak 		goto on_off;
   1007  1.10     itohy 	}
   1008   1.7  tshiozak 
   1009   1.1  augustss 	return ENXIO;
   1010   1.1  augustss }
   1011   1.1  augustss 
   1012   1.1  augustss static int
   1013  1.43  jmcneill cmpci_alloc_dmamem(struct cmpci_softc *sc, size_t size, void **r_addr)
   1014   1.1  augustss {
   1015  1.28      kent 	int error;
   1016   1.1  augustss 	struct cmpci_dmanode *n;
   1017   1.1  augustss 
   1018  1.28      kent 	error = 0;
   1019  1.49      maxv 	n = kmem_alloc(sizeof(*n), KM_SLEEP);
   1020   1.1  augustss 
   1021   1.1  augustss #define CMPCI_DMABUF_ALIGN    0x4
   1022   1.1  augustss #define CMPCI_DMABUF_BOUNDARY 0x0
   1023   1.1  augustss 	n->cd_tag = sc->sc_dmat;
   1024   1.1  augustss 	n->cd_size = size;
   1025   1.1  augustss 	error = bus_dmamem_alloc(n->cd_tag, n->cd_size,
   1026   1.1  augustss 	    CMPCI_DMABUF_ALIGN, CMPCI_DMABUF_BOUNDARY, n->cd_segs,
   1027  1.43  jmcneill 	    sizeof(n->cd_segs)/sizeof(n->cd_segs[0]), &n->cd_nsegs,
   1028  1.43  jmcneill 	    BUS_DMA_WAITOK);
   1029   1.1  augustss 	if (error)
   1030   1.1  augustss 		goto mfree;
   1031   1.1  augustss 	error = bus_dmamem_map(n->cd_tag, n->cd_segs, n->cd_nsegs, n->cd_size,
   1032  1.43  jmcneill 	    &n->cd_addr, BUS_DMA_WAITOK | BUS_DMA_COHERENT);
   1033   1.1  augustss 	if (error)
   1034   1.1  augustss 		goto dmafree;
   1035   1.1  augustss 	error = bus_dmamap_create(n->cd_tag, n->cd_size, 1, n->cd_size, 0,
   1036  1.43  jmcneill 	    BUS_DMA_WAITOK, &n->cd_map);
   1037   1.1  augustss 	if (error)
   1038   1.1  augustss 		goto unmap;
   1039   1.1  augustss 	error = bus_dmamap_load(n->cd_tag, n->cd_map, n->cd_addr, n->cd_size,
   1040  1.43  jmcneill 	    NULL, BUS_DMA_WAITOK);
   1041   1.1  augustss 	if (error)
   1042   1.1  augustss 		goto destroy;
   1043  1.10     itohy 
   1044   1.1  augustss 	n->cd_next = sc->sc_dmap;
   1045   1.1  augustss 	sc->sc_dmap = n;
   1046   1.1  augustss 	*r_addr = KVADDR(n);
   1047   1.1  augustss 	return 0;
   1048  1.10     itohy 
   1049   1.1  augustss  destroy:
   1050   1.1  augustss 	bus_dmamap_destroy(n->cd_tag, n->cd_map);
   1051   1.1  augustss  unmap:
   1052   1.1  augustss 	bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size);
   1053   1.1  augustss  dmafree:
   1054   1.1  augustss 	bus_dmamem_free(n->cd_tag,
   1055   1.1  augustss 			n->cd_segs, sizeof(n->cd_segs)/sizeof(n->cd_segs[0]));
   1056   1.1  augustss  mfree:
   1057  1.43  jmcneill 	kmem_free(n, sizeof(*n));
   1058   1.1  augustss 	return error;
   1059   1.1  augustss }
   1060   1.1  augustss 
   1061   1.1  augustss static int
   1062  1.43  jmcneill cmpci_free_dmamem(struct cmpci_softc *sc, void *addr, size_t size)
   1063   1.1  augustss {
   1064   1.1  augustss 	struct cmpci_dmanode **nnp;
   1065  1.10     itohy 
   1066   1.1  augustss 	for (nnp = &sc->sc_dmap; *nnp; nnp= &(*nnp)->cd_next) {
   1067   1.1  augustss 		if ((*nnp)->cd_addr == addr) {
   1068   1.1  augustss 			struct cmpci_dmanode *n = *nnp;
   1069   1.1  augustss 			bus_dmamap_unload(n->cd_tag, n->cd_map);
   1070   1.1  augustss 			bus_dmamap_destroy(n->cd_tag, n->cd_map);
   1071   1.1  augustss 			bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size);
   1072   1.1  augustss 			bus_dmamem_free(n->cd_tag, n->cd_segs,
   1073   1.1  augustss 			    sizeof(n->cd_segs)/sizeof(n->cd_segs[0]));
   1074  1.43  jmcneill 			kmem_free(n, sizeof(*n));
   1075   1.1  augustss 			return 0;
   1076   1.1  augustss 		}
   1077   1.1  augustss 	}
   1078   1.1  augustss 	return -1;
   1079   1.1  augustss }
   1080   1.1  augustss 
   1081   1.1  augustss static struct cmpci_dmanode *
   1082  1.35  christos cmpci_find_dmamem(struct cmpci_softc *sc, void *addr)
   1083   1.1  augustss {
   1084   1.1  augustss 	struct cmpci_dmanode *p;
   1085  1.10     itohy 
   1086  1.28      kent 	for (p = sc->sc_dmap; p; p = p->cd_next)
   1087  1.28      kent 		if (KVADDR(p) == (void *)addr)
   1088   1.1  augustss 			break;
   1089   1.1  augustss 	return p;
   1090   1.1  augustss }
   1091   1.1  augustss 
   1092   1.1  augustss #if 0
   1093   1.1  augustss static void
   1094  1.28      kent cmpci_print_dmamem(struct cmpci_dmanode *);
   1095   1.1  augustss static void
   1096  1.28      kent cmpci_print_dmamem(struct cmpci_dmanode *p)
   1097   1.1  augustss {
   1098  1.28      kent 
   1099   1.1  augustss 	DPRINTF(("DMA at virt:%p, dmaseg:%p, mapseg:%p, size:%p\n",
   1100   1.1  augustss 		 (void *)p->cd_addr, (void *)p->cd_segs[0].ds_addr,
   1101   1.1  augustss 		 (void *)DMAADDR(p), (void *)p->cd_size));
   1102   1.1  augustss }
   1103   1.1  augustss #endif /* DEBUG */
   1104   1.1  augustss 
   1105   1.1  augustss static void *
   1106  1.43  jmcneill cmpci_allocm(void *handle, int direction, size_t size)
   1107   1.1  augustss {
   1108  1.35  christos 	void *addr;
   1109  1.10     itohy 
   1110  1.31       mrg 	addr = NULL;	/* XXX gcc */
   1111  1.31       mrg 
   1112  1.43  jmcneill 	if (cmpci_alloc_dmamem(handle, size, &addr))
   1113   1.1  augustss 		return NULL;
   1114   1.1  augustss 	return addr;
   1115   1.1  augustss }
   1116   1.1  augustss 
   1117   1.1  augustss static void
   1118  1.43  jmcneill cmpci_freem(void *handle, void *addr, size_t size)
   1119   1.1  augustss {
   1120  1.10     itohy 
   1121  1.43  jmcneill 	cmpci_free_dmamem(handle, addr, size);
   1122   1.1  augustss }
   1123   1.1  augustss 
   1124   1.1  augustss #define MAXVAL 256
   1125   1.1  augustss static int
   1126  1.28      kent cmpci_adjust(int val, int mask)
   1127   1.1  augustss {
   1128  1.28      kent 
   1129   1.1  augustss 	val += (MAXVAL - mask) >> 1;
   1130   1.1  augustss 	if (val >= MAXVAL)
   1131   1.1  augustss 		val = MAXVAL-1;
   1132   1.1  augustss 	return val & mask;
   1133   1.1  augustss }
   1134   1.1  augustss 
   1135   1.1  augustss static void
   1136  1.28      kent cmpci_set_mixer_gain(struct cmpci_softc *sc, int port)
   1137   1.1  augustss {
   1138  1.23     itohy 	int src;
   1139  1.10     itohy 	int bits, mask;
   1140   1.1  augustss 
   1141   1.1  augustss 	switch (port) {
   1142   1.1  augustss 	case CMPCI_MIC_VOL:
   1143  1.10     itohy 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_MIC,
   1144  1.10     itohy 		    CMPCI_ADJUST_MIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
   1145  1.23     itohy 		return;
   1146   1.1  augustss 	case CMPCI_MASTER_VOL:
   1147   1.1  augustss 		src = CMPCI_SB16_MIXER_MASTER_L;
   1148   1.1  augustss 		break;
   1149   1.1  augustss 	case CMPCI_LINE_IN_VOL:
   1150   1.1  augustss 		src = CMPCI_SB16_MIXER_LINE_L;
   1151   1.1  augustss 		break;
   1152  1.10     itohy 	case CMPCI_AUX_IN_VOL:
   1153  1.10     itohy 		bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MIXER_AUX,
   1154  1.10     itohy 		    CMPCI_ADJUST_AUX_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT],
   1155  1.10     itohy 					      sc->sc_gain[port][CMPCI_RIGHT]));
   1156  1.10     itohy 		return;
   1157  1.10     itohy 	case CMPCI_MIC_RECVOL:
   1158  1.10     itohy 		cmpci_reg_partial_write_1(sc, CMPCI_REG_MIXER25,
   1159  1.10     itohy 		    CMPCI_REG_ADMIC_SHIFT, CMPCI_REG_ADMIC_MASK,
   1160  1.10     itohy 		    CMPCI_ADJUST_ADMIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
   1161  1.10     itohy 		return;
   1162  1.10     itohy 	case CMPCI_DAC_VOL:
   1163   1.1  augustss 		src = CMPCI_SB16_MIXER_VOICE_L;
   1164   1.1  augustss 		break;
   1165   1.1  augustss 	case CMPCI_FM_VOL:
   1166   1.1  augustss 		src = CMPCI_SB16_MIXER_FM_L;
   1167   1.1  augustss 		break;
   1168   1.1  augustss 	case CMPCI_CD_VOL:
   1169   1.1  augustss 		src = CMPCI_SB16_MIXER_CDDA_L;
   1170   1.1  augustss 		break;
   1171   1.1  augustss 	case CMPCI_PCSPEAKER:
   1172   1.1  augustss 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_SPEAKER,
   1173  1.10     itohy 		    CMPCI_ADJUST_2_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
   1174  1.10     itohy 		return;
   1175  1.10     itohy 	case CMPCI_MIC_PREAMP:
   1176  1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1177  1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
   1178  1.10     itohy 			    CMPCI_REG_MICGAINZ);
   1179  1.10     itohy 		else
   1180  1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
   1181  1.10     itohy 			    CMPCI_REG_MICGAINZ);
   1182   1.7  tshiozak 		return;
   1183  1.10     itohy 
   1184  1.10     itohy 	case CMPCI_DAC_MUTE:
   1185  1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1186  1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1187  1.10     itohy 			    CMPCI_REG_WSMUTE);
   1188  1.10     itohy 		else
   1189  1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1190  1.10     itohy 			    CMPCI_REG_WSMUTE);
   1191  1.10     itohy 		return;
   1192  1.10     itohy 	case CMPCI_FM_MUTE:
   1193  1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1194  1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1195  1.10     itohy 			    CMPCI_REG_FMMUTE);
   1196  1.10     itohy 		else
   1197  1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1198  1.10     itohy 			    CMPCI_REG_FMMUTE);
   1199  1.10     itohy 		return;
   1200  1.10     itohy 	case CMPCI_AUX_IN_MUTE:
   1201  1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1202  1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
   1203  1.10     itohy 			    CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM);
   1204  1.10     itohy 		else
   1205  1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
   1206  1.10     itohy 			    CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM);
   1207  1.10     itohy 		return;
   1208  1.10     itohy 	case CMPCI_CD_MUTE:
   1209  1.10     itohy 		mask = CMPCI_SB16_SW_CD;
   1210  1.10     itohy 		goto sbmute;
   1211  1.10     itohy 	case CMPCI_MIC_MUTE:
   1212  1.10     itohy 		mask = CMPCI_SB16_SW_MIC;
   1213  1.10     itohy 		goto sbmute;
   1214  1.10     itohy 	case CMPCI_LINE_IN_MUTE:
   1215  1.10     itohy 		mask = CMPCI_SB16_SW_LINE;
   1216  1.10     itohy 	sbmute:
   1217  1.10     itohy 		bits = cmpci_mixerreg_read(sc, CMPCI_SB16_MIXER_OUTMIX);
   1218  1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1219  1.10     itohy 			bits = bits & ~mask;
   1220  1.10     itohy 		else
   1221  1.10     itohy 			bits = bits | mask;
   1222  1.10     itohy 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, bits);
   1223   1.8     itohy 		return;
   1224  1.10     itohy 
   1225  1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
   1226  1.10     itohy 	case CMPCI_MONITOR_DAC:
   1227  1.10     itohy 	case CMPCI_PLAYBACK_MODE:
   1228   1.7  tshiozak 	case CMPCI_SPDIF_LOOP:
   1229  1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
   1230   1.7  tshiozak 		cmpci_set_out_ports(sc);
   1231   1.7  tshiozak 		return;
   1232   1.7  tshiozak 	case CMPCI_SPDIF_OUT_VOLTAGE:
   1233   1.7  tshiozak 		if (CMPCI_ISCAP(sc, SPDOUT_VOLTAGE)) {
   1234  1.10     itohy 			if (sc->sc_gain[CMPCI_SPDIF_OUT_VOLTAGE][CMPCI_LR]
   1235  1.21     itohy 			    == CMPCI_SPDIF_OUT_VOLTAGE_HIGH)
   1236  1.21     itohy 				cmpci_reg_clear_reg_misc(sc, CMPCI_REG_5V);
   1237  1.10     itohy 			else
   1238  1.21     itohy 				cmpci_reg_set_reg_misc(sc, CMPCI_REG_5V);
   1239   1.7  tshiozak 		}
   1240   1.7  tshiozak 		return;
   1241   1.7  tshiozak 	case CMPCI_SURROUND:
   1242   1.7  tshiozak 		if (CMPCI_ISCAP(sc, SURROUND)) {
   1243   1.7  tshiozak 			if (sc->sc_gain[CMPCI_SURROUND][CMPCI_LR])
   1244   1.7  tshiozak 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1245   1.7  tshiozak 						CMPCI_REG_SURROUND);
   1246   1.7  tshiozak 			else
   1247   1.7  tshiozak 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1248   1.7  tshiozak 						  CMPCI_REG_SURROUND);
   1249   1.7  tshiozak 		}
   1250   1.7  tshiozak 		return;
   1251   1.7  tshiozak 	case CMPCI_REAR:
   1252   1.7  tshiozak 		if (CMPCI_ISCAP(sc, REAR)) {
   1253   1.7  tshiozak 			if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
   1254  1.21     itohy 				cmpci_reg_set_reg_misc(sc, CMPCI_REG_N4SPK3D);
   1255   1.7  tshiozak 			else
   1256  1.21     itohy 				cmpci_reg_clear_reg_misc(sc, CMPCI_REG_N4SPK3D);
   1257   1.7  tshiozak 		}
   1258   1.7  tshiozak 		return;
   1259   1.7  tshiozak 	case CMPCI_INDIVIDUAL:
   1260   1.7  tshiozak 		if (CMPCI_ISCAP(sc, INDIVIDUAL_REAR)) {
   1261   1.7  tshiozak 			if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
   1262   1.7  tshiozak 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1263   1.7  tshiozak 						CMPCI_REG_INDIVIDUAL);
   1264   1.7  tshiozak 			else
   1265   1.7  tshiozak 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1266   1.7  tshiozak 						  CMPCI_REG_INDIVIDUAL);
   1267   1.7  tshiozak 		}
   1268   1.7  tshiozak 		return;
   1269   1.7  tshiozak 	case CMPCI_REVERSE:
   1270   1.7  tshiozak 		if (CMPCI_ISCAP(sc, REVERSE_FR)) {
   1271   1.7  tshiozak 			if (sc->sc_gain[CMPCI_REVERSE][CMPCI_LR])
   1272   1.7  tshiozak 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1273   1.7  tshiozak 						CMPCI_REG_REVERSE_FR);
   1274   1.7  tshiozak 			else
   1275   1.7  tshiozak 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1276   1.7  tshiozak 						  CMPCI_REG_REVERSE_FR);
   1277   1.7  tshiozak 		}
   1278   1.7  tshiozak 		return;
   1279   1.7  tshiozak 	case CMPCI_SPDIF_IN_PHASE:
   1280   1.7  tshiozak 		if (CMPCI_ISCAP(sc, SPDIN_PHASE)) {
   1281  1.10     itohy 			if (sc->sc_gain[CMPCI_SPDIF_IN_PHASE][CMPCI_LR]
   1282  1.10     itohy 			    == CMPCI_SPDIF_IN_PHASE_POSITIVE)
   1283  1.10     itohy 				cmpci_reg_clear_1(sc, CMPCI_REG_CHANNEL_FORMAT,
   1284  1.10     itohy 						  CMPCI_REG_SPDIN_PHASE);
   1285  1.10     itohy 			else
   1286   1.8     itohy 				cmpci_reg_set_1(sc, CMPCI_REG_CHANNEL_FORMAT,
   1287   1.8     itohy 						CMPCI_REG_SPDIN_PHASE);
   1288   1.7  tshiozak 		}
   1289   1.1  augustss 		return;
   1290   1.1  augustss 	default:
   1291   1.1  augustss 		return;
   1292   1.1  augustss 	}
   1293  1.10     itohy 
   1294  1.10     itohy 	cmpci_mixerreg_write(sc, src,
   1295  1.10     itohy 	    CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT]));
   1296   1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_L_TO_R(src),
   1297  1.10     itohy 	    CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_RIGHT]));
   1298   1.7  tshiozak }
   1299   1.7  tshiozak 
   1300   1.7  tshiozak static void
   1301  1.28      kent cmpci_set_out_ports(struct cmpci_softc *sc)
   1302   1.7  tshiozak {
   1303  1.28      kent 	uint8_t v;
   1304  1.28      kent 	int enspdout;
   1305  1.10     itohy 
   1306   1.7  tshiozak 	if (!CMPCI_ISCAP(sc, SPDLOOP))
   1307   1.7  tshiozak 		return;
   1308  1.10     itohy 
   1309  1.10     itohy 	/* SPDIF/out select */
   1310  1.10     itohy 	if (sc->sc_gain[CMPCI_SPDIF_LOOP][CMPCI_LR] == CMPCI_SPDIF_LOOP_OFF) {
   1311  1.10     itohy 		/* playback */
   1312  1.10     itohy 		cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP);
   1313  1.10     itohy 	} else {
   1314  1.10     itohy 		/* monitor SPDIF/in */
   1315  1.10     itohy 		cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP);
   1316  1.10     itohy 	}
   1317  1.10     itohy 
   1318  1.10     itohy 	/* SPDIF in select */
   1319  1.10     itohy 	v = sc->sc_gain[CMPCI_SPDIF_IN_SELECT][CMPCI_LR];
   1320  1.10     itohy 	if (v & CMPCI_SPDIFIN_SPDIFIN2)
   1321  1.21     itohy 		cmpci_reg_set_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN);
   1322  1.10     itohy 	else
   1323  1.21     itohy 		cmpci_reg_clear_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN);
   1324  1.10     itohy 	if (v & CMPCI_SPDIFIN_SPDIFOUT)
   1325  1.21     itohy 		cmpci_reg_set_reg_misc(sc, CMPCI_REG_SPDFLOOPI);
   1326  1.10     itohy 	else
   1327  1.21     itohy 		cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPDFLOOPI);
   1328  1.10     itohy 
   1329  1.28      kent 	enspdout = 0;
   1330  1.10     itohy 	/* playback to ... */
   1331  1.10     itohy 	if (CMPCI_ISCAP(sc, SPDOUT) &&
   1332  1.10     itohy 	    sc->sc_gain[CMPCI_PLAYBACK_MODE][CMPCI_LR]
   1333  1.10     itohy 		== CMPCI_PLAYBACK_MODE_SPDIF &&
   1334  1.10     itohy 	    (sc->sc_play.md_divide == CMPCI_REG_RATE_44100 ||
   1335  1.10     itohy 		(CMPCI_ISCAP(sc, SPDOUT_48K) &&
   1336  1.10     itohy 		    sc->sc_play.md_divide==CMPCI_REG_RATE_48000))) {
   1337  1.10     itohy 		/* playback to SPDIF */
   1338  1.10     itohy 		cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE);
   1339  1.10     itohy 		enspdout = 1;
   1340  1.10     itohy 		if (sc->sc_play.md_divide==CMPCI_REG_RATE_48000)
   1341  1.21     itohy 			cmpci_reg_set_reg_misc(sc,
   1342  1.21     itohy 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
   1343  1.10     itohy 		else
   1344  1.21     itohy 			cmpci_reg_clear_reg_misc(sc,
   1345  1.21     itohy 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
   1346  1.10     itohy 	} else {
   1347  1.10     itohy 		/* playback to DAC */
   1348   1.7  tshiozak 		cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
   1349  1.10     itohy 				  CMPCI_REG_SPDIF0_ENABLE);
   1350  1.10     itohy 		if (CMPCI_ISCAP(sc, SPDOUT_48K))
   1351  1.21     itohy 			cmpci_reg_clear_reg_misc(sc,
   1352  1.21     itohy 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
   1353  1.10     itohy 	}
   1354  1.10     itohy 
   1355  1.10     itohy 	/* legacy to SPDIF/out or not */
   1356  1.10     itohy 	if (CMPCI_ISCAP(sc, SPDLEGACY)) {
   1357  1.10     itohy 		if (sc->sc_gain[CMPCI_SPDIF_OUT_PLAYBACK][CMPCI_LR]
   1358  1.10     itohy 		    == CMPCI_SPDIF_OUT_PLAYBACK_WAVE)
   1359  1.10     itohy 			cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL,
   1360  1.10     itohy 					CMPCI_REG_LEGACY_SPDIF_ENABLE);
   1361  1.10     itohy 		else {
   1362  1.10     itohy 			cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL,
   1363  1.10     itohy 					CMPCI_REG_LEGACY_SPDIF_ENABLE);
   1364  1.10     itohy 			enspdout = 1;
   1365  1.10     itohy 		}
   1366  1.10     itohy 	}
   1367  1.10     itohy 
   1368  1.10     itohy 	/* enable/disable SPDIF/out */
   1369  1.10     itohy 	if (CMPCI_ISCAP(sc, XSPDOUT) && enspdout)
   1370  1.10     itohy 		cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL,
   1371  1.10     itohy 				CMPCI_REG_XSPDIF_ENABLE);
   1372  1.10     itohy 	else
   1373   1.7  tshiozak 		cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL,
   1374  1.10     itohy 				CMPCI_REG_XSPDIF_ENABLE);
   1375  1.10     itohy 
   1376  1.25   xtraeme 	/* SPDIF monitor (digital to analog output) */
   1377  1.10     itohy 	if (CMPCI_ISCAP(sc, SPDIN_MONITOR)) {
   1378  1.10     itohy 		v = sc->sc_gain[CMPCI_MONITOR_DAC][CMPCI_LR];
   1379  1.10     itohy 		if (!(v & CMPCI_MONDAC_ENABLE))
   1380  1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1381  1.10     itohy 					CMPCI_REG_SPDIN_MONITOR);
   1382  1.10     itohy 		if (v & CMPCI_MONDAC_SPDOUT)
   1383   1.7  tshiozak 			cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1,
   1384  1.10     itohy 					CMPCI_REG_SPDIFOUT_DAC);
   1385  1.10     itohy 		else
   1386   1.7  tshiozak 			cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
   1387  1.10     itohy 					CMPCI_REG_SPDIFOUT_DAC);
   1388  1.10     itohy 		if (v & CMPCI_MONDAC_ENABLE)
   1389  1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1390  1.10     itohy 					CMPCI_REG_SPDIN_MONITOR);
   1391   1.7  tshiozak 	}
   1392   1.1  augustss }
   1393   1.1  augustss 
   1394   1.1  augustss static int
   1395  1.28      kent cmpci_set_in_ports(struct cmpci_softc *sc)
   1396  1.10     itohy {
   1397   1.1  augustss 	int mask;
   1398   1.1  augustss 	int bitsl, bitsr;
   1399   1.1  augustss 
   1400  1.10     itohy 	mask = sc->sc_in_mask;
   1401  1.10     itohy 
   1402  1.10     itohy 	/*
   1403  1.10     itohy 	 * Note CMPCI_RECORD_SOURCE_CD, CMPCI_RECORD_SOURCE_LINE_IN and
   1404  1.10     itohy 	 * CMPCI_RECORD_SOURCE_FM are defined to the corresponding bit
   1405  1.10     itohy 	 * of the mixer register.
   1406  1.10     itohy 	 */
   1407  1.10     itohy 	bitsr = mask & (CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN |
   1408  1.10     itohy 	    CMPCI_RECORD_SOURCE_FM);
   1409  1.10     itohy 
   1410   1.1  augustss 	bitsl = CMPCI_SB16_MIXER_SRC_R_TO_L(bitsr);
   1411   1.8     itohy 	if (mask & CMPCI_RECORD_SOURCE_MIC) {
   1412   1.1  augustss 		bitsl |= CMPCI_SB16_MIXER_MIC_SRC;
   1413   1.1  augustss 		bitsr |= CMPCI_SB16_MIXER_MIC_SRC;
   1414   1.1  augustss 	}
   1415   1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, bitsl);
   1416   1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, bitsr);
   1417  1.10     itohy 
   1418  1.10     itohy 	if (mask & CMPCI_RECORD_SOURCE_AUX_IN)
   1419  1.10     itohy 		cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
   1420  1.10     itohy 		    CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN);
   1421  1.10     itohy 	else
   1422  1.10     itohy 		cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
   1423  1.10     itohy 		    CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN);
   1424  1.10     itohy 
   1425  1.10     itohy 	if (mask & CMPCI_RECORD_SOURCE_WAVE)
   1426  1.10     itohy 		cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1427  1.10     itohy 		    CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR);
   1428  1.10     itohy 	else
   1429  1.10     itohy 		cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1430  1.10     itohy 		    CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR);
   1431  1.10     itohy 
   1432   1.7  tshiozak 	if (CMPCI_ISCAP(sc, SPDIN) &&
   1433  1.10     itohy 	    (sc->sc_rec.md_divide == CMPCI_REG_RATE_44100 ||
   1434  1.10     itohy 		(CMPCI_ISCAP(sc, SPDOUT_48K) &&
   1435  1.10     itohy 		    sc->sc_rec.md_divide == CMPCI_REG_RATE_48000/* XXX? */))) {
   1436   1.8     itohy 		if (mask & CMPCI_RECORD_SOURCE_SPDIF) {
   1437   1.7  tshiozak 			/* enable SPDIF/in */
   1438   1.7  tshiozak 			cmpci_reg_set_4(sc,
   1439   1.7  tshiozak 					CMPCI_REG_FUNC_1,
   1440   1.7  tshiozak 					CMPCI_REG_SPDIF1_ENABLE);
   1441   1.7  tshiozak 		} else {
   1442   1.7  tshiozak 			cmpci_reg_clear_4(sc,
   1443   1.7  tshiozak 					CMPCI_REG_FUNC_1,
   1444   1.7  tshiozak 					CMPCI_REG_SPDIF1_ENABLE);
   1445   1.7  tshiozak 		}
   1446   1.7  tshiozak 	}
   1447   1.1  augustss 
   1448   1.1  augustss 	return 0;
   1449   1.1  augustss }
   1450   1.1  augustss 
   1451   1.1  augustss static int
   1452  1.28      kent cmpci_set_port(void *handle, mixer_ctrl_t *cp)
   1453   1.1  augustss {
   1454  1.28      kent 	struct cmpci_softc *sc;
   1455   1.1  augustss 	int lgain, rgain;
   1456  1.10     itohy 
   1457  1.28      kent 	sc = handle;
   1458   1.1  augustss 	switch (cp->dev) {
   1459  1.10     itohy 	case CMPCI_MIC_VOL:
   1460   1.1  augustss 	case CMPCI_PCSPEAKER:
   1461  1.10     itohy 	case CMPCI_MIC_RECVOL:
   1462  1.10     itohy 		if (cp->un.value.num_channels != 1)
   1463  1.10     itohy 			return EINVAL;
   1464  1.10     itohy 		/* FALLTHROUGH */
   1465  1.10     itohy 	case CMPCI_DAC_VOL:
   1466   1.1  augustss 	case CMPCI_FM_VOL:
   1467   1.1  augustss 	case CMPCI_CD_VOL:
   1468  1.10     itohy 	case CMPCI_LINE_IN_VOL:
   1469  1.10     itohy 	case CMPCI_AUX_IN_VOL:
   1470   1.1  augustss 	case CMPCI_MASTER_VOL:
   1471   1.1  augustss 		if (cp->type != AUDIO_MIXER_VALUE)
   1472   1.1  augustss 			return EINVAL;
   1473  1.10     itohy 		switch (cp->un.value.num_channels) {
   1474  1.10     itohy 		case 1:
   1475   1.1  augustss 			lgain = rgain =
   1476  1.10     itohy 			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
   1477   1.1  augustss 			break;
   1478  1.10     itohy 		case 2:
   1479  1.10     itohy 			lgain = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT];
   1480  1.10     itohy 			rgain = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT];
   1481   1.1  augustss 			break;
   1482   1.1  augustss 		default:
   1483  1.10     itohy 			return EINVAL;
   1484   1.1  augustss 		}
   1485   1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_LEFT]  = lgain;
   1486   1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_RIGHT] = rgain;
   1487   1.1  augustss 
   1488   1.1  augustss 		cmpci_set_mixer_gain(sc, cp->dev);
   1489   1.1  augustss 		break;
   1490   1.1  augustss 
   1491   1.1  augustss 	case CMPCI_RECORD_SOURCE:
   1492   1.1  augustss 		if (cp->type != AUDIO_MIXER_SET)
   1493   1.1  augustss 			return EINVAL;
   1494   1.8     itohy 
   1495  1.10     itohy 		if (cp->un.mask & ~(CMPCI_RECORD_SOURCE_MIC |
   1496  1.10     itohy 		    CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN |
   1497  1.10     itohy 		    CMPCI_RECORD_SOURCE_AUX_IN | CMPCI_RECORD_SOURCE_WAVE |
   1498  1.10     itohy 		    CMPCI_RECORD_SOURCE_FM | CMPCI_RECORD_SOURCE_SPDIF))
   1499  1.10     itohy 			return EINVAL;
   1500  1.10     itohy 
   1501   1.8     itohy 		if (cp->un.mask & CMPCI_RECORD_SOURCE_SPDIF)
   1502   1.8     itohy 			cp->un.mask = CMPCI_RECORD_SOURCE_SPDIF;
   1503   1.8     itohy 
   1504  1.10     itohy 		sc->sc_in_mask = cp->un.mask;
   1505  1.10     itohy 		return cmpci_set_in_ports(sc);
   1506   1.1  augustss 
   1507  1.10     itohy 	/* boolean */
   1508  1.10     itohy 	case CMPCI_DAC_MUTE:
   1509  1.10     itohy 	case CMPCI_FM_MUTE:
   1510  1.10     itohy 	case CMPCI_CD_MUTE:
   1511  1.10     itohy 	case CMPCI_LINE_IN_MUTE:
   1512  1.10     itohy 	case CMPCI_AUX_IN_MUTE:
   1513  1.10     itohy 	case CMPCI_MIC_MUTE:
   1514  1.10     itohy 	case CMPCI_MIC_PREAMP:
   1515  1.10     itohy 	case CMPCI_PLAYBACK_MODE:
   1516  1.10     itohy 	case CMPCI_SPDIF_IN_PHASE:
   1517  1.10     itohy 	case CMPCI_SPDIF_LOOP:
   1518  1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
   1519  1.10     itohy 	case CMPCI_SPDIF_OUT_VOLTAGE:
   1520  1.10     itohy 	case CMPCI_REAR:
   1521  1.10     itohy 	case CMPCI_INDIVIDUAL:
   1522  1.10     itohy 	case CMPCI_REVERSE:
   1523  1.10     itohy 	case CMPCI_SURROUND:
   1524   1.1  augustss 		if (cp->type != AUDIO_MIXER_ENUM)
   1525   1.1  augustss 			return EINVAL;
   1526   1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord != 0;
   1527  1.10     itohy 		cmpci_set_mixer_gain(sc, cp->dev);
   1528   1.1  augustss 		break;
   1529   1.1  augustss 
   1530  1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
   1531  1.10     itohy 		switch (cp->un.ord) {
   1532  1.10     itohy 		case CMPCI_SPDIF_IN_SPDIN1:
   1533  1.10     itohy 		case CMPCI_SPDIF_IN_SPDIN2:
   1534  1.10     itohy 		case CMPCI_SPDIF_IN_SPDOUT:
   1535  1.10     itohy 			break;
   1536  1.10     itohy 		default:
   1537   1.1  augustss 			return EINVAL;
   1538   1.1  augustss 		}
   1539  1.10     itohy 		goto xenum;
   1540  1.10     itohy 	case CMPCI_MONITOR_DAC:
   1541  1.10     itohy 		switch (cp->un.ord) {
   1542  1.10     itohy 		case CMPCI_MONITOR_DAC_OFF:
   1543  1.10     itohy 		case CMPCI_MONITOR_DAC_SPDIN:
   1544  1.10     itohy 		case CMPCI_MONITOR_DAC_SPDOUT:
   1545  1.10     itohy 			break;
   1546  1.10     itohy 		default:
   1547  1.10     itohy 			return EINVAL;
   1548   1.1  augustss 		}
   1549  1.10     itohy 	xenum:
   1550  1.10     itohy 		if (cp->type != AUDIO_MIXER_ENUM)
   1551  1.10     itohy 			return EINVAL;
   1552   1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord;
   1553  1.10     itohy 		cmpci_set_mixer_gain(sc, cp->dev);
   1554   1.7  tshiozak 		break;
   1555  1.10     itohy 
   1556   1.1  augustss 	default:
   1557   1.1  augustss 	    return EINVAL;
   1558   1.1  augustss 	}
   1559  1.10     itohy 
   1560   1.1  augustss 	return 0;
   1561   1.1  augustss }
   1562   1.1  augustss 
   1563   1.1  augustss static int
   1564  1.28      kent cmpci_get_port(void *handle, mixer_ctrl_t *cp)
   1565   1.1  augustss {
   1566  1.28      kent 	struct cmpci_softc *sc;
   1567  1.10     itohy 
   1568  1.28      kent 	sc = handle;
   1569   1.1  augustss 	switch (cp->dev) {
   1570   1.1  augustss 	case CMPCI_MIC_VOL:
   1571  1.10     itohy 	case CMPCI_PCSPEAKER:
   1572  1.10     itohy 	case CMPCI_MIC_RECVOL:
   1573   1.1  augustss 		if (cp->un.value.num_channels != 1)
   1574   1.1  augustss 			return EINVAL;
   1575  1.12     itohy 		/*FALLTHROUGH*/
   1576  1.10     itohy 	case CMPCI_DAC_VOL:
   1577   1.1  augustss 	case CMPCI_FM_VOL:
   1578   1.1  augustss 	case CMPCI_CD_VOL:
   1579  1.10     itohy 	case CMPCI_LINE_IN_VOL:
   1580  1.10     itohy 	case CMPCI_AUX_IN_VOL:
   1581   1.1  augustss 	case CMPCI_MASTER_VOL:
   1582   1.1  augustss 		switch (cp->un.value.num_channels) {
   1583   1.1  augustss 		case 1:
   1584  1.10     itohy 			cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
   1585   1.7  tshiozak 				sc->sc_gain[cp->dev][CMPCI_LEFT];
   1586   1.1  augustss 			break;
   1587   1.1  augustss 		case 2:
   1588  1.10     itohy 			cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
   1589   1.7  tshiozak 				sc->sc_gain[cp->dev][CMPCI_LEFT];
   1590  1.10     itohy 			cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
   1591   1.7  tshiozak 				sc->sc_gain[cp->dev][CMPCI_RIGHT];
   1592   1.1  augustss 			break;
   1593   1.1  augustss 		default:
   1594   1.1  augustss 			return EINVAL;
   1595   1.1  augustss 		}
   1596   1.1  augustss 		break;
   1597  1.10     itohy 
   1598   1.1  augustss 	case CMPCI_RECORD_SOURCE:
   1599   1.7  tshiozak 		cp->un.mask = sc->sc_in_mask;
   1600   1.1  augustss 		break;
   1601   1.1  augustss 
   1602  1.10     itohy 	case CMPCI_DAC_MUTE:
   1603  1.10     itohy 	case CMPCI_FM_MUTE:
   1604  1.10     itohy 	case CMPCI_CD_MUTE:
   1605   1.1  augustss 	case CMPCI_LINE_IN_MUTE:
   1606  1.10     itohy 	case CMPCI_AUX_IN_MUTE:
   1607  1.10     itohy 	case CMPCI_MIC_MUTE:
   1608  1.10     itohy 	case CMPCI_MIC_PREAMP:
   1609  1.10     itohy 	case CMPCI_PLAYBACK_MODE:
   1610  1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
   1611  1.10     itohy 	case CMPCI_SPDIF_IN_PHASE:
   1612   1.7  tshiozak 	case CMPCI_SPDIF_LOOP:
   1613  1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
   1614   1.7  tshiozak 	case CMPCI_SPDIF_OUT_VOLTAGE:
   1615  1.10     itohy 	case CMPCI_MONITOR_DAC:
   1616   1.7  tshiozak 	case CMPCI_REAR:
   1617   1.7  tshiozak 	case CMPCI_INDIVIDUAL:
   1618   1.7  tshiozak 	case CMPCI_REVERSE:
   1619   1.7  tshiozak 	case CMPCI_SURROUND:
   1620   1.7  tshiozak 		cp->un.ord = sc->sc_gain[cp->dev][CMPCI_LR];
   1621   1.1  augustss 		break;
   1622   1.1  augustss 
   1623   1.1  augustss 	default:
   1624   1.1  augustss 		return EINVAL;
   1625   1.1  augustss 	}
   1626   1.1  augustss 
   1627   1.1  augustss 	return 0;
   1628   1.1  augustss }
   1629   1.1  augustss 
   1630   1.1  augustss /* ARGSUSED */
   1631   1.1  augustss static size_t
   1632  1.34  christos cmpci_round_buffersize(void *handle, int direction,
   1633  1.33  christos     size_t bufsize)
   1634   1.1  augustss {
   1635  1.28      kent 
   1636   1.1  augustss 	if (bufsize > 0x10000)
   1637   1.1  augustss 		bufsize = 0x10000;
   1638  1.10     itohy 
   1639   1.1  augustss 	return bufsize;
   1640   1.1  augustss }
   1641   1.1  augustss 
   1642   1.4    simonb static paddr_t
   1643  1.28      kent cmpci_mappage(void *handle, void *addr, off_t offset, int prot)
   1644   1.1  augustss {
   1645   1.1  augustss 	struct cmpci_dmanode *p;
   1646  1.10     itohy 
   1647  1.28      kent 	if (offset < 0 || NULL == (p = cmpci_find_dmamem(handle, addr)))
   1648   1.1  augustss 		return -1;
   1649   1.1  augustss 
   1650   1.1  augustss 	return bus_dmamem_mmap(p->cd_tag, p->cd_segs,
   1651   1.7  tshiozak 		   sizeof(p->cd_segs)/sizeof(p->cd_segs[0]),
   1652   1.7  tshiozak 		   offset, prot, BUS_DMA_WAITOK);
   1653   1.1  augustss }
   1654   1.1  augustss 
   1655   1.1  augustss /* ARGSUSED */
   1656   1.1  augustss static int
   1657  1.34  christos cmpci_get_props(void *handle)
   1658   1.1  augustss {
   1659  1.28      kent 
   1660   1.1  augustss 	return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX;
   1661   1.1  augustss }
   1662   1.1  augustss 
   1663   1.1  augustss static int
   1664  1.28      kent cmpci_trigger_output(void *handle, void *start, void *end, int blksize,
   1665  1.28      kent 		     void (*intr)(void *), void *arg,
   1666  1.28      kent 		     const audio_params_t *param)
   1667   1.1  augustss {
   1668  1.28      kent 	struct cmpci_softc *sc;
   1669   1.1  augustss 	struct cmpci_dmanode *p;
   1670   1.1  augustss 	int bps;
   1671   1.1  augustss 
   1672  1.28      kent 	sc = handle;
   1673   1.1  augustss 	sc->sc_play.intr = intr;
   1674   1.1  augustss 	sc->sc_play.intr_arg = arg;
   1675  1.27      kent 	bps = param->channels * param->precision / 8;
   1676   1.1  augustss 	if (!bps)
   1677   1.1  augustss 		return EINVAL;
   1678   1.1  augustss 
   1679   1.1  augustss 	/* set DMA frame */
   1680   1.1  augustss 	if (!(p = cmpci_find_dmamem(sc, start)))
   1681   1.1  augustss 		return EINVAL;
   1682   1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BASE,
   1683   1.1  augustss 	    DMAADDR(p));
   1684   1.1  augustss 	delay(10);
   1685   1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BYTES,
   1686  1.35  christos 	    ((char *)end - (char *)start + 1) / bps - 1);
   1687   1.1  augustss 	delay(10);
   1688   1.1  augustss 
   1689   1.1  augustss 	/* set interrupt count */
   1690   1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_SAMPLES,
   1691   1.1  augustss 			  (blksize + bps - 1) / bps - 1);
   1692   1.1  augustss 	delay(10);
   1693   1.1  augustss 
   1694   1.1  augustss 	/* start DMA */
   1695   1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); /* PLAY */
   1696   1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE);
   1697   1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE);
   1698  1.10     itohy 
   1699   1.1  augustss 	return 0;
   1700   1.1  augustss }
   1701   1.1  augustss 
   1702   1.1  augustss static int
   1703  1.28      kent cmpci_trigger_input(void *handle, void *start, void *end, int blksize,
   1704  1.28      kent 		    void (*intr)(void *), void *arg,
   1705  1.28      kent 		    const audio_params_t *param)
   1706   1.1  augustss {
   1707  1.28      kent 	struct cmpci_softc *sc;
   1708   1.1  augustss 	struct cmpci_dmanode *p;
   1709   1.1  augustss 	int bps;
   1710   1.1  augustss 
   1711  1.28      kent 	sc = handle;
   1712   1.1  augustss 	sc->sc_rec.intr = intr;
   1713   1.1  augustss 	sc->sc_rec.intr_arg = arg;
   1714  1.27      kent 	bps = param->channels * param->precision / 8;
   1715   1.1  augustss 	if (!bps)
   1716   1.1  augustss 		return EINVAL;
   1717   1.1  augustss 
   1718   1.1  augustss 	/* set DMA frame */
   1719   1.1  augustss 	if (!(p=cmpci_find_dmamem(sc, start)))
   1720   1.1  augustss 		return EINVAL;
   1721   1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BASE,
   1722   1.1  augustss 	    DMAADDR(p));
   1723   1.1  augustss 	delay(10);
   1724   1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BYTES,
   1725  1.35  christos 	    ((char *)end - (char *)start + 1) / bps - 1);
   1726   1.1  augustss 	delay(10);
   1727   1.1  augustss 
   1728   1.1  augustss 	/* set interrupt count */
   1729   1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_SAMPLES,
   1730   1.7  tshiozak 	    (blksize + bps - 1) / bps - 1);
   1731   1.1  augustss 	delay(10);
   1732   1.1  augustss 
   1733   1.1  augustss 	/* start DMA */
   1734   1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_DIR); /* REC */
   1735   1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE);
   1736   1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE);
   1737  1.10     itohy 
   1738   1.1  augustss 	return 0;
   1739   1.1  augustss }
   1740   1.1  augustss 
   1741  1.43  jmcneill static void
   1742  1.43  jmcneill cmpci_get_locks(void *addr, kmutex_t **intr, kmutex_t **thread)
   1743  1.43  jmcneill {
   1744  1.43  jmcneill 	struct cmpci_softc *sc;
   1745  1.43  jmcneill 
   1746  1.43  jmcneill 	sc = addr;
   1747  1.43  jmcneill 	*intr = &sc->sc_intr_lock;
   1748  1.43  jmcneill 	*thread = &sc->sc_lock;
   1749  1.43  jmcneill }
   1750  1.43  jmcneill 
   1751   1.1  augustss /* end of file */
   1752