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cmpci.c revision 1.54
      1  1.54     isaki /*	$NetBSD: cmpci.c,v 1.54 2019/05/08 13:40:18 isaki Exp $	*/
      2   1.1  augustss 
      3   1.1  augustss /*
      4  1.43  jmcneill  * Copyright (c) 2000, 2001, 2008 The NetBSD Foundation, Inc.
      5   1.1  augustss  * All rights reserved.
      6   1.1  augustss  *
      7   1.1  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8  1.22    keihan  * by Takuya SHIOZAKI <tshiozak (at) NetBSD.org> .
      9   1.1  augustss  *
     10  1.10     itohy  * This code is derived from software contributed to The NetBSD Foundation
     11  1.10     itohy  * by ITOH Yasufumi.
     12  1.10     itohy  *
     13   1.1  augustss  * Redistribution and use in source and binary forms, with or without
     14   1.1  augustss  * modification, are permitted provided that the following conditions
     15   1.1  augustss  * are met:
     16   1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     17   1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     18   1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     19   1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     20   1.1  augustss  *    documentation and/or other materials provided with the distribution.
     21   1.1  augustss  *
     22   1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     23   1.1  augustss  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24   1.1  augustss  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25   1.1  augustss  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     26   1.1  augustss  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27   1.1  augustss  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28   1.1  augustss  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29   1.1  augustss  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30   1.1  augustss  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31   1.1  augustss  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32   1.1  augustss  * SUCH DAMAGE.
     33   1.1  augustss  *
     34   1.1  augustss  */
     35   1.1  augustss 
     36   1.1  augustss /*
     37   1.1  augustss  * C-Media CMI8x38 Audio Chip Support.
     38   1.1  augustss  *
     39   1.1  augustss  * TODO:
     40  1.10     itohy  *   - 4ch / 6ch support.
     41  1.10     itohy  *   - Joystick support.
     42   1.1  augustss  *
     43   1.1  augustss  */
     44  1.11     lukem 
     45  1.11     lukem #include <sys/cdefs.h>
     46  1.54     isaki __KERNEL_RCSID(0, "$NetBSD: cmpci.c,v 1.54 2019/05/08 13:40:18 isaki Exp $");
     47   1.1  augustss 
     48   1.1  augustss #if defined(AUDIO_DEBUG) || defined(DEBUG)
     49   1.7  tshiozak #define DPRINTF(x) if (cmpcidebug) printf x
     50   1.7  tshiozak int cmpcidebug = 0;
     51   1.1  augustss #else
     52   1.1  augustss #define DPRINTF(x)
     53   1.1  augustss #endif
     54   1.1  augustss 
     55   1.8     itohy #include "mpu.h"
     56   1.8     itohy 
     57   1.1  augustss #include <sys/param.h>
     58   1.1  augustss #include <sys/systm.h>
     59   1.1  augustss #include <sys/kernel.h>
     60  1.43  jmcneill #include <sys/kmem.h>
     61   1.1  augustss #include <sys/device.h>
     62   1.1  augustss #include <sys/proc.h>
     63   1.1  augustss 
     64   1.1  augustss #include <dev/pci/pcidevs.h>
     65   1.1  augustss #include <dev/pci/pcivar.h>
     66   1.1  augustss 
     67   1.1  augustss #include <sys/audioio.h>
     68  1.54     isaki #include <dev/audio/audio_if.h>
     69   1.1  augustss #include <dev/midi_if.h>
     70   1.1  augustss 
     71   1.1  augustss #include <dev/pci/cmpcireg.h>
     72   1.1  augustss #include <dev/pci/cmpcivar.h>
     73   1.1  augustss 
     74   1.1  augustss #include <dev/ic/mpuvar.h>
     75  1.36        ad #include <sys/bus.h>
     76  1.36        ad #include <sys/intr.h>
     77   1.1  augustss 
     78   1.1  augustss /*
     79   1.1  augustss  * Low-level HW interface
     80   1.1  augustss  */
     81  1.30     perry static inline uint8_t cmpci_mixerreg_read(struct cmpci_softc *, uint8_t);
     82  1.30     perry static inline void cmpci_mixerreg_write(struct cmpci_softc *,
     83  1.28      kent 	uint8_t, uint8_t);
     84  1.30     perry static inline void cmpci_reg_partial_write_1(struct cmpci_softc *, int, int,
     85  1.28      kent 	unsigned, unsigned);
     86  1.30     perry static inline void cmpci_reg_partial_write_4(struct cmpci_softc *, int, int,
     87  1.28      kent 	uint32_t, uint32_t);
     88  1.30     perry static inline void cmpci_reg_set_1(struct cmpci_softc *, int, uint8_t);
     89  1.30     perry static inline void cmpci_reg_clear_1(struct cmpci_softc *, int, uint8_t);
     90  1.30     perry static inline void cmpci_reg_set_4(struct cmpci_softc *, int, uint32_t);
     91  1.30     perry static inline void cmpci_reg_clear_4(struct cmpci_softc *, int, uint32_t);
     92  1.30     perry static inline void cmpci_reg_set_reg_misc(struct cmpci_softc *, uint32_t);
     93  1.30     perry static inline void cmpci_reg_clear_reg_misc(struct cmpci_softc *, uint32_t);
     94  1.28      kent static int cmpci_rate_to_index(int);
     95  1.30     perry static inline int cmpci_index_to_rate(int);
     96  1.30     perry static inline int cmpci_index_to_divider(int);
     97  1.28      kent 
     98  1.28      kent static int cmpci_adjust(int, int);
     99  1.28      kent static void cmpci_set_mixer_gain(struct cmpci_softc *, int);
    100  1.28      kent static void cmpci_set_out_ports(struct cmpci_softc *);
    101  1.28      kent static int cmpci_set_in_ports(struct cmpci_softc *);
    102   1.1  augustss 
    103   1.1  augustss 
    104   1.1  augustss /*
    105   1.1  augustss  * autoconf interface
    106   1.1  augustss  */
    107  1.40    cegger static int cmpci_match(device_t, cfdata_t, void *);
    108  1.40    cegger static void cmpci_attach(device_t, device_t, void *);
    109   1.1  augustss 
    110  1.46       chs CFATTACH_DECL_NEW(cmpci, sizeof (struct cmpci_softc),
    111  1.16   thorpej     cmpci_match, cmpci_attach, NULL, NULL);
    112   1.1  augustss 
    113   1.1  augustss /* interrupt */
    114  1.28      kent static int cmpci_intr(void *);
    115   1.1  augustss 
    116   1.1  augustss 
    117   1.1  augustss /*
    118   1.1  augustss  * DMA stuffs
    119   1.1  augustss  */
    120  1.43  jmcneill static int cmpci_alloc_dmamem(struct cmpci_softc *, size_t, void **);
    121  1.43  jmcneill static int cmpci_free_dmamem(struct cmpci_softc *, void *, size_t);
    122  1.28      kent static struct cmpci_dmanode * cmpci_find_dmamem(struct cmpci_softc *,
    123  1.35  christos 	void *);
    124   1.1  augustss 
    125   1.1  augustss 
    126   1.1  augustss /*
    127   1.1  augustss  * interface to machine independent layer
    128   1.1  augustss  */
    129  1.54     isaki static int cmpci_query_format(void *, audio_format_query_t *);
    130  1.54     isaki static int cmpci_set_format(void *, int,
    131  1.54     isaki     const audio_params_t *, const audio_params_t *,
    132  1.54     isaki     audio_filter_reg_t *, audio_filter_reg_t *);
    133  1.28      kent static int cmpci_round_blocksize(void *, int, int, const audio_params_t *);
    134  1.28      kent static int cmpci_halt_output(void *);
    135  1.28      kent static int cmpci_halt_input(void *);
    136  1.28      kent static int cmpci_getdev(void *, struct audio_device *);
    137  1.28      kent static int cmpci_set_port(void *, mixer_ctrl_t *);
    138  1.28      kent static int cmpci_get_port(void *, mixer_ctrl_t *);
    139  1.28      kent static int cmpci_query_devinfo(void *, mixer_devinfo_t *);
    140  1.43  jmcneill static void *cmpci_allocm(void *, int, size_t);
    141  1.43  jmcneill static void cmpci_freem(void *, void *, size_t);
    142  1.28      kent static size_t cmpci_round_buffersize(void *, int, size_t);
    143  1.28      kent static int cmpci_get_props(void *);
    144  1.28      kent static int cmpci_trigger_output(void *, void *, void *, int,
    145  1.28      kent 	void (*)(void *), void *, const audio_params_t *);
    146  1.28      kent static int cmpci_trigger_input(void *, void *, void *, int,
    147  1.28      kent 	void (*)(void *), void *, const audio_params_t *);
    148  1.43  jmcneill static void cmpci_get_locks(void *, kmutex_t **, kmutex_t **);
    149   1.1  augustss 
    150  1.26      yamt static const struct audio_hw_if cmpci_hw_if = {
    151  1.54     isaki 	.query_format		= cmpci_query_format,
    152  1.54     isaki 	.set_format		= cmpci_set_format,
    153  1.52     isaki 	.round_blocksize	= cmpci_round_blocksize,
    154  1.52     isaki 	.halt_output		= cmpci_halt_output,
    155  1.52     isaki 	.halt_input		= cmpci_halt_input,
    156  1.53     isaki 	.getdev			= cmpci_getdev,
    157  1.52     isaki 	.set_port		= cmpci_set_port,
    158  1.52     isaki 	.get_port		= cmpci_get_port,
    159  1.52     isaki 	.query_devinfo		= cmpci_query_devinfo,
    160  1.53     isaki 	.allocm			= cmpci_allocm,
    161  1.52     isaki 	.freem			= cmpci_freem,
    162  1.52     isaki 	.round_buffersize	= cmpci_round_buffersize,
    163  1.52     isaki 	.get_props		= cmpci_get_props,
    164  1.52     isaki 	.trigger_output		= cmpci_trigger_output,
    165  1.52     isaki 	.trigger_input		= cmpci_trigger_input,
    166  1.52     isaki 	.get_locks		= cmpci_get_locks,
    167   1.1  augustss };
    168   1.1  augustss 
    169  1.54     isaki static const struct audio_format cmpci_formats[] = {
    170  1.54     isaki 	{
    171  1.54     isaki 		.mode		= AUMODE_PLAY | AUMODE_RECORD,
    172  1.54     isaki 		.encoding	= AUDIO_ENCODING_SLINEAR_LE,
    173  1.54     isaki 		.validbits	= 16,
    174  1.54     isaki 		.precision	= 16,
    175  1.54     isaki 		.channels	= 2,
    176  1.54     isaki 		.channel_mask	= AUFMT_STEREO,
    177  1.54     isaki 		.frequency_type	= 8,
    178  1.54     isaki 		.frequency	=
    179  1.54     isaki 		    { 5512, 8000, 11025, 16000, 22050, 32000, 44100, 48000 },
    180  1.54     isaki 	},
    181  1.27      kent };
    182  1.54     isaki #define CMPCI_NFORMATS __arraycount(cmpci_formats)
    183  1.27      kent 
    184   1.1  augustss 
    185   1.1  augustss /*
    186   1.1  augustss  * Low-level HW interface
    187   1.1  augustss  */
    188   1.1  augustss 
    189   1.1  augustss /* mixer register read/write */
    190  1.30     perry static inline uint8_t
    191  1.28      kent cmpci_mixerreg_read(struct cmpci_softc *sc, uint8_t no)
    192   1.1  augustss {
    193   1.1  augustss 	uint8_t ret;
    194   1.1  augustss 
    195   1.1  augustss 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no);
    196   1.1  augustss 	delay(10);
    197   1.1  augustss 	ret = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA);
    198   1.1  augustss 	delay(10);
    199   1.1  augustss 	return ret;
    200   1.1  augustss }
    201   1.1  augustss 
    202  1.30     perry static inline void
    203  1.28      kent cmpci_mixerreg_write(struct cmpci_softc *sc, uint8_t no, uint8_t val)
    204   1.1  augustss {
    205  1.28      kent 
    206   1.1  augustss 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no);
    207   1.1  augustss 	delay(10);
    208   1.1  augustss 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA, val);
    209   1.1  augustss 	delay(10);
    210   1.1  augustss }
    211   1.1  augustss 
    212   1.1  augustss 
    213   1.1  augustss /* register partial write */
    214  1.30     perry static inline void
    215  1.28      kent cmpci_reg_partial_write_1(struct cmpci_softc *sc, int no, int shift,
    216  1.28      kent 			  unsigned mask, unsigned val)
    217  1.10     itohy {
    218  1.28      kent 
    219  1.10     itohy 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
    220  1.10     itohy 	    (val<<shift) |
    221  1.10     itohy 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
    222  1.10     itohy 	delay(10);
    223  1.10     itohy }
    224  1.10     itohy 
    225  1.30     perry static inline void
    226  1.28      kent cmpci_reg_partial_write_4(struct cmpci_softc *sc, int no, int shift,
    227  1.28      kent 			  uint32_t mask, uint32_t val)
    228   1.1  augustss {
    229  1.28      kent 
    230   1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
    231   1.1  augustss 	    (val<<shift) |
    232   1.1  augustss 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
    233   1.1  augustss 	delay(10);
    234   1.1  augustss }
    235   1.1  augustss 
    236   1.1  augustss /* register set/clear bit */
    237  1.30     perry static inline void
    238  1.28      kent cmpci_reg_set_1(struct cmpci_softc *sc, int no, uint8_t mask)
    239   1.7  tshiozak {
    240  1.28      kent 
    241   1.7  tshiozak 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
    242   1.7  tshiozak 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) | mask));
    243   1.7  tshiozak 	delay(10);
    244   1.7  tshiozak }
    245   1.7  tshiozak 
    246  1.30     perry static inline void
    247  1.28      kent cmpci_reg_clear_1(struct cmpci_softc *sc, int no, uint8_t mask)
    248   1.7  tshiozak {
    249  1.28      kent 
    250   1.7  tshiozak 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
    251   1.7  tshiozak 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~mask));
    252   1.7  tshiozak 	delay(10);
    253   1.7  tshiozak }
    254   1.7  tshiozak 
    255  1.30     perry static inline void
    256  1.28      kent cmpci_reg_set_4(struct cmpci_softc *sc, int no, uint32_t mask)
    257   1.1  augustss {
    258  1.28      kent 
    259  1.21     itohy 	/* use cmpci_reg_set_reg_misc() for CMPCI_REG_MISC */
    260  1.21     itohy 	KDASSERT(no != CMPCI_REG_MISC);
    261  1.21     itohy 
    262   1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
    263   1.7  tshiozak 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) | mask));
    264   1.1  augustss 	delay(10);
    265   1.1  augustss }
    266   1.1  augustss 
    267  1.30     perry static inline void
    268  1.28      kent cmpci_reg_clear_4(struct cmpci_softc *sc, int no, uint32_t mask)
    269   1.1  augustss {
    270  1.28      kent 
    271  1.21     itohy 	/* use cmpci_reg_clear_reg_misc() for CMPCI_REG_MISC */
    272  1.21     itohy 	KDASSERT(no != CMPCI_REG_MISC);
    273  1.21     itohy 
    274   1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
    275   1.7  tshiozak 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~mask));
    276   1.1  augustss 	delay(10);
    277   1.1  augustss }
    278   1.1  augustss 
    279  1.21     itohy /*
    280  1.21     itohy  * The CMPCI_REG_MISC register needs special handling, since one of
    281  1.21     itohy  * its bits has different read/write values.
    282  1.21     itohy  */
    283  1.30     perry static inline void
    284  1.28      kent cmpci_reg_set_reg_misc(struct cmpci_softc *sc, uint32_t mask)
    285  1.21     itohy {
    286  1.28      kent 
    287  1.21     itohy 	sc->sc_reg_misc |= mask;
    288  1.21     itohy 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC,
    289  1.21     itohy 	    sc->sc_reg_misc);
    290  1.21     itohy 	delay(10);
    291  1.21     itohy }
    292  1.21     itohy 
    293  1.30     perry static inline void
    294  1.28      kent cmpci_reg_clear_reg_misc(struct cmpci_softc *sc, uint32_t mask)
    295  1.21     itohy {
    296  1.28      kent 
    297  1.21     itohy 	sc->sc_reg_misc &= ~mask;
    298  1.21     itohy 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC,
    299  1.21     itohy 	    sc->sc_reg_misc);
    300  1.21     itohy 	delay(10);
    301  1.21     itohy }
    302  1.21     itohy 
    303   1.1  augustss /* rate */
    304   1.6  jdolecek static const struct {
    305   1.1  augustss 	int rate;
    306   1.1  augustss 	int divider;
    307   1.1  augustss } cmpci_rate_table[CMPCI_REG_NUMRATE] = {
    308   1.1  augustss #define _RATE(n) { n, CMPCI_REG_RATE_ ## n }
    309   1.1  augustss 	_RATE(5512),
    310   1.1  augustss 	_RATE(8000),
    311   1.1  augustss 	_RATE(11025),
    312   1.1  augustss 	_RATE(16000),
    313   1.1  augustss 	_RATE(22050),
    314   1.1  augustss 	_RATE(32000),
    315   1.1  augustss 	_RATE(44100),
    316   1.1  augustss 	_RATE(48000)
    317   1.7  tshiozak #undef	_RATE
    318   1.1  augustss };
    319   1.1  augustss 
    320   1.1  augustss static int
    321  1.28      kent cmpci_rate_to_index(int rate)
    322   1.1  augustss {
    323   1.1  augustss 	int i;
    324   1.1  augustss 
    325  1.13  augustss 	for (i = 0; i < CMPCI_REG_NUMRATE - 1; i++)
    326  1.54     isaki 		if (rate == cmpci_rate_table[i].rate)
    327   1.1  augustss 			return i;
    328   1.1  augustss 	return i;  /* 48000 */
    329   1.1  augustss }
    330   1.1  augustss 
    331  1.30     perry static inline int
    332  1.28      kent cmpci_index_to_rate(int index)
    333   1.1  augustss {
    334  1.28      kent 
    335   1.1  augustss 	return cmpci_rate_table[index].rate;
    336   1.1  augustss }
    337   1.1  augustss 
    338  1.30     perry static inline int
    339  1.28      kent cmpci_index_to_divider(int index)
    340   1.1  augustss {
    341  1.28      kent 
    342   1.1  augustss 	return cmpci_rate_table[index].divider;
    343   1.1  augustss }
    344   1.1  augustss 
    345   1.1  augustss /*
    346   1.1  augustss  * interface to configure the device.
    347   1.1  augustss  */
    348   1.1  augustss static int
    349  1.40    cegger cmpci_match(device_t parent, cfdata_t match, void *aux)
    350   1.1  augustss {
    351  1.28      kent 	struct pci_attach_args *pa;
    352   1.1  augustss 
    353  1.28      kent 	pa = (struct pci_attach_args *)aux;
    354   1.1  augustss 	if ( PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CMEDIA &&
    355   1.1  augustss 	     (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338A ||
    356   1.1  augustss 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338B ||
    357   1.7  tshiozak 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738 ||
    358   1.7  tshiozak 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738B) )
    359   1.1  augustss 		return 1;
    360   1.1  augustss 
    361   1.1  augustss 	return 0;
    362   1.1  augustss }
    363   1.1  augustss 
    364   1.1  augustss static void
    365  1.40    cegger cmpci_attach(device_t parent, device_t self, void *aux)
    366   1.1  augustss {
    367  1.28      kent 	struct cmpci_softc *sc;
    368  1.28      kent 	struct pci_attach_args *pa;
    369   1.8     itohy 	struct audio_attach_args aa;
    370   1.1  augustss 	pci_intr_handle_t ih;
    371   1.1  augustss 	char const *strintr;
    372   1.1  augustss 	int i, v;
    373  1.47  christos 	char intrbuf[PCI_INTRSTR_LEN];
    374   1.1  augustss 
    375  1.41    cegger 	sc = device_private(self);
    376  1.46       chs 	sc->sc_dev = self;
    377  1.28      kent 	pa = (struct pci_attach_args *)aux;
    378  1.17   thorpej 
    379   1.7  tshiozak 	sc->sc_id = pa->pa_id;
    380   1.7  tshiozak 	sc->sc_class = pa->pa_class;
    381  1.45  drochner 	pci_aprint_devinfo(pa, "Audio controller");
    382   1.7  tshiozak 	switch (PCI_PRODUCT(sc->sc_id)) {
    383   1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338A:
    384   1.7  tshiozak 		/*FALLTHROUGH*/
    385   1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338B:
    386   1.7  tshiozak 		sc->sc_capable = CMPCI_CAP_CMI8338;
    387   1.1  augustss 		break;
    388   1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8738:
    389   1.7  tshiozak 		/*FALLTHROUGH*/
    390   1.7  tshiozak 	case PCI_PRODUCT_CMEDIA_CMI8738B:
    391   1.7  tshiozak 		sc->sc_capable = CMPCI_CAP_CMI8738;
    392   1.1  augustss 		break;
    393   1.1  augustss 	}
    394   1.1  augustss 
    395   1.2  augustss 	/* map I/O space */
    396   1.1  augustss 	if (pci_mapreg_map(pa, CMPCI_PCI_IOBASEREG, PCI_MAPREG_TYPE_IO, 0,
    397   1.7  tshiozak 		&sc->sc_iot, &sc->sc_ioh, NULL, NULL)) {
    398  1.46       chs 		aprint_error_dev(sc->sc_dev, "failed to map I/O space\n");
    399   1.1  augustss 		return;
    400   1.1  augustss 	}
    401   1.1  augustss 
    402  1.43  jmcneill 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
    403  1.44       mrg 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO);
    404  1.43  jmcneill 
    405   1.2  augustss 	/* interrupt */
    406   1.5  sommerfe 	if (pci_intr_map(pa, &ih)) {
    407  1.46       chs 		aprint_error_dev(sc->sc_dev, "failed to map interrupt\n");
    408   1.1  augustss 		return;
    409   1.1  augustss 	}
    410  1.47  christos 	strintr = pci_intr_string(pa->pa_pc, ih, intrbuf, sizeof(intrbuf));
    411  1.51  jdolecek 	sc->sc_ih = pci_intr_establish_xname(pa->pa_pc, ih, IPL_AUDIO,
    412  1.51  jdolecek 	    cmpci_intr, sc, device_xname(self));
    413   1.1  augustss 	if (sc->sc_ih == NULL) {
    414  1.46       chs 		aprint_error_dev(sc->sc_dev, "failed to establish interrupt");
    415   1.1  augustss 		if (strintr != NULL)
    416  1.42     njoly 			aprint_error(" at %s", strintr);
    417  1.42     njoly 		aprint_error("\n");
    418  1.43  jmcneill 		mutex_destroy(&sc->sc_lock);
    419  1.43  jmcneill 		mutex_destroy(&sc->sc_intr_lock);
    420   1.1  augustss 		return;
    421   1.1  augustss 	}
    422  1.46       chs 	aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", strintr);
    423   1.1  augustss 
    424   1.1  augustss 	sc->sc_dmat = pa->pa_dmat;
    425   1.1  augustss 
    426  1.46       chs 	audio_attach_mi(&cmpci_hw_if, sc, sc->sc_dev);
    427   1.1  augustss 
    428   1.8     itohy 	/* attach OPL device */
    429   1.8     itohy 	aa.type = AUDIODEV_TYPE_OPL;
    430   1.8     itohy 	aa.hwif = NULL;
    431   1.8     itohy 	aa.hdl = NULL;
    432  1.46       chs 	(void)config_found(sc->sc_dev, &aa, audioprint);
    433   1.8     itohy 
    434   1.8     itohy 	/* attach MPU-401 device */
    435   1.8     itohy 	aa.type = AUDIODEV_TYPE_MPU;
    436   1.8     itohy 	aa.hwif = NULL;
    437   1.8     itohy 	aa.hdl = NULL;
    438   1.8     itohy 	if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
    439   1.8     itohy 	    CMPCI_REG_MPU_BASE, CMPCI_REG_MPU_SIZE, &sc->sc_mpu_ioh) == 0)
    440  1.46       chs 		sc->sc_mpudev = config_found(sc->sc_dev, &aa, audioprint);
    441   1.8     itohy 
    442  1.21     itohy 	/* get initial value (this is 0 and may be omitted but just in case) */
    443  1.21     itohy 	sc->sc_reg_misc = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
    444  1.21     itohy 	    CMPCI_REG_MISC) & ~CMPCI_REG_SPDIF48K;
    445  1.21     itohy 
    446   1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_RESET, 0);
    447   1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0);
    448   1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0);
    449   1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX,
    450   1.1  augustss 	    CMPCI_SB16_SW_CD|CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE);
    451   1.1  augustss 	for (i = 0; i < CMPCI_NDEVS; i++) {
    452  1.48   msaitoh 		switch (i) {
    453  1.10     itohy 		/*
    454  1.10     itohy 		 * CMI8738 defaults are
    455  1.10     itohy 		 *  master:	0xe0	(0x00 - 0xf8)
    456  1.12     itohy 		 *  FM, DAC:	0xc0	(0x00 - 0xf8)
    457  1.10     itohy 		 *  PC speaker:	0x80	(0x00 - 0xc0)
    458  1.10     itohy 		 *  others:	0
    459  1.10     itohy 		 */
    460  1.10     itohy 		/* volume */
    461   1.8     itohy 		case CMPCI_MASTER_VOL:
    462  1.10     itohy 			v = 128;	/* 224 */
    463  1.10     itohy 			break;
    464   1.8     itohy 		case CMPCI_FM_VOL:
    465  1.10     itohy 		case CMPCI_DAC_VOL:
    466  1.10     itohy 			v = 192;
    467  1.10     itohy 			break;
    468   1.8     itohy 		case CMPCI_PCSPEAKER:
    469  1.10     itohy 			v = 128;
    470   1.1  augustss 			break;
    471   1.8     itohy 
    472   1.8     itohy 		/* booleans, set to true */
    473  1.10     itohy 		case CMPCI_CD_MUTE:
    474  1.10     itohy 		case CMPCI_MIC_MUTE:
    475  1.10     itohy 		case CMPCI_LINE_IN_MUTE:
    476  1.10     itohy 		case CMPCI_AUX_IN_MUTE:
    477   1.8     itohy 			v = 1;
    478   1.1  augustss 			break;
    479  1.10     itohy 
    480  1.10     itohy 		/* volume with inital value 0 */
    481  1.10     itohy 		case CMPCI_CD_VOL:
    482  1.10     itohy 		case CMPCI_LINE_IN_VOL:
    483  1.10     itohy 		case CMPCI_AUX_IN_VOL:
    484  1.10     itohy 		case CMPCI_MIC_VOL:
    485  1.10     itohy 		case CMPCI_MIC_RECVOL:
    486  1.10     itohy 			/* FALLTHROUGH */
    487  1.10     itohy 
    488   1.8     itohy 		/* others are cleared */
    489  1.10     itohy 		case CMPCI_MIC_PREAMP:
    490   1.8     itohy 		case CMPCI_RECORD_SOURCE:
    491  1.10     itohy 		case CMPCI_PLAYBACK_MODE:
    492  1.10     itohy 		case CMPCI_SPDIF_IN_SELECT:
    493  1.10     itohy 		case CMPCI_SPDIF_IN_PHASE:
    494   1.7  tshiozak 		case CMPCI_SPDIF_LOOP:
    495  1.10     itohy 		case CMPCI_SPDIF_OUT_PLAYBACK:
    496   1.7  tshiozak 		case CMPCI_SPDIF_OUT_VOLTAGE:
    497  1.10     itohy 		case CMPCI_MONITOR_DAC:
    498   1.7  tshiozak 		case CMPCI_REAR:
    499   1.7  tshiozak 		case CMPCI_INDIVIDUAL:
    500   1.7  tshiozak 		case CMPCI_REVERSE:
    501   1.7  tshiozak 		case CMPCI_SURROUND:
    502   1.8     itohy 		default:
    503   1.1  augustss 			v = 0;
    504   1.1  augustss 			break;
    505   1.1  augustss 		}
    506   1.7  tshiozak 		sc->sc_gain[i][CMPCI_LEFT] = sc->sc_gain[i][CMPCI_RIGHT] = v;
    507   1.1  augustss 		cmpci_set_mixer_gain(sc, i);
    508   1.1  augustss 	}
    509   1.1  augustss }
    510   1.1  augustss 
    511   1.1  augustss static int
    512  1.28      kent cmpci_intr(void *handle)
    513   1.1  augustss {
    514  1.37   xtraeme 	struct cmpci_softc *sc = handle;
    515  1.37   xtraeme #if NMPU > 0
    516  1.37   xtraeme 	struct mpu_softc *sc_mpu = device_private(sc->sc_mpudev);
    517  1.37   xtraeme #endif
    518   1.1  augustss 	uint32_t intrstat;
    519   1.1  augustss 
    520  1.43  jmcneill 	mutex_spin_enter(&sc->sc_intr_lock);
    521  1.43  jmcneill 
    522   1.1  augustss 	intrstat = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
    523   1.1  augustss 	    CMPCI_REG_INTR_STATUS);
    524   1.1  augustss 
    525  1.43  jmcneill 	if (!(intrstat & CMPCI_REG_ANY_INTR)) {
    526  1.43  jmcneill 		mutex_spin_exit(&sc->sc_intr_lock);
    527   1.1  augustss 		return 0;
    528  1.43  jmcneill 	}
    529   1.1  augustss 
    530   1.8     itohy 	delay(10);
    531   1.8     itohy 
    532   1.1  augustss 	/* disable and reset intr */
    533   1.1  augustss 	if (intrstat & CMPCI_REG_CH0_INTR)
    534   1.1  augustss 		cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL,
    535   1.1  augustss 		   CMPCI_REG_CH0_INTR_ENABLE);
    536   1.1  augustss 	if (intrstat & CMPCI_REG_CH1_INTR)
    537   1.1  augustss 		cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL,
    538   1.1  augustss 		    CMPCI_REG_CH1_INTR_ENABLE);
    539   1.1  augustss 
    540   1.1  augustss 	if (intrstat & CMPCI_REG_CH0_INTR) {
    541   1.1  augustss 		if (sc->sc_play.intr != NULL)
    542   1.1  augustss 			(*sc->sc_play.intr)(sc->sc_play.intr_arg);
    543   1.1  augustss 	}
    544   1.1  augustss 	if (intrstat & CMPCI_REG_CH1_INTR) {
    545   1.1  augustss 		if (sc->sc_rec.intr != NULL)
    546   1.1  augustss 			(*sc->sc_rec.intr)(sc->sc_rec.intr_arg);
    547   1.1  augustss 	}
    548   1.1  augustss 
    549   1.1  augustss 	/* enable intr */
    550   1.1  augustss 	if (intrstat & CMPCI_REG_CH0_INTR)
    551   1.1  augustss 		cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL,
    552   1.1  augustss 		    CMPCI_REG_CH0_INTR_ENABLE);
    553   1.1  augustss 	if (intrstat & CMPCI_REG_CH1_INTR)
    554   1.1  augustss 		cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL,
    555   1.1  augustss 		    CMPCI_REG_CH1_INTR_ENABLE);
    556   1.8     itohy 
    557   1.8     itohy #if NMPU > 0
    558  1.37   xtraeme 	if (intrstat & CMPCI_REG_UART_INTR && sc_mpu != NULL)
    559  1.37   xtraeme 		mpu_intr(sc_mpu);
    560   1.8     itohy #endif
    561   1.8     itohy 
    562  1.43  jmcneill 	mutex_spin_exit(&sc->sc_intr_lock);
    563   1.8     itohy 	return 1;
    564   1.1  augustss }
    565   1.1  augustss 
    566   1.1  augustss static int
    567  1.54     isaki cmpci_query_format(void *handle, audio_format_query_t *afp)
    568   1.1  augustss {
    569  1.28      kent 
    570  1.54     isaki 	return audio_query_format(cmpci_formats, CMPCI_NFORMATS, afp);
    571   1.1  augustss }
    572   1.1  augustss 
    573   1.1  augustss static int
    574  1.54     isaki cmpci_set_format(void *handle, int setmode,
    575  1.54     isaki     const audio_params_t *play, const audio_params_t *rec,
    576  1.54     isaki     audio_filter_reg_t *pfil, audio_filter_reg_t *rfil)
    577   1.1  augustss {
    578   1.1  augustss 	int i;
    579  1.28      kent 	struct cmpci_softc *sc;
    580   1.1  augustss 
    581  1.28      kent 	sc = handle;
    582   1.1  augustss 	for (i = 0; i < 2; i++) {
    583   1.1  augustss 		int md_format;
    584   1.1  augustss 		int md_divide;
    585   1.1  augustss 		int md_index;
    586   1.1  augustss 		int mode;
    587  1.54     isaki 		const audio_params_t *p;
    588  1.10     itohy 
    589   1.1  augustss 		switch (i) {
    590   1.1  augustss 		case 0:
    591   1.1  augustss 			mode = AUMODE_PLAY;
    592   1.1  augustss 			p = play;
    593   1.1  augustss 			break;
    594   1.1  augustss 		case 1:
    595   1.1  augustss 			mode = AUMODE_RECORD;
    596   1.1  augustss 			p = rec;
    597   1.1  augustss 			break;
    598  1.19  christos 		default:
    599  1.19  christos 			return EINVAL;
    600   1.1  augustss 		}
    601  1.10     itohy 
    602   1.1  augustss 		if (!(setmode & mode))
    603   1.1  augustss 			continue;
    604   1.1  augustss 
    605  1.27      kent 		md_index = cmpci_rate_to_index(p->sample_rate);
    606  1.27      kent 		md_divide = cmpci_index_to_divider(md_index);
    607  1.27      kent 		DPRINTF(("%s: sample:%u, divider=%d\n",
    608  1.46       chs 			 device_xname(sc->sc_dev), p->sample_rate, md_divide));
    609  1.27      kent 
    610   1.1  augustss 		/* format */
    611  1.27      kent 		md_format = p->channels == 1
    612  1.27      kent 			? CMPCI_REG_FORMAT_MONO : CMPCI_REG_FORMAT_STEREO;
    613  1.27      kent 		md_format |= p->precision == 16
    614  1.27      kent 			? CMPCI_REG_FORMAT_16BIT : CMPCI_REG_FORMAT_8BIT;
    615  1.27      kent 		if (mode & AUMODE_PLAY) {
    616   1.1  augustss 			cmpci_reg_partial_write_4(sc,
    617   1.7  tshiozak 			   CMPCI_REG_CHANNEL_FORMAT,
    618   1.7  tshiozak 			   CMPCI_REG_CH0_FORMAT_SHIFT,
    619   1.7  tshiozak 			   CMPCI_REG_CH0_FORMAT_MASK, md_format);
    620   1.1  augustss 			cmpci_reg_partial_write_4(sc,
    621   1.1  augustss 			    CMPCI_REG_FUNC_1, CMPCI_REG_DAC_FS_SHIFT,
    622   1.1  augustss 			    CMPCI_REG_DAC_FS_MASK, md_divide);
    623   1.7  tshiozak 			sc->sc_play.md_divide = md_divide;
    624   1.1  augustss 		} else {
    625   1.1  augustss 			cmpci_reg_partial_write_4(sc,
    626  1.27      kent 			   CMPCI_REG_CHANNEL_FORMAT,
    627  1.27      kent 			   CMPCI_REG_CH1_FORMAT_SHIFT,
    628  1.27      kent 			   CMPCI_REG_CH1_FORMAT_MASK, md_format);
    629  1.27      kent 			cmpci_reg_partial_write_4(sc,
    630   1.1  augustss 			    CMPCI_REG_FUNC_1, CMPCI_REG_ADC_FS_SHIFT,
    631   1.1  augustss 			    CMPCI_REG_ADC_FS_MASK, md_divide);
    632   1.7  tshiozak 			sc->sc_rec.md_divide = md_divide;
    633   1.1  augustss 		}
    634  1.10     itohy 		cmpci_set_out_ports(sc);
    635  1.10     itohy 		cmpci_set_in_ports(sc);
    636   1.1  augustss 	}
    637   1.1  augustss 	return 0;
    638   1.1  augustss }
    639   1.1  augustss 
    640   1.1  augustss /* ARGSUSED */
    641   1.1  augustss static int
    642  1.34  christos cmpci_round_blocksize(void *handle, int block,
    643  1.34  christos     int mode, const audio_params_t *param)
    644   1.1  augustss {
    645  1.28      kent 
    646  1.28      kent 	return block & -4;
    647   1.1  augustss }
    648   1.1  augustss 
    649   1.1  augustss static int
    650  1.28      kent cmpci_halt_output(void *handle)
    651   1.1  augustss {
    652  1.28      kent 	struct cmpci_softc *sc;
    653   1.1  augustss 
    654  1.28      kent 	sc = handle;
    655   1.1  augustss 	sc->sc_play.intr = NULL;
    656   1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE);
    657   1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE);
    658   1.1  augustss 	/* wait for reset DMA */
    659   1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET);
    660   1.1  augustss 	delay(10);
    661   1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET);
    662  1.10     itohy 
    663   1.1  augustss 	return 0;
    664   1.1  augustss }
    665   1.1  augustss 
    666   1.1  augustss static int
    667  1.28      kent cmpci_halt_input(void *handle)
    668   1.1  augustss {
    669  1.28      kent 	struct cmpci_softc *sc;
    670  1.10     itohy 
    671  1.28      kent 	sc = handle;
    672   1.1  augustss 	sc->sc_rec.intr = NULL;
    673   1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE);
    674   1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE);
    675   1.1  augustss 	/* wait for reset DMA */
    676   1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET);
    677   1.1  augustss 	delay(10);
    678   1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET);
    679  1.10     itohy 
    680   1.1  augustss 	return 0;
    681   1.1  augustss }
    682   1.1  augustss 
    683   1.1  augustss /* get audio device information */
    684   1.1  augustss static int
    685  1.28      kent cmpci_getdev(void *handle, struct audio_device *ad)
    686   1.1  augustss {
    687  1.28      kent 	struct cmpci_softc *sc;
    688   1.1  augustss 
    689  1.28      kent 	sc = handle;
    690   1.1  augustss 	strncpy(ad->name, "CMI PCI Audio", sizeof(ad->name));
    691   1.7  tshiozak 	snprintf(ad->version, sizeof(ad->version), "0x%02x",
    692   1.7  tshiozak 		 PCI_REVISION(sc->sc_class));
    693   1.7  tshiozak 	switch (PCI_PRODUCT(sc->sc_id)) {
    694   1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338A:
    695   1.1  augustss 		strncpy(ad->config, "CMI8338A", sizeof(ad->config));
    696   1.1  augustss 		break;
    697   1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8338B:
    698   1.1  augustss 		strncpy(ad->config, "CMI8338B", sizeof(ad->config));
    699   1.1  augustss 		break;
    700   1.1  augustss 	case PCI_PRODUCT_CMEDIA_CMI8738:
    701   1.1  augustss 		strncpy(ad->config, "CMI8738", sizeof(ad->config));
    702   1.1  augustss 		break;
    703   1.7  tshiozak 	case PCI_PRODUCT_CMEDIA_CMI8738B:
    704   1.7  tshiozak 		strncpy(ad->config, "CMI8738B", sizeof(ad->config));
    705   1.7  tshiozak 		break;
    706   1.1  augustss 	default:
    707   1.1  augustss 		strncpy(ad->config, "unknown", sizeof(ad->config));
    708   1.1  augustss 	}
    709   1.1  augustss 
    710   1.1  augustss 	return 0;
    711   1.1  augustss }
    712   1.1  augustss 
    713   1.1  augustss /* mixer device information */
    714   1.1  augustss int
    715  1.28      kent cmpci_query_devinfo(void *handle, mixer_devinfo_t *dip)
    716   1.1  augustss {
    717  1.10     itohy 	static const char *const mixer_port_names[] = {
    718  1.10     itohy 		AudioNdac, AudioNfmsynth, AudioNcd, AudioNline, AudioNaux,
    719  1.10     itohy 		AudioNmicrophone
    720  1.10     itohy 	};
    721  1.10     itohy 	static const char *const mixer_classes[] = {
    722  1.10     itohy 		AudioCinputs, AudioCoutputs, AudioCrecord, CmpciCplayback,
    723  1.10     itohy 		CmpciCspdif
    724  1.10     itohy 	};
    725  1.28      kent 	struct cmpci_softc *sc;
    726  1.10     itohy 	int i;
    727  1.10     itohy 
    728  1.28      kent 	sc = handle;
    729  1.10     itohy 	dip->prev = dip->next = AUDIO_MIXER_LAST;
    730  1.10     itohy 
    731   1.1  augustss 	switch (dip->index) {
    732  1.10     itohy 	case CMPCI_INPUT_CLASS:
    733  1.10     itohy 	case CMPCI_OUTPUT_CLASS:
    734  1.10     itohy 	case CMPCI_RECORD_CLASS:
    735  1.10     itohy 	case CMPCI_PLAYBACK_CLASS:
    736  1.10     itohy 	case CMPCI_SPDIF_CLASS:
    737  1.10     itohy 		dip->type = AUDIO_MIXER_CLASS;
    738  1.10     itohy 		dip->mixer_class = dip->index;
    739  1.10     itohy 		strcpy(dip->label.name,
    740  1.10     itohy 		    mixer_classes[dip->index - CMPCI_INPUT_CLASS]);
    741   1.1  augustss 		return 0;
    742  1.10     itohy 
    743  1.10     itohy 	case CMPCI_AUX_IN_VOL:
    744  1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_REG_AUX_VALBITS);
    745  1.10     itohy 		goto vol1;
    746  1.10     itohy 	case CMPCI_DAC_VOL:
    747   1.1  augustss 	case CMPCI_FM_VOL:
    748  1.10     itohy 	case CMPCI_CD_VOL:
    749  1.10     itohy 	case CMPCI_LINE_IN_VOL:
    750  1.10     itohy 	case CMPCI_MIC_VOL:
    751  1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS);
    752  1.10     itohy 	vol1:	dip->mixer_class = CMPCI_INPUT_CLASS;
    753  1.10     itohy 		dip->next = dip->index + 6;	/* CMPCI_xxx_MUTE */
    754  1.10     itohy 		strcpy(dip->label.name, mixer_port_names[dip->index]);
    755  1.10     itohy 		dip->un.v.num_channels = (dip->index == CMPCI_MIC_VOL ? 1 : 2);
    756  1.10     itohy 	vol:
    757   1.1  augustss 		dip->type = AUDIO_MIXER_VALUE;
    758   1.1  augustss 		strcpy(dip->un.v.units.name, AudioNvolume);
    759   1.1  augustss 		return 0;
    760  1.10     itohy 
    761  1.10     itohy 	case CMPCI_MIC_MUTE:
    762  1.10     itohy 		dip->next = CMPCI_MIC_PREAMP;
    763  1.10     itohy 		/* FALLTHROUGH */
    764  1.10     itohy 	case CMPCI_DAC_MUTE:
    765  1.10     itohy 	case CMPCI_FM_MUTE:
    766  1.10     itohy 	case CMPCI_CD_MUTE:
    767  1.10     itohy 	case CMPCI_LINE_IN_MUTE:
    768  1.10     itohy 	case CMPCI_AUX_IN_MUTE:
    769  1.10     itohy 		dip->prev = dip->index - 6;	/* CMPCI_xxx_VOL */
    770   1.1  augustss 		dip->mixer_class = CMPCI_INPUT_CLASS;
    771  1.10     itohy 		strcpy(dip->label.name, AudioNmute);
    772  1.10     itohy 		goto on_off;
    773  1.10     itohy 	on_off:
    774  1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    775  1.10     itohy 		dip->un.e.num_mem = 2;
    776  1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
    777  1.10     itohy 		dip->un.e.member[0].ord = 0;
    778  1.10     itohy 		strcpy(dip->un.e.member[1].label.name, AudioNon);
    779  1.10     itohy 		dip->un.e.member[1].ord = 1;
    780   1.1  augustss 		return 0;
    781  1.10     itohy 
    782  1.10     itohy 	case CMPCI_MIC_PREAMP:
    783   1.1  augustss 		dip->mixer_class = CMPCI_INPUT_CLASS;
    784  1.10     itohy 		dip->prev = CMPCI_MIC_MUTE;
    785  1.10     itohy 		strcpy(dip->label.name, AudioNpreamp);
    786  1.10     itohy 		goto on_off;
    787  1.10     itohy 	case CMPCI_PCSPEAKER:
    788   1.1  augustss 		dip->mixer_class = CMPCI_INPUT_CLASS;
    789  1.10     itohy 		strcpy(dip->label.name, AudioNspeaker);
    790   1.1  augustss 		dip->un.v.num_channels = 1;
    791  1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_SPEAKER_VALBITS);
    792  1.10     itohy 		goto vol;
    793   1.1  augustss 	case CMPCI_RECORD_SOURCE:
    794   1.1  augustss 		dip->mixer_class = CMPCI_RECORD_CLASS;
    795   1.1  augustss 		strcpy(dip->label.name, AudioNsource);
    796   1.1  augustss 		dip->type = AUDIO_MIXER_SET;
    797  1.10     itohy 		dip->un.s.num_mem = 7;
    798   1.1  augustss 		strcpy(dip->un.s.member[0].label.name, AudioNmicrophone);
    799   1.8     itohy 		dip->un.s.member[0].mask = CMPCI_RECORD_SOURCE_MIC;
    800   1.1  augustss 		strcpy(dip->un.s.member[1].label.name, AudioNcd);
    801   1.8     itohy 		dip->un.s.member[1].mask = CMPCI_RECORD_SOURCE_CD;
    802   1.1  augustss 		strcpy(dip->un.s.member[2].label.name, AudioNline);
    803   1.8     itohy 		dip->un.s.member[2].mask = CMPCI_RECORD_SOURCE_LINE_IN;
    804  1.10     itohy 		strcpy(dip->un.s.member[3].label.name, AudioNaux);
    805  1.10     itohy 		dip->un.s.member[3].mask = CMPCI_RECORD_SOURCE_AUX_IN;
    806  1.10     itohy 		strcpy(dip->un.s.member[4].label.name, AudioNwave);
    807  1.10     itohy 		dip->un.s.member[4].mask = CMPCI_RECORD_SOURCE_WAVE;
    808  1.10     itohy 		strcpy(dip->un.s.member[5].label.name, AudioNfmsynth);
    809  1.10     itohy 		dip->un.s.member[5].mask = CMPCI_RECORD_SOURCE_FM;
    810  1.10     itohy 		strcpy(dip->un.s.member[6].label.name, CmpciNspdif);
    811  1.10     itohy 		dip->un.s.member[6].mask = CMPCI_RECORD_SOURCE_SPDIF;
    812   1.1  augustss 		return 0;
    813  1.10     itohy 	case CMPCI_MIC_RECVOL:
    814   1.1  augustss 		dip->mixer_class = CMPCI_RECORD_CLASS;
    815  1.10     itohy 		strcpy(dip->label.name, AudioNmicrophone);
    816   1.1  augustss 		dip->un.v.num_channels = 1;
    817  1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_REG_ADMIC_VALBITS);
    818  1.10     itohy 		goto vol;
    819  1.10     itohy 
    820  1.10     itohy 	case CMPCI_PLAYBACK_MODE:
    821  1.10     itohy 		dip->mixer_class = CMPCI_PLAYBACK_CLASS;
    822  1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    823  1.10     itohy 		strcpy(dip->label.name, AudioNmode);
    824  1.10     itohy 		dip->un.e.num_mem = 2;
    825  1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNdac);
    826  1.10     itohy 		dip->un.e.member[0].ord = CMPCI_PLAYBACK_MODE_WAVE;
    827  1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNspdif);
    828  1.10     itohy 		dip->un.e.member[1].ord = CMPCI_PLAYBACK_MODE_SPDIF;
    829   1.1  augustss 		return 0;
    830  1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
    831  1.10     itohy 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    832  1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    833  1.10     itohy 		dip->next = CMPCI_SPDIF_IN_PHASE;
    834   1.1  augustss 		strcpy(dip->label.name, AudioNinput);
    835  1.10     itohy 		i = 0;
    836  1.10     itohy 		strcpy(dip->un.e.member[i].label.name, CmpciNspdin1);
    837  1.10     itohy 		dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN1;
    838  1.10     itohy 		if (CMPCI_ISCAP(sc, 2ND_SPDIN)) {
    839  1.10     itohy 			strcpy(dip->un.e.member[i].label.name, CmpciNspdin2);
    840  1.10     itohy 			dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN2;
    841  1.10     itohy 		}
    842  1.10     itohy 		strcpy(dip->un.e.member[i].label.name, CmpciNspdout);
    843  1.10     itohy 		dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDOUT;
    844  1.10     itohy 		dip->un.e.num_mem = i;
    845  1.10     itohy 		return 0;
    846  1.10     itohy 	case CMPCI_SPDIF_IN_PHASE:
    847  1.10     itohy 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    848  1.10     itohy 		dip->prev = CMPCI_SPDIF_IN_SELECT;
    849  1.10     itohy 		strcpy(dip->label.name, CmpciNphase);
    850  1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    851  1.10     itohy 		dip->un.e.num_mem = 2;
    852  1.10     itohy 		strcpy(dip->un.e.member[0].label.name, CmpciNpositive);
    853  1.10     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_IN_PHASE_POSITIVE;
    854  1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNnegative);
    855  1.10     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_IN_PHASE_NEGATIVE;
    856   1.1  augustss 		return 0;
    857  1.10     itohy 	case CMPCI_SPDIF_LOOP:
    858  1.10     itohy 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    859  1.10     itohy 		dip->next = CMPCI_SPDIF_OUT_PLAYBACK;
    860   1.1  augustss 		strcpy(dip->label.name, AudioNoutput);
    861   1.1  augustss 		dip->type = AUDIO_MIXER_ENUM;
    862  1.10     itohy 		dip->un.e.num_mem = 2;
    863  1.10     itohy 		strcpy(dip->un.e.member[0].label.name, CmpciNplayback);
    864  1.10     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_LOOP_OFF;
    865  1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNspdin);
    866  1.10     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_LOOP_ON;
    867   1.7  tshiozak 		return 0;
    868  1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
    869   1.7  tshiozak 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    870  1.10     itohy 		dip->prev = CMPCI_SPDIF_LOOP;
    871  1.10     itohy 		dip->next = CMPCI_SPDIF_OUT_VOLTAGE;
    872  1.10     itohy 		strcpy(dip->label.name, CmpciNplayback);
    873  1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    874  1.10     itohy 		dip->un.e.num_mem = 2;
    875  1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNwave);
    876  1.10     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_PLAYBACK_WAVE;
    877  1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNlegacy);
    878  1.10     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_PLAYBACK_LEGACY;
    879   1.7  tshiozak 		return 0;
    880   1.7  tshiozak 	case CMPCI_SPDIF_OUT_VOLTAGE:
    881   1.7  tshiozak 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    882  1.10     itohy 		dip->prev = CMPCI_SPDIF_OUT_PLAYBACK;
    883  1.10     itohy 		strcpy(dip->label.name, CmpciNvoltage);
    884   1.7  tshiozak 		dip->type = AUDIO_MIXER_ENUM;
    885   1.7  tshiozak 		dip->un.e.num_mem = 2;
    886  1.21     itohy 		strcpy(dip->un.e.member[0].label.name, CmpciNhigh_v);
    887  1.21     itohy 		dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_VOLTAGE_HIGH;
    888  1.21     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNlow_v);
    889  1.21     itohy 		dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_VOLTAGE_LOW;
    890   1.7  tshiozak 		return 0;
    891  1.10     itohy 	case CMPCI_MONITOR_DAC:
    892   1.7  tshiozak 		dip->mixer_class = CMPCI_SPDIF_CLASS;
    893  1.10     itohy 		strcpy(dip->label.name, AudioNmonitor);
    894  1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    895  1.10     itohy 		dip->un.e.num_mem = 3;
    896  1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
    897  1.10     itohy 		dip->un.e.member[0].ord = CMPCI_MONITOR_DAC_OFF;
    898  1.10     itohy 		strcpy(dip->un.e.member[1].label.name, CmpciNspdin);
    899  1.10     itohy 		dip->un.e.member[1].ord = CMPCI_MONITOR_DAC_SPDIN;
    900  1.10     itohy 		strcpy(dip->un.e.member[2].label.name, CmpciNspdout);
    901  1.10     itohy 		dip->un.e.member[2].ord = CMPCI_MONITOR_DAC_SPDOUT;
    902  1.10     itohy 		return 0;
    903  1.10     itohy 
    904  1.10     itohy 	case CMPCI_MASTER_VOL:
    905  1.10     itohy 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
    906  1.10     itohy 		strcpy(dip->label.name, AudioNmaster);
    907  1.10     itohy 		dip->un.v.num_channels = 2;
    908  1.10     itohy 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS);
    909  1.10     itohy 		goto vol;
    910   1.7  tshiozak 	case CMPCI_REAR:
    911   1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
    912   1.7  tshiozak 		dip->next = CMPCI_INDIVIDUAL;
    913   1.7  tshiozak 		strcpy(dip->label.name, CmpciNrear);
    914   1.7  tshiozak 		goto on_off;
    915   1.7  tshiozak 	case CMPCI_INDIVIDUAL:
    916   1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
    917   1.7  tshiozak 		dip->prev = CMPCI_REAR;
    918   1.7  tshiozak 		dip->next = CMPCI_REVERSE;
    919   1.7  tshiozak 		strcpy(dip->label.name, CmpciNindividual);
    920   1.7  tshiozak 		goto on_off;
    921   1.7  tshiozak 	case CMPCI_REVERSE:
    922   1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
    923   1.7  tshiozak 		dip->prev = CMPCI_INDIVIDUAL;
    924   1.7  tshiozak 		strcpy(dip->label.name, CmpciNreverse);
    925  1.10     itohy 		goto on_off;
    926   1.7  tshiozak 	case CMPCI_SURROUND:
    927   1.7  tshiozak 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
    928   1.7  tshiozak 		strcpy(dip->label.name, CmpciNsurround);
    929   1.7  tshiozak 		goto on_off;
    930  1.10     itohy 	}
    931   1.7  tshiozak 
    932   1.1  augustss 	return ENXIO;
    933   1.1  augustss }
    934   1.1  augustss 
    935   1.1  augustss static int
    936  1.43  jmcneill cmpci_alloc_dmamem(struct cmpci_softc *sc, size_t size, void **r_addr)
    937   1.1  augustss {
    938  1.28      kent 	int error;
    939   1.1  augustss 	struct cmpci_dmanode *n;
    940   1.1  augustss 
    941  1.28      kent 	error = 0;
    942  1.49      maxv 	n = kmem_alloc(sizeof(*n), KM_SLEEP);
    943   1.1  augustss 
    944   1.1  augustss #define CMPCI_DMABUF_ALIGN    0x4
    945   1.1  augustss #define CMPCI_DMABUF_BOUNDARY 0x0
    946   1.1  augustss 	n->cd_tag = sc->sc_dmat;
    947   1.1  augustss 	n->cd_size = size;
    948   1.1  augustss 	error = bus_dmamem_alloc(n->cd_tag, n->cd_size,
    949   1.1  augustss 	    CMPCI_DMABUF_ALIGN, CMPCI_DMABUF_BOUNDARY, n->cd_segs,
    950  1.43  jmcneill 	    sizeof(n->cd_segs)/sizeof(n->cd_segs[0]), &n->cd_nsegs,
    951  1.43  jmcneill 	    BUS_DMA_WAITOK);
    952   1.1  augustss 	if (error)
    953   1.1  augustss 		goto mfree;
    954   1.1  augustss 	error = bus_dmamem_map(n->cd_tag, n->cd_segs, n->cd_nsegs, n->cd_size,
    955  1.43  jmcneill 	    &n->cd_addr, BUS_DMA_WAITOK | BUS_DMA_COHERENT);
    956   1.1  augustss 	if (error)
    957   1.1  augustss 		goto dmafree;
    958   1.1  augustss 	error = bus_dmamap_create(n->cd_tag, n->cd_size, 1, n->cd_size, 0,
    959  1.43  jmcneill 	    BUS_DMA_WAITOK, &n->cd_map);
    960   1.1  augustss 	if (error)
    961   1.1  augustss 		goto unmap;
    962   1.1  augustss 	error = bus_dmamap_load(n->cd_tag, n->cd_map, n->cd_addr, n->cd_size,
    963  1.43  jmcneill 	    NULL, BUS_DMA_WAITOK);
    964   1.1  augustss 	if (error)
    965   1.1  augustss 		goto destroy;
    966  1.10     itohy 
    967   1.1  augustss 	n->cd_next = sc->sc_dmap;
    968   1.1  augustss 	sc->sc_dmap = n;
    969   1.1  augustss 	*r_addr = KVADDR(n);
    970   1.1  augustss 	return 0;
    971  1.10     itohy 
    972   1.1  augustss  destroy:
    973   1.1  augustss 	bus_dmamap_destroy(n->cd_tag, n->cd_map);
    974   1.1  augustss  unmap:
    975   1.1  augustss 	bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size);
    976   1.1  augustss  dmafree:
    977   1.1  augustss 	bus_dmamem_free(n->cd_tag,
    978   1.1  augustss 			n->cd_segs, sizeof(n->cd_segs)/sizeof(n->cd_segs[0]));
    979   1.1  augustss  mfree:
    980  1.43  jmcneill 	kmem_free(n, sizeof(*n));
    981   1.1  augustss 	return error;
    982   1.1  augustss }
    983   1.1  augustss 
    984   1.1  augustss static int
    985  1.43  jmcneill cmpci_free_dmamem(struct cmpci_softc *sc, void *addr, size_t size)
    986   1.1  augustss {
    987   1.1  augustss 	struct cmpci_dmanode **nnp;
    988  1.10     itohy 
    989   1.1  augustss 	for (nnp = &sc->sc_dmap; *nnp; nnp= &(*nnp)->cd_next) {
    990   1.1  augustss 		if ((*nnp)->cd_addr == addr) {
    991   1.1  augustss 			struct cmpci_dmanode *n = *nnp;
    992   1.1  augustss 			bus_dmamap_unload(n->cd_tag, n->cd_map);
    993   1.1  augustss 			bus_dmamap_destroy(n->cd_tag, n->cd_map);
    994   1.1  augustss 			bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size);
    995   1.1  augustss 			bus_dmamem_free(n->cd_tag, n->cd_segs,
    996   1.1  augustss 			    sizeof(n->cd_segs)/sizeof(n->cd_segs[0]));
    997  1.43  jmcneill 			kmem_free(n, sizeof(*n));
    998   1.1  augustss 			return 0;
    999   1.1  augustss 		}
   1000   1.1  augustss 	}
   1001   1.1  augustss 	return -1;
   1002   1.1  augustss }
   1003   1.1  augustss 
   1004   1.1  augustss static struct cmpci_dmanode *
   1005  1.35  christos cmpci_find_dmamem(struct cmpci_softc *sc, void *addr)
   1006   1.1  augustss {
   1007   1.1  augustss 	struct cmpci_dmanode *p;
   1008  1.10     itohy 
   1009  1.28      kent 	for (p = sc->sc_dmap; p; p = p->cd_next)
   1010  1.28      kent 		if (KVADDR(p) == (void *)addr)
   1011   1.1  augustss 			break;
   1012   1.1  augustss 	return p;
   1013   1.1  augustss }
   1014   1.1  augustss 
   1015   1.1  augustss #if 0
   1016   1.1  augustss static void
   1017  1.28      kent cmpci_print_dmamem(struct cmpci_dmanode *);
   1018   1.1  augustss static void
   1019  1.28      kent cmpci_print_dmamem(struct cmpci_dmanode *p)
   1020   1.1  augustss {
   1021  1.28      kent 
   1022   1.1  augustss 	DPRINTF(("DMA at virt:%p, dmaseg:%p, mapseg:%p, size:%p\n",
   1023   1.1  augustss 		 (void *)p->cd_addr, (void *)p->cd_segs[0].ds_addr,
   1024   1.1  augustss 		 (void *)DMAADDR(p), (void *)p->cd_size));
   1025   1.1  augustss }
   1026   1.1  augustss #endif /* DEBUG */
   1027   1.1  augustss 
   1028   1.1  augustss static void *
   1029  1.43  jmcneill cmpci_allocm(void *handle, int direction, size_t size)
   1030   1.1  augustss {
   1031  1.35  christos 	void *addr;
   1032  1.10     itohy 
   1033  1.31       mrg 	addr = NULL;	/* XXX gcc */
   1034  1.31       mrg 
   1035  1.43  jmcneill 	if (cmpci_alloc_dmamem(handle, size, &addr))
   1036   1.1  augustss 		return NULL;
   1037   1.1  augustss 	return addr;
   1038   1.1  augustss }
   1039   1.1  augustss 
   1040   1.1  augustss static void
   1041  1.43  jmcneill cmpci_freem(void *handle, void *addr, size_t size)
   1042   1.1  augustss {
   1043  1.10     itohy 
   1044  1.43  jmcneill 	cmpci_free_dmamem(handle, addr, size);
   1045   1.1  augustss }
   1046   1.1  augustss 
   1047   1.1  augustss #define MAXVAL 256
   1048   1.1  augustss static int
   1049  1.28      kent cmpci_adjust(int val, int mask)
   1050   1.1  augustss {
   1051  1.28      kent 
   1052   1.1  augustss 	val += (MAXVAL - mask) >> 1;
   1053   1.1  augustss 	if (val >= MAXVAL)
   1054   1.1  augustss 		val = MAXVAL-1;
   1055   1.1  augustss 	return val & mask;
   1056   1.1  augustss }
   1057   1.1  augustss 
   1058   1.1  augustss static void
   1059  1.28      kent cmpci_set_mixer_gain(struct cmpci_softc *sc, int port)
   1060   1.1  augustss {
   1061  1.23     itohy 	int src;
   1062  1.10     itohy 	int bits, mask;
   1063   1.1  augustss 
   1064   1.1  augustss 	switch (port) {
   1065   1.1  augustss 	case CMPCI_MIC_VOL:
   1066  1.10     itohy 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_MIC,
   1067  1.10     itohy 		    CMPCI_ADJUST_MIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
   1068  1.23     itohy 		return;
   1069   1.1  augustss 	case CMPCI_MASTER_VOL:
   1070   1.1  augustss 		src = CMPCI_SB16_MIXER_MASTER_L;
   1071   1.1  augustss 		break;
   1072   1.1  augustss 	case CMPCI_LINE_IN_VOL:
   1073   1.1  augustss 		src = CMPCI_SB16_MIXER_LINE_L;
   1074   1.1  augustss 		break;
   1075  1.10     itohy 	case CMPCI_AUX_IN_VOL:
   1076  1.10     itohy 		bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MIXER_AUX,
   1077  1.10     itohy 		    CMPCI_ADJUST_AUX_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT],
   1078  1.10     itohy 					      sc->sc_gain[port][CMPCI_RIGHT]));
   1079  1.10     itohy 		return;
   1080  1.10     itohy 	case CMPCI_MIC_RECVOL:
   1081  1.10     itohy 		cmpci_reg_partial_write_1(sc, CMPCI_REG_MIXER25,
   1082  1.10     itohy 		    CMPCI_REG_ADMIC_SHIFT, CMPCI_REG_ADMIC_MASK,
   1083  1.10     itohy 		    CMPCI_ADJUST_ADMIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
   1084  1.10     itohy 		return;
   1085  1.10     itohy 	case CMPCI_DAC_VOL:
   1086   1.1  augustss 		src = CMPCI_SB16_MIXER_VOICE_L;
   1087   1.1  augustss 		break;
   1088   1.1  augustss 	case CMPCI_FM_VOL:
   1089   1.1  augustss 		src = CMPCI_SB16_MIXER_FM_L;
   1090   1.1  augustss 		break;
   1091   1.1  augustss 	case CMPCI_CD_VOL:
   1092   1.1  augustss 		src = CMPCI_SB16_MIXER_CDDA_L;
   1093   1.1  augustss 		break;
   1094   1.1  augustss 	case CMPCI_PCSPEAKER:
   1095   1.1  augustss 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_SPEAKER,
   1096  1.10     itohy 		    CMPCI_ADJUST_2_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
   1097  1.10     itohy 		return;
   1098  1.10     itohy 	case CMPCI_MIC_PREAMP:
   1099  1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1100  1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
   1101  1.10     itohy 			    CMPCI_REG_MICGAINZ);
   1102  1.10     itohy 		else
   1103  1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
   1104  1.10     itohy 			    CMPCI_REG_MICGAINZ);
   1105   1.7  tshiozak 		return;
   1106  1.10     itohy 
   1107  1.10     itohy 	case CMPCI_DAC_MUTE:
   1108  1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1109  1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1110  1.10     itohy 			    CMPCI_REG_WSMUTE);
   1111  1.10     itohy 		else
   1112  1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1113  1.10     itohy 			    CMPCI_REG_WSMUTE);
   1114  1.10     itohy 		return;
   1115  1.10     itohy 	case CMPCI_FM_MUTE:
   1116  1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1117  1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1118  1.10     itohy 			    CMPCI_REG_FMMUTE);
   1119  1.10     itohy 		else
   1120  1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1121  1.10     itohy 			    CMPCI_REG_FMMUTE);
   1122  1.10     itohy 		return;
   1123  1.10     itohy 	case CMPCI_AUX_IN_MUTE:
   1124  1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1125  1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
   1126  1.10     itohy 			    CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM);
   1127  1.10     itohy 		else
   1128  1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
   1129  1.10     itohy 			    CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM);
   1130  1.10     itohy 		return;
   1131  1.10     itohy 	case CMPCI_CD_MUTE:
   1132  1.10     itohy 		mask = CMPCI_SB16_SW_CD;
   1133  1.10     itohy 		goto sbmute;
   1134  1.10     itohy 	case CMPCI_MIC_MUTE:
   1135  1.10     itohy 		mask = CMPCI_SB16_SW_MIC;
   1136  1.10     itohy 		goto sbmute;
   1137  1.10     itohy 	case CMPCI_LINE_IN_MUTE:
   1138  1.10     itohy 		mask = CMPCI_SB16_SW_LINE;
   1139  1.10     itohy 	sbmute:
   1140  1.10     itohy 		bits = cmpci_mixerreg_read(sc, CMPCI_SB16_MIXER_OUTMIX);
   1141  1.10     itohy 		if (sc->sc_gain[port][CMPCI_LR])
   1142  1.10     itohy 			bits = bits & ~mask;
   1143  1.10     itohy 		else
   1144  1.10     itohy 			bits = bits | mask;
   1145  1.10     itohy 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, bits);
   1146   1.8     itohy 		return;
   1147  1.10     itohy 
   1148  1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
   1149  1.10     itohy 	case CMPCI_MONITOR_DAC:
   1150  1.10     itohy 	case CMPCI_PLAYBACK_MODE:
   1151   1.7  tshiozak 	case CMPCI_SPDIF_LOOP:
   1152  1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
   1153   1.7  tshiozak 		cmpci_set_out_ports(sc);
   1154   1.7  tshiozak 		return;
   1155   1.7  tshiozak 	case CMPCI_SPDIF_OUT_VOLTAGE:
   1156   1.7  tshiozak 		if (CMPCI_ISCAP(sc, SPDOUT_VOLTAGE)) {
   1157  1.10     itohy 			if (sc->sc_gain[CMPCI_SPDIF_OUT_VOLTAGE][CMPCI_LR]
   1158  1.21     itohy 			    == CMPCI_SPDIF_OUT_VOLTAGE_HIGH)
   1159  1.21     itohy 				cmpci_reg_clear_reg_misc(sc, CMPCI_REG_5V);
   1160  1.10     itohy 			else
   1161  1.21     itohy 				cmpci_reg_set_reg_misc(sc, CMPCI_REG_5V);
   1162   1.7  tshiozak 		}
   1163   1.7  tshiozak 		return;
   1164   1.7  tshiozak 	case CMPCI_SURROUND:
   1165   1.7  tshiozak 		if (CMPCI_ISCAP(sc, SURROUND)) {
   1166   1.7  tshiozak 			if (sc->sc_gain[CMPCI_SURROUND][CMPCI_LR])
   1167   1.7  tshiozak 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1168   1.7  tshiozak 						CMPCI_REG_SURROUND);
   1169   1.7  tshiozak 			else
   1170   1.7  tshiozak 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1171   1.7  tshiozak 						  CMPCI_REG_SURROUND);
   1172   1.7  tshiozak 		}
   1173   1.7  tshiozak 		return;
   1174   1.7  tshiozak 	case CMPCI_REAR:
   1175   1.7  tshiozak 		if (CMPCI_ISCAP(sc, REAR)) {
   1176   1.7  tshiozak 			if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
   1177  1.21     itohy 				cmpci_reg_set_reg_misc(sc, CMPCI_REG_N4SPK3D);
   1178   1.7  tshiozak 			else
   1179  1.21     itohy 				cmpci_reg_clear_reg_misc(sc, CMPCI_REG_N4SPK3D);
   1180   1.7  tshiozak 		}
   1181   1.7  tshiozak 		return;
   1182   1.7  tshiozak 	case CMPCI_INDIVIDUAL:
   1183   1.7  tshiozak 		if (CMPCI_ISCAP(sc, INDIVIDUAL_REAR)) {
   1184   1.7  tshiozak 			if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
   1185   1.7  tshiozak 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1186   1.7  tshiozak 						CMPCI_REG_INDIVIDUAL);
   1187   1.7  tshiozak 			else
   1188   1.7  tshiozak 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1189   1.7  tshiozak 						  CMPCI_REG_INDIVIDUAL);
   1190   1.7  tshiozak 		}
   1191   1.7  tshiozak 		return;
   1192   1.7  tshiozak 	case CMPCI_REVERSE:
   1193   1.7  tshiozak 		if (CMPCI_ISCAP(sc, REVERSE_FR)) {
   1194   1.7  tshiozak 			if (sc->sc_gain[CMPCI_REVERSE][CMPCI_LR])
   1195   1.7  tshiozak 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1196   1.7  tshiozak 						CMPCI_REG_REVERSE_FR);
   1197   1.7  tshiozak 			else
   1198   1.7  tshiozak 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1199   1.7  tshiozak 						  CMPCI_REG_REVERSE_FR);
   1200   1.7  tshiozak 		}
   1201   1.7  tshiozak 		return;
   1202   1.7  tshiozak 	case CMPCI_SPDIF_IN_PHASE:
   1203   1.7  tshiozak 		if (CMPCI_ISCAP(sc, SPDIN_PHASE)) {
   1204  1.10     itohy 			if (sc->sc_gain[CMPCI_SPDIF_IN_PHASE][CMPCI_LR]
   1205  1.10     itohy 			    == CMPCI_SPDIF_IN_PHASE_POSITIVE)
   1206  1.10     itohy 				cmpci_reg_clear_1(sc, CMPCI_REG_CHANNEL_FORMAT,
   1207  1.10     itohy 						  CMPCI_REG_SPDIN_PHASE);
   1208  1.10     itohy 			else
   1209   1.8     itohy 				cmpci_reg_set_1(sc, CMPCI_REG_CHANNEL_FORMAT,
   1210   1.8     itohy 						CMPCI_REG_SPDIN_PHASE);
   1211   1.7  tshiozak 		}
   1212   1.1  augustss 		return;
   1213   1.1  augustss 	default:
   1214   1.1  augustss 		return;
   1215   1.1  augustss 	}
   1216  1.10     itohy 
   1217  1.10     itohy 	cmpci_mixerreg_write(sc, src,
   1218  1.10     itohy 	    CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT]));
   1219   1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_L_TO_R(src),
   1220  1.10     itohy 	    CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_RIGHT]));
   1221   1.7  tshiozak }
   1222   1.7  tshiozak 
   1223   1.7  tshiozak static void
   1224  1.28      kent cmpci_set_out_ports(struct cmpci_softc *sc)
   1225   1.7  tshiozak {
   1226  1.28      kent 	uint8_t v;
   1227  1.28      kent 	int enspdout;
   1228  1.10     itohy 
   1229   1.7  tshiozak 	if (!CMPCI_ISCAP(sc, SPDLOOP))
   1230   1.7  tshiozak 		return;
   1231  1.10     itohy 
   1232  1.10     itohy 	/* SPDIF/out select */
   1233  1.10     itohy 	if (sc->sc_gain[CMPCI_SPDIF_LOOP][CMPCI_LR] == CMPCI_SPDIF_LOOP_OFF) {
   1234  1.10     itohy 		/* playback */
   1235  1.10     itohy 		cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP);
   1236  1.10     itohy 	} else {
   1237  1.10     itohy 		/* monitor SPDIF/in */
   1238  1.10     itohy 		cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP);
   1239  1.10     itohy 	}
   1240  1.10     itohy 
   1241  1.10     itohy 	/* SPDIF in select */
   1242  1.10     itohy 	v = sc->sc_gain[CMPCI_SPDIF_IN_SELECT][CMPCI_LR];
   1243  1.10     itohy 	if (v & CMPCI_SPDIFIN_SPDIFIN2)
   1244  1.21     itohy 		cmpci_reg_set_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN);
   1245  1.10     itohy 	else
   1246  1.21     itohy 		cmpci_reg_clear_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN);
   1247  1.10     itohy 	if (v & CMPCI_SPDIFIN_SPDIFOUT)
   1248  1.21     itohy 		cmpci_reg_set_reg_misc(sc, CMPCI_REG_SPDFLOOPI);
   1249  1.10     itohy 	else
   1250  1.21     itohy 		cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPDFLOOPI);
   1251  1.10     itohy 
   1252  1.28      kent 	enspdout = 0;
   1253  1.10     itohy 	/* playback to ... */
   1254  1.10     itohy 	if (CMPCI_ISCAP(sc, SPDOUT) &&
   1255  1.10     itohy 	    sc->sc_gain[CMPCI_PLAYBACK_MODE][CMPCI_LR]
   1256  1.10     itohy 		== CMPCI_PLAYBACK_MODE_SPDIF &&
   1257  1.10     itohy 	    (sc->sc_play.md_divide == CMPCI_REG_RATE_44100 ||
   1258  1.10     itohy 		(CMPCI_ISCAP(sc, SPDOUT_48K) &&
   1259  1.10     itohy 		    sc->sc_play.md_divide==CMPCI_REG_RATE_48000))) {
   1260  1.10     itohy 		/* playback to SPDIF */
   1261  1.10     itohy 		cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE);
   1262  1.10     itohy 		enspdout = 1;
   1263  1.10     itohy 		if (sc->sc_play.md_divide==CMPCI_REG_RATE_48000)
   1264  1.21     itohy 			cmpci_reg_set_reg_misc(sc,
   1265  1.21     itohy 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
   1266  1.10     itohy 		else
   1267  1.21     itohy 			cmpci_reg_clear_reg_misc(sc,
   1268  1.21     itohy 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
   1269  1.10     itohy 	} else {
   1270  1.10     itohy 		/* playback to DAC */
   1271   1.7  tshiozak 		cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
   1272  1.10     itohy 				  CMPCI_REG_SPDIF0_ENABLE);
   1273  1.10     itohy 		if (CMPCI_ISCAP(sc, SPDOUT_48K))
   1274  1.21     itohy 			cmpci_reg_clear_reg_misc(sc,
   1275  1.21     itohy 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
   1276  1.10     itohy 	}
   1277  1.10     itohy 
   1278  1.10     itohy 	/* legacy to SPDIF/out or not */
   1279  1.10     itohy 	if (CMPCI_ISCAP(sc, SPDLEGACY)) {
   1280  1.10     itohy 		if (sc->sc_gain[CMPCI_SPDIF_OUT_PLAYBACK][CMPCI_LR]
   1281  1.10     itohy 		    == CMPCI_SPDIF_OUT_PLAYBACK_WAVE)
   1282  1.10     itohy 			cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL,
   1283  1.10     itohy 					CMPCI_REG_LEGACY_SPDIF_ENABLE);
   1284  1.10     itohy 		else {
   1285  1.10     itohy 			cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL,
   1286  1.10     itohy 					CMPCI_REG_LEGACY_SPDIF_ENABLE);
   1287  1.10     itohy 			enspdout = 1;
   1288  1.10     itohy 		}
   1289  1.10     itohy 	}
   1290  1.10     itohy 
   1291  1.10     itohy 	/* enable/disable SPDIF/out */
   1292  1.10     itohy 	if (CMPCI_ISCAP(sc, XSPDOUT) && enspdout)
   1293  1.10     itohy 		cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL,
   1294  1.10     itohy 				CMPCI_REG_XSPDIF_ENABLE);
   1295  1.10     itohy 	else
   1296   1.7  tshiozak 		cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL,
   1297  1.10     itohy 				CMPCI_REG_XSPDIF_ENABLE);
   1298  1.10     itohy 
   1299  1.25   xtraeme 	/* SPDIF monitor (digital to analog output) */
   1300  1.10     itohy 	if (CMPCI_ISCAP(sc, SPDIN_MONITOR)) {
   1301  1.10     itohy 		v = sc->sc_gain[CMPCI_MONITOR_DAC][CMPCI_LR];
   1302  1.10     itohy 		if (!(v & CMPCI_MONDAC_ENABLE))
   1303  1.10     itohy 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1304  1.10     itohy 					CMPCI_REG_SPDIN_MONITOR);
   1305  1.10     itohy 		if (v & CMPCI_MONDAC_SPDOUT)
   1306   1.7  tshiozak 			cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1,
   1307  1.10     itohy 					CMPCI_REG_SPDIFOUT_DAC);
   1308  1.10     itohy 		else
   1309   1.7  tshiozak 			cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
   1310  1.10     itohy 					CMPCI_REG_SPDIFOUT_DAC);
   1311  1.10     itohy 		if (v & CMPCI_MONDAC_ENABLE)
   1312  1.10     itohy 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1313  1.10     itohy 					CMPCI_REG_SPDIN_MONITOR);
   1314   1.7  tshiozak 	}
   1315   1.1  augustss }
   1316   1.1  augustss 
   1317   1.1  augustss static int
   1318  1.28      kent cmpci_set_in_ports(struct cmpci_softc *sc)
   1319  1.10     itohy {
   1320   1.1  augustss 	int mask;
   1321   1.1  augustss 	int bitsl, bitsr;
   1322   1.1  augustss 
   1323  1.10     itohy 	mask = sc->sc_in_mask;
   1324  1.10     itohy 
   1325  1.10     itohy 	/*
   1326  1.10     itohy 	 * Note CMPCI_RECORD_SOURCE_CD, CMPCI_RECORD_SOURCE_LINE_IN and
   1327  1.10     itohy 	 * CMPCI_RECORD_SOURCE_FM are defined to the corresponding bit
   1328  1.10     itohy 	 * of the mixer register.
   1329  1.10     itohy 	 */
   1330  1.10     itohy 	bitsr = mask & (CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN |
   1331  1.10     itohy 	    CMPCI_RECORD_SOURCE_FM);
   1332  1.10     itohy 
   1333   1.1  augustss 	bitsl = CMPCI_SB16_MIXER_SRC_R_TO_L(bitsr);
   1334   1.8     itohy 	if (mask & CMPCI_RECORD_SOURCE_MIC) {
   1335   1.1  augustss 		bitsl |= CMPCI_SB16_MIXER_MIC_SRC;
   1336   1.1  augustss 		bitsr |= CMPCI_SB16_MIXER_MIC_SRC;
   1337   1.1  augustss 	}
   1338   1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, bitsl);
   1339   1.1  augustss 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, bitsr);
   1340  1.10     itohy 
   1341  1.10     itohy 	if (mask & CMPCI_RECORD_SOURCE_AUX_IN)
   1342  1.10     itohy 		cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
   1343  1.10     itohy 		    CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN);
   1344  1.10     itohy 	else
   1345  1.10     itohy 		cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
   1346  1.10     itohy 		    CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN);
   1347  1.10     itohy 
   1348  1.10     itohy 	if (mask & CMPCI_RECORD_SOURCE_WAVE)
   1349  1.10     itohy 		cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
   1350  1.10     itohy 		    CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR);
   1351  1.10     itohy 	else
   1352  1.10     itohy 		cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
   1353  1.10     itohy 		    CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR);
   1354  1.10     itohy 
   1355   1.7  tshiozak 	if (CMPCI_ISCAP(sc, SPDIN) &&
   1356  1.10     itohy 	    (sc->sc_rec.md_divide == CMPCI_REG_RATE_44100 ||
   1357  1.10     itohy 		(CMPCI_ISCAP(sc, SPDOUT_48K) &&
   1358  1.10     itohy 		    sc->sc_rec.md_divide == CMPCI_REG_RATE_48000/* XXX? */))) {
   1359   1.8     itohy 		if (mask & CMPCI_RECORD_SOURCE_SPDIF) {
   1360   1.7  tshiozak 			/* enable SPDIF/in */
   1361   1.7  tshiozak 			cmpci_reg_set_4(sc,
   1362   1.7  tshiozak 					CMPCI_REG_FUNC_1,
   1363   1.7  tshiozak 					CMPCI_REG_SPDIF1_ENABLE);
   1364   1.7  tshiozak 		} else {
   1365   1.7  tshiozak 			cmpci_reg_clear_4(sc,
   1366   1.7  tshiozak 					CMPCI_REG_FUNC_1,
   1367   1.7  tshiozak 					CMPCI_REG_SPDIF1_ENABLE);
   1368   1.7  tshiozak 		}
   1369   1.7  tshiozak 	}
   1370   1.1  augustss 
   1371   1.1  augustss 	return 0;
   1372   1.1  augustss }
   1373   1.1  augustss 
   1374   1.1  augustss static int
   1375  1.28      kent cmpci_set_port(void *handle, mixer_ctrl_t *cp)
   1376   1.1  augustss {
   1377  1.28      kent 	struct cmpci_softc *sc;
   1378   1.1  augustss 	int lgain, rgain;
   1379  1.10     itohy 
   1380  1.28      kent 	sc = handle;
   1381   1.1  augustss 	switch (cp->dev) {
   1382  1.10     itohy 	case CMPCI_MIC_VOL:
   1383   1.1  augustss 	case CMPCI_PCSPEAKER:
   1384  1.10     itohy 	case CMPCI_MIC_RECVOL:
   1385  1.10     itohy 		if (cp->un.value.num_channels != 1)
   1386  1.10     itohy 			return EINVAL;
   1387  1.10     itohy 		/* FALLTHROUGH */
   1388  1.10     itohy 	case CMPCI_DAC_VOL:
   1389   1.1  augustss 	case CMPCI_FM_VOL:
   1390   1.1  augustss 	case CMPCI_CD_VOL:
   1391  1.10     itohy 	case CMPCI_LINE_IN_VOL:
   1392  1.10     itohy 	case CMPCI_AUX_IN_VOL:
   1393   1.1  augustss 	case CMPCI_MASTER_VOL:
   1394   1.1  augustss 		if (cp->type != AUDIO_MIXER_VALUE)
   1395   1.1  augustss 			return EINVAL;
   1396  1.10     itohy 		switch (cp->un.value.num_channels) {
   1397  1.10     itohy 		case 1:
   1398   1.1  augustss 			lgain = rgain =
   1399  1.10     itohy 			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
   1400   1.1  augustss 			break;
   1401  1.10     itohy 		case 2:
   1402  1.10     itohy 			lgain = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT];
   1403  1.10     itohy 			rgain = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT];
   1404   1.1  augustss 			break;
   1405   1.1  augustss 		default:
   1406  1.10     itohy 			return EINVAL;
   1407   1.1  augustss 		}
   1408   1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_LEFT]  = lgain;
   1409   1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_RIGHT] = rgain;
   1410   1.1  augustss 
   1411   1.1  augustss 		cmpci_set_mixer_gain(sc, cp->dev);
   1412   1.1  augustss 		break;
   1413   1.1  augustss 
   1414   1.1  augustss 	case CMPCI_RECORD_SOURCE:
   1415   1.1  augustss 		if (cp->type != AUDIO_MIXER_SET)
   1416   1.1  augustss 			return EINVAL;
   1417   1.8     itohy 
   1418  1.10     itohy 		if (cp->un.mask & ~(CMPCI_RECORD_SOURCE_MIC |
   1419  1.10     itohy 		    CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN |
   1420  1.10     itohy 		    CMPCI_RECORD_SOURCE_AUX_IN | CMPCI_RECORD_SOURCE_WAVE |
   1421  1.10     itohy 		    CMPCI_RECORD_SOURCE_FM | CMPCI_RECORD_SOURCE_SPDIF))
   1422  1.10     itohy 			return EINVAL;
   1423  1.10     itohy 
   1424   1.8     itohy 		if (cp->un.mask & CMPCI_RECORD_SOURCE_SPDIF)
   1425   1.8     itohy 			cp->un.mask = CMPCI_RECORD_SOURCE_SPDIF;
   1426   1.8     itohy 
   1427  1.10     itohy 		sc->sc_in_mask = cp->un.mask;
   1428  1.10     itohy 		return cmpci_set_in_ports(sc);
   1429   1.1  augustss 
   1430  1.10     itohy 	/* boolean */
   1431  1.10     itohy 	case CMPCI_DAC_MUTE:
   1432  1.10     itohy 	case CMPCI_FM_MUTE:
   1433  1.10     itohy 	case CMPCI_CD_MUTE:
   1434  1.10     itohy 	case CMPCI_LINE_IN_MUTE:
   1435  1.10     itohy 	case CMPCI_AUX_IN_MUTE:
   1436  1.10     itohy 	case CMPCI_MIC_MUTE:
   1437  1.10     itohy 	case CMPCI_MIC_PREAMP:
   1438  1.10     itohy 	case CMPCI_PLAYBACK_MODE:
   1439  1.10     itohy 	case CMPCI_SPDIF_IN_PHASE:
   1440  1.10     itohy 	case CMPCI_SPDIF_LOOP:
   1441  1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
   1442  1.10     itohy 	case CMPCI_SPDIF_OUT_VOLTAGE:
   1443  1.10     itohy 	case CMPCI_REAR:
   1444  1.10     itohy 	case CMPCI_INDIVIDUAL:
   1445  1.10     itohy 	case CMPCI_REVERSE:
   1446  1.10     itohy 	case CMPCI_SURROUND:
   1447   1.1  augustss 		if (cp->type != AUDIO_MIXER_ENUM)
   1448   1.1  augustss 			return EINVAL;
   1449   1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord != 0;
   1450  1.10     itohy 		cmpci_set_mixer_gain(sc, cp->dev);
   1451   1.1  augustss 		break;
   1452   1.1  augustss 
   1453  1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
   1454  1.10     itohy 		switch (cp->un.ord) {
   1455  1.10     itohy 		case CMPCI_SPDIF_IN_SPDIN1:
   1456  1.10     itohy 		case CMPCI_SPDIF_IN_SPDIN2:
   1457  1.10     itohy 		case CMPCI_SPDIF_IN_SPDOUT:
   1458  1.10     itohy 			break;
   1459  1.10     itohy 		default:
   1460   1.1  augustss 			return EINVAL;
   1461   1.1  augustss 		}
   1462  1.10     itohy 		goto xenum;
   1463  1.10     itohy 	case CMPCI_MONITOR_DAC:
   1464  1.10     itohy 		switch (cp->un.ord) {
   1465  1.10     itohy 		case CMPCI_MONITOR_DAC_OFF:
   1466  1.10     itohy 		case CMPCI_MONITOR_DAC_SPDIN:
   1467  1.10     itohy 		case CMPCI_MONITOR_DAC_SPDOUT:
   1468  1.10     itohy 			break;
   1469  1.10     itohy 		default:
   1470  1.10     itohy 			return EINVAL;
   1471   1.1  augustss 		}
   1472  1.10     itohy 	xenum:
   1473  1.10     itohy 		if (cp->type != AUDIO_MIXER_ENUM)
   1474  1.10     itohy 			return EINVAL;
   1475   1.7  tshiozak 		sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord;
   1476  1.10     itohy 		cmpci_set_mixer_gain(sc, cp->dev);
   1477   1.7  tshiozak 		break;
   1478  1.10     itohy 
   1479   1.1  augustss 	default:
   1480   1.1  augustss 	    return EINVAL;
   1481   1.1  augustss 	}
   1482  1.10     itohy 
   1483   1.1  augustss 	return 0;
   1484   1.1  augustss }
   1485   1.1  augustss 
   1486   1.1  augustss static int
   1487  1.28      kent cmpci_get_port(void *handle, mixer_ctrl_t *cp)
   1488   1.1  augustss {
   1489  1.28      kent 	struct cmpci_softc *sc;
   1490  1.10     itohy 
   1491  1.28      kent 	sc = handle;
   1492   1.1  augustss 	switch (cp->dev) {
   1493   1.1  augustss 	case CMPCI_MIC_VOL:
   1494  1.10     itohy 	case CMPCI_PCSPEAKER:
   1495  1.10     itohy 	case CMPCI_MIC_RECVOL:
   1496   1.1  augustss 		if (cp->un.value.num_channels != 1)
   1497   1.1  augustss 			return EINVAL;
   1498  1.12     itohy 		/*FALLTHROUGH*/
   1499  1.10     itohy 	case CMPCI_DAC_VOL:
   1500   1.1  augustss 	case CMPCI_FM_VOL:
   1501   1.1  augustss 	case CMPCI_CD_VOL:
   1502  1.10     itohy 	case CMPCI_LINE_IN_VOL:
   1503  1.10     itohy 	case CMPCI_AUX_IN_VOL:
   1504   1.1  augustss 	case CMPCI_MASTER_VOL:
   1505   1.1  augustss 		switch (cp->un.value.num_channels) {
   1506   1.1  augustss 		case 1:
   1507  1.10     itohy 			cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
   1508   1.7  tshiozak 				sc->sc_gain[cp->dev][CMPCI_LEFT];
   1509   1.1  augustss 			break;
   1510   1.1  augustss 		case 2:
   1511  1.10     itohy 			cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
   1512   1.7  tshiozak 				sc->sc_gain[cp->dev][CMPCI_LEFT];
   1513  1.10     itohy 			cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
   1514   1.7  tshiozak 				sc->sc_gain[cp->dev][CMPCI_RIGHT];
   1515   1.1  augustss 			break;
   1516   1.1  augustss 		default:
   1517   1.1  augustss 			return EINVAL;
   1518   1.1  augustss 		}
   1519   1.1  augustss 		break;
   1520  1.10     itohy 
   1521   1.1  augustss 	case CMPCI_RECORD_SOURCE:
   1522   1.7  tshiozak 		cp->un.mask = sc->sc_in_mask;
   1523   1.1  augustss 		break;
   1524   1.1  augustss 
   1525  1.10     itohy 	case CMPCI_DAC_MUTE:
   1526  1.10     itohy 	case CMPCI_FM_MUTE:
   1527  1.10     itohy 	case CMPCI_CD_MUTE:
   1528   1.1  augustss 	case CMPCI_LINE_IN_MUTE:
   1529  1.10     itohy 	case CMPCI_AUX_IN_MUTE:
   1530  1.10     itohy 	case CMPCI_MIC_MUTE:
   1531  1.10     itohy 	case CMPCI_MIC_PREAMP:
   1532  1.10     itohy 	case CMPCI_PLAYBACK_MODE:
   1533  1.10     itohy 	case CMPCI_SPDIF_IN_SELECT:
   1534  1.10     itohy 	case CMPCI_SPDIF_IN_PHASE:
   1535   1.7  tshiozak 	case CMPCI_SPDIF_LOOP:
   1536  1.10     itohy 	case CMPCI_SPDIF_OUT_PLAYBACK:
   1537   1.7  tshiozak 	case CMPCI_SPDIF_OUT_VOLTAGE:
   1538  1.10     itohy 	case CMPCI_MONITOR_DAC:
   1539   1.7  tshiozak 	case CMPCI_REAR:
   1540   1.7  tshiozak 	case CMPCI_INDIVIDUAL:
   1541   1.7  tshiozak 	case CMPCI_REVERSE:
   1542   1.7  tshiozak 	case CMPCI_SURROUND:
   1543   1.7  tshiozak 		cp->un.ord = sc->sc_gain[cp->dev][CMPCI_LR];
   1544   1.1  augustss 		break;
   1545   1.1  augustss 
   1546   1.1  augustss 	default:
   1547   1.1  augustss 		return EINVAL;
   1548   1.1  augustss 	}
   1549   1.1  augustss 
   1550   1.1  augustss 	return 0;
   1551   1.1  augustss }
   1552   1.1  augustss 
   1553   1.1  augustss /* ARGSUSED */
   1554   1.1  augustss static size_t
   1555  1.34  christos cmpci_round_buffersize(void *handle, int direction,
   1556  1.33  christos     size_t bufsize)
   1557   1.1  augustss {
   1558  1.28      kent 
   1559   1.1  augustss 	if (bufsize > 0x10000)
   1560   1.1  augustss 		bufsize = 0x10000;
   1561  1.10     itohy 
   1562   1.1  augustss 	return bufsize;
   1563   1.1  augustss }
   1564   1.1  augustss 
   1565   1.1  augustss /* ARGSUSED */
   1566   1.1  augustss static int
   1567  1.34  christos cmpci_get_props(void *handle)
   1568   1.1  augustss {
   1569  1.28      kent 
   1570   1.1  augustss 	return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX;
   1571   1.1  augustss }
   1572   1.1  augustss 
   1573   1.1  augustss static int
   1574  1.28      kent cmpci_trigger_output(void *handle, void *start, void *end, int blksize,
   1575  1.28      kent 		     void (*intr)(void *), void *arg,
   1576  1.28      kent 		     const audio_params_t *param)
   1577   1.1  augustss {
   1578  1.28      kent 	struct cmpci_softc *sc;
   1579   1.1  augustss 	struct cmpci_dmanode *p;
   1580   1.1  augustss 	int bps;
   1581   1.1  augustss 
   1582  1.28      kent 	sc = handle;
   1583   1.1  augustss 	sc->sc_play.intr = intr;
   1584   1.1  augustss 	sc->sc_play.intr_arg = arg;
   1585  1.27      kent 	bps = param->channels * param->precision / 8;
   1586   1.1  augustss 	if (!bps)
   1587   1.1  augustss 		return EINVAL;
   1588   1.1  augustss 
   1589   1.1  augustss 	/* set DMA frame */
   1590   1.1  augustss 	if (!(p = cmpci_find_dmamem(sc, start)))
   1591   1.1  augustss 		return EINVAL;
   1592   1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BASE,
   1593   1.1  augustss 	    DMAADDR(p));
   1594   1.1  augustss 	delay(10);
   1595   1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BYTES,
   1596  1.35  christos 	    ((char *)end - (char *)start + 1) / bps - 1);
   1597   1.1  augustss 	delay(10);
   1598   1.1  augustss 
   1599   1.1  augustss 	/* set interrupt count */
   1600   1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_SAMPLES,
   1601   1.1  augustss 			  (blksize + bps - 1) / bps - 1);
   1602   1.1  augustss 	delay(10);
   1603   1.1  augustss 
   1604   1.1  augustss 	/* start DMA */
   1605   1.1  augustss 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); /* PLAY */
   1606   1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE);
   1607   1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE);
   1608  1.10     itohy 
   1609   1.1  augustss 	return 0;
   1610   1.1  augustss }
   1611   1.1  augustss 
   1612   1.1  augustss static int
   1613  1.28      kent cmpci_trigger_input(void *handle, void *start, void *end, int blksize,
   1614  1.28      kent 		    void (*intr)(void *), void *arg,
   1615  1.28      kent 		    const audio_params_t *param)
   1616   1.1  augustss {
   1617  1.28      kent 	struct cmpci_softc *sc;
   1618   1.1  augustss 	struct cmpci_dmanode *p;
   1619   1.1  augustss 	int bps;
   1620   1.1  augustss 
   1621  1.28      kent 	sc = handle;
   1622   1.1  augustss 	sc->sc_rec.intr = intr;
   1623   1.1  augustss 	sc->sc_rec.intr_arg = arg;
   1624  1.27      kent 	bps = param->channels * param->precision / 8;
   1625   1.1  augustss 	if (!bps)
   1626   1.1  augustss 		return EINVAL;
   1627   1.1  augustss 
   1628   1.1  augustss 	/* set DMA frame */
   1629   1.1  augustss 	if (!(p=cmpci_find_dmamem(sc, start)))
   1630   1.1  augustss 		return EINVAL;
   1631   1.1  augustss 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BASE,
   1632   1.1  augustss 	    DMAADDR(p));
   1633   1.1  augustss 	delay(10);
   1634   1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BYTES,
   1635  1.35  christos 	    ((char *)end - (char *)start + 1) / bps - 1);
   1636   1.1  augustss 	delay(10);
   1637   1.1  augustss 
   1638   1.1  augustss 	/* set interrupt count */
   1639   1.1  augustss 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_SAMPLES,
   1640   1.7  tshiozak 	    (blksize + bps - 1) / bps - 1);
   1641   1.1  augustss 	delay(10);
   1642   1.1  augustss 
   1643   1.1  augustss 	/* start DMA */
   1644   1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_DIR); /* REC */
   1645   1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE);
   1646   1.1  augustss 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE);
   1647  1.10     itohy 
   1648   1.1  augustss 	return 0;
   1649   1.1  augustss }
   1650   1.1  augustss 
   1651  1.43  jmcneill static void
   1652  1.43  jmcneill cmpci_get_locks(void *addr, kmutex_t **intr, kmutex_t **thread)
   1653  1.43  jmcneill {
   1654  1.43  jmcneill 	struct cmpci_softc *sc;
   1655  1.43  jmcneill 
   1656  1.43  jmcneill 	sc = addr;
   1657  1.43  jmcneill 	*intr = &sc->sc_intr_lock;
   1658  1.43  jmcneill 	*thread = &sc->sc_lock;
   1659  1.43  jmcneill }
   1660  1.43  jmcneill 
   1661   1.1  augustss /* end of file */
   1662