cmpci.c revision 1.19
1 /* $NetBSD: cmpci.c,v 1.19 2003/10/25 18:31:11 christos Exp $ */ 2 3 /* 4 * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Takuya SHIOZAKI <tshiozak (at) netbsd.org> . 9 * 10 * This code is derived from software contributed to The NetBSD Foundation 11 * by ITOH Yasufumi. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 /* 37 * C-Media CMI8x38 Audio Chip Support. 38 * 39 * TODO: 40 * - 4ch / 6ch support. 41 * - Joystick support. 42 * 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: cmpci.c,v 1.19 2003/10/25 18:31:11 christos Exp $"); 47 48 #if defined(AUDIO_DEBUG) || defined(DEBUG) 49 #define DPRINTF(x) if (cmpcidebug) printf x 50 int cmpcidebug = 0; 51 #else 52 #define DPRINTF(x) 53 #endif 54 55 #include "mpu.h" 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/kernel.h> 60 #include <sys/malloc.h> 61 #include <sys/device.h> 62 #include <sys/proc.h> 63 64 #include <dev/pci/pcidevs.h> 65 #include <dev/pci/pcivar.h> 66 67 #include <sys/audioio.h> 68 #include <dev/audio_if.h> 69 #include <dev/midi_if.h> 70 71 #include <dev/mulaw.h> 72 #include <dev/auconv.h> 73 #include <dev/pci/cmpcireg.h> 74 #include <dev/pci/cmpcivar.h> 75 76 #include <dev/ic/mpuvar.h> 77 #include <machine/bus.h> 78 #include <machine/intr.h> 79 80 /* 81 * Low-level HW interface 82 */ 83 static __inline uint8_t cmpci_mixerreg_read __P((struct cmpci_softc *, 84 uint8_t)); 85 static __inline void cmpci_mixerreg_write __P((struct cmpci_softc *, 86 uint8_t, uint8_t)); 87 static __inline void cmpci_reg_partial_write_1 __P((struct cmpci_softc *, 88 int, int, 89 unsigned, unsigned)); 90 static __inline void cmpci_reg_partial_write_4 __P((struct cmpci_softc *, 91 int, int, 92 uint32_t, uint32_t)); 93 static __inline void cmpci_reg_set_1 __P((struct cmpci_softc *, 94 int, uint8_t)); 95 static __inline void cmpci_reg_clear_1 __P((struct cmpci_softc *, 96 int, uint8_t)); 97 static __inline void cmpci_reg_set_4 __P((struct cmpci_softc *, 98 int, uint32_t)); 99 static __inline void cmpci_reg_clear_4 __P((struct cmpci_softc *, 100 int, uint32_t)); 101 static int cmpci_rate_to_index __P((int)); 102 static __inline int cmpci_index_to_rate __P((int)); 103 static __inline int cmpci_index_to_divider __P((int)); 104 105 static int cmpci_adjust __P((int, int)); 106 static void cmpci_set_mixer_gain __P((struct cmpci_softc *, int)); 107 static void cmpci_set_out_ports __P((struct cmpci_softc *)); 108 static int cmpci_set_in_ports __P((struct cmpci_softc *)); 109 110 111 /* 112 * autoconf interface 113 */ 114 static int cmpci_match __P((struct device *, struct cfdata *, void *)); 115 static void cmpci_attach __P((struct device *, struct device *, void *)); 116 117 CFATTACH_DECL(cmpci, sizeof (struct cmpci_softc), 118 cmpci_match, cmpci_attach, NULL, NULL); 119 120 /* interrupt */ 121 static int cmpci_intr __P((void *)); 122 123 124 /* 125 * DMA stuffs 126 */ 127 static int cmpci_alloc_dmamem __P((struct cmpci_softc *, 128 size_t, struct malloc_type *, 129 int, caddr_t *)); 130 static int cmpci_free_dmamem __P((struct cmpci_softc *, caddr_t, 131 struct malloc_type *)); 132 static struct cmpci_dmanode * cmpci_find_dmamem __P((struct cmpci_softc *, 133 caddr_t)); 134 135 136 /* 137 * interface to machine independent layer 138 */ 139 static int cmpci_open __P((void *, int)); 140 static void cmpci_close __P((void *)); 141 static int cmpci_query_encoding __P((void *, struct audio_encoding *)); 142 static int cmpci_set_params __P((void *, int, int, 143 struct audio_params *, 144 struct audio_params *)); 145 static int cmpci_round_blocksize __P((void *, int)); 146 static int cmpci_halt_output __P((void *)); 147 static int cmpci_halt_input __P((void *)); 148 static int cmpci_getdev __P((void *, struct audio_device *)); 149 static int cmpci_set_port __P((void *, mixer_ctrl_t *)); 150 static int cmpci_get_port __P((void *, mixer_ctrl_t *)); 151 static int cmpci_query_devinfo __P((void *, mixer_devinfo_t *)); 152 static void *cmpci_allocm __P((void *, int, size_t, struct malloc_type *, int)); 153 static void cmpci_freem __P((void *, void *, struct malloc_type *)); 154 static size_t cmpci_round_buffersize __P((void *, int, size_t)); 155 static paddr_t cmpci_mappage __P((void *, void *, off_t, int)); 156 static int cmpci_get_props __P((void *)); 157 static int cmpci_trigger_output __P((void *, void *, void *, int, 158 void (*)(void *), void *, 159 struct audio_params *)); 160 static int cmpci_trigger_input __P((void *, void *, void *, int, 161 void (*)(void *), void *, 162 struct audio_params *)); 163 164 static struct audio_hw_if cmpci_hw_if = { 165 cmpci_open, /* open */ 166 cmpci_close, /* close */ 167 NULL, /* drain */ 168 cmpci_query_encoding, /* query_encoding */ 169 cmpci_set_params, /* set_params */ 170 cmpci_round_blocksize, /* round_blocksize */ 171 NULL, /* commit_settings */ 172 NULL, /* init_output */ 173 NULL, /* init_input */ 174 NULL, /* start_output */ 175 NULL, /* start_input */ 176 cmpci_halt_output, /* halt_output */ 177 cmpci_halt_input, /* halt_input */ 178 NULL, /* speaker_ctl */ 179 cmpci_getdev, /* getdev */ 180 NULL, /* setfd */ 181 cmpci_set_port, /* set_port */ 182 cmpci_get_port, /* get_port */ 183 cmpci_query_devinfo, /* query_devinfo */ 184 cmpci_allocm, /* allocm */ 185 cmpci_freem, /* freem */ 186 cmpci_round_buffersize,/* round_buffersize */ 187 cmpci_mappage, /* mappage */ 188 cmpci_get_props, /* get_props */ 189 cmpci_trigger_output, /* trigger_output */ 190 cmpci_trigger_input, /* trigger_input */ 191 NULL, /* dev_ioctl */ 192 }; 193 194 195 /* 196 * Low-level HW interface 197 */ 198 199 /* mixer register read/write */ 200 static __inline uint8_t 201 cmpci_mixerreg_read(sc, no) 202 struct cmpci_softc *sc; 203 uint8_t no; 204 { 205 uint8_t ret; 206 207 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no); 208 delay(10); 209 ret = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA); 210 delay(10); 211 return ret; 212 } 213 214 static __inline void 215 cmpci_mixerreg_write(sc, no, val) 216 struct cmpci_softc *sc; 217 uint8_t no, val; 218 { 219 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no); 220 delay(10); 221 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA, val); 222 delay(10); 223 } 224 225 226 /* register partial write */ 227 static __inline void 228 cmpci_reg_partial_write_1(sc, no, shift, mask, val) 229 struct cmpci_softc *sc; 230 int no, shift; 231 unsigned mask, val; 232 { 233 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 234 (val<<shift) | 235 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift))); 236 delay(10); 237 } 238 239 static __inline void 240 cmpci_reg_partial_write_4(sc, no, shift, mask, val) 241 struct cmpci_softc *sc; 242 int no, shift; 243 uint32_t mask, val; 244 { 245 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 246 (val<<shift) | 247 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift))); 248 delay(10); 249 } 250 251 /* register set/clear bit */ 252 static __inline void 253 cmpci_reg_set_1(sc, no, mask) 254 struct cmpci_softc *sc; 255 int no; 256 uint8_t mask; 257 { 258 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 259 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) | mask)); 260 delay(10); 261 } 262 263 static __inline void 264 cmpci_reg_clear_1(sc, no, mask) 265 struct cmpci_softc *sc; 266 int no; 267 uint8_t mask; 268 { 269 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 270 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~mask)); 271 delay(10); 272 } 273 274 275 static __inline void 276 cmpci_reg_set_4(sc, no, mask) 277 struct cmpci_softc *sc; 278 int no; 279 uint32_t mask; 280 { 281 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 282 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) | mask)); 283 delay(10); 284 } 285 286 static __inline void 287 cmpci_reg_clear_4(sc, no, mask) 288 struct cmpci_softc *sc; 289 int no; 290 uint32_t mask; 291 { 292 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 293 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~mask)); 294 delay(10); 295 } 296 297 298 /* rate */ 299 static const struct { 300 int rate; 301 int divider; 302 } cmpci_rate_table[CMPCI_REG_NUMRATE] = { 303 #define _RATE(n) { n, CMPCI_REG_RATE_ ## n } 304 _RATE(5512), 305 _RATE(8000), 306 _RATE(11025), 307 _RATE(16000), 308 _RATE(22050), 309 _RATE(32000), 310 _RATE(44100), 311 _RATE(48000) 312 #undef _RATE 313 }; 314 315 static int 316 cmpci_rate_to_index(rate) 317 int rate; 318 { 319 int i; 320 321 for (i = 0; i < CMPCI_REG_NUMRATE - 1; i++) 322 if (rate <= 323 (cmpci_rate_table[i].rate+cmpci_rate_table[i+1].rate) / 2) 324 return i; 325 return i; /* 48000 */ 326 } 327 328 static __inline int 329 cmpci_index_to_rate(index) 330 int index; 331 { 332 return cmpci_rate_table[index].rate; 333 } 334 335 static __inline int 336 cmpci_index_to_divider(index) 337 int index; 338 { 339 return cmpci_rate_table[index].divider; 340 } 341 342 343 /* 344 * interface to configure the device. 345 */ 346 347 static int 348 cmpci_match(parent, match, aux) 349 struct device *parent; 350 struct cfdata *match; 351 void *aux; 352 { 353 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 354 355 if ( PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CMEDIA && 356 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338A || 357 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338B || 358 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738 || 359 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738B) ) 360 return 1; 361 362 return 0; 363 } 364 365 static void 366 cmpci_attach(parent, self, aux) 367 struct device *parent, *self; 368 void *aux; 369 { 370 struct cmpci_softc *sc = (struct cmpci_softc *)self; 371 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 372 struct audio_attach_args aa; 373 pci_intr_handle_t ih; 374 char const *strintr; 375 char devinfo[256]; 376 int i, v; 377 378 aprint_naive(": Audio controller\n"); 379 380 sc->sc_id = pa->pa_id; 381 sc->sc_class = pa->pa_class; 382 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo); 383 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, 384 PCI_REVISION(sc->sc_class)); 385 switch (PCI_PRODUCT(sc->sc_id)) { 386 case PCI_PRODUCT_CMEDIA_CMI8338A: 387 /*FALLTHROUGH*/ 388 case PCI_PRODUCT_CMEDIA_CMI8338B: 389 sc->sc_capable = CMPCI_CAP_CMI8338; 390 break; 391 case PCI_PRODUCT_CMEDIA_CMI8738: 392 /*FALLTHROUGH*/ 393 case PCI_PRODUCT_CMEDIA_CMI8738B: 394 sc->sc_capable = CMPCI_CAP_CMI8738; 395 break; 396 } 397 398 /* map I/O space */ 399 if (pci_mapreg_map(pa, CMPCI_PCI_IOBASEREG, PCI_MAPREG_TYPE_IO, 0, 400 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 401 aprint_error("%s: failed to map I/O space\n", 402 sc->sc_dev.dv_xname); 403 return; 404 } 405 406 /* interrupt */ 407 if (pci_intr_map(pa, &ih)) { 408 aprint_error("%s: failed to map interrupt\n", 409 sc->sc_dev.dv_xname); 410 return; 411 } 412 strintr = pci_intr_string(pa->pa_pc, ih); 413 sc->sc_ih=pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, cmpci_intr, sc); 414 if (sc->sc_ih == NULL) { 415 aprint_error("%s: failed to establish interrupt", 416 sc->sc_dev.dv_xname); 417 if (strintr != NULL) 418 aprint_normal(" at %s", strintr); 419 aprint_normal("\n"); 420 return; 421 } 422 aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, strintr); 423 424 sc->sc_dmat = pa->pa_dmat; 425 426 audio_attach_mi(&cmpci_hw_if, sc, &sc->sc_dev); 427 428 /* attach OPL device */ 429 aa.type = AUDIODEV_TYPE_OPL; 430 aa.hwif = NULL; 431 aa.hdl = NULL; 432 (void)config_found(&sc->sc_dev, &aa, audioprint); 433 434 /* attach MPU-401 device */ 435 aa.type = AUDIODEV_TYPE_MPU; 436 aa.hwif = NULL; 437 aa.hdl = NULL; 438 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh, 439 CMPCI_REG_MPU_BASE, CMPCI_REG_MPU_SIZE, &sc->sc_mpu_ioh) == 0) 440 sc->sc_mpudev = config_found(&sc->sc_dev, &aa, audioprint); 441 442 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_RESET, 0); 443 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0); 444 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0); 445 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, 446 CMPCI_SB16_SW_CD|CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE); 447 for (i = 0; i < CMPCI_NDEVS; i++) { 448 switch(i) { 449 /* 450 * CMI8738 defaults are 451 * master: 0xe0 (0x00 - 0xf8) 452 * FM, DAC: 0xc0 (0x00 - 0xf8) 453 * PC speaker: 0x80 (0x00 - 0xc0) 454 * others: 0 455 */ 456 /* volume */ 457 case CMPCI_MASTER_VOL: 458 v = 128; /* 224 */ 459 break; 460 case CMPCI_FM_VOL: 461 case CMPCI_DAC_VOL: 462 v = 192; 463 break; 464 case CMPCI_PCSPEAKER: 465 v = 128; 466 break; 467 468 /* booleans, set to true */ 469 case CMPCI_CD_MUTE: 470 case CMPCI_MIC_MUTE: 471 case CMPCI_LINE_IN_MUTE: 472 case CMPCI_AUX_IN_MUTE: 473 v = 1; 474 break; 475 476 /* volume with inital value 0 */ 477 case CMPCI_CD_VOL: 478 case CMPCI_LINE_IN_VOL: 479 case CMPCI_AUX_IN_VOL: 480 case CMPCI_MIC_VOL: 481 case CMPCI_MIC_RECVOL: 482 /* FALLTHROUGH */ 483 484 /* others are cleared */ 485 case CMPCI_MIC_PREAMP: 486 case CMPCI_RECORD_SOURCE: 487 case CMPCI_PLAYBACK_MODE: 488 case CMPCI_SPDIF_IN_SELECT: 489 case CMPCI_SPDIF_IN_PHASE: 490 case CMPCI_SPDIF_LOOP: 491 case CMPCI_SPDIF_OUT_PLAYBACK: 492 case CMPCI_SPDIF_OUT_VOLTAGE: 493 case CMPCI_MONITOR_DAC: 494 case CMPCI_REAR: 495 case CMPCI_INDIVIDUAL: 496 case CMPCI_REVERSE: 497 case CMPCI_SURROUND: 498 default: 499 v = 0; 500 break; 501 } 502 sc->sc_gain[i][CMPCI_LEFT] = sc->sc_gain[i][CMPCI_RIGHT] = v; 503 cmpci_set_mixer_gain(sc, i); 504 } 505 } 506 507 508 static int 509 cmpci_intr(handle) 510 void *handle; 511 { 512 struct cmpci_softc *sc = handle; 513 uint32_t intrstat; 514 515 intrstat = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 516 CMPCI_REG_INTR_STATUS); 517 518 if (!(intrstat & CMPCI_REG_ANY_INTR)) 519 return 0; 520 521 delay(10); 522 523 /* disable and reset intr */ 524 if (intrstat & CMPCI_REG_CH0_INTR) 525 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, 526 CMPCI_REG_CH0_INTR_ENABLE); 527 if (intrstat & CMPCI_REG_CH1_INTR) 528 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, 529 CMPCI_REG_CH1_INTR_ENABLE); 530 531 if (intrstat & CMPCI_REG_CH0_INTR) { 532 if (sc->sc_play.intr != NULL) 533 (*sc->sc_play.intr)(sc->sc_play.intr_arg); 534 } 535 if (intrstat & CMPCI_REG_CH1_INTR) { 536 if (sc->sc_rec.intr != NULL) 537 (*sc->sc_rec.intr)(sc->sc_rec.intr_arg); 538 } 539 540 /* enable intr */ 541 if (intrstat & CMPCI_REG_CH0_INTR) 542 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, 543 CMPCI_REG_CH0_INTR_ENABLE); 544 if (intrstat & CMPCI_REG_CH1_INTR) 545 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, 546 CMPCI_REG_CH1_INTR_ENABLE); 547 548 #if NMPU > 0 549 if (intrstat & CMPCI_REG_UART_INTR && sc->sc_mpudev != NULL) 550 mpu_intr(sc->sc_mpudev); 551 #endif 552 553 return 1; 554 } 555 556 557 /* open/close */ 558 static int 559 cmpci_open(handle, flags) 560 void *handle; 561 int flags; 562 { 563 return 0; 564 } 565 566 static void 567 cmpci_close(handle) 568 void *handle; 569 { 570 } 571 572 static int 573 cmpci_query_encoding(handle, fp) 574 void *handle; 575 struct audio_encoding *fp; 576 { 577 switch (fp->index) { 578 case 0: 579 strcpy(fp->name, AudioEulinear); 580 fp->encoding = AUDIO_ENCODING_ULINEAR; 581 fp->precision = 8; 582 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 583 break; 584 case 1: 585 strcpy(fp->name, AudioEmulaw); 586 fp->encoding = AUDIO_ENCODING_ULAW; 587 fp->precision = 8; 588 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 589 break; 590 case 2: 591 strcpy(fp->name, AudioEalaw); 592 fp->encoding = AUDIO_ENCODING_ALAW; 593 fp->precision = 8; 594 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 595 break; 596 case 3: 597 strcpy(fp->name, AudioEslinear); 598 fp->encoding = AUDIO_ENCODING_SLINEAR; 599 fp->precision = 8; 600 fp->flags = 0; 601 break; 602 case 4: 603 strcpy(fp->name, AudioEslinear_le); 604 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 605 fp->precision = 16; 606 fp->flags = 0; 607 break; 608 case 5: 609 strcpy(fp->name, AudioEulinear_le); 610 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 611 fp->precision = 16; 612 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 613 break; 614 case 6: 615 strcpy(fp->name, AudioEslinear_be); 616 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 617 fp->precision = 16; 618 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 619 break; 620 case 7: 621 strcpy(fp->name, AudioEulinear_be); 622 fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 623 fp->precision = 16; 624 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 625 break; 626 default: 627 return EINVAL; 628 } 629 return 0; 630 } 631 632 633 static int 634 cmpci_set_params(handle, setmode, usemode, play, rec) 635 void *handle; 636 int setmode, usemode; 637 struct audio_params *play, *rec; 638 { 639 int i; 640 struct cmpci_softc *sc = handle; 641 642 for (i = 0; i < 2; i++) { 643 int md_format; 644 int md_divide; 645 int md_index; 646 int mode; 647 struct audio_params *p; 648 649 switch (i) { 650 case 0: 651 mode = AUMODE_PLAY; 652 p = play; 653 break; 654 case 1: 655 mode = AUMODE_RECORD; 656 p = rec; 657 break; 658 default: 659 return EINVAL; 660 } 661 662 if (!(setmode & mode)) 663 continue; 664 665 666 /* format */ 667 p->sw_code = NULL; 668 switch ( p->channels ) { 669 case 1: 670 md_format = CMPCI_REG_FORMAT_MONO; 671 break; 672 case 2: 673 md_format = CMPCI_REG_FORMAT_STEREO; 674 break; 675 default: 676 return (EINVAL); 677 } 678 switch (p->encoding) { 679 case AUDIO_ENCODING_ULAW: 680 if (p->precision != 8) 681 return (EINVAL); 682 if (mode & AUMODE_PLAY) { 683 p->factor = 2; 684 p->sw_code = mulaw_to_slinear16_le; 685 md_format |= CMPCI_REG_FORMAT_16BIT; 686 } else { 687 p->sw_code = ulinear8_to_mulaw; 688 md_format |= CMPCI_REG_FORMAT_8BIT; 689 } 690 break; 691 case AUDIO_ENCODING_ALAW: 692 if (p->precision != 8) 693 return (EINVAL); 694 if (mode & AUMODE_PLAY) { 695 p->factor = 2; 696 p->sw_code = alaw_to_slinear16_le; 697 md_format |= CMPCI_REG_FORMAT_16BIT; 698 } else { 699 p->sw_code = ulinear8_to_alaw; 700 md_format |= CMPCI_REG_FORMAT_8BIT; 701 } 702 break; 703 case AUDIO_ENCODING_SLINEAR_LE: 704 switch (p->precision) { 705 case 8: 706 p->sw_code = change_sign8; 707 md_format |= CMPCI_REG_FORMAT_8BIT; 708 break; 709 case 16: 710 md_format |= CMPCI_REG_FORMAT_16BIT; 711 break; 712 default: 713 return (EINVAL); 714 } 715 break; 716 case AUDIO_ENCODING_SLINEAR_BE: 717 switch (p->precision) { 718 case 8: 719 md_format |= CMPCI_REG_FORMAT_8BIT; 720 p->sw_code = change_sign8; 721 break; 722 case 16: 723 md_format |= CMPCI_REG_FORMAT_16BIT; 724 p->sw_code = swap_bytes; 725 break; 726 default: 727 return (EINVAL); 728 } 729 break; 730 case AUDIO_ENCODING_ULINEAR_LE: 731 switch (p->precision) { 732 case 8: 733 md_format |= CMPCI_REG_FORMAT_8BIT; 734 break; 735 case 16: 736 md_format |= CMPCI_REG_FORMAT_16BIT; 737 p->sw_code = change_sign16_le; 738 break; 739 default: 740 return (EINVAL); 741 } 742 break; 743 case AUDIO_ENCODING_ULINEAR_BE: 744 switch (p->precision) { 745 case 8: 746 md_format |= CMPCI_REG_FORMAT_8BIT; 747 break; 748 case 16: 749 md_format |= CMPCI_REG_FORMAT_16BIT; 750 if (mode & AUMODE_PLAY) 751 p->sw_code = 752 swap_bytes_change_sign16_le; 753 else 754 p->sw_code = 755 change_sign16_swap_bytes_le; 756 break; 757 default: 758 return (EINVAL); 759 } 760 break; 761 default: 762 return (EINVAL); 763 } 764 if (mode & AUMODE_PLAY) 765 cmpci_reg_partial_write_4(sc, 766 CMPCI_REG_CHANNEL_FORMAT, 767 CMPCI_REG_CH0_FORMAT_SHIFT, 768 CMPCI_REG_CH0_FORMAT_MASK, md_format); 769 else 770 cmpci_reg_partial_write_4(sc, 771 CMPCI_REG_CHANNEL_FORMAT, 772 CMPCI_REG_CH1_FORMAT_SHIFT, 773 CMPCI_REG_CH1_FORMAT_MASK, md_format); 774 /* sample rate */ 775 md_index = cmpci_rate_to_index(p->sample_rate); 776 md_divide = cmpci_index_to_divider(md_index); 777 p->sample_rate = cmpci_index_to_rate(md_index); 778 DPRINTF(("%s: sample:%d, divider=%d\n", 779 sc->sc_dev.dv_xname, (int)p->sample_rate, md_divide)); 780 if (mode & AUMODE_PLAY) { 781 cmpci_reg_partial_write_4(sc, 782 CMPCI_REG_FUNC_1, CMPCI_REG_DAC_FS_SHIFT, 783 CMPCI_REG_DAC_FS_MASK, md_divide); 784 sc->sc_play.md_divide = md_divide; 785 } else { 786 cmpci_reg_partial_write_4(sc, 787 CMPCI_REG_FUNC_1, CMPCI_REG_ADC_FS_SHIFT, 788 CMPCI_REG_ADC_FS_MASK, md_divide); 789 sc->sc_rec.md_divide = md_divide; 790 } 791 cmpci_set_out_ports(sc); 792 cmpci_set_in_ports(sc); 793 } 794 return 0; 795 } 796 797 /* ARGSUSED */ 798 static int 799 cmpci_round_blocksize(handle, block) 800 void *handle; 801 int block; 802 { 803 return (block & -4); 804 } 805 806 static int 807 cmpci_halt_output(handle) 808 void *handle; 809 { 810 struct cmpci_softc *sc = handle; 811 int s; 812 813 s = splaudio(); 814 sc->sc_play.intr = NULL; 815 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 816 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); 817 /* wait for reset DMA */ 818 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); 819 delay(10); 820 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); 821 splx(s); 822 823 return 0; 824 } 825 826 static int 827 cmpci_halt_input(handle) 828 void *handle; 829 { 830 struct cmpci_softc *sc = handle; 831 int s; 832 833 s = splaudio(); 834 sc->sc_rec.intr = NULL; 835 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 836 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); 837 /* wait for reset DMA */ 838 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); 839 delay(10); 840 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); 841 splx(s); 842 843 return 0; 844 } 845 846 847 /* get audio device information */ 848 static int 849 cmpci_getdev(handle, ad) 850 void *handle; 851 struct audio_device *ad; 852 { 853 struct cmpci_softc *sc = handle; 854 855 strncpy(ad->name, "CMI PCI Audio", sizeof(ad->name)); 856 snprintf(ad->version, sizeof(ad->version), "0x%02x", 857 PCI_REVISION(sc->sc_class)); 858 switch (PCI_PRODUCT(sc->sc_id)) { 859 case PCI_PRODUCT_CMEDIA_CMI8338A: 860 strncpy(ad->config, "CMI8338A", sizeof(ad->config)); 861 break; 862 case PCI_PRODUCT_CMEDIA_CMI8338B: 863 strncpy(ad->config, "CMI8338B", sizeof(ad->config)); 864 break; 865 case PCI_PRODUCT_CMEDIA_CMI8738: 866 strncpy(ad->config, "CMI8738", sizeof(ad->config)); 867 break; 868 case PCI_PRODUCT_CMEDIA_CMI8738B: 869 strncpy(ad->config, "CMI8738B", sizeof(ad->config)); 870 break; 871 default: 872 strncpy(ad->config, "unknown", sizeof(ad->config)); 873 } 874 875 return 0; 876 } 877 878 879 /* mixer device information */ 880 int 881 cmpci_query_devinfo(handle, dip) 882 void *handle; 883 mixer_devinfo_t *dip; 884 { 885 static const char *const mixer_port_names[] = { 886 AudioNdac, AudioNfmsynth, AudioNcd, AudioNline, AudioNaux, 887 AudioNmicrophone 888 }; 889 static const char *const mixer_classes[] = { 890 AudioCinputs, AudioCoutputs, AudioCrecord, CmpciCplayback, 891 CmpciCspdif 892 }; 893 struct cmpci_softc *sc = handle; 894 int i; 895 896 dip->prev = dip->next = AUDIO_MIXER_LAST; 897 898 switch (dip->index) { 899 case CMPCI_INPUT_CLASS: 900 case CMPCI_OUTPUT_CLASS: 901 case CMPCI_RECORD_CLASS: 902 case CMPCI_PLAYBACK_CLASS: 903 case CMPCI_SPDIF_CLASS: 904 dip->type = AUDIO_MIXER_CLASS; 905 dip->mixer_class = dip->index; 906 strcpy(dip->label.name, 907 mixer_classes[dip->index - CMPCI_INPUT_CLASS]); 908 return 0; 909 910 case CMPCI_AUX_IN_VOL: 911 dip->un.v.delta = 1 << (8 - CMPCI_REG_AUX_VALBITS); 912 goto vol1; 913 case CMPCI_DAC_VOL: 914 case CMPCI_FM_VOL: 915 case CMPCI_CD_VOL: 916 case CMPCI_LINE_IN_VOL: 917 case CMPCI_MIC_VOL: 918 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS); 919 vol1: dip->mixer_class = CMPCI_INPUT_CLASS; 920 dip->next = dip->index + 6; /* CMPCI_xxx_MUTE */ 921 strcpy(dip->label.name, mixer_port_names[dip->index]); 922 dip->un.v.num_channels = (dip->index == CMPCI_MIC_VOL ? 1 : 2); 923 vol: 924 dip->type = AUDIO_MIXER_VALUE; 925 strcpy(dip->un.v.units.name, AudioNvolume); 926 return 0; 927 928 case CMPCI_MIC_MUTE: 929 dip->next = CMPCI_MIC_PREAMP; 930 /* FALLTHROUGH */ 931 case CMPCI_DAC_MUTE: 932 case CMPCI_FM_MUTE: 933 case CMPCI_CD_MUTE: 934 case CMPCI_LINE_IN_MUTE: 935 case CMPCI_AUX_IN_MUTE: 936 dip->prev = dip->index - 6; /* CMPCI_xxx_VOL */ 937 dip->mixer_class = CMPCI_INPUT_CLASS; 938 strcpy(dip->label.name, AudioNmute); 939 goto on_off; 940 on_off: 941 dip->type = AUDIO_MIXER_ENUM; 942 dip->un.e.num_mem = 2; 943 strcpy(dip->un.e.member[0].label.name, AudioNoff); 944 dip->un.e.member[0].ord = 0; 945 strcpy(dip->un.e.member[1].label.name, AudioNon); 946 dip->un.e.member[1].ord = 1; 947 return 0; 948 949 case CMPCI_MIC_PREAMP: 950 dip->mixer_class = CMPCI_INPUT_CLASS; 951 dip->prev = CMPCI_MIC_MUTE; 952 strcpy(dip->label.name, AudioNpreamp); 953 goto on_off; 954 case CMPCI_PCSPEAKER: 955 dip->mixer_class = CMPCI_INPUT_CLASS; 956 strcpy(dip->label.name, AudioNspeaker); 957 dip->un.v.num_channels = 1; 958 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_SPEAKER_VALBITS); 959 goto vol; 960 case CMPCI_RECORD_SOURCE: 961 dip->mixer_class = CMPCI_RECORD_CLASS; 962 strcpy(dip->label.name, AudioNsource); 963 dip->type = AUDIO_MIXER_SET; 964 dip->un.s.num_mem = 7; 965 strcpy(dip->un.s.member[0].label.name, AudioNmicrophone); 966 dip->un.s.member[0].mask = CMPCI_RECORD_SOURCE_MIC; 967 strcpy(dip->un.s.member[1].label.name, AudioNcd); 968 dip->un.s.member[1].mask = CMPCI_RECORD_SOURCE_CD; 969 strcpy(dip->un.s.member[2].label.name, AudioNline); 970 dip->un.s.member[2].mask = CMPCI_RECORD_SOURCE_LINE_IN; 971 strcpy(dip->un.s.member[3].label.name, AudioNaux); 972 dip->un.s.member[3].mask = CMPCI_RECORD_SOURCE_AUX_IN; 973 strcpy(dip->un.s.member[4].label.name, AudioNwave); 974 dip->un.s.member[4].mask = CMPCI_RECORD_SOURCE_WAVE; 975 strcpy(dip->un.s.member[5].label.name, AudioNfmsynth); 976 dip->un.s.member[5].mask = CMPCI_RECORD_SOURCE_FM; 977 strcpy(dip->un.s.member[6].label.name, CmpciNspdif); 978 dip->un.s.member[6].mask = CMPCI_RECORD_SOURCE_SPDIF; 979 return 0; 980 case CMPCI_MIC_RECVOL: 981 dip->mixer_class = CMPCI_RECORD_CLASS; 982 strcpy(dip->label.name, AudioNmicrophone); 983 dip->un.v.num_channels = 1; 984 dip->un.v.delta = 1 << (8 - CMPCI_REG_ADMIC_VALBITS); 985 goto vol; 986 987 case CMPCI_PLAYBACK_MODE: 988 dip->mixer_class = CMPCI_PLAYBACK_CLASS; 989 dip->type = AUDIO_MIXER_ENUM; 990 strcpy(dip->label.name, AudioNmode); 991 dip->un.e.num_mem = 2; 992 strcpy(dip->un.e.member[0].label.name, AudioNdac); 993 dip->un.e.member[0].ord = CMPCI_PLAYBACK_MODE_WAVE; 994 strcpy(dip->un.e.member[1].label.name, CmpciNspdif); 995 dip->un.e.member[1].ord = CMPCI_PLAYBACK_MODE_SPDIF; 996 return 0; 997 case CMPCI_SPDIF_IN_SELECT: 998 dip->mixer_class = CMPCI_SPDIF_CLASS; 999 dip->type = AUDIO_MIXER_ENUM; 1000 dip->next = CMPCI_SPDIF_IN_PHASE; 1001 strcpy(dip->label.name, AudioNinput); 1002 i = 0; 1003 strcpy(dip->un.e.member[i].label.name, CmpciNspdin1); 1004 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN1; 1005 if (CMPCI_ISCAP(sc, 2ND_SPDIN)) { 1006 strcpy(dip->un.e.member[i].label.name, CmpciNspdin2); 1007 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN2; 1008 } 1009 strcpy(dip->un.e.member[i].label.name, CmpciNspdout); 1010 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDOUT; 1011 dip->un.e.num_mem = i; 1012 return 0; 1013 case CMPCI_SPDIF_IN_PHASE: 1014 dip->mixer_class = CMPCI_SPDIF_CLASS; 1015 dip->prev = CMPCI_SPDIF_IN_SELECT; 1016 strcpy(dip->label.name, CmpciNphase); 1017 dip->type = AUDIO_MIXER_ENUM; 1018 dip->un.e.num_mem = 2; 1019 strcpy(dip->un.e.member[0].label.name, CmpciNpositive); 1020 dip->un.e.member[0].ord = CMPCI_SPDIF_IN_PHASE_POSITIVE; 1021 strcpy(dip->un.e.member[1].label.name, CmpciNnegative); 1022 dip->un.e.member[1].ord = CMPCI_SPDIF_IN_PHASE_NEGATIVE; 1023 return 0; 1024 case CMPCI_SPDIF_LOOP: 1025 dip->mixer_class = CMPCI_SPDIF_CLASS; 1026 dip->next = CMPCI_SPDIF_OUT_PLAYBACK; 1027 strcpy(dip->label.name, AudioNoutput); 1028 dip->type = AUDIO_MIXER_ENUM; 1029 dip->un.e.num_mem = 2; 1030 strcpy(dip->un.e.member[0].label.name, CmpciNplayback); 1031 dip->un.e.member[0].ord = CMPCI_SPDIF_LOOP_OFF; 1032 strcpy(dip->un.e.member[1].label.name, CmpciNspdin); 1033 dip->un.e.member[1].ord = CMPCI_SPDIF_LOOP_ON; 1034 return 0; 1035 case CMPCI_SPDIF_OUT_PLAYBACK: 1036 dip->mixer_class = CMPCI_SPDIF_CLASS; 1037 dip->prev = CMPCI_SPDIF_LOOP; 1038 dip->next = CMPCI_SPDIF_OUT_VOLTAGE; 1039 strcpy(dip->label.name, CmpciNplayback); 1040 dip->type = AUDIO_MIXER_ENUM; 1041 dip->un.e.num_mem = 2; 1042 strcpy(dip->un.e.member[0].label.name, AudioNwave); 1043 dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_PLAYBACK_WAVE; 1044 strcpy(dip->un.e.member[1].label.name, CmpciNlegacy); 1045 dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_PLAYBACK_LEGACY; 1046 return 0; 1047 case CMPCI_SPDIF_OUT_VOLTAGE: 1048 dip->mixer_class = CMPCI_SPDIF_CLASS; 1049 dip->prev = CMPCI_SPDIF_OUT_PLAYBACK; 1050 strcpy(dip->label.name, CmpciNvoltage); 1051 dip->type = AUDIO_MIXER_ENUM; 1052 dip->un.e.num_mem = 2; 1053 strcpy(dip->un.e.member[0].label.name, CmpciNlow_v); 1054 dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_VOLTAGE_LOW; 1055 strcpy(dip->un.e.member[1].label.name, CmpciNhigh_v); 1056 dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_VOLTAGE_HIGH; 1057 return 0; 1058 case CMPCI_MONITOR_DAC: 1059 dip->mixer_class = CMPCI_SPDIF_CLASS; 1060 strcpy(dip->label.name, AudioNmonitor); 1061 dip->type = AUDIO_MIXER_ENUM; 1062 dip->un.e.num_mem = 3; 1063 strcpy(dip->un.e.member[0].label.name, AudioNoff); 1064 dip->un.e.member[0].ord = CMPCI_MONITOR_DAC_OFF; 1065 strcpy(dip->un.e.member[1].label.name, CmpciNspdin); 1066 dip->un.e.member[1].ord = CMPCI_MONITOR_DAC_SPDIN; 1067 strcpy(dip->un.e.member[2].label.name, CmpciNspdout); 1068 dip->un.e.member[2].ord = CMPCI_MONITOR_DAC_SPDOUT; 1069 return 0; 1070 1071 case CMPCI_MASTER_VOL: 1072 dip->mixer_class = CMPCI_OUTPUT_CLASS; 1073 strcpy(dip->label.name, AudioNmaster); 1074 dip->un.v.num_channels = 2; 1075 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS); 1076 goto vol; 1077 case CMPCI_REAR: 1078 dip->mixer_class = CMPCI_OUTPUT_CLASS; 1079 dip->next = CMPCI_INDIVIDUAL; 1080 strcpy(dip->label.name, CmpciNrear); 1081 goto on_off; 1082 case CMPCI_INDIVIDUAL: 1083 dip->mixer_class = CMPCI_OUTPUT_CLASS; 1084 dip->prev = CMPCI_REAR; 1085 dip->next = CMPCI_REVERSE; 1086 strcpy(dip->label.name, CmpciNindividual); 1087 goto on_off; 1088 case CMPCI_REVERSE: 1089 dip->mixer_class = CMPCI_OUTPUT_CLASS; 1090 dip->prev = CMPCI_INDIVIDUAL; 1091 strcpy(dip->label.name, CmpciNreverse); 1092 goto on_off; 1093 case CMPCI_SURROUND: 1094 dip->mixer_class = CMPCI_OUTPUT_CLASS; 1095 strcpy(dip->label.name, CmpciNsurround); 1096 goto on_off; 1097 } 1098 1099 return ENXIO; 1100 } 1101 1102 static int 1103 cmpci_alloc_dmamem(sc, size, type, flags, r_addr) 1104 struct cmpci_softc *sc; 1105 size_t size; 1106 struct malloc_type *type; 1107 int flags; 1108 caddr_t *r_addr; 1109 { 1110 int error = 0; 1111 struct cmpci_dmanode *n; 1112 int w; 1113 1114 n = malloc(sizeof(struct cmpci_dmanode), type, flags); 1115 if (n == NULL) { 1116 error = ENOMEM; 1117 goto quit; 1118 } 1119 1120 w = (flags & M_NOWAIT) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK; 1121 #define CMPCI_DMABUF_ALIGN 0x4 1122 #define CMPCI_DMABUF_BOUNDARY 0x0 1123 n->cd_tag = sc->sc_dmat; 1124 n->cd_size = size; 1125 error = bus_dmamem_alloc(n->cd_tag, n->cd_size, 1126 CMPCI_DMABUF_ALIGN, CMPCI_DMABUF_BOUNDARY, n->cd_segs, 1127 sizeof(n->cd_segs)/sizeof(n->cd_segs[0]), &n->cd_nsegs, w); 1128 if (error) 1129 goto mfree; 1130 error = bus_dmamem_map(n->cd_tag, n->cd_segs, n->cd_nsegs, n->cd_size, 1131 &n->cd_addr, w | BUS_DMA_COHERENT); 1132 if (error) 1133 goto dmafree; 1134 error = bus_dmamap_create(n->cd_tag, n->cd_size, 1, n->cd_size, 0, 1135 w, &n->cd_map); 1136 if (error) 1137 goto unmap; 1138 error = bus_dmamap_load(n->cd_tag, n->cd_map, n->cd_addr, n->cd_size, 1139 NULL, w); 1140 if (error) 1141 goto destroy; 1142 1143 n->cd_next = sc->sc_dmap; 1144 sc->sc_dmap = n; 1145 *r_addr = KVADDR(n); 1146 return 0; 1147 1148 destroy: 1149 bus_dmamap_destroy(n->cd_tag, n->cd_map); 1150 unmap: 1151 bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size); 1152 dmafree: 1153 bus_dmamem_free(n->cd_tag, 1154 n->cd_segs, sizeof(n->cd_segs)/sizeof(n->cd_segs[0])); 1155 mfree: 1156 free(n, type); 1157 quit: 1158 return error; 1159 } 1160 1161 static int 1162 cmpci_free_dmamem(sc, addr, type) 1163 struct cmpci_softc *sc; 1164 caddr_t addr; 1165 struct malloc_type *type; 1166 { 1167 struct cmpci_dmanode **nnp; 1168 1169 for (nnp = &sc->sc_dmap; *nnp; nnp= &(*nnp)->cd_next) { 1170 if ((*nnp)->cd_addr == addr) { 1171 struct cmpci_dmanode *n = *nnp; 1172 bus_dmamap_unload(n->cd_tag, n->cd_map); 1173 bus_dmamap_destroy(n->cd_tag, n->cd_map); 1174 bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size); 1175 bus_dmamem_free(n->cd_tag, n->cd_segs, 1176 sizeof(n->cd_segs)/sizeof(n->cd_segs[0])); 1177 free(n, type); 1178 return 0; 1179 } 1180 } 1181 return -1; 1182 } 1183 1184 static struct cmpci_dmanode * 1185 cmpci_find_dmamem(sc, addr) 1186 struct cmpci_softc *sc; 1187 caddr_t addr; 1188 { 1189 struct cmpci_dmanode *p; 1190 1191 for (p=sc->sc_dmap; p; p=p->cd_next) 1192 if ( KVADDR(p) == (void *)addr ) 1193 break; 1194 return p; 1195 } 1196 1197 1198 #if 0 1199 static void 1200 cmpci_print_dmamem __P((struct cmpci_dmanode *p)); 1201 static void 1202 cmpci_print_dmamem(p) 1203 struct cmpci_dmanode *p; 1204 { 1205 DPRINTF(("DMA at virt:%p, dmaseg:%p, mapseg:%p, size:%p\n", 1206 (void *)p->cd_addr, (void *)p->cd_segs[0].ds_addr, 1207 (void *)DMAADDR(p), (void *)p->cd_size)); 1208 } 1209 #endif /* DEBUG */ 1210 1211 1212 static void * 1213 cmpci_allocm(handle, direction, size, type, flags) 1214 void *handle; 1215 int direction; 1216 size_t size; 1217 struct malloc_type *type; 1218 int flags; 1219 { 1220 struct cmpci_softc *sc = handle; 1221 caddr_t addr; 1222 1223 if (cmpci_alloc_dmamem(sc, size, type, flags, &addr)) 1224 return NULL; 1225 return addr; 1226 } 1227 1228 static void 1229 cmpci_freem(handle, addr, type) 1230 void *handle; 1231 void *addr; 1232 struct malloc_type *type; 1233 { 1234 struct cmpci_softc *sc = handle; 1235 1236 cmpci_free_dmamem(sc, addr, type); 1237 } 1238 1239 1240 #define MAXVAL 256 1241 static int 1242 cmpci_adjust(val, mask) 1243 int val, mask; 1244 { 1245 val += (MAXVAL - mask) >> 1; 1246 if (val >= MAXVAL) 1247 val = MAXVAL-1; 1248 return val & mask; 1249 } 1250 1251 static void 1252 cmpci_set_mixer_gain(sc, port) 1253 struct cmpci_softc *sc; 1254 int port; 1255 { 1256 int src; 1257 int bits, mask; 1258 1259 switch (port) { 1260 case CMPCI_MIC_VOL: 1261 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_MIC, 1262 CMPCI_ADJUST_MIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1263 break; 1264 case CMPCI_MASTER_VOL: 1265 src = CMPCI_SB16_MIXER_MASTER_L; 1266 break; 1267 case CMPCI_LINE_IN_VOL: 1268 src = CMPCI_SB16_MIXER_LINE_L; 1269 break; 1270 case CMPCI_AUX_IN_VOL: 1271 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MIXER_AUX, 1272 CMPCI_ADJUST_AUX_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT], 1273 sc->sc_gain[port][CMPCI_RIGHT])); 1274 return; 1275 case CMPCI_MIC_RECVOL: 1276 cmpci_reg_partial_write_1(sc, CMPCI_REG_MIXER25, 1277 CMPCI_REG_ADMIC_SHIFT, CMPCI_REG_ADMIC_MASK, 1278 CMPCI_ADJUST_ADMIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1279 return; 1280 case CMPCI_DAC_VOL: 1281 src = CMPCI_SB16_MIXER_VOICE_L; 1282 break; 1283 case CMPCI_FM_VOL: 1284 src = CMPCI_SB16_MIXER_FM_L; 1285 break; 1286 case CMPCI_CD_VOL: 1287 src = CMPCI_SB16_MIXER_CDDA_L; 1288 break; 1289 case CMPCI_PCSPEAKER: 1290 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_SPEAKER, 1291 CMPCI_ADJUST_2_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1292 return; 1293 case CMPCI_MIC_PREAMP: 1294 if (sc->sc_gain[port][CMPCI_LR]) 1295 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1296 CMPCI_REG_MICGAINZ); 1297 else 1298 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1299 CMPCI_REG_MICGAINZ); 1300 return; 1301 1302 case CMPCI_DAC_MUTE: 1303 if (sc->sc_gain[port][CMPCI_LR]) 1304 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1305 CMPCI_REG_WSMUTE); 1306 else 1307 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1308 CMPCI_REG_WSMUTE); 1309 return; 1310 case CMPCI_FM_MUTE: 1311 if (sc->sc_gain[port][CMPCI_LR]) 1312 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1313 CMPCI_REG_FMMUTE); 1314 else 1315 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1316 CMPCI_REG_FMMUTE); 1317 return; 1318 case CMPCI_AUX_IN_MUTE: 1319 if (sc->sc_gain[port][CMPCI_LR]) 1320 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1321 CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM); 1322 else 1323 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1324 CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM); 1325 return; 1326 case CMPCI_CD_MUTE: 1327 mask = CMPCI_SB16_SW_CD; 1328 goto sbmute; 1329 case CMPCI_MIC_MUTE: 1330 mask = CMPCI_SB16_SW_MIC; 1331 goto sbmute; 1332 case CMPCI_LINE_IN_MUTE: 1333 mask = CMPCI_SB16_SW_LINE; 1334 sbmute: 1335 bits = cmpci_mixerreg_read(sc, CMPCI_SB16_MIXER_OUTMIX); 1336 if (sc->sc_gain[port][CMPCI_LR]) 1337 bits = bits & ~mask; 1338 else 1339 bits = bits | mask; 1340 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, bits); 1341 return; 1342 1343 case CMPCI_SPDIF_IN_SELECT: 1344 case CMPCI_MONITOR_DAC: 1345 case CMPCI_PLAYBACK_MODE: 1346 case CMPCI_SPDIF_LOOP: 1347 case CMPCI_SPDIF_OUT_PLAYBACK: 1348 cmpci_set_out_ports(sc); 1349 return; 1350 case CMPCI_SPDIF_OUT_VOLTAGE: 1351 if (CMPCI_ISCAP(sc, SPDOUT_VOLTAGE)) { 1352 if (sc->sc_gain[CMPCI_SPDIF_OUT_VOLTAGE][CMPCI_LR] 1353 == CMPCI_SPDIF_OUT_VOLTAGE_LOW) 1354 cmpci_reg_clear_4(sc, CMPCI_REG_MISC, 1355 CMPCI_REG_5V); 1356 else 1357 cmpci_reg_set_4(sc, CMPCI_REG_MISC, 1358 CMPCI_REG_5V); 1359 } 1360 return; 1361 case CMPCI_SURROUND: 1362 if (CMPCI_ISCAP(sc, SURROUND)) { 1363 if (sc->sc_gain[CMPCI_SURROUND][CMPCI_LR]) 1364 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1365 CMPCI_REG_SURROUND); 1366 else 1367 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1368 CMPCI_REG_SURROUND); 1369 } 1370 return; 1371 case CMPCI_REAR: 1372 if (CMPCI_ISCAP(sc, REAR)) { 1373 if (sc->sc_gain[CMPCI_REAR][CMPCI_LR]) 1374 cmpci_reg_set_4(sc, CMPCI_REG_MISC, 1375 CMPCI_REG_N4SPK3D); 1376 else 1377 cmpci_reg_clear_4(sc, CMPCI_REG_MISC, 1378 CMPCI_REG_N4SPK3D); 1379 } 1380 return; 1381 case CMPCI_INDIVIDUAL: 1382 if (CMPCI_ISCAP(sc, INDIVIDUAL_REAR)) { 1383 if (sc->sc_gain[CMPCI_REAR][CMPCI_LR]) 1384 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1385 CMPCI_REG_INDIVIDUAL); 1386 else 1387 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1388 CMPCI_REG_INDIVIDUAL); 1389 } 1390 return; 1391 case CMPCI_REVERSE: 1392 if (CMPCI_ISCAP(sc, REVERSE_FR)) { 1393 if (sc->sc_gain[CMPCI_REVERSE][CMPCI_LR]) 1394 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1395 CMPCI_REG_REVERSE_FR); 1396 else 1397 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1398 CMPCI_REG_REVERSE_FR); 1399 } 1400 return; 1401 case CMPCI_SPDIF_IN_PHASE: 1402 if (CMPCI_ISCAP(sc, SPDIN_PHASE)) { 1403 if (sc->sc_gain[CMPCI_SPDIF_IN_PHASE][CMPCI_LR] 1404 == CMPCI_SPDIF_IN_PHASE_POSITIVE) 1405 cmpci_reg_clear_1(sc, CMPCI_REG_CHANNEL_FORMAT, 1406 CMPCI_REG_SPDIN_PHASE); 1407 else 1408 cmpci_reg_set_1(sc, CMPCI_REG_CHANNEL_FORMAT, 1409 CMPCI_REG_SPDIN_PHASE); 1410 } 1411 return; 1412 default: 1413 return; 1414 } 1415 1416 cmpci_mixerreg_write(sc, src, 1417 CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT])); 1418 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_L_TO_R(src), 1419 CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_RIGHT])); 1420 } 1421 1422 static void 1423 cmpci_set_out_ports(sc) 1424 struct cmpci_softc *sc; 1425 { 1426 u_int8_t v; 1427 int enspdout = 0; 1428 1429 if (!CMPCI_ISCAP(sc, SPDLOOP)) 1430 return; 1431 1432 /* SPDIF/out select */ 1433 if (sc->sc_gain[CMPCI_SPDIF_LOOP][CMPCI_LR] == CMPCI_SPDIF_LOOP_OFF) { 1434 /* playback */ 1435 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP); 1436 } else { 1437 /* monitor SPDIF/in */ 1438 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP); 1439 } 1440 1441 /* SPDIF in select */ 1442 v = sc->sc_gain[CMPCI_SPDIF_IN_SELECT][CMPCI_LR]; 1443 if (v & CMPCI_SPDIFIN_SPDIFIN2) 1444 cmpci_reg_set_4(sc, CMPCI_REG_MISC, CMPCI_REG_2ND_SPDIFIN); 1445 else 1446 cmpci_reg_clear_4(sc, CMPCI_REG_MISC, CMPCI_REG_2ND_SPDIFIN); 1447 if (v & CMPCI_SPDIFIN_SPDIFOUT) 1448 cmpci_reg_set_4(sc, CMPCI_REG_MISC, CMPCI_REG_SPDFLOOPI); 1449 else 1450 cmpci_reg_clear_4(sc, CMPCI_REG_MISC, CMPCI_REG_SPDFLOOPI); 1451 1452 /* playback to ... */ 1453 if (CMPCI_ISCAP(sc, SPDOUT) && 1454 sc->sc_gain[CMPCI_PLAYBACK_MODE][CMPCI_LR] 1455 == CMPCI_PLAYBACK_MODE_SPDIF && 1456 (sc->sc_play.md_divide == CMPCI_REG_RATE_44100 || 1457 (CMPCI_ISCAP(sc, SPDOUT_48K) && 1458 sc->sc_play.md_divide==CMPCI_REG_RATE_48000))) { 1459 /* playback to SPDIF */ 1460 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE); 1461 enspdout = 1; 1462 if (sc->sc_play.md_divide==CMPCI_REG_RATE_48000) 1463 cmpci_reg_set_4(sc, CMPCI_REG_MISC, 1464 CMPCI_REG_SPDIF_48K); 1465 else 1466 cmpci_reg_clear_4(sc, CMPCI_REG_MISC, 1467 CMPCI_REG_SPDIF_48K); 1468 } else { 1469 /* playback to DAC */ 1470 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, 1471 CMPCI_REG_SPDIF0_ENABLE); 1472 if (CMPCI_ISCAP(sc, SPDOUT_48K)) 1473 cmpci_reg_clear_4(sc, CMPCI_REG_MISC, 1474 CMPCI_REG_SPDIF_48K); 1475 } 1476 1477 /* legacy to SPDIF/out or not */ 1478 if (CMPCI_ISCAP(sc, SPDLEGACY)) { 1479 if (sc->sc_gain[CMPCI_SPDIF_OUT_PLAYBACK][CMPCI_LR] 1480 == CMPCI_SPDIF_OUT_PLAYBACK_WAVE) 1481 cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL, 1482 CMPCI_REG_LEGACY_SPDIF_ENABLE); 1483 else { 1484 cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL, 1485 CMPCI_REG_LEGACY_SPDIF_ENABLE); 1486 enspdout = 1; 1487 } 1488 } 1489 1490 /* enable/disable SPDIF/out */ 1491 if (CMPCI_ISCAP(sc, XSPDOUT) && enspdout) 1492 cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL, 1493 CMPCI_REG_XSPDIF_ENABLE); 1494 else 1495 cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL, 1496 CMPCI_REG_XSPDIF_ENABLE); 1497 1498 /* SPDIF monitor (digital to alalog output) */ 1499 if (CMPCI_ISCAP(sc, SPDIN_MONITOR)) { 1500 v = sc->sc_gain[CMPCI_MONITOR_DAC][CMPCI_LR]; 1501 if (!(v & CMPCI_MONDAC_ENABLE)) 1502 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1503 CMPCI_REG_SPDIN_MONITOR); 1504 if (v & CMPCI_MONDAC_SPDOUT) 1505 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, 1506 CMPCI_REG_SPDIFOUT_DAC); 1507 else 1508 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, 1509 CMPCI_REG_SPDIFOUT_DAC); 1510 if (v & CMPCI_MONDAC_ENABLE) 1511 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1512 CMPCI_REG_SPDIN_MONITOR); 1513 } 1514 } 1515 1516 static int 1517 cmpci_set_in_ports(sc) 1518 struct cmpci_softc *sc; 1519 { 1520 int mask; 1521 int bitsl, bitsr; 1522 1523 mask = sc->sc_in_mask; 1524 1525 /* 1526 * Note CMPCI_RECORD_SOURCE_CD, CMPCI_RECORD_SOURCE_LINE_IN and 1527 * CMPCI_RECORD_SOURCE_FM are defined to the corresponding bit 1528 * of the mixer register. 1529 */ 1530 bitsr = mask & (CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN | 1531 CMPCI_RECORD_SOURCE_FM); 1532 1533 bitsl = CMPCI_SB16_MIXER_SRC_R_TO_L(bitsr); 1534 if (mask & CMPCI_RECORD_SOURCE_MIC) { 1535 bitsl |= CMPCI_SB16_MIXER_MIC_SRC; 1536 bitsr |= CMPCI_SB16_MIXER_MIC_SRC; 1537 } 1538 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, bitsl); 1539 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, bitsr); 1540 1541 if (mask & CMPCI_RECORD_SOURCE_AUX_IN) 1542 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1543 CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN); 1544 else 1545 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1546 CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN); 1547 1548 if (mask & CMPCI_RECORD_SOURCE_WAVE) 1549 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1550 CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR); 1551 else 1552 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1553 CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR); 1554 1555 if (CMPCI_ISCAP(sc, SPDIN) && 1556 (sc->sc_rec.md_divide == CMPCI_REG_RATE_44100 || 1557 (CMPCI_ISCAP(sc, SPDOUT_48K) && 1558 sc->sc_rec.md_divide == CMPCI_REG_RATE_48000/* XXX? */))) { 1559 if (mask & CMPCI_RECORD_SOURCE_SPDIF) { 1560 /* enable SPDIF/in */ 1561 cmpci_reg_set_4(sc, 1562 CMPCI_REG_FUNC_1, 1563 CMPCI_REG_SPDIF1_ENABLE); 1564 } else { 1565 cmpci_reg_clear_4(sc, 1566 CMPCI_REG_FUNC_1, 1567 CMPCI_REG_SPDIF1_ENABLE); 1568 } 1569 } 1570 1571 return 0; 1572 } 1573 1574 static int 1575 cmpci_set_port(handle, cp) 1576 void *handle; 1577 mixer_ctrl_t *cp; 1578 { 1579 struct cmpci_softc *sc = handle; 1580 int lgain, rgain; 1581 1582 switch (cp->dev) { 1583 case CMPCI_MIC_VOL: 1584 case CMPCI_PCSPEAKER: 1585 case CMPCI_MIC_RECVOL: 1586 if (cp->un.value.num_channels != 1) 1587 return EINVAL; 1588 /* FALLTHROUGH */ 1589 case CMPCI_DAC_VOL: 1590 case CMPCI_FM_VOL: 1591 case CMPCI_CD_VOL: 1592 case CMPCI_LINE_IN_VOL: 1593 case CMPCI_AUX_IN_VOL: 1594 case CMPCI_MASTER_VOL: 1595 if (cp->type != AUDIO_MIXER_VALUE) 1596 return EINVAL; 1597 switch (cp->un.value.num_channels) { 1598 case 1: 1599 lgain = rgain = 1600 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]; 1601 break; 1602 case 2: 1603 lgain = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]; 1604 rgain = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]; 1605 break; 1606 default: 1607 return EINVAL; 1608 } 1609 sc->sc_gain[cp->dev][CMPCI_LEFT] = lgain; 1610 sc->sc_gain[cp->dev][CMPCI_RIGHT] = rgain; 1611 1612 cmpci_set_mixer_gain(sc, cp->dev); 1613 break; 1614 1615 case CMPCI_RECORD_SOURCE: 1616 if (cp->type != AUDIO_MIXER_SET) 1617 return EINVAL; 1618 1619 if (cp->un.mask & ~(CMPCI_RECORD_SOURCE_MIC | 1620 CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN | 1621 CMPCI_RECORD_SOURCE_AUX_IN | CMPCI_RECORD_SOURCE_WAVE | 1622 CMPCI_RECORD_SOURCE_FM | CMPCI_RECORD_SOURCE_SPDIF)) 1623 return EINVAL; 1624 1625 if (cp->un.mask & CMPCI_RECORD_SOURCE_SPDIF) 1626 cp->un.mask = CMPCI_RECORD_SOURCE_SPDIF; 1627 1628 sc->sc_in_mask = cp->un.mask; 1629 return cmpci_set_in_ports(sc); 1630 1631 /* boolean */ 1632 case CMPCI_DAC_MUTE: 1633 case CMPCI_FM_MUTE: 1634 case CMPCI_CD_MUTE: 1635 case CMPCI_LINE_IN_MUTE: 1636 case CMPCI_AUX_IN_MUTE: 1637 case CMPCI_MIC_MUTE: 1638 case CMPCI_MIC_PREAMP: 1639 case CMPCI_PLAYBACK_MODE: 1640 case CMPCI_SPDIF_IN_PHASE: 1641 case CMPCI_SPDIF_LOOP: 1642 case CMPCI_SPDIF_OUT_PLAYBACK: 1643 case CMPCI_SPDIF_OUT_VOLTAGE: 1644 case CMPCI_REAR: 1645 case CMPCI_INDIVIDUAL: 1646 case CMPCI_REVERSE: 1647 case CMPCI_SURROUND: 1648 if (cp->type != AUDIO_MIXER_ENUM) 1649 return EINVAL; 1650 sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord != 0; 1651 cmpci_set_mixer_gain(sc, cp->dev); 1652 break; 1653 1654 case CMPCI_SPDIF_IN_SELECT: 1655 switch (cp->un.ord) { 1656 case CMPCI_SPDIF_IN_SPDIN1: 1657 case CMPCI_SPDIF_IN_SPDIN2: 1658 case CMPCI_SPDIF_IN_SPDOUT: 1659 break; 1660 default: 1661 return EINVAL; 1662 } 1663 goto xenum; 1664 case CMPCI_MONITOR_DAC: 1665 switch (cp->un.ord) { 1666 case CMPCI_MONITOR_DAC_OFF: 1667 case CMPCI_MONITOR_DAC_SPDIN: 1668 case CMPCI_MONITOR_DAC_SPDOUT: 1669 break; 1670 default: 1671 return EINVAL; 1672 } 1673 xenum: 1674 if (cp->type != AUDIO_MIXER_ENUM) 1675 return EINVAL; 1676 sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord; 1677 cmpci_set_mixer_gain(sc, cp->dev); 1678 break; 1679 1680 default: 1681 return EINVAL; 1682 } 1683 1684 return 0; 1685 } 1686 1687 static int 1688 cmpci_get_port(handle, cp) 1689 void *handle; 1690 mixer_ctrl_t *cp; 1691 { 1692 struct cmpci_softc *sc = handle; 1693 1694 switch (cp->dev) { 1695 case CMPCI_MIC_VOL: 1696 case CMPCI_PCSPEAKER: 1697 case CMPCI_MIC_RECVOL: 1698 if (cp->un.value.num_channels != 1) 1699 return EINVAL; 1700 /*FALLTHROUGH*/ 1701 case CMPCI_DAC_VOL: 1702 case CMPCI_FM_VOL: 1703 case CMPCI_CD_VOL: 1704 case CMPCI_LINE_IN_VOL: 1705 case CMPCI_AUX_IN_VOL: 1706 case CMPCI_MASTER_VOL: 1707 switch (cp->un.value.num_channels) { 1708 case 1: 1709 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = 1710 sc->sc_gain[cp->dev][CMPCI_LEFT]; 1711 break; 1712 case 2: 1713 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 1714 sc->sc_gain[cp->dev][CMPCI_LEFT]; 1715 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 1716 sc->sc_gain[cp->dev][CMPCI_RIGHT]; 1717 break; 1718 default: 1719 return EINVAL; 1720 } 1721 break; 1722 1723 case CMPCI_RECORD_SOURCE: 1724 cp->un.mask = sc->sc_in_mask; 1725 break; 1726 1727 case CMPCI_DAC_MUTE: 1728 case CMPCI_FM_MUTE: 1729 case CMPCI_CD_MUTE: 1730 case CMPCI_LINE_IN_MUTE: 1731 case CMPCI_AUX_IN_MUTE: 1732 case CMPCI_MIC_MUTE: 1733 case CMPCI_MIC_PREAMP: 1734 case CMPCI_PLAYBACK_MODE: 1735 case CMPCI_SPDIF_IN_SELECT: 1736 case CMPCI_SPDIF_IN_PHASE: 1737 case CMPCI_SPDIF_LOOP: 1738 case CMPCI_SPDIF_OUT_PLAYBACK: 1739 case CMPCI_SPDIF_OUT_VOLTAGE: 1740 case CMPCI_MONITOR_DAC: 1741 case CMPCI_REAR: 1742 case CMPCI_INDIVIDUAL: 1743 case CMPCI_REVERSE: 1744 case CMPCI_SURROUND: 1745 cp->un.ord = sc->sc_gain[cp->dev][CMPCI_LR]; 1746 break; 1747 1748 default: 1749 return EINVAL; 1750 } 1751 1752 return 0; 1753 } 1754 1755 /* ARGSUSED */ 1756 static size_t 1757 cmpci_round_buffersize(handle, direction, bufsize) 1758 void *handle; 1759 int direction; 1760 size_t bufsize; 1761 { 1762 if (bufsize > 0x10000) 1763 bufsize = 0x10000; 1764 1765 return bufsize; 1766 } 1767 1768 1769 static paddr_t 1770 cmpci_mappage(handle, addr, offset, prot) 1771 void *handle; 1772 void *addr; 1773 off_t offset; 1774 int prot; 1775 { 1776 struct cmpci_softc *sc = handle; 1777 struct cmpci_dmanode *p; 1778 1779 if (offset < 0 || NULL == (p = cmpci_find_dmamem(sc, addr))) 1780 return -1; 1781 1782 return bus_dmamem_mmap(p->cd_tag, p->cd_segs, 1783 sizeof(p->cd_segs)/sizeof(p->cd_segs[0]), 1784 offset, prot, BUS_DMA_WAITOK); 1785 } 1786 1787 1788 /* ARGSUSED */ 1789 static int 1790 cmpci_get_props(handle) 1791 void *handle; 1792 { 1793 return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 1794 } 1795 1796 1797 static int 1798 cmpci_trigger_output(handle, start, end, blksize, intr, arg, param) 1799 void *handle; 1800 void *start, *end; 1801 int blksize; 1802 void (*intr) __P((void *)); 1803 void *arg; 1804 struct audio_params *param; 1805 { 1806 struct cmpci_softc *sc = handle; 1807 struct cmpci_dmanode *p; 1808 int bps; 1809 1810 sc->sc_play.intr = intr; 1811 sc->sc_play.intr_arg = arg; 1812 bps = param->channels*param->precision*param->factor / 8; 1813 if (!bps) 1814 return EINVAL; 1815 1816 /* set DMA frame */ 1817 if (!(p = cmpci_find_dmamem(sc, start))) 1818 return EINVAL; 1819 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BASE, 1820 DMAADDR(p)); 1821 delay(10); 1822 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BYTES, 1823 ((caddr_t)end - (caddr_t)start + 1) / bps - 1); 1824 delay(10); 1825 1826 /* set interrupt count */ 1827 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_SAMPLES, 1828 (blksize + bps - 1) / bps - 1); 1829 delay(10); 1830 1831 /* start DMA */ 1832 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); /* PLAY */ 1833 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 1834 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); 1835 1836 return 0; 1837 } 1838 1839 static int 1840 cmpci_trigger_input(handle, start, end, blksize, intr, arg, param) 1841 void *handle; 1842 void *start, *end; 1843 int blksize; 1844 void (*intr) __P((void *)); 1845 void *arg; 1846 struct audio_params *param; 1847 { 1848 struct cmpci_softc *sc = handle; 1849 struct cmpci_dmanode *p; 1850 int bps; 1851 1852 sc->sc_rec.intr = intr; 1853 sc->sc_rec.intr_arg = arg; 1854 bps = param->channels*param->precision*param->factor/8; 1855 if (!bps) 1856 return EINVAL; 1857 1858 /* set DMA frame */ 1859 if (!(p=cmpci_find_dmamem(sc, start))) 1860 return EINVAL; 1861 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BASE, 1862 DMAADDR(p)); 1863 delay(10); 1864 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BYTES, 1865 ((caddr_t)end - (caddr_t)start + 1) / bps - 1); 1866 delay(10); 1867 1868 /* set interrupt count */ 1869 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_SAMPLES, 1870 (blksize + bps - 1) / bps - 1); 1871 delay(10); 1872 1873 /* start DMA */ 1874 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_DIR); /* REC */ 1875 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 1876 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); 1877 1878 return 0; 1879 } 1880 1881 1882 /* end of file */ 1883
Indexes created Sat Sep 27 21:09:56 GMT 2025