cmpci.c revision 1.26.2.2
1 /* $NetBSD: cmpci.c,v 1.26.2.2 2005/01/09 08:42:45 kent Exp $ */ 2 3 /* 4 * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Takuya SHIOZAKI <tshiozak (at) NetBSD.org> . 9 * 10 * This code is derived from software contributed to The NetBSD Foundation 11 * by ITOH Yasufumi. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 /* 37 * C-Media CMI8x38 Audio Chip Support. 38 * 39 * TODO: 40 * - 4ch / 6ch support. 41 * - Joystick support. 42 * 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: cmpci.c,v 1.26.2.2 2005/01/09 08:42:45 kent Exp $"); 47 48 #if defined(AUDIO_DEBUG) || defined(DEBUG) 49 #define DPRINTF(x) if (cmpcidebug) printf x 50 int cmpcidebug = 0; 51 #else 52 #define DPRINTF(x) 53 #endif 54 55 #include "mpu.h" 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/kernel.h> 60 #include <sys/malloc.h> 61 #include <sys/device.h> 62 #include <sys/proc.h> 63 64 #include <dev/pci/pcidevs.h> 65 #include <dev/pci/pcivar.h> 66 67 #include <sys/audioio.h> 68 #include <dev/audio_if.h> 69 #include <dev/midi_if.h> 70 71 #include <dev/mulaw.h> 72 #include <dev/auconv.h> 73 #include <dev/pci/cmpcireg.h> 74 #include <dev/pci/cmpcivar.h> 75 76 #include <dev/ic/mpuvar.h> 77 #include <machine/bus.h> 78 #include <machine/intr.h> 79 80 /* 81 * Low-level HW interface 82 */ 83 static __inline uint8_t cmpci_mixerreg_read __P((struct cmpci_softc *, 84 uint8_t)); 85 static __inline void cmpci_mixerreg_write __P((struct cmpci_softc *, 86 uint8_t, uint8_t)); 87 static __inline void cmpci_reg_partial_write_1 __P((struct cmpci_softc *, 88 int, int, 89 unsigned, unsigned)); 90 static __inline void cmpci_reg_partial_write_4 __P((struct cmpci_softc *, 91 int, int, 92 uint32_t, uint32_t)); 93 static __inline void cmpci_reg_set_1 __P((struct cmpci_softc *, 94 int, uint8_t)); 95 static __inline void cmpci_reg_clear_1 __P((struct cmpci_softc *, 96 int, uint8_t)); 97 static __inline void cmpci_reg_set_4 __P((struct cmpci_softc *, 98 int, uint32_t)); 99 static __inline void cmpci_reg_clear_4 __P((struct cmpci_softc *, 100 int, uint32_t)); 101 static __inline void cmpci_reg_set_reg_misc __P((struct cmpci_softc *, 102 uint32_t)); 103 static __inline void cmpci_reg_clear_reg_misc __P((struct cmpci_softc *, 104 uint32_t)); 105 static int cmpci_rate_to_index __P((int)); 106 static __inline int cmpci_index_to_rate __P((int)); 107 static __inline int cmpci_index_to_divider __P((int)); 108 109 static int cmpci_adjust __P((int, int)); 110 static void cmpci_set_mixer_gain __P((struct cmpci_softc *, int)); 111 static void cmpci_set_out_ports __P((struct cmpci_softc *)); 112 static int cmpci_set_in_ports __P((struct cmpci_softc *)); 113 114 115 /* 116 * autoconf interface 117 */ 118 static int cmpci_match __P((struct device *, struct cfdata *, void *)); 119 static void cmpci_attach __P((struct device *, struct device *, void *)); 120 121 CFATTACH_DECL(cmpci, sizeof (struct cmpci_softc), 122 cmpci_match, cmpci_attach, NULL, NULL); 123 124 /* interrupt */ 125 static int cmpci_intr __P((void *)); 126 127 128 /* 129 * DMA stuffs 130 */ 131 static int cmpci_alloc_dmamem __P((struct cmpci_softc *, 132 size_t, struct malloc_type *, 133 int, caddr_t *)); 134 static int cmpci_free_dmamem __P((struct cmpci_softc *, caddr_t, 135 struct malloc_type *)); 136 static struct cmpci_dmanode * cmpci_find_dmamem __P((struct cmpci_softc *, 137 caddr_t)); 138 139 140 /* 141 * interface to machine independent layer 142 */ 143 static int cmpci_query_encoding __P((void *, struct audio_encoding *)); 144 static int cmpci_set_params __P((void *, int, int, audio_params_t *, 145 audio_params_t *, stream_filter_list_t *, stream_filter_list_t *)); 146 static int cmpci_round_blocksize __P((void *, int, int, const audio_params_t *)); 147 static int cmpci_halt_output __P((void *)); 148 static int cmpci_halt_input __P((void *)); 149 static int cmpci_getdev __P((void *, struct audio_device *)); 150 static int cmpci_set_port __P((void *, mixer_ctrl_t *)); 151 static int cmpci_get_port __P((void *, mixer_ctrl_t *)); 152 static int cmpci_query_devinfo __P((void *, mixer_devinfo_t *)); 153 static void *cmpci_allocm __P((void *, int, size_t, struct malloc_type *, int)); 154 static void cmpci_freem __P((void *, void *, struct malloc_type *)); 155 static size_t cmpci_round_buffersize __P((void *, int, size_t)); 156 static paddr_t cmpci_mappage __P((void *, void *, off_t, int)); 157 static int cmpci_get_props __P((void *)); 158 static int cmpci_trigger_output __P((void *, void *, void *, int, 159 void (*)(void *), void *, const audio_params_t *)); 160 static int cmpci_trigger_input __P((void *, void *, void *, int, 161 void (*)(void *), void *, const audio_params_t *)); 162 163 static const struct audio_hw_if cmpci_hw_if = { 164 NULL, /* open */ 165 NULL, /* close */ 166 NULL, /* drain */ 167 cmpci_query_encoding, /* query_encoding */ 168 cmpci_set_params, /* set_params */ 169 cmpci_round_blocksize, /* round_blocksize */ 170 NULL, /* commit_settings */ 171 NULL, /* init_output */ 172 NULL, /* init_input */ 173 NULL, /* start_output */ 174 NULL, /* start_input */ 175 cmpci_halt_output, /* halt_output */ 176 cmpci_halt_input, /* halt_input */ 177 NULL, /* speaker_ctl */ 178 cmpci_getdev, /* getdev */ 179 NULL, /* setfd */ 180 cmpci_set_port, /* set_port */ 181 cmpci_get_port, /* get_port */ 182 cmpci_query_devinfo, /* query_devinfo */ 183 cmpci_allocm, /* allocm */ 184 cmpci_freem, /* freem */ 185 cmpci_round_buffersize,/* round_buffersize */ 186 cmpci_mappage, /* mappage */ 187 cmpci_get_props, /* get_props */ 188 cmpci_trigger_output, /* trigger_output */ 189 cmpci_trigger_input, /* trigger_input */ 190 NULL, /* dev_ioctl */ 191 }; 192 193 #define CMPCI_NFORMATS 4 194 static const struct audio_format cmpci_formats[CMPCI_NFORMATS] = { 195 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 196 2, AUFMT_STEREO, 0, {5512, 48000}}, 197 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 198 1, AUFMT_MONAURAL, 0, {5512, 48000}}, 199 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8, 200 2, AUFMT_STEREO, 0, {5512, 48000}}, 201 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8, 202 1, AUFMT_MONAURAL, 0, {5512, 48000}}, 203 }; 204 205 206 /* 207 * Low-level HW interface 208 */ 209 210 /* mixer register read/write */ 211 static __inline uint8_t 212 cmpci_mixerreg_read(sc, no) 213 struct cmpci_softc *sc; 214 uint8_t no; 215 { 216 uint8_t ret; 217 218 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no); 219 delay(10); 220 ret = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA); 221 delay(10); 222 return ret; 223 } 224 225 static __inline void 226 cmpci_mixerreg_write(sc, no, val) 227 struct cmpci_softc *sc; 228 uint8_t no, val; 229 { 230 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no); 231 delay(10); 232 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA, val); 233 delay(10); 234 } 235 236 237 /* register partial write */ 238 static __inline void 239 cmpci_reg_partial_write_1(sc, no, shift, mask, val) 240 struct cmpci_softc *sc; 241 int no, shift; 242 unsigned mask, val; 243 { 244 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 245 (val<<shift) | 246 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift))); 247 delay(10); 248 } 249 250 static __inline void 251 cmpci_reg_partial_write_4(sc, no, shift, mask, val) 252 struct cmpci_softc *sc; 253 int no, shift; 254 uint32_t mask, val; 255 { 256 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 257 (val<<shift) | 258 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift))); 259 delay(10); 260 } 261 262 /* register set/clear bit */ 263 static __inline void 264 cmpci_reg_set_1(sc, no, mask) 265 struct cmpci_softc *sc; 266 int no; 267 uint8_t mask; 268 { 269 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 270 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) | mask)); 271 delay(10); 272 } 273 274 static __inline void 275 cmpci_reg_clear_1(sc, no, mask) 276 struct cmpci_softc *sc; 277 int no; 278 uint8_t mask; 279 { 280 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 281 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~mask)); 282 delay(10); 283 } 284 285 286 static __inline void 287 cmpci_reg_set_4(sc, no, mask) 288 struct cmpci_softc *sc; 289 int no; 290 uint32_t mask; 291 { 292 /* use cmpci_reg_set_reg_misc() for CMPCI_REG_MISC */ 293 KDASSERT(no != CMPCI_REG_MISC); 294 295 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 296 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) | mask)); 297 delay(10); 298 } 299 300 static __inline void 301 cmpci_reg_clear_4(sc, no, mask) 302 struct cmpci_softc *sc; 303 int no; 304 uint32_t mask; 305 { 306 /* use cmpci_reg_clear_reg_misc() for CMPCI_REG_MISC */ 307 KDASSERT(no != CMPCI_REG_MISC); 308 309 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 310 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~mask)); 311 delay(10); 312 } 313 314 315 /* 316 * The CMPCI_REG_MISC register needs special handling, since one of 317 * its bits has different read/write values. 318 */ 319 static __inline void 320 cmpci_reg_set_reg_misc(sc, mask) 321 struct cmpci_softc *sc; 322 uint32_t mask; 323 { 324 sc->sc_reg_misc |= mask; 325 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC, 326 sc->sc_reg_misc); 327 delay(10); 328 } 329 330 static __inline void 331 cmpci_reg_clear_reg_misc(sc, mask) 332 struct cmpci_softc *sc; 333 uint32_t mask; 334 { 335 sc->sc_reg_misc &= ~mask; 336 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC, 337 sc->sc_reg_misc); 338 delay(10); 339 } 340 341 342 /* rate */ 343 static const struct { 344 int rate; 345 int divider; 346 } cmpci_rate_table[CMPCI_REG_NUMRATE] = { 347 #define _RATE(n) { n, CMPCI_REG_RATE_ ## n } 348 _RATE(5512), 349 _RATE(8000), 350 _RATE(11025), 351 _RATE(16000), 352 _RATE(22050), 353 _RATE(32000), 354 _RATE(44100), 355 _RATE(48000) 356 #undef _RATE 357 }; 358 359 static int 360 cmpci_rate_to_index(rate) 361 int rate; 362 { 363 int i; 364 365 for (i = 0; i < CMPCI_REG_NUMRATE - 1; i++) 366 if (rate <= 367 (cmpci_rate_table[i].rate+cmpci_rate_table[i+1].rate) / 2) 368 return i; 369 return i; /* 48000 */ 370 } 371 372 static __inline int 373 cmpci_index_to_rate(index) 374 int index; 375 { 376 return cmpci_rate_table[index].rate; 377 } 378 379 static __inline int 380 cmpci_index_to_divider(index) 381 int index; 382 { 383 return cmpci_rate_table[index].divider; 384 } 385 386 387 /* 388 * interface to configure the device. 389 */ 390 391 static int 392 cmpci_match(parent, match, aux) 393 struct device *parent; 394 struct cfdata *match; 395 void *aux; 396 { 397 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 398 399 if ( PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CMEDIA && 400 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338A || 401 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338B || 402 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738 || 403 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738B) ) 404 return 1; 405 406 return 0; 407 } 408 409 static void 410 cmpci_attach(parent, self, aux) 411 struct device *parent, *self; 412 void *aux; 413 { 414 struct cmpci_softc *sc = (struct cmpci_softc *)self; 415 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 416 struct audio_attach_args aa; 417 pci_intr_handle_t ih; 418 char const *strintr; 419 char devinfo[256]; 420 int i, v; 421 422 aprint_naive(": Audio controller\n"); 423 424 sc->sc_id = pa->pa_id; 425 sc->sc_class = pa->pa_class; 426 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 427 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, 428 PCI_REVISION(sc->sc_class)); 429 switch (PCI_PRODUCT(sc->sc_id)) { 430 case PCI_PRODUCT_CMEDIA_CMI8338A: 431 /*FALLTHROUGH*/ 432 case PCI_PRODUCT_CMEDIA_CMI8338B: 433 sc->sc_capable = CMPCI_CAP_CMI8338; 434 break; 435 case PCI_PRODUCT_CMEDIA_CMI8738: 436 /*FALLTHROUGH*/ 437 case PCI_PRODUCT_CMEDIA_CMI8738B: 438 sc->sc_capable = CMPCI_CAP_CMI8738; 439 break; 440 } 441 442 /* map I/O space */ 443 if (pci_mapreg_map(pa, CMPCI_PCI_IOBASEREG, PCI_MAPREG_TYPE_IO, 0, 444 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 445 aprint_error("%s: failed to map I/O space\n", 446 sc->sc_dev.dv_xname); 447 return; 448 } 449 450 /* interrupt */ 451 if (pci_intr_map(pa, &ih)) { 452 aprint_error("%s: failed to map interrupt\n", 453 sc->sc_dev.dv_xname); 454 return; 455 } 456 strintr = pci_intr_string(pa->pa_pc, ih); 457 sc->sc_ih=pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, cmpci_intr, sc); 458 if (sc->sc_ih == NULL) { 459 aprint_error("%s: failed to establish interrupt", 460 sc->sc_dev.dv_xname); 461 if (strintr != NULL) 462 aprint_normal(" at %s", strintr); 463 aprint_normal("\n"); 464 return; 465 } 466 aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, strintr); 467 468 sc->sc_dmat = pa->pa_dmat; 469 470 audio_attach_mi(&cmpci_hw_if, sc, &sc->sc_dev); 471 472 /* attach OPL device */ 473 aa.type = AUDIODEV_TYPE_OPL; 474 aa.hwif = NULL; 475 aa.hdl = NULL; 476 (void)config_found(&sc->sc_dev, &aa, audioprint); 477 478 /* attach MPU-401 device */ 479 aa.type = AUDIODEV_TYPE_MPU; 480 aa.hwif = NULL; 481 aa.hdl = NULL; 482 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh, 483 CMPCI_REG_MPU_BASE, CMPCI_REG_MPU_SIZE, &sc->sc_mpu_ioh) == 0) 484 sc->sc_mpudev = config_found(&sc->sc_dev, &aa, audioprint); 485 486 /* get initial value (this is 0 and may be omitted but just in case) */ 487 sc->sc_reg_misc = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 488 CMPCI_REG_MISC) & ~CMPCI_REG_SPDIF48K; 489 490 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_RESET, 0); 491 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0); 492 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0); 493 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, 494 CMPCI_SB16_SW_CD|CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE); 495 for (i = 0; i < CMPCI_NDEVS; i++) { 496 switch(i) { 497 /* 498 * CMI8738 defaults are 499 * master: 0xe0 (0x00 - 0xf8) 500 * FM, DAC: 0xc0 (0x00 - 0xf8) 501 * PC speaker: 0x80 (0x00 - 0xc0) 502 * others: 0 503 */ 504 /* volume */ 505 case CMPCI_MASTER_VOL: 506 v = 128; /* 224 */ 507 break; 508 case CMPCI_FM_VOL: 509 case CMPCI_DAC_VOL: 510 v = 192; 511 break; 512 case CMPCI_PCSPEAKER: 513 v = 128; 514 break; 515 516 /* booleans, set to true */ 517 case CMPCI_CD_MUTE: 518 case CMPCI_MIC_MUTE: 519 case CMPCI_LINE_IN_MUTE: 520 case CMPCI_AUX_IN_MUTE: 521 v = 1; 522 break; 523 524 /* volume with inital value 0 */ 525 case CMPCI_CD_VOL: 526 case CMPCI_LINE_IN_VOL: 527 case CMPCI_AUX_IN_VOL: 528 case CMPCI_MIC_VOL: 529 case CMPCI_MIC_RECVOL: 530 /* FALLTHROUGH */ 531 532 /* others are cleared */ 533 case CMPCI_MIC_PREAMP: 534 case CMPCI_RECORD_SOURCE: 535 case CMPCI_PLAYBACK_MODE: 536 case CMPCI_SPDIF_IN_SELECT: 537 case CMPCI_SPDIF_IN_PHASE: 538 case CMPCI_SPDIF_LOOP: 539 case CMPCI_SPDIF_OUT_PLAYBACK: 540 case CMPCI_SPDIF_OUT_VOLTAGE: 541 case CMPCI_MONITOR_DAC: 542 case CMPCI_REAR: 543 case CMPCI_INDIVIDUAL: 544 case CMPCI_REVERSE: 545 case CMPCI_SURROUND: 546 default: 547 v = 0; 548 break; 549 } 550 sc->sc_gain[i][CMPCI_LEFT] = sc->sc_gain[i][CMPCI_RIGHT] = v; 551 cmpci_set_mixer_gain(sc, i); 552 } 553 } 554 555 556 static int 557 cmpci_intr(handle) 558 void *handle; 559 { 560 struct cmpci_softc *sc = handle; 561 uint32_t intrstat; 562 563 intrstat = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 564 CMPCI_REG_INTR_STATUS); 565 566 if (!(intrstat & CMPCI_REG_ANY_INTR)) 567 return 0; 568 569 delay(10); 570 571 /* disable and reset intr */ 572 if (intrstat & CMPCI_REG_CH0_INTR) 573 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, 574 CMPCI_REG_CH0_INTR_ENABLE); 575 if (intrstat & CMPCI_REG_CH1_INTR) 576 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, 577 CMPCI_REG_CH1_INTR_ENABLE); 578 579 if (intrstat & CMPCI_REG_CH0_INTR) { 580 if (sc->sc_play.intr != NULL) 581 (*sc->sc_play.intr)(sc->sc_play.intr_arg); 582 } 583 if (intrstat & CMPCI_REG_CH1_INTR) { 584 if (sc->sc_rec.intr != NULL) 585 (*sc->sc_rec.intr)(sc->sc_rec.intr_arg); 586 } 587 588 /* enable intr */ 589 if (intrstat & CMPCI_REG_CH0_INTR) 590 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, 591 CMPCI_REG_CH0_INTR_ENABLE); 592 if (intrstat & CMPCI_REG_CH1_INTR) 593 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, 594 CMPCI_REG_CH1_INTR_ENABLE); 595 596 #if NMPU > 0 597 if (intrstat & CMPCI_REG_UART_INTR && sc->sc_mpudev != NULL) 598 mpu_intr(sc->sc_mpudev); 599 #endif 600 601 return 1; 602 } 603 604 static int 605 cmpci_query_encoding(handle, fp) 606 void *handle; 607 struct audio_encoding *fp; 608 { 609 switch (fp->index) { 610 case 0: 611 strcpy(fp->name, AudioEulinear); 612 fp->encoding = AUDIO_ENCODING_ULINEAR; 613 fp->precision = 8; 614 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 615 break; 616 case 1: 617 strcpy(fp->name, AudioEmulaw); 618 fp->encoding = AUDIO_ENCODING_ULAW; 619 fp->precision = 8; 620 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 621 break; 622 case 2: 623 strcpy(fp->name, AudioEalaw); 624 fp->encoding = AUDIO_ENCODING_ALAW; 625 fp->precision = 8; 626 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 627 break; 628 case 3: 629 strcpy(fp->name, AudioEslinear); 630 fp->encoding = AUDIO_ENCODING_SLINEAR; 631 fp->precision = 8; 632 fp->flags = 0; 633 break; 634 case 4: 635 strcpy(fp->name, AudioEslinear_le); 636 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 637 fp->precision = 16; 638 fp->flags = 0; 639 break; 640 case 5: 641 strcpy(fp->name, AudioEulinear_le); 642 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 643 fp->precision = 16; 644 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 645 break; 646 case 6: 647 strcpy(fp->name, AudioEslinear_be); 648 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 649 fp->precision = 16; 650 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 651 break; 652 case 7: 653 strcpy(fp->name, AudioEulinear_be); 654 fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 655 fp->precision = 16; 656 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 657 break; 658 default: 659 return EINVAL; 660 } 661 return 0; 662 } 663 664 665 static int 666 cmpci_set_params(handle, setmode, usemode, play, rec, pfil, rfil) 667 void *handle; 668 int setmode, usemode; 669 audio_params_t *play, *rec; 670 stream_filter_list_t *pfil, *rfil; 671 { 672 int i; 673 struct cmpci_softc *sc = handle; 674 675 for (i = 0; i < 2; i++) { 676 int md_format; 677 int md_divide; 678 int md_index; 679 int mode; 680 audio_params_t *p; 681 stream_filter_list_t *fil; 682 int ind; 683 684 switch (i) { 685 case 0: 686 mode = AUMODE_PLAY; 687 p = play; 688 fil = pfil; 689 break; 690 case 1: 691 mode = AUMODE_RECORD; 692 p = rec; 693 fil = rfil; 694 break; 695 default: 696 return EINVAL; 697 } 698 699 if (!(setmode & mode)) 700 continue; 701 702 md_index = cmpci_rate_to_index(p->sample_rate); 703 md_divide = cmpci_index_to_divider(md_index); 704 p->sample_rate = cmpci_index_to_rate(md_index); 705 DPRINTF(("%s: sample:%u, divider=%d\n", 706 sc->sc_dev.dv_xname, p->sample_rate, md_divide)); 707 708 ind = auconv_set_converter(cmpci_formats, CMPCI_NFORMATS, 709 mode, p, FALSE, fil); 710 if (ind < 0) 711 return EINVAL; 712 if (fil->req_size > 0) 713 p = &fil->filters[0].param; 714 715 /* format */ 716 md_format = p->channels == 1 717 ? CMPCI_REG_FORMAT_MONO : CMPCI_REG_FORMAT_STEREO; 718 md_format |= p->precision == 16 719 ? CMPCI_REG_FORMAT_16BIT : CMPCI_REG_FORMAT_8BIT; 720 if (mode & AUMODE_PLAY) { 721 cmpci_reg_partial_write_4(sc, 722 CMPCI_REG_CHANNEL_FORMAT, 723 CMPCI_REG_CH0_FORMAT_SHIFT, 724 CMPCI_REG_CH0_FORMAT_MASK, md_format); 725 cmpci_reg_partial_write_4(sc, 726 CMPCI_REG_FUNC_1, CMPCI_REG_DAC_FS_SHIFT, 727 CMPCI_REG_DAC_FS_MASK, md_divide); 728 sc->sc_play.md_divide = md_divide; 729 } else { 730 cmpci_reg_partial_write_4(sc, 731 CMPCI_REG_CHANNEL_FORMAT, 732 CMPCI_REG_CH1_FORMAT_SHIFT, 733 CMPCI_REG_CH1_FORMAT_MASK, md_format); 734 cmpci_reg_partial_write_4(sc, 735 CMPCI_REG_FUNC_1, CMPCI_REG_ADC_FS_SHIFT, 736 CMPCI_REG_ADC_FS_MASK, md_divide); 737 sc->sc_rec.md_divide = md_divide; 738 } 739 cmpci_set_out_ports(sc); 740 cmpci_set_in_ports(sc); 741 } 742 return 0; 743 } 744 745 /* ARGSUSED */ 746 static int 747 cmpci_round_blocksize(handle, block, mode, param) 748 void *handle; 749 int block; 750 int mode; 751 const audio_params_t *param; 752 { 753 return (block & -4); 754 } 755 756 static int 757 cmpci_halt_output(handle) 758 void *handle; 759 { 760 struct cmpci_softc *sc = handle; 761 int s; 762 763 s = splaudio(); 764 sc->sc_play.intr = NULL; 765 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 766 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); 767 /* wait for reset DMA */ 768 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); 769 delay(10); 770 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); 771 splx(s); 772 773 return 0; 774 } 775 776 static int 777 cmpci_halt_input(handle) 778 void *handle; 779 { 780 struct cmpci_softc *sc = handle; 781 int s; 782 783 s = splaudio(); 784 sc->sc_rec.intr = NULL; 785 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 786 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); 787 /* wait for reset DMA */ 788 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); 789 delay(10); 790 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); 791 splx(s); 792 793 return 0; 794 } 795 796 797 /* get audio device information */ 798 static int 799 cmpci_getdev(handle, ad) 800 void *handle; 801 struct audio_device *ad; 802 { 803 struct cmpci_softc *sc = handle; 804 805 strncpy(ad->name, "CMI PCI Audio", sizeof(ad->name)); 806 snprintf(ad->version, sizeof(ad->version), "0x%02x", 807 PCI_REVISION(sc->sc_class)); 808 switch (PCI_PRODUCT(sc->sc_id)) { 809 case PCI_PRODUCT_CMEDIA_CMI8338A: 810 strncpy(ad->config, "CMI8338A", sizeof(ad->config)); 811 break; 812 case PCI_PRODUCT_CMEDIA_CMI8338B: 813 strncpy(ad->config, "CMI8338B", sizeof(ad->config)); 814 break; 815 case PCI_PRODUCT_CMEDIA_CMI8738: 816 strncpy(ad->config, "CMI8738", sizeof(ad->config)); 817 break; 818 case PCI_PRODUCT_CMEDIA_CMI8738B: 819 strncpy(ad->config, "CMI8738B", sizeof(ad->config)); 820 break; 821 default: 822 strncpy(ad->config, "unknown", sizeof(ad->config)); 823 } 824 825 return 0; 826 } 827 828 829 /* mixer device information */ 830 int 831 cmpci_query_devinfo(handle, dip) 832 void *handle; 833 mixer_devinfo_t *dip; 834 { 835 static const char *const mixer_port_names[] = { 836 AudioNdac, AudioNfmsynth, AudioNcd, AudioNline, AudioNaux, 837 AudioNmicrophone 838 }; 839 static const char *const mixer_classes[] = { 840 AudioCinputs, AudioCoutputs, AudioCrecord, CmpciCplayback, 841 CmpciCspdif 842 }; 843 struct cmpci_softc *sc = handle; 844 int i; 845 846 dip->prev = dip->next = AUDIO_MIXER_LAST; 847 848 switch (dip->index) { 849 case CMPCI_INPUT_CLASS: 850 case CMPCI_OUTPUT_CLASS: 851 case CMPCI_RECORD_CLASS: 852 case CMPCI_PLAYBACK_CLASS: 853 case CMPCI_SPDIF_CLASS: 854 dip->type = AUDIO_MIXER_CLASS; 855 dip->mixer_class = dip->index; 856 strcpy(dip->label.name, 857 mixer_classes[dip->index - CMPCI_INPUT_CLASS]); 858 return 0; 859 860 case CMPCI_AUX_IN_VOL: 861 dip->un.v.delta = 1 << (8 - CMPCI_REG_AUX_VALBITS); 862 goto vol1; 863 case CMPCI_DAC_VOL: 864 case CMPCI_FM_VOL: 865 case CMPCI_CD_VOL: 866 case CMPCI_LINE_IN_VOL: 867 case CMPCI_MIC_VOL: 868 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS); 869 vol1: dip->mixer_class = CMPCI_INPUT_CLASS; 870 dip->next = dip->index + 6; /* CMPCI_xxx_MUTE */ 871 strcpy(dip->label.name, mixer_port_names[dip->index]); 872 dip->un.v.num_channels = (dip->index == CMPCI_MIC_VOL ? 1 : 2); 873 vol: 874 dip->type = AUDIO_MIXER_VALUE; 875 strcpy(dip->un.v.units.name, AudioNvolume); 876 return 0; 877 878 case CMPCI_MIC_MUTE: 879 dip->next = CMPCI_MIC_PREAMP; 880 /* FALLTHROUGH */ 881 case CMPCI_DAC_MUTE: 882 case CMPCI_FM_MUTE: 883 case CMPCI_CD_MUTE: 884 case CMPCI_LINE_IN_MUTE: 885 case CMPCI_AUX_IN_MUTE: 886 dip->prev = dip->index - 6; /* CMPCI_xxx_VOL */ 887 dip->mixer_class = CMPCI_INPUT_CLASS; 888 strcpy(dip->label.name, AudioNmute); 889 goto on_off; 890 on_off: 891 dip->type = AUDIO_MIXER_ENUM; 892 dip->un.e.num_mem = 2; 893 strcpy(dip->un.e.member[0].label.name, AudioNoff); 894 dip->un.e.member[0].ord = 0; 895 strcpy(dip->un.e.member[1].label.name, AudioNon); 896 dip->un.e.member[1].ord = 1; 897 return 0; 898 899 case CMPCI_MIC_PREAMP: 900 dip->mixer_class = CMPCI_INPUT_CLASS; 901 dip->prev = CMPCI_MIC_MUTE; 902 strcpy(dip->label.name, AudioNpreamp); 903 goto on_off; 904 case CMPCI_PCSPEAKER: 905 dip->mixer_class = CMPCI_INPUT_CLASS; 906 strcpy(dip->label.name, AudioNspeaker); 907 dip->un.v.num_channels = 1; 908 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_SPEAKER_VALBITS); 909 goto vol; 910 case CMPCI_RECORD_SOURCE: 911 dip->mixer_class = CMPCI_RECORD_CLASS; 912 strcpy(dip->label.name, AudioNsource); 913 dip->type = AUDIO_MIXER_SET; 914 dip->un.s.num_mem = 7; 915 strcpy(dip->un.s.member[0].label.name, AudioNmicrophone); 916 dip->un.s.member[0].mask = CMPCI_RECORD_SOURCE_MIC; 917 strcpy(dip->un.s.member[1].label.name, AudioNcd); 918 dip->un.s.member[1].mask = CMPCI_RECORD_SOURCE_CD; 919 strcpy(dip->un.s.member[2].label.name, AudioNline); 920 dip->un.s.member[2].mask = CMPCI_RECORD_SOURCE_LINE_IN; 921 strcpy(dip->un.s.member[3].label.name, AudioNaux); 922 dip->un.s.member[3].mask = CMPCI_RECORD_SOURCE_AUX_IN; 923 strcpy(dip->un.s.member[4].label.name, AudioNwave); 924 dip->un.s.member[4].mask = CMPCI_RECORD_SOURCE_WAVE; 925 strcpy(dip->un.s.member[5].label.name, AudioNfmsynth); 926 dip->un.s.member[5].mask = CMPCI_RECORD_SOURCE_FM; 927 strcpy(dip->un.s.member[6].label.name, CmpciNspdif); 928 dip->un.s.member[6].mask = CMPCI_RECORD_SOURCE_SPDIF; 929 return 0; 930 case CMPCI_MIC_RECVOL: 931 dip->mixer_class = CMPCI_RECORD_CLASS; 932 strcpy(dip->label.name, AudioNmicrophone); 933 dip->un.v.num_channels = 1; 934 dip->un.v.delta = 1 << (8 - CMPCI_REG_ADMIC_VALBITS); 935 goto vol; 936 937 case CMPCI_PLAYBACK_MODE: 938 dip->mixer_class = CMPCI_PLAYBACK_CLASS; 939 dip->type = AUDIO_MIXER_ENUM; 940 strcpy(dip->label.name, AudioNmode); 941 dip->un.e.num_mem = 2; 942 strcpy(dip->un.e.member[0].label.name, AudioNdac); 943 dip->un.e.member[0].ord = CMPCI_PLAYBACK_MODE_WAVE; 944 strcpy(dip->un.e.member[1].label.name, CmpciNspdif); 945 dip->un.e.member[1].ord = CMPCI_PLAYBACK_MODE_SPDIF; 946 return 0; 947 case CMPCI_SPDIF_IN_SELECT: 948 dip->mixer_class = CMPCI_SPDIF_CLASS; 949 dip->type = AUDIO_MIXER_ENUM; 950 dip->next = CMPCI_SPDIF_IN_PHASE; 951 strcpy(dip->label.name, AudioNinput); 952 i = 0; 953 strcpy(dip->un.e.member[i].label.name, CmpciNspdin1); 954 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN1; 955 if (CMPCI_ISCAP(sc, 2ND_SPDIN)) { 956 strcpy(dip->un.e.member[i].label.name, CmpciNspdin2); 957 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN2; 958 } 959 strcpy(dip->un.e.member[i].label.name, CmpciNspdout); 960 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDOUT; 961 dip->un.e.num_mem = i; 962 return 0; 963 case CMPCI_SPDIF_IN_PHASE: 964 dip->mixer_class = CMPCI_SPDIF_CLASS; 965 dip->prev = CMPCI_SPDIF_IN_SELECT; 966 strcpy(dip->label.name, CmpciNphase); 967 dip->type = AUDIO_MIXER_ENUM; 968 dip->un.e.num_mem = 2; 969 strcpy(dip->un.e.member[0].label.name, CmpciNpositive); 970 dip->un.e.member[0].ord = CMPCI_SPDIF_IN_PHASE_POSITIVE; 971 strcpy(dip->un.e.member[1].label.name, CmpciNnegative); 972 dip->un.e.member[1].ord = CMPCI_SPDIF_IN_PHASE_NEGATIVE; 973 return 0; 974 case CMPCI_SPDIF_LOOP: 975 dip->mixer_class = CMPCI_SPDIF_CLASS; 976 dip->next = CMPCI_SPDIF_OUT_PLAYBACK; 977 strcpy(dip->label.name, AudioNoutput); 978 dip->type = AUDIO_MIXER_ENUM; 979 dip->un.e.num_mem = 2; 980 strcpy(dip->un.e.member[0].label.name, CmpciNplayback); 981 dip->un.e.member[0].ord = CMPCI_SPDIF_LOOP_OFF; 982 strcpy(dip->un.e.member[1].label.name, CmpciNspdin); 983 dip->un.e.member[1].ord = CMPCI_SPDIF_LOOP_ON; 984 return 0; 985 case CMPCI_SPDIF_OUT_PLAYBACK: 986 dip->mixer_class = CMPCI_SPDIF_CLASS; 987 dip->prev = CMPCI_SPDIF_LOOP; 988 dip->next = CMPCI_SPDIF_OUT_VOLTAGE; 989 strcpy(dip->label.name, CmpciNplayback); 990 dip->type = AUDIO_MIXER_ENUM; 991 dip->un.e.num_mem = 2; 992 strcpy(dip->un.e.member[0].label.name, AudioNwave); 993 dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_PLAYBACK_WAVE; 994 strcpy(dip->un.e.member[1].label.name, CmpciNlegacy); 995 dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_PLAYBACK_LEGACY; 996 return 0; 997 case CMPCI_SPDIF_OUT_VOLTAGE: 998 dip->mixer_class = CMPCI_SPDIF_CLASS; 999 dip->prev = CMPCI_SPDIF_OUT_PLAYBACK; 1000 strcpy(dip->label.name, CmpciNvoltage); 1001 dip->type = AUDIO_MIXER_ENUM; 1002 dip->un.e.num_mem = 2; 1003 strcpy(dip->un.e.member[0].label.name, CmpciNhigh_v); 1004 dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_VOLTAGE_HIGH; 1005 strcpy(dip->un.e.member[1].label.name, CmpciNlow_v); 1006 dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_VOLTAGE_LOW; 1007 return 0; 1008 case CMPCI_MONITOR_DAC: 1009 dip->mixer_class = CMPCI_SPDIF_CLASS; 1010 strcpy(dip->label.name, AudioNmonitor); 1011 dip->type = AUDIO_MIXER_ENUM; 1012 dip->un.e.num_mem = 3; 1013 strcpy(dip->un.e.member[0].label.name, AudioNoff); 1014 dip->un.e.member[0].ord = CMPCI_MONITOR_DAC_OFF; 1015 strcpy(dip->un.e.member[1].label.name, CmpciNspdin); 1016 dip->un.e.member[1].ord = CMPCI_MONITOR_DAC_SPDIN; 1017 strcpy(dip->un.e.member[2].label.name, CmpciNspdout); 1018 dip->un.e.member[2].ord = CMPCI_MONITOR_DAC_SPDOUT; 1019 return 0; 1020 1021 case CMPCI_MASTER_VOL: 1022 dip->mixer_class = CMPCI_OUTPUT_CLASS; 1023 strcpy(dip->label.name, AudioNmaster); 1024 dip->un.v.num_channels = 2; 1025 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS); 1026 goto vol; 1027 case CMPCI_REAR: 1028 dip->mixer_class = CMPCI_OUTPUT_CLASS; 1029 dip->next = CMPCI_INDIVIDUAL; 1030 strcpy(dip->label.name, CmpciNrear); 1031 goto on_off; 1032 case CMPCI_INDIVIDUAL: 1033 dip->mixer_class = CMPCI_OUTPUT_CLASS; 1034 dip->prev = CMPCI_REAR; 1035 dip->next = CMPCI_REVERSE; 1036 strcpy(dip->label.name, CmpciNindividual); 1037 goto on_off; 1038 case CMPCI_REVERSE: 1039 dip->mixer_class = CMPCI_OUTPUT_CLASS; 1040 dip->prev = CMPCI_INDIVIDUAL; 1041 strcpy(dip->label.name, CmpciNreverse); 1042 goto on_off; 1043 case CMPCI_SURROUND: 1044 dip->mixer_class = CMPCI_OUTPUT_CLASS; 1045 strcpy(dip->label.name, CmpciNsurround); 1046 goto on_off; 1047 } 1048 1049 return ENXIO; 1050 } 1051 1052 static int 1053 cmpci_alloc_dmamem(sc, size, type, flags, r_addr) 1054 struct cmpci_softc *sc; 1055 size_t size; 1056 struct malloc_type *type; 1057 int flags; 1058 caddr_t *r_addr; 1059 { 1060 int error = 0; 1061 struct cmpci_dmanode *n; 1062 int w; 1063 1064 n = malloc(sizeof(struct cmpci_dmanode), type, flags); 1065 if (n == NULL) { 1066 error = ENOMEM; 1067 goto quit; 1068 } 1069 1070 w = (flags & M_NOWAIT) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK; 1071 #define CMPCI_DMABUF_ALIGN 0x4 1072 #define CMPCI_DMABUF_BOUNDARY 0x0 1073 n->cd_tag = sc->sc_dmat; 1074 n->cd_size = size; 1075 error = bus_dmamem_alloc(n->cd_tag, n->cd_size, 1076 CMPCI_DMABUF_ALIGN, CMPCI_DMABUF_BOUNDARY, n->cd_segs, 1077 sizeof(n->cd_segs)/sizeof(n->cd_segs[0]), &n->cd_nsegs, w); 1078 if (error) 1079 goto mfree; 1080 error = bus_dmamem_map(n->cd_tag, n->cd_segs, n->cd_nsegs, n->cd_size, 1081 &n->cd_addr, w | BUS_DMA_COHERENT); 1082 if (error) 1083 goto dmafree; 1084 error = bus_dmamap_create(n->cd_tag, n->cd_size, 1, n->cd_size, 0, 1085 w, &n->cd_map); 1086 if (error) 1087 goto unmap; 1088 error = bus_dmamap_load(n->cd_tag, n->cd_map, n->cd_addr, n->cd_size, 1089 NULL, w); 1090 if (error) 1091 goto destroy; 1092 1093 n->cd_next = sc->sc_dmap; 1094 sc->sc_dmap = n; 1095 *r_addr = KVADDR(n); 1096 return 0; 1097 1098 destroy: 1099 bus_dmamap_destroy(n->cd_tag, n->cd_map); 1100 unmap: 1101 bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size); 1102 dmafree: 1103 bus_dmamem_free(n->cd_tag, 1104 n->cd_segs, sizeof(n->cd_segs)/sizeof(n->cd_segs[0])); 1105 mfree: 1106 free(n, type); 1107 quit: 1108 return error; 1109 } 1110 1111 static int 1112 cmpci_free_dmamem(sc, addr, type) 1113 struct cmpci_softc *sc; 1114 caddr_t addr; 1115 struct malloc_type *type; 1116 { 1117 struct cmpci_dmanode **nnp; 1118 1119 for (nnp = &sc->sc_dmap; *nnp; nnp= &(*nnp)->cd_next) { 1120 if ((*nnp)->cd_addr == addr) { 1121 struct cmpci_dmanode *n = *nnp; 1122 bus_dmamap_unload(n->cd_tag, n->cd_map); 1123 bus_dmamap_destroy(n->cd_tag, n->cd_map); 1124 bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size); 1125 bus_dmamem_free(n->cd_tag, n->cd_segs, 1126 sizeof(n->cd_segs)/sizeof(n->cd_segs[0])); 1127 free(n, type); 1128 return 0; 1129 } 1130 } 1131 return -1; 1132 } 1133 1134 static struct cmpci_dmanode * 1135 cmpci_find_dmamem(sc, addr) 1136 struct cmpci_softc *sc; 1137 caddr_t addr; 1138 { 1139 struct cmpci_dmanode *p; 1140 1141 for (p=sc->sc_dmap; p; p=p->cd_next) 1142 if ( KVADDR(p) == (void *)addr ) 1143 break; 1144 return p; 1145 } 1146 1147 1148 #if 0 1149 static void 1150 cmpci_print_dmamem __P((struct cmpci_dmanode *p)); 1151 static void 1152 cmpci_print_dmamem(p) 1153 struct cmpci_dmanode *p; 1154 { 1155 DPRINTF(("DMA at virt:%p, dmaseg:%p, mapseg:%p, size:%p\n", 1156 (void *)p->cd_addr, (void *)p->cd_segs[0].ds_addr, 1157 (void *)DMAADDR(p), (void *)p->cd_size)); 1158 } 1159 #endif /* DEBUG */ 1160 1161 1162 static void * 1163 cmpci_allocm(handle, direction, size, type, flags) 1164 void *handle; 1165 int direction; 1166 size_t size; 1167 struct malloc_type *type; 1168 int flags; 1169 { 1170 struct cmpci_softc *sc = handle; 1171 caddr_t addr; 1172 1173 if (cmpci_alloc_dmamem(sc, size, type, flags, &addr)) 1174 return NULL; 1175 return addr; 1176 } 1177 1178 static void 1179 cmpci_freem(handle, addr, type) 1180 void *handle; 1181 void *addr; 1182 struct malloc_type *type; 1183 { 1184 struct cmpci_softc *sc = handle; 1185 1186 cmpci_free_dmamem(sc, addr, type); 1187 } 1188 1189 1190 #define MAXVAL 256 1191 static int 1192 cmpci_adjust(val, mask) 1193 int val, mask; 1194 { 1195 val += (MAXVAL - mask) >> 1; 1196 if (val >= MAXVAL) 1197 val = MAXVAL-1; 1198 return val & mask; 1199 } 1200 1201 static void 1202 cmpci_set_mixer_gain(sc, port) 1203 struct cmpci_softc *sc; 1204 int port; 1205 { 1206 int src; 1207 int bits, mask; 1208 1209 switch (port) { 1210 case CMPCI_MIC_VOL: 1211 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_MIC, 1212 CMPCI_ADJUST_MIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1213 return; 1214 case CMPCI_MASTER_VOL: 1215 src = CMPCI_SB16_MIXER_MASTER_L; 1216 break; 1217 case CMPCI_LINE_IN_VOL: 1218 src = CMPCI_SB16_MIXER_LINE_L; 1219 break; 1220 case CMPCI_AUX_IN_VOL: 1221 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MIXER_AUX, 1222 CMPCI_ADJUST_AUX_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT], 1223 sc->sc_gain[port][CMPCI_RIGHT])); 1224 return; 1225 case CMPCI_MIC_RECVOL: 1226 cmpci_reg_partial_write_1(sc, CMPCI_REG_MIXER25, 1227 CMPCI_REG_ADMIC_SHIFT, CMPCI_REG_ADMIC_MASK, 1228 CMPCI_ADJUST_ADMIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1229 return; 1230 case CMPCI_DAC_VOL: 1231 src = CMPCI_SB16_MIXER_VOICE_L; 1232 break; 1233 case CMPCI_FM_VOL: 1234 src = CMPCI_SB16_MIXER_FM_L; 1235 break; 1236 case CMPCI_CD_VOL: 1237 src = CMPCI_SB16_MIXER_CDDA_L; 1238 break; 1239 case CMPCI_PCSPEAKER: 1240 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_SPEAKER, 1241 CMPCI_ADJUST_2_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1242 return; 1243 case CMPCI_MIC_PREAMP: 1244 if (sc->sc_gain[port][CMPCI_LR]) 1245 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1246 CMPCI_REG_MICGAINZ); 1247 else 1248 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1249 CMPCI_REG_MICGAINZ); 1250 return; 1251 1252 case CMPCI_DAC_MUTE: 1253 if (sc->sc_gain[port][CMPCI_LR]) 1254 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1255 CMPCI_REG_WSMUTE); 1256 else 1257 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1258 CMPCI_REG_WSMUTE); 1259 return; 1260 case CMPCI_FM_MUTE: 1261 if (sc->sc_gain[port][CMPCI_LR]) 1262 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1263 CMPCI_REG_FMMUTE); 1264 else 1265 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1266 CMPCI_REG_FMMUTE); 1267 return; 1268 case CMPCI_AUX_IN_MUTE: 1269 if (sc->sc_gain[port][CMPCI_LR]) 1270 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1271 CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM); 1272 else 1273 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1274 CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM); 1275 return; 1276 case CMPCI_CD_MUTE: 1277 mask = CMPCI_SB16_SW_CD; 1278 goto sbmute; 1279 case CMPCI_MIC_MUTE: 1280 mask = CMPCI_SB16_SW_MIC; 1281 goto sbmute; 1282 case CMPCI_LINE_IN_MUTE: 1283 mask = CMPCI_SB16_SW_LINE; 1284 sbmute: 1285 bits = cmpci_mixerreg_read(sc, CMPCI_SB16_MIXER_OUTMIX); 1286 if (sc->sc_gain[port][CMPCI_LR]) 1287 bits = bits & ~mask; 1288 else 1289 bits = bits | mask; 1290 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, bits); 1291 return; 1292 1293 case CMPCI_SPDIF_IN_SELECT: 1294 case CMPCI_MONITOR_DAC: 1295 case CMPCI_PLAYBACK_MODE: 1296 case CMPCI_SPDIF_LOOP: 1297 case CMPCI_SPDIF_OUT_PLAYBACK: 1298 cmpci_set_out_ports(sc); 1299 return; 1300 case CMPCI_SPDIF_OUT_VOLTAGE: 1301 if (CMPCI_ISCAP(sc, SPDOUT_VOLTAGE)) { 1302 if (sc->sc_gain[CMPCI_SPDIF_OUT_VOLTAGE][CMPCI_LR] 1303 == CMPCI_SPDIF_OUT_VOLTAGE_HIGH) 1304 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_5V); 1305 else 1306 cmpci_reg_set_reg_misc(sc, CMPCI_REG_5V); 1307 } 1308 return; 1309 case CMPCI_SURROUND: 1310 if (CMPCI_ISCAP(sc, SURROUND)) { 1311 if (sc->sc_gain[CMPCI_SURROUND][CMPCI_LR]) 1312 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1313 CMPCI_REG_SURROUND); 1314 else 1315 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1316 CMPCI_REG_SURROUND); 1317 } 1318 return; 1319 case CMPCI_REAR: 1320 if (CMPCI_ISCAP(sc, REAR)) { 1321 if (sc->sc_gain[CMPCI_REAR][CMPCI_LR]) 1322 cmpci_reg_set_reg_misc(sc, CMPCI_REG_N4SPK3D); 1323 else 1324 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_N4SPK3D); 1325 } 1326 return; 1327 case CMPCI_INDIVIDUAL: 1328 if (CMPCI_ISCAP(sc, INDIVIDUAL_REAR)) { 1329 if (sc->sc_gain[CMPCI_REAR][CMPCI_LR]) 1330 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1331 CMPCI_REG_INDIVIDUAL); 1332 else 1333 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1334 CMPCI_REG_INDIVIDUAL); 1335 } 1336 return; 1337 case CMPCI_REVERSE: 1338 if (CMPCI_ISCAP(sc, REVERSE_FR)) { 1339 if (sc->sc_gain[CMPCI_REVERSE][CMPCI_LR]) 1340 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1341 CMPCI_REG_REVERSE_FR); 1342 else 1343 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1344 CMPCI_REG_REVERSE_FR); 1345 } 1346 return; 1347 case CMPCI_SPDIF_IN_PHASE: 1348 if (CMPCI_ISCAP(sc, SPDIN_PHASE)) { 1349 if (sc->sc_gain[CMPCI_SPDIF_IN_PHASE][CMPCI_LR] 1350 == CMPCI_SPDIF_IN_PHASE_POSITIVE) 1351 cmpci_reg_clear_1(sc, CMPCI_REG_CHANNEL_FORMAT, 1352 CMPCI_REG_SPDIN_PHASE); 1353 else 1354 cmpci_reg_set_1(sc, CMPCI_REG_CHANNEL_FORMAT, 1355 CMPCI_REG_SPDIN_PHASE); 1356 } 1357 return; 1358 default: 1359 return; 1360 } 1361 1362 cmpci_mixerreg_write(sc, src, 1363 CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT])); 1364 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_L_TO_R(src), 1365 CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_RIGHT])); 1366 } 1367 1368 static void 1369 cmpci_set_out_ports(sc) 1370 struct cmpci_softc *sc; 1371 { 1372 u_int8_t v; 1373 int enspdout = 0; 1374 1375 if (!CMPCI_ISCAP(sc, SPDLOOP)) 1376 return; 1377 1378 /* SPDIF/out select */ 1379 if (sc->sc_gain[CMPCI_SPDIF_LOOP][CMPCI_LR] == CMPCI_SPDIF_LOOP_OFF) { 1380 /* playback */ 1381 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP); 1382 } else { 1383 /* monitor SPDIF/in */ 1384 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP); 1385 } 1386 1387 /* SPDIF in select */ 1388 v = sc->sc_gain[CMPCI_SPDIF_IN_SELECT][CMPCI_LR]; 1389 if (v & CMPCI_SPDIFIN_SPDIFIN2) 1390 cmpci_reg_set_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN); 1391 else 1392 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN); 1393 if (v & CMPCI_SPDIFIN_SPDIFOUT) 1394 cmpci_reg_set_reg_misc(sc, CMPCI_REG_SPDFLOOPI); 1395 else 1396 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPDFLOOPI); 1397 1398 /* playback to ... */ 1399 if (CMPCI_ISCAP(sc, SPDOUT) && 1400 sc->sc_gain[CMPCI_PLAYBACK_MODE][CMPCI_LR] 1401 == CMPCI_PLAYBACK_MODE_SPDIF && 1402 (sc->sc_play.md_divide == CMPCI_REG_RATE_44100 || 1403 (CMPCI_ISCAP(sc, SPDOUT_48K) && 1404 sc->sc_play.md_divide==CMPCI_REG_RATE_48000))) { 1405 /* playback to SPDIF */ 1406 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE); 1407 enspdout = 1; 1408 if (sc->sc_play.md_divide==CMPCI_REG_RATE_48000) 1409 cmpci_reg_set_reg_misc(sc, 1410 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1411 else 1412 cmpci_reg_clear_reg_misc(sc, 1413 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1414 } else { 1415 /* playback to DAC */ 1416 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, 1417 CMPCI_REG_SPDIF0_ENABLE); 1418 if (CMPCI_ISCAP(sc, SPDOUT_48K)) 1419 cmpci_reg_clear_reg_misc(sc, 1420 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1421 } 1422 1423 /* legacy to SPDIF/out or not */ 1424 if (CMPCI_ISCAP(sc, SPDLEGACY)) { 1425 if (sc->sc_gain[CMPCI_SPDIF_OUT_PLAYBACK][CMPCI_LR] 1426 == CMPCI_SPDIF_OUT_PLAYBACK_WAVE) 1427 cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL, 1428 CMPCI_REG_LEGACY_SPDIF_ENABLE); 1429 else { 1430 cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL, 1431 CMPCI_REG_LEGACY_SPDIF_ENABLE); 1432 enspdout = 1; 1433 } 1434 } 1435 1436 /* enable/disable SPDIF/out */ 1437 if (CMPCI_ISCAP(sc, XSPDOUT) && enspdout) 1438 cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL, 1439 CMPCI_REG_XSPDIF_ENABLE); 1440 else 1441 cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL, 1442 CMPCI_REG_XSPDIF_ENABLE); 1443 1444 /* SPDIF monitor (digital to analog output) */ 1445 if (CMPCI_ISCAP(sc, SPDIN_MONITOR)) { 1446 v = sc->sc_gain[CMPCI_MONITOR_DAC][CMPCI_LR]; 1447 if (!(v & CMPCI_MONDAC_ENABLE)) 1448 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1449 CMPCI_REG_SPDIN_MONITOR); 1450 if (v & CMPCI_MONDAC_SPDOUT) 1451 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, 1452 CMPCI_REG_SPDIFOUT_DAC); 1453 else 1454 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, 1455 CMPCI_REG_SPDIFOUT_DAC); 1456 if (v & CMPCI_MONDAC_ENABLE) 1457 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1458 CMPCI_REG_SPDIN_MONITOR); 1459 } 1460 } 1461 1462 static int 1463 cmpci_set_in_ports(sc) 1464 struct cmpci_softc *sc; 1465 { 1466 int mask; 1467 int bitsl, bitsr; 1468 1469 mask = sc->sc_in_mask; 1470 1471 /* 1472 * Note CMPCI_RECORD_SOURCE_CD, CMPCI_RECORD_SOURCE_LINE_IN and 1473 * CMPCI_RECORD_SOURCE_FM are defined to the corresponding bit 1474 * of the mixer register. 1475 */ 1476 bitsr = mask & (CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN | 1477 CMPCI_RECORD_SOURCE_FM); 1478 1479 bitsl = CMPCI_SB16_MIXER_SRC_R_TO_L(bitsr); 1480 if (mask & CMPCI_RECORD_SOURCE_MIC) { 1481 bitsl |= CMPCI_SB16_MIXER_MIC_SRC; 1482 bitsr |= CMPCI_SB16_MIXER_MIC_SRC; 1483 } 1484 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, bitsl); 1485 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, bitsr); 1486 1487 if (mask & CMPCI_RECORD_SOURCE_AUX_IN) 1488 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1489 CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN); 1490 else 1491 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1492 CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN); 1493 1494 if (mask & CMPCI_RECORD_SOURCE_WAVE) 1495 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1496 CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR); 1497 else 1498 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1499 CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR); 1500 1501 if (CMPCI_ISCAP(sc, SPDIN) && 1502 (sc->sc_rec.md_divide == CMPCI_REG_RATE_44100 || 1503 (CMPCI_ISCAP(sc, SPDOUT_48K) && 1504 sc->sc_rec.md_divide == CMPCI_REG_RATE_48000/* XXX? */))) { 1505 if (mask & CMPCI_RECORD_SOURCE_SPDIF) { 1506 /* enable SPDIF/in */ 1507 cmpci_reg_set_4(sc, 1508 CMPCI_REG_FUNC_1, 1509 CMPCI_REG_SPDIF1_ENABLE); 1510 } else { 1511 cmpci_reg_clear_4(sc, 1512 CMPCI_REG_FUNC_1, 1513 CMPCI_REG_SPDIF1_ENABLE); 1514 } 1515 } 1516 1517 return 0; 1518 } 1519 1520 static int 1521 cmpci_set_port(handle, cp) 1522 void *handle; 1523 mixer_ctrl_t *cp; 1524 { 1525 struct cmpci_softc *sc = handle; 1526 int lgain, rgain; 1527 1528 switch (cp->dev) { 1529 case CMPCI_MIC_VOL: 1530 case CMPCI_PCSPEAKER: 1531 case CMPCI_MIC_RECVOL: 1532 if (cp->un.value.num_channels != 1) 1533 return EINVAL; 1534 /* FALLTHROUGH */ 1535 case CMPCI_DAC_VOL: 1536 case CMPCI_FM_VOL: 1537 case CMPCI_CD_VOL: 1538 case CMPCI_LINE_IN_VOL: 1539 case CMPCI_AUX_IN_VOL: 1540 case CMPCI_MASTER_VOL: 1541 if (cp->type != AUDIO_MIXER_VALUE) 1542 return EINVAL; 1543 switch (cp->un.value.num_channels) { 1544 case 1: 1545 lgain = rgain = 1546 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]; 1547 break; 1548 case 2: 1549 lgain = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]; 1550 rgain = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]; 1551 break; 1552 default: 1553 return EINVAL; 1554 } 1555 sc->sc_gain[cp->dev][CMPCI_LEFT] = lgain; 1556 sc->sc_gain[cp->dev][CMPCI_RIGHT] = rgain; 1557 1558 cmpci_set_mixer_gain(sc, cp->dev); 1559 break; 1560 1561 case CMPCI_RECORD_SOURCE: 1562 if (cp->type != AUDIO_MIXER_SET) 1563 return EINVAL; 1564 1565 if (cp->un.mask & ~(CMPCI_RECORD_SOURCE_MIC | 1566 CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN | 1567 CMPCI_RECORD_SOURCE_AUX_IN | CMPCI_RECORD_SOURCE_WAVE | 1568 CMPCI_RECORD_SOURCE_FM | CMPCI_RECORD_SOURCE_SPDIF)) 1569 return EINVAL; 1570 1571 if (cp->un.mask & CMPCI_RECORD_SOURCE_SPDIF) 1572 cp->un.mask = CMPCI_RECORD_SOURCE_SPDIF; 1573 1574 sc->sc_in_mask = cp->un.mask; 1575 return cmpci_set_in_ports(sc); 1576 1577 /* boolean */ 1578 case CMPCI_DAC_MUTE: 1579 case CMPCI_FM_MUTE: 1580 case CMPCI_CD_MUTE: 1581 case CMPCI_LINE_IN_MUTE: 1582 case CMPCI_AUX_IN_MUTE: 1583 case CMPCI_MIC_MUTE: 1584 case CMPCI_MIC_PREAMP: 1585 case CMPCI_PLAYBACK_MODE: 1586 case CMPCI_SPDIF_IN_PHASE: 1587 case CMPCI_SPDIF_LOOP: 1588 case CMPCI_SPDIF_OUT_PLAYBACK: 1589 case CMPCI_SPDIF_OUT_VOLTAGE: 1590 case CMPCI_REAR: 1591 case CMPCI_INDIVIDUAL: 1592 case CMPCI_REVERSE: 1593 case CMPCI_SURROUND: 1594 if (cp->type != AUDIO_MIXER_ENUM) 1595 return EINVAL; 1596 sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord != 0; 1597 cmpci_set_mixer_gain(sc, cp->dev); 1598 break; 1599 1600 case CMPCI_SPDIF_IN_SELECT: 1601 switch (cp->un.ord) { 1602 case CMPCI_SPDIF_IN_SPDIN1: 1603 case CMPCI_SPDIF_IN_SPDIN2: 1604 case CMPCI_SPDIF_IN_SPDOUT: 1605 break; 1606 default: 1607 return EINVAL; 1608 } 1609 goto xenum; 1610 case CMPCI_MONITOR_DAC: 1611 switch (cp->un.ord) { 1612 case CMPCI_MONITOR_DAC_OFF: 1613 case CMPCI_MONITOR_DAC_SPDIN: 1614 case CMPCI_MONITOR_DAC_SPDOUT: 1615 break; 1616 default: 1617 return EINVAL; 1618 } 1619 xenum: 1620 if (cp->type != AUDIO_MIXER_ENUM) 1621 return EINVAL; 1622 sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord; 1623 cmpci_set_mixer_gain(sc, cp->dev); 1624 break; 1625 1626 default: 1627 return EINVAL; 1628 } 1629 1630 return 0; 1631 } 1632 1633 static int 1634 cmpci_get_port(handle, cp) 1635 void *handle; 1636 mixer_ctrl_t *cp; 1637 { 1638 struct cmpci_softc *sc = handle; 1639 1640 switch (cp->dev) { 1641 case CMPCI_MIC_VOL: 1642 case CMPCI_PCSPEAKER: 1643 case CMPCI_MIC_RECVOL: 1644 if (cp->un.value.num_channels != 1) 1645 return EINVAL; 1646 /*FALLTHROUGH*/ 1647 case CMPCI_DAC_VOL: 1648 case CMPCI_FM_VOL: 1649 case CMPCI_CD_VOL: 1650 case CMPCI_LINE_IN_VOL: 1651 case CMPCI_AUX_IN_VOL: 1652 case CMPCI_MASTER_VOL: 1653 switch (cp->un.value.num_channels) { 1654 case 1: 1655 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = 1656 sc->sc_gain[cp->dev][CMPCI_LEFT]; 1657 break; 1658 case 2: 1659 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 1660 sc->sc_gain[cp->dev][CMPCI_LEFT]; 1661 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 1662 sc->sc_gain[cp->dev][CMPCI_RIGHT]; 1663 break; 1664 default: 1665 return EINVAL; 1666 } 1667 break; 1668 1669 case CMPCI_RECORD_SOURCE: 1670 cp->un.mask = sc->sc_in_mask; 1671 break; 1672 1673 case CMPCI_DAC_MUTE: 1674 case CMPCI_FM_MUTE: 1675 case CMPCI_CD_MUTE: 1676 case CMPCI_LINE_IN_MUTE: 1677 case CMPCI_AUX_IN_MUTE: 1678 case CMPCI_MIC_MUTE: 1679 case CMPCI_MIC_PREAMP: 1680 case CMPCI_PLAYBACK_MODE: 1681 case CMPCI_SPDIF_IN_SELECT: 1682 case CMPCI_SPDIF_IN_PHASE: 1683 case CMPCI_SPDIF_LOOP: 1684 case CMPCI_SPDIF_OUT_PLAYBACK: 1685 case CMPCI_SPDIF_OUT_VOLTAGE: 1686 case CMPCI_MONITOR_DAC: 1687 case CMPCI_REAR: 1688 case CMPCI_INDIVIDUAL: 1689 case CMPCI_REVERSE: 1690 case CMPCI_SURROUND: 1691 cp->un.ord = sc->sc_gain[cp->dev][CMPCI_LR]; 1692 break; 1693 1694 default: 1695 return EINVAL; 1696 } 1697 1698 return 0; 1699 } 1700 1701 /* ARGSUSED */ 1702 static size_t 1703 cmpci_round_buffersize(handle, direction, bufsize) 1704 void *handle; 1705 int direction; 1706 size_t bufsize; 1707 { 1708 if (bufsize > 0x10000) 1709 bufsize = 0x10000; 1710 1711 return bufsize; 1712 } 1713 1714 1715 static paddr_t 1716 cmpci_mappage(handle, addr, offset, prot) 1717 void *handle; 1718 void *addr; 1719 off_t offset; 1720 int prot; 1721 { 1722 struct cmpci_softc *sc = handle; 1723 struct cmpci_dmanode *p; 1724 1725 if (offset < 0 || NULL == (p = cmpci_find_dmamem(sc, addr))) 1726 return -1; 1727 1728 return bus_dmamem_mmap(p->cd_tag, p->cd_segs, 1729 sizeof(p->cd_segs)/sizeof(p->cd_segs[0]), 1730 offset, prot, BUS_DMA_WAITOK); 1731 } 1732 1733 1734 /* ARGSUSED */ 1735 static int 1736 cmpci_get_props(handle) 1737 void *handle; 1738 { 1739 return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 1740 } 1741 1742 1743 static int 1744 cmpci_trigger_output(handle, start, end, blksize, intr, arg, param) 1745 void *handle; 1746 void *start, *end; 1747 int blksize; 1748 void (*intr) __P((void *)); 1749 void *arg; 1750 const audio_params_t *param; 1751 { 1752 struct cmpci_softc *sc = handle; 1753 struct cmpci_dmanode *p; 1754 int bps; 1755 1756 sc->sc_play.intr = intr; 1757 sc->sc_play.intr_arg = arg; 1758 bps = param->channels * param->precision / 8; 1759 if (!bps) 1760 return EINVAL; 1761 1762 /* set DMA frame */ 1763 if (!(p = cmpci_find_dmamem(sc, start))) 1764 return EINVAL; 1765 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BASE, 1766 DMAADDR(p)); 1767 delay(10); 1768 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BYTES, 1769 ((caddr_t)end - (caddr_t)start + 1) / bps - 1); 1770 delay(10); 1771 1772 /* set interrupt count */ 1773 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_SAMPLES, 1774 (blksize + bps - 1) / bps - 1); 1775 delay(10); 1776 1777 /* start DMA */ 1778 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); /* PLAY */ 1779 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 1780 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); 1781 1782 return 0; 1783 } 1784 1785 static int 1786 cmpci_trigger_input(handle, start, end, blksize, intr, arg, param) 1787 void *handle; 1788 void *start, *end; 1789 int blksize; 1790 void (*intr) __P((void *)); 1791 void *arg; 1792 const audio_params_t *param; 1793 { 1794 struct cmpci_softc *sc = handle; 1795 struct cmpci_dmanode *p; 1796 int bps; 1797 1798 sc->sc_rec.intr = intr; 1799 sc->sc_rec.intr_arg = arg; 1800 bps = param->channels * param->precision / 8; 1801 if (!bps) 1802 return EINVAL; 1803 1804 /* set DMA frame */ 1805 if (!(p=cmpci_find_dmamem(sc, start))) 1806 return EINVAL; 1807 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BASE, 1808 DMAADDR(p)); 1809 delay(10); 1810 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BYTES, 1811 ((caddr_t)end - (caddr_t)start + 1) / bps - 1); 1812 delay(10); 1813 1814 /* set interrupt count */ 1815 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_SAMPLES, 1816 (blksize + bps - 1) / bps - 1); 1817 delay(10); 1818 1819 /* start DMA */ 1820 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_DIR); /* REC */ 1821 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 1822 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); 1823 1824 return 0; 1825 } 1826 1827 1828 /* end of file */ 1829
Indexes created Sat Sep 27 14:09:57 GMT 2025