cmpci.c revision 1.34.6.1
1 /* $NetBSD: cmpci.c,v 1.34.6.1 2007/02/27 14:16:19 ad Exp $ */ 2 3 /* 4 * Copyright (c) 2000, 2001, 2007 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Takuya SHIOZAKI <tshiozak (at) NetBSD.org> . 9 * 10 * This code is derived from software contributed to The NetBSD Foundation 11 * by ITOH Yasufumi. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 /* 37 * C-Media CMI8x38 Audio Chip Support. 38 * 39 * TODO: 40 * - 4ch / 6ch support. 41 * - Joystick support. 42 * 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: cmpci.c,v 1.34.6.1 2007/02/27 14:16:19 ad Exp $"); 47 48 #if defined(AUDIO_DEBUG) || defined(DEBUG) 49 #define DPRINTF(x) if (cmpcidebug) printf x 50 int cmpcidebug = 0; 51 #else 52 #define DPRINTF(x) 53 #endif 54 55 #include "mpu.h" 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/kernel.h> 60 #include <sys/malloc.h> 61 #include <sys/device.h> 62 #include <sys/proc.h> 63 64 #include <dev/pci/pcidevs.h> 65 #include <dev/pci/pcivar.h> 66 67 #include <sys/audioio.h> 68 #include <dev/audio_if.h> 69 #include <dev/midi_if.h> 70 71 #include <dev/mulaw.h> 72 #include <dev/auconv.h> 73 #include <dev/pci/cmpcireg.h> 74 #include <dev/pci/cmpcivar.h> 75 76 #include <dev/ic/mpuvar.h> 77 #include <machine/bus.h> 78 #include <machine/intr.h> 79 80 /* 81 * Low-level HW interface 82 */ 83 static inline uint8_t cmpci_mixerreg_read(struct cmpci_softc *, uint8_t); 84 static inline void cmpci_mixerreg_write(struct cmpci_softc *, 85 uint8_t, uint8_t); 86 static inline void cmpci_reg_partial_write_1(struct cmpci_softc *, int, int, 87 unsigned, unsigned); 88 static inline void cmpci_reg_partial_write_4(struct cmpci_softc *, int, int, 89 uint32_t, uint32_t); 90 static inline void cmpci_reg_set_1(struct cmpci_softc *, int, uint8_t); 91 static inline void cmpci_reg_clear_1(struct cmpci_softc *, int, uint8_t); 92 static inline void cmpci_reg_set_4(struct cmpci_softc *, int, uint32_t); 93 static inline void cmpci_reg_clear_4(struct cmpci_softc *, int, uint32_t); 94 static inline void cmpci_reg_set_reg_misc(struct cmpci_softc *, uint32_t); 95 static inline void cmpci_reg_clear_reg_misc(struct cmpci_softc *, uint32_t); 96 static int cmpci_rate_to_index(int); 97 static inline int cmpci_index_to_rate(int); 98 static inline int cmpci_index_to_divider(int); 99 100 static int cmpci_adjust(int, int); 101 static void cmpci_set_mixer_gain(struct cmpci_softc *, int); 102 static void cmpci_set_out_ports(struct cmpci_softc *); 103 static int cmpci_set_in_ports(struct cmpci_softc *); 104 105 106 /* 107 * autoconf interface 108 */ 109 static int cmpci_match(struct device *, struct cfdata *, void *); 110 static void cmpci_attach(struct device *, struct device *, void *); 111 112 CFATTACH_DECL(cmpci, sizeof (struct cmpci_softc), 113 cmpci_match, cmpci_attach, NULL, NULL); 114 115 /* interrupt */ 116 static int cmpci_intr(void *); 117 118 119 /* 120 * DMA stuffs 121 */ 122 static int cmpci_alloc_dmamem(struct cmpci_softc *, size_t, 123 struct malloc_type *, int, caddr_t *); 124 static int cmpci_free_dmamem(struct cmpci_softc *, caddr_t, 125 struct malloc_type *); 126 static struct cmpci_dmanode * cmpci_find_dmamem(struct cmpci_softc *, 127 caddr_t); 128 129 130 /* 131 * interface to machine independent layer 132 */ 133 static int cmpci_query_encoding(void *, struct audio_encoding *); 134 static int cmpci_set_params(void *, int, int, audio_params_t *, 135 audio_params_t *, stream_filter_list_t *, stream_filter_list_t *); 136 static int cmpci_round_blocksize(void *, int, int, const audio_params_t *); 137 static int cmpci_halt_output(void *); 138 static int cmpci_halt_input(void *); 139 static int cmpci_getdev(void *, struct audio_device *); 140 static int cmpci_set_port(void *, mixer_ctrl_t *); 141 static int cmpci_get_port(void *, mixer_ctrl_t *); 142 static int cmpci_query_devinfo(void *, mixer_devinfo_t *); 143 static void *cmpci_allocm(void *, int, size_t, struct malloc_type *, int); 144 static void cmpci_freem(void *, void *, struct malloc_type *); 145 static size_t cmpci_round_buffersize(void *, int, size_t); 146 static paddr_t cmpci_mappage(void *, void *, off_t, int); 147 static int cmpci_get_props(void *); 148 static int cmpci_trigger_output(void *, void *, void *, int, 149 void (*)(void *), void *, const audio_params_t *); 150 static int cmpci_trigger_input(void *, void *, void *, int, 151 void (*)(void *), void *, const audio_params_t *); 152 153 static void cmpci_get_locks(void *, kmutex_t **, kmutex_t **); 154 155 static const struct audio_hw_if cmpci_hw_if = { 156 NULL, /* open */ 157 NULL, /* close */ 158 NULL, /* drain */ 159 cmpci_query_encoding, /* query_encoding */ 160 cmpci_set_params, /* set_params */ 161 cmpci_round_blocksize, /* round_blocksize */ 162 NULL, /* commit_settings */ 163 NULL, /* init_output */ 164 NULL, /* init_input */ 165 NULL, /* start_output */ 166 NULL, /* start_input */ 167 cmpci_halt_output, /* halt_output */ 168 cmpci_halt_input, /* halt_input */ 169 NULL, /* speaker_ctl */ 170 cmpci_getdev, /* getdev */ 171 NULL, /* setfd */ 172 cmpci_set_port, /* set_port */ 173 cmpci_get_port, /* get_port */ 174 cmpci_query_devinfo, /* query_devinfo */ 175 cmpci_allocm, /* allocm */ 176 cmpci_freem, /* freem */ 177 cmpci_round_buffersize,/* round_buffersize */ 178 cmpci_mappage, /* mappage */ 179 cmpci_get_props, /* get_props */ 180 cmpci_trigger_output, /* trigger_output */ 181 cmpci_trigger_input, /* trigger_input */ 182 NULL, /* dev_ioctl */ 183 NULL, /* powerstate */ 184 cmpci_get_locks, /* get_locks */ 185 }; 186 187 #define CMPCI_NFORMATS 4 188 static const struct audio_format cmpci_formats[CMPCI_NFORMATS] = { 189 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 190 2, AUFMT_STEREO, 0, {5512, 48000}}, 191 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 192 1, AUFMT_MONAURAL, 0, {5512, 48000}}, 193 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8, 194 2, AUFMT_STEREO, 0, {5512, 48000}}, 195 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8, 196 1, AUFMT_MONAURAL, 0, {5512, 48000}}, 197 }; 198 199 200 /* 201 * Low-level HW interface 202 */ 203 204 /* mixer register read/write */ 205 static inline uint8_t 206 cmpci_mixerreg_read(struct cmpci_softc *sc, uint8_t no) 207 { 208 uint8_t ret; 209 210 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no); 211 delay(10); 212 ret = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA); 213 delay(10); 214 return ret; 215 } 216 217 static inline void 218 cmpci_mixerreg_write(struct cmpci_softc *sc, uint8_t no, uint8_t val) 219 { 220 221 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no); 222 delay(10); 223 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA, val); 224 delay(10); 225 } 226 227 228 /* register partial write */ 229 static inline void 230 cmpci_reg_partial_write_1(struct cmpci_softc *sc, int no, int shift, 231 unsigned mask, unsigned val) 232 { 233 234 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 235 (val<<shift) | 236 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift))); 237 delay(10); 238 } 239 240 static inline void 241 cmpci_reg_partial_write_4(struct cmpci_softc *sc, int no, int shift, 242 uint32_t mask, uint32_t val) 243 { 244 245 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 246 (val<<shift) | 247 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift))); 248 delay(10); 249 } 250 251 /* register set/clear bit */ 252 static inline void 253 cmpci_reg_set_1(struct cmpci_softc *sc, int no, uint8_t mask) 254 { 255 256 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 257 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) | mask)); 258 delay(10); 259 } 260 261 static inline void 262 cmpci_reg_clear_1(struct cmpci_softc *sc, int no, uint8_t mask) 263 { 264 265 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 266 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~mask)); 267 delay(10); 268 } 269 270 static inline void 271 cmpci_reg_set_4(struct cmpci_softc *sc, int no, uint32_t mask) 272 { 273 274 /* use cmpci_reg_set_reg_misc() for CMPCI_REG_MISC */ 275 KDASSERT(no != CMPCI_REG_MISC); 276 277 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 278 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) | mask)); 279 delay(10); 280 } 281 282 static inline void 283 cmpci_reg_clear_4(struct cmpci_softc *sc, int no, uint32_t mask) 284 { 285 286 /* use cmpci_reg_clear_reg_misc() for CMPCI_REG_MISC */ 287 KDASSERT(no != CMPCI_REG_MISC); 288 289 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 290 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~mask)); 291 delay(10); 292 } 293 294 /* 295 * The CMPCI_REG_MISC register needs special handling, since one of 296 * its bits has different read/write values. 297 */ 298 static inline void 299 cmpci_reg_set_reg_misc(struct cmpci_softc *sc, uint32_t mask) 300 { 301 302 sc->sc_reg_misc |= mask; 303 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC, 304 sc->sc_reg_misc); 305 delay(10); 306 } 307 308 static inline void 309 cmpci_reg_clear_reg_misc(struct cmpci_softc *sc, uint32_t mask) 310 { 311 312 sc->sc_reg_misc &= ~mask; 313 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC, 314 sc->sc_reg_misc); 315 delay(10); 316 } 317 318 /* rate */ 319 static const struct { 320 int rate; 321 int divider; 322 } cmpci_rate_table[CMPCI_REG_NUMRATE] = { 323 #define _RATE(n) { n, CMPCI_REG_RATE_ ## n } 324 _RATE(5512), 325 _RATE(8000), 326 _RATE(11025), 327 _RATE(16000), 328 _RATE(22050), 329 _RATE(32000), 330 _RATE(44100), 331 _RATE(48000) 332 #undef _RATE 333 }; 334 335 static int 336 cmpci_rate_to_index(int rate) 337 { 338 int i; 339 340 for (i = 0; i < CMPCI_REG_NUMRATE - 1; i++) 341 if (rate <= 342 (cmpci_rate_table[i].rate+cmpci_rate_table[i+1].rate) / 2) 343 return i; 344 return i; /* 48000 */ 345 } 346 347 static inline int 348 cmpci_index_to_rate(int index) 349 { 350 351 return cmpci_rate_table[index].rate; 352 } 353 354 static inline int 355 cmpci_index_to_divider(int index) 356 { 357 358 return cmpci_rate_table[index].divider; 359 } 360 361 /* 362 * interface to configure the device. 363 */ 364 static int 365 cmpci_match(struct device *parent, struct cfdata *match, 366 void *aux) 367 { 368 struct pci_attach_args *pa; 369 370 pa = (struct pci_attach_args *)aux; 371 if ( PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CMEDIA && 372 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338A || 373 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338B || 374 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738 || 375 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738B) ) 376 return 1; 377 378 return 0; 379 } 380 381 static void 382 cmpci_attach(struct device *parent, struct device *self, void *aux) 383 { 384 struct cmpci_softc *sc; 385 struct pci_attach_args *pa; 386 struct audio_attach_args aa; 387 pci_intr_handle_t ih; 388 char const *strintr; 389 char devinfo[256]; 390 int i, v; 391 392 sc = (struct cmpci_softc *)self; 393 pa = (struct pci_attach_args *)aux; 394 aprint_naive(": Audio controller\n"); 395 396 sc->sc_id = pa->pa_id; 397 sc->sc_class = pa->pa_class; 398 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 399 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, 400 PCI_REVISION(sc->sc_class)); 401 switch (PCI_PRODUCT(sc->sc_id)) { 402 case PCI_PRODUCT_CMEDIA_CMI8338A: 403 /*FALLTHROUGH*/ 404 case PCI_PRODUCT_CMEDIA_CMI8338B: 405 sc->sc_capable = CMPCI_CAP_CMI8338; 406 break; 407 case PCI_PRODUCT_CMEDIA_CMI8738: 408 /*FALLTHROUGH*/ 409 case PCI_PRODUCT_CMEDIA_CMI8738B: 410 sc->sc_capable = CMPCI_CAP_CMI8738; 411 break; 412 } 413 414 /* map I/O space */ 415 if (pci_mapreg_map(pa, CMPCI_PCI_IOBASEREG, PCI_MAPREG_TYPE_IO, 0, 416 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 417 aprint_error("%s: failed to map I/O space\n", 418 sc->sc_dev.dv_xname); 419 return; 420 } 421 422 mutex_init(&sc->sc_lock, MUTEX_DRIVER, IPL_NONE); 423 mutex_init(&sc->sc_intr_lock, MUTEX_DRIVER, IPL_AUDIO); 424 425 /* interrupt */ 426 if (pci_intr_map(pa, &ih)) { 427 aprint_error("%s: failed to map interrupt\n", 428 sc->sc_dev.dv_xname); 429 return; 430 } 431 strintr = pci_intr_string(pa->pa_pc, ih); 432 sc->sc_ih=pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, cmpci_intr, sc); 433 if (sc->sc_ih == NULL) { 434 aprint_error("%s: failed to establish interrupt", 435 sc->sc_dev.dv_xname); 436 if (strintr != NULL) 437 aprint_normal(" at %s", strintr); 438 aprint_normal("\n"); 439 return; 440 } 441 aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, strintr); 442 443 sc->sc_dmat = pa->pa_dmat; 444 445 audio_attach_mi(&cmpci_hw_if, sc, &sc->sc_dev); 446 447 /* attach OPL device */ 448 aa.type = AUDIODEV_TYPE_OPL; 449 aa.hwif = NULL; 450 aa.hdl = NULL; 451 (void)config_found(&sc->sc_dev, &aa, audioprint); 452 453 /* attach MPU-401 device */ 454 aa.type = AUDIODEV_TYPE_MPU; 455 aa.hwif = NULL; 456 aa.hdl = NULL; 457 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh, 458 CMPCI_REG_MPU_BASE, CMPCI_REG_MPU_SIZE, &sc->sc_mpu_ioh) == 0) 459 sc->sc_mpudev = config_found(&sc->sc_dev, &aa, audioprint); 460 461 /* get initial value (this is 0 and may be omitted but just in case) */ 462 sc->sc_reg_misc = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 463 CMPCI_REG_MISC) & ~CMPCI_REG_SPDIF48K; 464 465 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_RESET, 0); 466 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0); 467 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0); 468 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, 469 CMPCI_SB16_SW_CD|CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE); 470 for (i = 0; i < CMPCI_NDEVS; i++) { 471 switch(i) { 472 /* 473 * CMI8738 defaults are 474 * master: 0xe0 (0x00 - 0xf8) 475 * FM, DAC: 0xc0 (0x00 - 0xf8) 476 * PC speaker: 0x80 (0x00 - 0xc0) 477 * others: 0 478 */ 479 /* volume */ 480 case CMPCI_MASTER_VOL: 481 v = 128; /* 224 */ 482 break; 483 case CMPCI_FM_VOL: 484 case CMPCI_DAC_VOL: 485 v = 192; 486 break; 487 case CMPCI_PCSPEAKER: 488 v = 128; 489 break; 490 491 /* booleans, set to true */ 492 case CMPCI_CD_MUTE: 493 case CMPCI_MIC_MUTE: 494 case CMPCI_LINE_IN_MUTE: 495 case CMPCI_AUX_IN_MUTE: 496 v = 1; 497 break; 498 499 /* volume with inital value 0 */ 500 case CMPCI_CD_VOL: 501 case CMPCI_LINE_IN_VOL: 502 case CMPCI_AUX_IN_VOL: 503 case CMPCI_MIC_VOL: 504 case CMPCI_MIC_RECVOL: 505 /* FALLTHROUGH */ 506 507 /* others are cleared */ 508 case CMPCI_MIC_PREAMP: 509 case CMPCI_RECORD_SOURCE: 510 case CMPCI_PLAYBACK_MODE: 511 case CMPCI_SPDIF_IN_SELECT: 512 case CMPCI_SPDIF_IN_PHASE: 513 case CMPCI_SPDIF_LOOP: 514 case CMPCI_SPDIF_OUT_PLAYBACK: 515 case CMPCI_SPDIF_OUT_VOLTAGE: 516 case CMPCI_MONITOR_DAC: 517 case CMPCI_REAR: 518 case CMPCI_INDIVIDUAL: 519 case CMPCI_REVERSE: 520 case CMPCI_SURROUND: 521 default: 522 v = 0; 523 break; 524 } 525 sc->sc_gain[i][CMPCI_LEFT] = sc->sc_gain[i][CMPCI_RIGHT] = v; 526 cmpci_set_mixer_gain(sc, i); 527 } 528 } 529 530 static int 531 cmpci_intr(void *handle) 532 { 533 struct cmpci_softc *sc; 534 uint32_t intrstat; 535 536 sc = handle; 537 mutex_enter(&sc->sc_intr_lock); 538 539 intrstat = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 540 CMPCI_REG_INTR_STATUS); 541 542 if (!(intrstat & CMPCI_REG_ANY_INTR)) { 543 mutex_exit(&sc->sc_intr_lock); 544 return 0; 545 } 546 547 delay(10); 548 549 /* disable and reset intr */ 550 if (intrstat & CMPCI_REG_CH0_INTR) 551 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, 552 CMPCI_REG_CH0_INTR_ENABLE); 553 if (intrstat & CMPCI_REG_CH1_INTR) 554 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, 555 CMPCI_REG_CH1_INTR_ENABLE); 556 557 if (intrstat & CMPCI_REG_CH0_INTR) { 558 if (sc->sc_play.intr != NULL) 559 (*sc->sc_play.intr)(sc->sc_play.intr_arg); 560 } 561 if (intrstat & CMPCI_REG_CH1_INTR) { 562 if (sc->sc_rec.intr != NULL) 563 (*sc->sc_rec.intr)(sc->sc_rec.intr_arg); 564 } 565 566 /* enable intr */ 567 if (intrstat & CMPCI_REG_CH0_INTR) 568 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, 569 CMPCI_REG_CH0_INTR_ENABLE); 570 if (intrstat & CMPCI_REG_CH1_INTR) 571 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, 572 CMPCI_REG_CH1_INTR_ENABLE); 573 574 #if NMPU > 0 575 if (intrstat & CMPCI_REG_UART_INTR && sc->sc_mpudev != NULL) 576 mpu_intr(sc->sc_mpudev); 577 #endif 578 579 mutex_exit(&sc->sc_intr_lock); 580 return 1; 581 } 582 583 static int 584 cmpci_query_encoding(void *handle, struct audio_encoding *fp) 585 { 586 587 switch (fp->index) { 588 case 0: 589 strcpy(fp->name, AudioEulinear); 590 fp->encoding = AUDIO_ENCODING_ULINEAR; 591 fp->precision = 8; 592 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 593 break; 594 case 1: 595 strcpy(fp->name, AudioEmulaw); 596 fp->encoding = AUDIO_ENCODING_ULAW; 597 fp->precision = 8; 598 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 599 break; 600 case 2: 601 strcpy(fp->name, AudioEalaw); 602 fp->encoding = AUDIO_ENCODING_ALAW; 603 fp->precision = 8; 604 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 605 break; 606 case 3: 607 strcpy(fp->name, AudioEslinear); 608 fp->encoding = AUDIO_ENCODING_SLINEAR; 609 fp->precision = 8; 610 fp->flags = 0; 611 break; 612 case 4: 613 strcpy(fp->name, AudioEslinear_le); 614 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 615 fp->precision = 16; 616 fp->flags = 0; 617 break; 618 case 5: 619 strcpy(fp->name, AudioEulinear_le); 620 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 621 fp->precision = 16; 622 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 623 break; 624 case 6: 625 strcpy(fp->name, AudioEslinear_be); 626 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 627 fp->precision = 16; 628 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 629 break; 630 case 7: 631 strcpy(fp->name, AudioEulinear_be); 632 fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 633 fp->precision = 16; 634 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 635 break; 636 default: 637 return EINVAL; 638 } 639 return 0; 640 } 641 642 643 static int 644 cmpci_set_params(void *handle, int setmode, int usemode, 645 audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil, 646 stream_filter_list_t *rfil) 647 { 648 int i; 649 struct cmpci_softc *sc; 650 651 sc = handle; 652 for (i = 0; i < 2; i++) { 653 int md_format; 654 int md_divide; 655 int md_index; 656 int mode; 657 audio_params_t *p; 658 stream_filter_list_t *fil; 659 int ind; 660 661 switch (i) { 662 case 0: 663 mode = AUMODE_PLAY; 664 p = play; 665 fil = pfil; 666 break; 667 case 1: 668 mode = AUMODE_RECORD; 669 p = rec; 670 fil = rfil; 671 break; 672 default: 673 return EINVAL; 674 } 675 676 if (!(setmode & mode)) 677 continue; 678 679 md_index = cmpci_rate_to_index(p->sample_rate); 680 md_divide = cmpci_index_to_divider(md_index); 681 p->sample_rate = cmpci_index_to_rate(md_index); 682 DPRINTF(("%s: sample:%u, divider=%d\n", 683 sc->sc_dev.dv_xname, p->sample_rate, md_divide)); 684 685 ind = auconv_set_converter(cmpci_formats, CMPCI_NFORMATS, 686 mode, p, FALSE, fil); 687 if (ind < 0) 688 return EINVAL; 689 if (fil->req_size > 0) 690 p = &fil->filters[0].param; 691 692 /* format */ 693 md_format = p->channels == 1 694 ? CMPCI_REG_FORMAT_MONO : CMPCI_REG_FORMAT_STEREO; 695 md_format |= p->precision == 16 696 ? CMPCI_REG_FORMAT_16BIT : CMPCI_REG_FORMAT_8BIT; 697 if (mode & AUMODE_PLAY) { 698 cmpci_reg_partial_write_4(sc, 699 CMPCI_REG_CHANNEL_FORMAT, 700 CMPCI_REG_CH0_FORMAT_SHIFT, 701 CMPCI_REG_CH0_FORMAT_MASK, md_format); 702 cmpci_reg_partial_write_4(sc, 703 CMPCI_REG_FUNC_1, CMPCI_REG_DAC_FS_SHIFT, 704 CMPCI_REG_DAC_FS_MASK, md_divide); 705 sc->sc_play.md_divide = md_divide; 706 } else { 707 cmpci_reg_partial_write_4(sc, 708 CMPCI_REG_CHANNEL_FORMAT, 709 CMPCI_REG_CH1_FORMAT_SHIFT, 710 CMPCI_REG_CH1_FORMAT_MASK, md_format); 711 cmpci_reg_partial_write_4(sc, 712 CMPCI_REG_FUNC_1, CMPCI_REG_ADC_FS_SHIFT, 713 CMPCI_REG_ADC_FS_MASK, md_divide); 714 sc->sc_rec.md_divide = md_divide; 715 } 716 cmpci_set_out_ports(sc); 717 cmpci_set_in_ports(sc); 718 } 719 return 0; 720 } 721 722 /* ARGSUSED */ 723 static int 724 cmpci_round_blocksize(void *handle, int block, 725 int mode, const audio_params_t *param) 726 { 727 728 return block & -4; 729 } 730 731 static int 732 cmpci_halt_output(void *handle) 733 { 734 struct cmpci_softc *sc; 735 736 sc = handle; 737 sc->sc_play.intr = NULL; 738 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 739 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); 740 /* wait for reset DMA */ 741 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); 742 delay(10); 743 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); 744 745 return 0; 746 } 747 748 static int 749 cmpci_halt_input(void *handle) 750 { 751 struct cmpci_softc *sc; 752 753 sc = handle; 754 sc->sc_rec.intr = NULL; 755 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 756 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); 757 /* wait for reset DMA */ 758 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); 759 delay(10); 760 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); 761 762 return 0; 763 } 764 765 /* get audio device information */ 766 static int 767 cmpci_getdev(void *handle, struct audio_device *ad) 768 { 769 struct cmpci_softc *sc; 770 771 sc = handle; 772 strncpy(ad->name, "CMI PCI Audio", sizeof(ad->name)); 773 snprintf(ad->version, sizeof(ad->version), "0x%02x", 774 PCI_REVISION(sc->sc_class)); 775 switch (PCI_PRODUCT(sc->sc_id)) { 776 case PCI_PRODUCT_CMEDIA_CMI8338A: 777 strncpy(ad->config, "CMI8338A", sizeof(ad->config)); 778 break; 779 case PCI_PRODUCT_CMEDIA_CMI8338B: 780 strncpy(ad->config, "CMI8338B", sizeof(ad->config)); 781 break; 782 case PCI_PRODUCT_CMEDIA_CMI8738: 783 strncpy(ad->config, "CMI8738", sizeof(ad->config)); 784 break; 785 case PCI_PRODUCT_CMEDIA_CMI8738B: 786 strncpy(ad->config, "CMI8738B", sizeof(ad->config)); 787 break; 788 default: 789 strncpy(ad->config, "unknown", sizeof(ad->config)); 790 } 791 792 return 0; 793 } 794 795 /* mixer device information */ 796 int 797 cmpci_query_devinfo(void *handle, mixer_devinfo_t *dip) 798 { 799 static const char *const mixer_port_names[] = { 800 AudioNdac, AudioNfmsynth, AudioNcd, AudioNline, AudioNaux, 801 AudioNmicrophone 802 }; 803 static const char *const mixer_classes[] = { 804 AudioCinputs, AudioCoutputs, AudioCrecord, CmpciCplayback, 805 CmpciCspdif 806 }; 807 struct cmpci_softc *sc; 808 int i; 809 810 sc = handle; 811 dip->prev = dip->next = AUDIO_MIXER_LAST; 812 813 switch (dip->index) { 814 case CMPCI_INPUT_CLASS: 815 case CMPCI_OUTPUT_CLASS: 816 case CMPCI_RECORD_CLASS: 817 case CMPCI_PLAYBACK_CLASS: 818 case CMPCI_SPDIF_CLASS: 819 dip->type = AUDIO_MIXER_CLASS; 820 dip->mixer_class = dip->index; 821 strcpy(dip->label.name, 822 mixer_classes[dip->index - CMPCI_INPUT_CLASS]); 823 return 0; 824 825 case CMPCI_AUX_IN_VOL: 826 dip->un.v.delta = 1 << (8 - CMPCI_REG_AUX_VALBITS); 827 goto vol1; 828 case CMPCI_DAC_VOL: 829 case CMPCI_FM_VOL: 830 case CMPCI_CD_VOL: 831 case CMPCI_LINE_IN_VOL: 832 case CMPCI_MIC_VOL: 833 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS); 834 vol1: dip->mixer_class = CMPCI_INPUT_CLASS; 835 dip->next = dip->index + 6; /* CMPCI_xxx_MUTE */ 836 strcpy(dip->label.name, mixer_port_names[dip->index]); 837 dip->un.v.num_channels = (dip->index == CMPCI_MIC_VOL ? 1 : 2); 838 vol: 839 dip->type = AUDIO_MIXER_VALUE; 840 strcpy(dip->un.v.units.name, AudioNvolume); 841 return 0; 842 843 case CMPCI_MIC_MUTE: 844 dip->next = CMPCI_MIC_PREAMP; 845 /* FALLTHROUGH */ 846 case CMPCI_DAC_MUTE: 847 case CMPCI_FM_MUTE: 848 case CMPCI_CD_MUTE: 849 case CMPCI_LINE_IN_MUTE: 850 case CMPCI_AUX_IN_MUTE: 851 dip->prev = dip->index - 6; /* CMPCI_xxx_VOL */ 852 dip->mixer_class = CMPCI_INPUT_CLASS; 853 strcpy(dip->label.name, AudioNmute); 854 goto on_off; 855 on_off: 856 dip->type = AUDIO_MIXER_ENUM; 857 dip->un.e.num_mem = 2; 858 strcpy(dip->un.e.member[0].label.name, AudioNoff); 859 dip->un.e.member[0].ord = 0; 860 strcpy(dip->un.e.member[1].label.name, AudioNon); 861 dip->un.e.member[1].ord = 1; 862 return 0; 863 864 case CMPCI_MIC_PREAMP: 865 dip->mixer_class = CMPCI_INPUT_CLASS; 866 dip->prev = CMPCI_MIC_MUTE; 867 strcpy(dip->label.name, AudioNpreamp); 868 goto on_off; 869 case CMPCI_PCSPEAKER: 870 dip->mixer_class = CMPCI_INPUT_CLASS; 871 strcpy(dip->label.name, AudioNspeaker); 872 dip->un.v.num_channels = 1; 873 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_SPEAKER_VALBITS); 874 goto vol; 875 case CMPCI_RECORD_SOURCE: 876 dip->mixer_class = CMPCI_RECORD_CLASS; 877 strcpy(dip->label.name, AudioNsource); 878 dip->type = AUDIO_MIXER_SET; 879 dip->un.s.num_mem = 7; 880 strcpy(dip->un.s.member[0].label.name, AudioNmicrophone); 881 dip->un.s.member[0].mask = CMPCI_RECORD_SOURCE_MIC; 882 strcpy(dip->un.s.member[1].label.name, AudioNcd); 883 dip->un.s.member[1].mask = CMPCI_RECORD_SOURCE_CD; 884 strcpy(dip->un.s.member[2].label.name, AudioNline); 885 dip->un.s.member[2].mask = CMPCI_RECORD_SOURCE_LINE_IN; 886 strcpy(dip->un.s.member[3].label.name, AudioNaux); 887 dip->un.s.member[3].mask = CMPCI_RECORD_SOURCE_AUX_IN; 888 strcpy(dip->un.s.member[4].label.name, AudioNwave); 889 dip->un.s.member[4].mask = CMPCI_RECORD_SOURCE_WAVE; 890 strcpy(dip->un.s.member[5].label.name, AudioNfmsynth); 891 dip->un.s.member[5].mask = CMPCI_RECORD_SOURCE_FM; 892 strcpy(dip->un.s.member[6].label.name, CmpciNspdif); 893 dip->un.s.member[6].mask = CMPCI_RECORD_SOURCE_SPDIF; 894 return 0; 895 case CMPCI_MIC_RECVOL: 896 dip->mixer_class = CMPCI_RECORD_CLASS; 897 strcpy(dip->label.name, AudioNmicrophone); 898 dip->un.v.num_channels = 1; 899 dip->un.v.delta = 1 << (8 - CMPCI_REG_ADMIC_VALBITS); 900 goto vol; 901 902 case CMPCI_PLAYBACK_MODE: 903 dip->mixer_class = CMPCI_PLAYBACK_CLASS; 904 dip->type = AUDIO_MIXER_ENUM; 905 strcpy(dip->label.name, AudioNmode); 906 dip->un.e.num_mem = 2; 907 strcpy(dip->un.e.member[0].label.name, AudioNdac); 908 dip->un.e.member[0].ord = CMPCI_PLAYBACK_MODE_WAVE; 909 strcpy(dip->un.e.member[1].label.name, CmpciNspdif); 910 dip->un.e.member[1].ord = CMPCI_PLAYBACK_MODE_SPDIF; 911 return 0; 912 case CMPCI_SPDIF_IN_SELECT: 913 dip->mixer_class = CMPCI_SPDIF_CLASS; 914 dip->type = AUDIO_MIXER_ENUM; 915 dip->next = CMPCI_SPDIF_IN_PHASE; 916 strcpy(dip->label.name, AudioNinput); 917 i = 0; 918 strcpy(dip->un.e.member[i].label.name, CmpciNspdin1); 919 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN1; 920 if (CMPCI_ISCAP(sc, 2ND_SPDIN)) { 921 strcpy(dip->un.e.member[i].label.name, CmpciNspdin2); 922 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN2; 923 } 924 strcpy(dip->un.e.member[i].label.name, CmpciNspdout); 925 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDOUT; 926 dip->un.e.num_mem = i; 927 return 0; 928 case CMPCI_SPDIF_IN_PHASE: 929 dip->mixer_class = CMPCI_SPDIF_CLASS; 930 dip->prev = CMPCI_SPDIF_IN_SELECT; 931 strcpy(dip->label.name, CmpciNphase); 932 dip->type = AUDIO_MIXER_ENUM; 933 dip->un.e.num_mem = 2; 934 strcpy(dip->un.e.member[0].label.name, CmpciNpositive); 935 dip->un.e.member[0].ord = CMPCI_SPDIF_IN_PHASE_POSITIVE; 936 strcpy(dip->un.e.member[1].label.name, CmpciNnegative); 937 dip->un.e.member[1].ord = CMPCI_SPDIF_IN_PHASE_NEGATIVE; 938 return 0; 939 case CMPCI_SPDIF_LOOP: 940 dip->mixer_class = CMPCI_SPDIF_CLASS; 941 dip->next = CMPCI_SPDIF_OUT_PLAYBACK; 942 strcpy(dip->label.name, AudioNoutput); 943 dip->type = AUDIO_MIXER_ENUM; 944 dip->un.e.num_mem = 2; 945 strcpy(dip->un.e.member[0].label.name, CmpciNplayback); 946 dip->un.e.member[0].ord = CMPCI_SPDIF_LOOP_OFF; 947 strcpy(dip->un.e.member[1].label.name, CmpciNspdin); 948 dip->un.e.member[1].ord = CMPCI_SPDIF_LOOP_ON; 949 return 0; 950 case CMPCI_SPDIF_OUT_PLAYBACK: 951 dip->mixer_class = CMPCI_SPDIF_CLASS; 952 dip->prev = CMPCI_SPDIF_LOOP; 953 dip->next = CMPCI_SPDIF_OUT_VOLTAGE; 954 strcpy(dip->label.name, CmpciNplayback); 955 dip->type = AUDIO_MIXER_ENUM; 956 dip->un.e.num_mem = 2; 957 strcpy(dip->un.e.member[0].label.name, AudioNwave); 958 dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_PLAYBACK_WAVE; 959 strcpy(dip->un.e.member[1].label.name, CmpciNlegacy); 960 dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_PLAYBACK_LEGACY; 961 return 0; 962 case CMPCI_SPDIF_OUT_VOLTAGE: 963 dip->mixer_class = CMPCI_SPDIF_CLASS; 964 dip->prev = CMPCI_SPDIF_OUT_PLAYBACK; 965 strcpy(dip->label.name, CmpciNvoltage); 966 dip->type = AUDIO_MIXER_ENUM; 967 dip->un.e.num_mem = 2; 968 strcpy(dip->un.e.member[0].label.name, CmpciNhigh_v); 969 dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_VOLTAGE_HIGH; 970 strcpy(dip->un.e.member[1].label.name, CmpciNlow_v); 971 dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_VOLTAGE_LOW; 972 return 0; 973 case CMPCI_MONITOR_DAC: 974 dip->mixer_class = CMPCI_SPDIF_CLASS; 975 strcpy(dip->label.name, AudioNmonitor); 976 dip->type = AUDIO_MIXER_ENUM; 977 dip->un.e.num_mem = 3; 978 strcpy(dip->un.e.member[0].label.name, AudioNoff); 979 dip->un.e.member[0].ord = CMPCI_MONITOR_DAC_OFF; 980 strcpy(dip->un.e.member[1].label.name, CmpciNspdin); 981 dip->un.e.member[1].ord = CMPCI_MONITOR_DAC_SPDIN; 982 strcpy(dip->un.e.member[2].label.name, CmpciNspdout); 983 dip->un.e.member[2].ord = CMPCI_MONITOR_DAC_SPDOUT; 984 return 0; 985 986 case CMPCI_MASTER_VOL: 987 dip->mixer_class = CMPCI_OUTPUT_CLASS; 988 strcpy(dip->label.name, AudioNmaster); 989 dip->un.v.num_channels = 2; 990 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS); 991 goto vol; 992 case CMPCI_REAR: 993 dip->mixer_class = CMPCI_OUTPUT_CLASS; 994 dip->next = CMPCI_INDIVIDUAL; 995 strcpy(dip->label.name, CmpciNrear); 996 goto on_off; 997 case CMPCI_INDIVIDUAL: 998 dip->mixer_class = CMPCI_OUTPUT_CLASS; 999 dip->prev = CMPCI_REAR; 1000 dip->next = CMPCI_REVERSE; 1001 strcpy(dip->label.name, CmpciNindividual); 1002 goto on_off; 1003 case CMPCI_REVERSE: 1004 dip->mixer_class = CMPCI_OUTPUT_CLASS; 1005 dip->prev = CMPCI_INDIVIDUAL; 1006 strcpy(dip->label.name, CmpciNreverse); 1007 goto on_off; 1008 case CMPCI_SURROUND: 1009 dip->mixer_class = CMPCI_OUTPUT_CLASS; 1010 strcpy(dip->label.name, CmpciNsurround); 1011 goto on_off; 1012 } 1013 1014 return ENXIO; 1015 } 1016 1017 static int 1018 cmpci_alloc_dmamem(struct cmpci_softc *sc, size_t size, struct malloc_type *type, 1019 int flags, caddr_t *r_addr) 1020 { 1021 int error; 1022 struct cmpci_dmanode *n; 1023 int w; 1024 1025 error = 0; 1026 n = malloc(sizeof(struct cmpci_dmanode), type, flags); 1027 if (n == NULL) { 1028 error = ENOMEM; 1029 goto quit; 1030 } 1031 1032 w = (flags & M_NOWAIT) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK; 1033 #define CMPCI_DMABUF_ALIGN 0x4 1034 #define CMPCI_DMABUF_BOUNDARY 0x0 1035 n->cd_tag = sc->sc_dmat; 1036 n->cd_size = size; 1037 error = bus_dmamem_alloc(n->cd_tag, n->cd_size, 1038 CMPCI_DMABUF_ALIGN, CMPCI_DMABUF_BOUNDARY, n->cd_segs, 1039 sizeof(n->cd_segs)/sizeof(n->cd_segs[0]), &n->cd_nsegs, w); 1040 if (error) 1041 goto mfree; 1042 error = bus_dmamem_map(n->cd_tag, n->cd_segs, n->cd_nsegs, n->cd_size, 1043 &n->cd_addr, w | BUS_DMA_COHERENT); 1044 if (error) 1045 goto dmafree; 1046 error = bus_dmamap_create(n->cd_tag, n->cd_size, 1, n->cd_size, 0, 1047 w, &n->cd_map); 1048 if (error) 1049 goto unmap; 1050 error = bus_dmamap_load(n->cd_tag, n->cd_map, n->cd_addr, n->cd_size, 1051 NULL, w); 1052 if (error) 1053 goto destroy; 1054 1055 n->cd_next = sc->sc_dmap; 1056 sc->sc_dmap = n; 1057 *r_addr = KVADDR(n); 1058 return 0; 1059 1060 destroy: 1061 bus_dmamap_destroy(n->cd_tag, n->cd_map); 1062 unmap: 1063 bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size); 1064 dmafree: 1065 bus_dmamem_free(n->cd_tag, 1066 n->cd_segs, sizeof(n->cd_segs)/sizeof(n->cd_segs[0])); 1067 mfree: 1068 free(n, type); 1069 quit: 1070 return error; 1071 } 1072 1073 static int 1074 cmpci_free_dmamem(struct cmpci_softc *sc, caddr_t addr, struct malloc_type *type) 1075 { 1076 struct cmpci_dmanode **nnp; 1077 1078 for (nnp = &sc->sc_dmap; *nnp; nnp= &(*nnp)->cd_next) { 1079 if ((*nnp)->cd_addr == addr) { 1080 struct cmpci_dmanode *n = *nnp; 1081 bus_dmamap_unload(n->cd_tag, n->cd_map); 1082 bus_dmamap_destroy(n->cd_tag, n->cd_map); 1083 bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size); 1084 bus_dmamem_free(n->cd_tag, n->cd_segs, 1085 sizeof(n->cd_segs)/sizeof(n->cd_segs[0])); 1086 free(n, type); 1087 return 0; 1088 } 1089 } 1090 return -1; 1091 } 1092 1093 static struct cmpci_dmanode * 1094 cmpci_find_dmamem(struct cmpci_softc *sc, caddr_t addr) 1095 { 1096 struct cmpci_dmanode *p; 1097 1098 for (p = sc->sc_dmap; p; p = p->cd_next) 1099 if (KVADDR(p) == (void *)addr) 1100 break; 1101 return p; 1102 } 1103 1104 #if 0 1105 static void 1106 cmpci_print_dmamem(struct cmpci_dmanode *); 1107 static void 1108 cmpci_print_dmamem(struct cmpci_dmanode *p) 1109 { 1110 1111 DPRINTF(("DMA at virt:%p, dmaseg:%p, mapseg:%p, size:%p\n", 1112 (void *)p->cd_addr, (void *)p->cd_segs[0].ds_addr, 1113 (void *)DMAADDR(p), (void *)p->cd_size)); 1114 } 1115 #endif /* DEBUG */ 1116 1117 static void * 1118 cmpci_allocm(void *handle, int direction, size_t size, 1119 struct malloc_type *type, int flags) 1120 { 1121 caddr_t addr; 1122 1123 addr = NULL; /* XXX gcc */ 1124 1125 if (cmpci_alloc_dmamem(handle, size, type, flags, &addr)) 1126 return NULL; 1127 return addr; 1128 } 1129 1130 static void 1131 cmpci_freem(void *handle, void *addr, struct malloc_type *type) 1132 { 1133 1134 cmpci_free_dmamem(handle, addr, type); 1135 } 1136 1137 #define MAXVAL 256 1138 static int 1139 cmpci_adjust(int val, int mask) 1140 { 1141 1142 val += (MAXVAL - mask) >> 1; 1143 if (val >= MAXVAL) 1144 val = MAXVAL-1; 1145 return val & mask; 1146 } 1147 1148 static void 1149 cmpci_set_mixer_gain(struct cmpci_softc *sc, int port) 1150 { 1151 int src; 1152 int bits, mask; 1153 1154 switch (port) { 1155 case CMPCI_MIC_VOL: 1156 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_MIC, 1157 CMPCI_ADJUST_MIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1158 return; 1159 case CMPCI_MASTER_VOL: 1160 src = CMPCI_SB16_MIXER_MASTER_L; 1161 break; 1162 case CMPCI_LINE_IN_VOL: 1163 src = CMPCI_SB16_MIXER_LINE_L; 1164 break; 1165 case CMPCI_AUX_IN_VOL: 1166 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MIXER_AUX, 1167 CMPCI_ADJUST_AUX_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT], 1168 sc->sc_gain[port][CMPCI_RIGHT])); 1169 return; 1170 case CMPCI_MIC_RECVOL: 1171 cmpci_reg_partial_write_1(sc, CMPCI_REG_MIXER25, 1172 CMPCI_REG_ADMIC_SHIFT, CMPCI_REG_ADMIC_MASK, 1173 CMPCI_ADJUST_ADMIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1174 return; 1175 case CMPCI_DAC_VOL: 1176 src = CMPCI_SB16_MIXER_VOICE_L; 1177 break; 1178 case CMPCI_FM_VOL: 1179 src = CMPCI_SB16_MIXER_FM_L; 1180 break; 1181 case CMPCI_CD_VOL: 1182 src = CMPCI_SB16_MIXER_CDDA_L; 1183 break; 1184 case CMPCI_PCSPEAKER: 1185 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_SPEAKER, 1186 CMPCI_ADJUST_2_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1187 return; 1188 case CMPCI_MIC_PREAMP: 1189 if (sc->sc_gain[port][CMPCI_LR]) 1190 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1191 CMPCI_REG_MICGAINZ); 1192 else 1193 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1194 CMPCI_REG_MICGAINZ); 1195 return; 1196 1197 case CMPCI_DAC_MUTE: 1198 if (sc->sc_gain[port][CMPCI_LR]) 1199 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1200 CMPCI_REG_WSMUTE); 1201 else 1202 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1203 CMPCI_REG_WSMUTE); 1204 return; 1205 case CMPCI_FM_MUTE: 1206 if (sc->sc_gain[port][CMPCI_LR]) 1207 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1208 CMPCI_REG_FMMUTE); 1209 else 1210 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1211 CMPCI_REG_FMMUTE); 1212 return; 1213 case CMPCI_AUX_IN_MUTE: 1214 if (sc->sc_gain[port][CMPCI_LR]) 1215 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1216 CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM); 1217 else 1218 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1219 CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM); 1220 return; 1221 case CMPCI_CD_MUTE: 1222 mask = CMPCI_SB16_SW_CD; 1223 goto sbmute; 1224 case CMPCI_MIC_MUTE: 1225 mask = CMPCI_SB16_SW_MIC; 1226 goto sbmute; 1227 case CMPCI_LINE_IN_MUTE: 1228 mask = CMPCI_SB16_SW_LINE; 1229 sbmute: 1230 bits = cmpci_mixerreg_read(sc, CMPCI_SB16_MIXER_OUTMIX); 1231 if (sc->sc_gain[port][CMPCI_LR]) 1232 bits = bits & ~mask; 1233 else 1234 bits = bits | mask; 1235 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, bits); 1236 return; 1237 1238 case CMPCI_SPDIF_IN_SELECT: 1239 case CMPCI_MONITOR_DAC: 1240 case CMPCI_PLAYBACK_MODE: 1241 case CMPCI_SPDIF_LOOP: 1242 case CMPCI_SPDIF_OUT_PLAYBACK: 1243 cmpci_set_out_ports(sc); 1244 return; 1245 case CMPCI_SPDIF_OUT_VOLTAGE: 1246 if (CMPCI_ISCAP(sc, SPDOUT_VOLTAGE)) { 1247 if (sc->sc_gain[CMPCI_SPDIF_OUT_VOLTAGE][CMPCI_LR] 1248 == CMPCI_SPDIF_OUT_VOLTAGE_HIGH) 1249 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_5V); 1250 else 1251 cmpci_reg_set_reg_misc(sc, CMPCI_REG_5V); 1252 } 1253 return; 1254 case CMPCI_SURROUND: 1255 if (CMPCI_ISCAP(sc, SURROUND)) { 1256 if (sc->sc_gain[CMPCI_SURROUND][CMPCI_LR]) 1257 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1258 CMPCI_REG_SURROUND); 1259 else 1260 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1261 CMPCI_REG_SURROUND); 1262 } 1263 return; 1264 case CMPCI_REAR: 1265 if (CMPCI_ISCAP(sc, REAR)) { 1266 if (sc->sc_gain[CMPCI_REAR][CMPCI_LR]) 1267 cmpci_reg_set_reg_misc(sc, CMPCI_REG_N4SPK3D); 1268 else 1269 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_N4SPK3D); 1270 } 1271 return; 1272 case CMPCI_INDIVIDUAL: 1273 if (CMPCI_ISCAP(sc, INDIVIDUAL_REAR)) { 1274 if (sc->sc_gain[CMPCI_REAR][CMPCI_LR]) 1275 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1276 CMPCI_REG_INDIVIDUAL); 1277 else 1278 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1279 CMPCI_REG_INDIVIDUAL); 1280 } 1281 return; 1282 case CMPCI_REVERSE: 1283 if (CMPCI_ISCAP(sc, REVERSE_FR)) { 1284 if (sc->sc_gain[CMPCI_REVERSE][CMPCI_LR]) 1285 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1286 CMPCI_REG_REVERSE_FR); 1287 else 1288 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1289 CMPCI_REG_REVERSE_FR); 1290 } 1291 return; 1292 case CMPCI_SPDIF_IN_PHASE: 1293 if (CMPCI_ISCAP(sc, SPDIN_PHASE)) { 1294 if (sc->sc_gain[CMPCI_SPDIF_IN_PHASE][CMPCI_LR] 1295 == CMPCI_SPDIF_IN_PHASE_POSITIVE) 1296 cmpci_reg_clear_1(sc, CMPCI_REG_CHANNEL_FORMAT, 1297 CMPCI_REG_SPDIN_PHASE); 1298 else 1299 cmpci_reg_set_1(sc, CMPCI_REG_CHANNEL_FORMAT, 1300 CMPCI_REG_SPDIN_PHASE); 1301 } 1302 return; 1303 default: 1304 return; 1305 } 1306 1307 cmpci_mixerreg_write(sc, src, 1308 CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT])); 1309 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_L_TO_R(src), 1310 CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_RIGHT])); 1311 } 1312 1313 static void 1314 cmpci_set_out_ports(struct cmpci_softc *sc) 1315 { 1316 uint8_t v; 1317 int enspdout; 1318 1319 if (!CMPCI_ISCAP(sc, SPDLOOP)) 1320 return; 1321 1322 /* SPDIF/out select */ 1323 if (sc->sc_gain[CMPCI_SPDIF_LOOP][CMPCI_LR] == CMPCI_SPDIF_LOOP_OFF) { 1324 /* playback */ 1325 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP); 1326 } else { 1327 /* monitor SPDIF/in */ 1328 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP); 1329 } 1330 1331 /* SPDIF in select */ 1332 v = sc->sc_gain[CMPCI_SPDIF_IN_SELECT][CMPCI_LR]; 1333 if (v & CMPCI_SPDIFIN_SPDIFIN2) 1334 cmpci_reg_set_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN); 1335 else 1336 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN); 1337 if (v & CMPCI_SPDIFIN_SPDIFOUT) 1338 cmpci_reg_set_reg_misc(sc, CMPCI_REG_SPDFLOOPI); 1339 else 1340 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPDFLOOPI); 1341 1342 enspdout = 0; 1343 /* playback to ... */ 1344 if (CMPCI_ISCAP(sc, SPDOUT) && 1345 sc->sc_gain[CMPCI_PLAYBACK_MODE][CMPCI_LR] 1346 == CMPCI_PLAYBACK_MODE_SPDIF && 1347 (sc->sc_play.md_divide == CMPCI_REG_RATE_44100 || 1348 (CMPCI_ISCAP(sc, SPDOUT_48K) && 1349 sc->sc_play.md_divide==CMPCI_REG_RATE_48000))) { 1350 /* playback to SPDIF */ 1351 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE); 1352 enspdout = 1; 1353 if (sc->sc_play.md_divide==CMPCI_REG_RATE_48000) 1354 cmpci_reg_set_reg_misc(sc, 1355 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1356 else 1357 cmpci_reg_clear_reg_misc(sc, 1358 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1359 } else { 1360 /* playback to DAC */ 1361 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, 1362 CMPCI_REG_SPDIF0_ENABLE); 1363 if (CMPCI_ISCAP(sc, SPDOUT_48K)) 1364 cmpci_reg_clear_reg_misc(sc, 1365 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1366 } 1367 1368 /* legacy to SPDIF/out or not */ 1369 if (CMPCI_ISCAP(sc, SPDLEGACY)) { 1370 if (sc->sc_gain[CMPCI_SPDIF_OUT_PLAYBACK][CMPCI_LR] 1371 == CMPCI_SPDIF_OUT_PLAYBACK_WAVE) 1372 cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL, 1373 CMPCI_REG_LEGACY_SPDIF_ENABLE); 1374 else { 1375 cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL, 1376 CMPCI_REG_LEGACY_SPDIF_ENABLE); 1377 enspdout = 1; 1378 } 1379 } 1380 1381 /* enable/disable SPDIF/out */ 1382 if (CMPCI_ISCAP(sc, XSPDOUT) && enspdout) 1383 cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL, 1384 CMPCI_REG_XSPDIF_ENABLE); 1385 else 1386 cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL, 1387 CMPCI_REG_XSPDIF_ENABLE); 1388 1389 /* SPDIF monitor (digital to analog output) */ 1390 if (CMPCI_ISCAP(sc, SPDIN_MONITOR)) { 1391 v = sc->sc_gain[CMPCI_MONITOR_DAC][CMPCI_LR]; 1392 if (!(v & CMPCI_MONDAC_ENABLE)) 1393 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1394 CMPCI_REG_SPDIN_MONITOR); 1395 if (v & CMPCI_MONDAC_SPDOUT) 1396 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, 1397 CMPCI_REG_SPDIFOUT_DAC); 1398 else 1399 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, 1400 CMPCI_REG_SPDIFOUT_DAC); 1401 if (v & CMPCI_MONDAC_ENABLE) 1402 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1403 CMPCI_REG_SPDIN_MONITOR); 1404 } 1405 } 1406 1407 static int 1408 cmpci_set_in_ports(struct cmpci_softc *sc) 1409 { 1410 int mask; 1411 int bitsl, bitsr; 1412 1413 mask = sc->sc_in_mask; 1414 1415 /* 1416 * Note CMPCI_RECORD_SOURCE_CD, CMPCI_RECORD_SOURCE_LINE_IN and 1417 * CMPCI_RECORD_SOURCE_FM are defined to the corresponding bit 1418 * of the mixer register. 1419 */ 1420 bitsr = mask & (CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN | 1421 CMPCI_RECORD_SOURCE_FM); 1422 1423 bitsl = CMPCI_SB16_MIXER_SRC_R_TO_L(bitsr); 1424 if (mask & CMPCI_RECORD_SOURCE_MIC) { 1425 bitsl |= CMPCI_SB16_MIXER_MIC_SRC; 1426 bitsr |= CMPCI_SB16_MIXER_MIC_SRC; 1427 } 1428 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, bitsl); 1429 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, bitsr); 1430 1431 if (mask & CMPCI_RECORD_SOURCE_AUX_IN) 1432 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1433 CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN); 1434 else 1435 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1436 CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN); 1437 1438 if (mask & CMPCI_RECORD_SOURCE_WAVE) 1439 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1440 CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR); 1441 else 1442 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1443 CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR); 1444 1445 if (CMPCI_ISCAP(sc, SPDIN) && 1446 (sc->sc_rec.md_divide == CMPCI_REG_RATE_44100 || 1447 (CMPCI_ISCAP(sc, SPDOUT_48K) && 1448 sc->sc_rec.md_divide == CMPCI_REG_RATE_48000/* XXX? */))) { 1449 if (mask & CMPCI_RECORD_SOURCE_SPDIF) { 1450 /* enable SPDIF/in */ 1451 cmpci_reg_set_4(sc, 1452 CMPCI_REG_FUNC_1, 1453 CMPCI_REG_SPDIF1_ENABLE); 1454 } else { 1455 cmpci_reg_clear_4(sc, 1456 CMPCI_REG_FUNC_1, 1457 CMPCI_REG_SPDIF1_ENABLE); 1458 } 1459 } 1460 1461 return 0; 1462 } 1463 1464 static int 1465 cmpci_set_port(void *handle, mixer_ctrl_t *cp) 1466 { 1467 struct cmpci_softc *sc; 1468 int lgain, rgain; 1469 1470 sc = handle; 1471 switch (cp->dev) { 1472 case CMPCI_MIC_VOL: 1473 case CMPCI_PCSPEAKER: 1474 case CMPCI_MIC_RECVOL: 1475 if (cp->un.value.num_channels != 1) 1476 return EINVAL; 1477 /* FALLTHROUGH */ 1478 case CMPCI_DAC_VOL: 1479 case CMPCI_FM_VOL: 1480 case CMPCI_CD_VOL: 1481 case CMPCI_LINE_IN_VOL: 1482 case CMPCI_AUX_IN_VOL: 1483 case CMPCI_MASTER_VOL: 1484 if (cp->type != AUDIO_MIXER_VALUE) 1485 return EINVAL; 1486 switch (cp->un.value.num_channels) { 1487 case 1: 1488 lgain = rgain = 1489 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]; 1490 break; 1491 case 2: 1492 lgain = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]; 1493 rgain = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]; 1494 break; 1495 default: 1496 return EINVAL; 1497 } 1498 sc->sc_gain[cp->dev][CMPCI_LEFT] = lgain; 1499 sc->sc_gain[cp->dev][CMPCI_RIGHT] = rgain; 1500 1501 cmpci_set_mixer_gain(sc, cp->dev); 1502 break; 1503 1504 case CMPCI_RECORD_SOURCE: 1505 if (cp->type != AUDIO_MIXER_SET) 1506 return EINVAL; 1507 1508 if (cp->un.mask & ~(CMPCI_RECORD_SOURCE_MIC | 1509 CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN | 1510 CMPCI_RECORD_SOURCE_AUX_IN | CMPCI_RECORD_SOURCE_WAVE | 1511 CMPCI_RECORD_SOURCE_FM | CMPCI_RECORD_SOURCE_SPDIF)) 1512 return EINVAL; 1513 1514 if (cp->un.mask & CMPCI_RECORD_SOURCE_SPDIF) 1515 cp->un.mask = CMPCI_RECORD_SOURCE_SPDIF; 1516 1517 sc->sc_in_mask = cp->un.mask; 1518 return cmpci_set_in_ports(sc); 1519 1520 /* boolean */ 1521 case CMPCI_DAC_MUTE: 1522 case CMPCI_FM_MUTE: 1523 case CMPCI_CD_MUTE: 1524 case CMPCI_LINE_IN_MUTE: 1525 case CMPCI_AUX_IN_MUTE: 1526 case CMPCI_MIC_MUTE: 1527 case CMPCI_MIC_PREAMP: 1528 case CMPCI_PLAYBACK_MODE: 1529 case CMPCI_SPDIF_IN_PHASE: 1530 case CMPCI_SPDIF_LOOP: 1531 case CMPCI_SPDIF_OUT_PLAYBACK: 1532 case CMPCI_SPDIF_OUT_VOLTAGE: 1533 case CMPCI_REAR: 1534 case CMPCI_INDIVIDUAL: 1535 case CMPCI_REVERSE: 1536 case CMPCI_SURROUND: 1537 if (cp->type != AUDIO_MIXER_ENUM) 1538 return EINVAL; 1539 sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord != 0; 1540 cmpci_set_mixer_gain(sc, cp->dev); 1541 break; 1542 1543 case CMPCI_SPDIF_IN_SELECT: 1544 switch (cp->un.ord) { 1545 case CMPCI_SPDIF_IN_SPDIN1: 1546 case CMPCI_SPDIF_IN_SPDIN2: 1547 case CMPCI_SPDIF_IN_SPDOUT: 1548 break; 1549 default: 1550 return EINVAL; 1551 } 1552 goto xenum; 1553 case CMPCI_MONITOR_DAC: 1554 switch (cp->un.ord) { 1555 case CMPCI_MONITOR_DAC_OFF: 1556 case CMPCI_MONITOR_DAC_SPDIN: 1557 case CMPCI_MONITOR_DAC_SPDOUT: 1558 break; 1559 default: 1560 return EINVAL; 1561 } 1562 xenum: 1563 if (cp->type != AUDIO_MIXER_ENUM) 1564 return EINVAL; 1565 sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord; 1566 cmpci_set_mixer_gain(sc, cp->dev); 1567 break; 1568 1569 default: 1570 return EINVAL; 1571 } 1572 1573 return 0; 1574 } 1575 1576 static int 1577 cmpci_get_port(void *handle, mixer_ctrl_t *cp) 1578 { 1579 struct cmpci_softc *sc; 1580 1581 sc = handle; 1582 switch (cp->dev) { 1583 case CMPCI_MIC_VOL: 1584 case CMPCI_PCSPEAKER: 1585 case CMPCI_MIC_RECVOL: 1586 if (cp->un.value.num_channels != 1) 1587 return EINVAL; 1588 /*FALLTHROUGH*/ 1589 case CMPCI_DAC_VOL: 1590 case CMPCI_FM_VOL: 1591 case CMPCI_CD_VOL: 1592 case CMPCI_LINE_IN_VOL: 1593 case CMPCI_AUX_IN_VOL: 1594 case CMPCI_MASTER_VOL: 1595 switch (cp->un.value.num_channels) { 1596 case 1: 1597 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = 1598 sc->sc_gain[cp->dev][CMPCI_LEFT]; 1599 break; 1600 case 2: 1601 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 1602 sc->sc_gain[cp->dev][CMPCI_LEFT]; 1603 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 1604 sc->sc_gain[cp->dev][CMPCI_RIGHT]; 1605 break; 1606 default: 1607 return EINVAL; 1608 } 1609 break; 1610 1611 case CMPCI_RECORD_SOURCE: 1612 cp->un.mask = sc->sc_in_mask; 1613 break; 1614 1615 case CMPCI_DAC_MUTE: 1616 case CMPCI_FM_MUTE: 1617 case CMPCI_CD_MUTE: 1618 case CMPCI_LINE_IN_MUTE: 1619 case CMPCI_AUX_IN_MUTE: 1620 case CMPCI_MIC_MUTE: 1621 case CMPCI_MIC_PREAMP: 1622 case CMPCI_PLAYBACK_MODE: 1623 case CMPCI_SPDIF_IN_SELECT: 1624 case CMPCI_SPDIF_IN_PHASE: 1625 case CMPCI_SPDIF_LOOP: 1626 case CMPCI_SPDIF_OUT_PLAYBACK: 1627 case CMPCI_SPDIF_OUT_VOLTAGE: 1628 case CMPCI_MONITOR_DAC: 1629 case CMPCI_REAR: 1630 case CMPCI_INDIVIDUAL: 1631 case CMPCI_REVERSE: 1632 case CMPCI_SURROUND: 1633 cp->un.ord = sc->sc_gain[cp->dev][CMPCI_LR]; 1634 break; 1635 1636 default: 1637 return EINVAL; 1638 } 1639 1640 return 0; 1641 } 1642 1643 /* ARGSUSED */ 1644 static size_t 1645 cmpci_round_buffersize(void *handle, int direction, 1646 size_t bufsize) 1647 { 1648 1649 if (bufsize > 0x10000) 1650 bufsize = 0x10000; 1651 1652 return bufsize; 1653 } 1654 1655 static paddr_t 1656 cmpci_mappage(void *handle, void *addr, off_t offset, int prot) 1657 { 1658 struct cmpci_dmanode *p; 1659 struct cmpci_softc *sc; 1660 paddr_t pa; 1661 1662 sc = handle; 1663 1664 if (offset < 0 || NULL == (p = cmpci_find_dmamem(handle, addr))) 1665 return -1; 1666 1667 mutex_exit(&sc->sc_lock); 1668 pa = bus_dmamem_mmap(p->cd_tag, p->cd_segs, 1669 sizeof(p->cd_segs)/sizeof(p->cd_segs[0]), 1670 offset, prot, BUS_DMA_WAITOK); 1671 mutex_enter(&sc->sc_lock); 1672 1673 return pa; 1674 } 1675 1676 /* ARGSUSED */ 1677 static int 1678 cmpci_get_props(void *handle) 1679 { 1680 1681 return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 1682 } 1683 1684 static int 1685 cmpci_trigger_output(void *handle, void *start, void *end, int blksize, 1686 void (*intr)(void *), void *arg, 1687 const audio_params_t *param) 1688 { 1689 struct cmpci_softc *sc; 1690 struct cmpci_dmanode *p; 1691 int bps; 1692 1693 sc = handle; 1694 sc->sc_play.intr = intr; 1695 sc->sc_play.intr_arg = arg; 1696 bps = param->channels * param->precision / 8; 1697 if (!bps) 1698 return EINVAL; 1699 1700 /* set DMA frame */ 1701 if (!(p = cmpci_find_dmamem(sc, start))) 1702 return EINVAL; 1703 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BASE, 1704 DMAADDR(p)); 1705 delay(10); 1706 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BYTES, 1707 ((caddr_t)end - (caddr_t)start + 1) / bps - 1); 1708 delay(10); 1709 1710 /* set interrupt count */ 1711 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_SAMPLES, 1712 (blksize + bps - 1) / bps - 1); 1713 delay(10); 1714 1715 /* start DMA */ 1716 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); /* PLAY */ 1717 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 1718 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); 1719 1720 return 0; 1721 } 1722 1723 static int 1724 cmpci_trigger_input(void *handle, void *start, void *end, int blksize, 1725 void (*intr)(void *), void *arg, 1726 const audio_params_t *param) 1727 { 1728 struct cmpci_softc *sc; 1729 struct cmpci_dmanode *p; 1730 int bps; 1731 1732 sc = handle; 1733 sc->sc_rec.intr = intr; 1734 sc->sc_rec.intr_arg = arg; 1735 bps = param->channels * param->precision / 8; 1736 if (!bps) 1737 return EINVAL; 1738 1739 /* set DMA frame */ 1740 if (!(p=cmpci_find_dmamem(sc, start))) 1741 return EINVAL; 1742 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BASE, 1743 DMAADDR(p)); 1744 delay(10); 1745 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BYTES, 1746 ((caddr_t)end - (caddr_t)start + 1) / bps - 1); 1747 delay(10); 1748 1749 /* set interrupt count */ 1750 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_SAMPLES, 1751 (blksize + bps - 1) / bps - 1); 1752 delay(10); 1753 1754 /* start DMA */ 1755 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_DIR); /* REC */ 1756 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 1757 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); 1758 1759 return 0; 1760 } 1761 1762 static void 1763 cmpci_get_locks(void *addr, kmutex_t **intr, kmutex_t **proc) 1764 { 1765 struct cmpci_softc *sc; 1766 1767 sc = addr; 1768 *intr = &sc->sc_intr_lock; 1769 *proc = &sc->sc_lock; 1770 } 1771 1772 /* end of file */ 1773
Indexes created Sat Sep 27 22:09:54 GMT 2025