cmpci.c revision 1.37
1 /* $NetBSD: cmpci.c,v 1.37 2008/04/01 13:35:39 xtraeme Exp $ */ 2 3 /* 4 * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Takuya SHIOZAKI <tshiozak (at) NetBSD.org> . 9 * 10 * This code is derived from software contributed to The NetBSD Foundation 11 * by ITOH Yasufumi. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 /* 37 * C-Media CMI8x38 Audio Chip Support. 38 * 39 * TODO: 40 * - 4ch / 6ch support. 41 * - Joystick support. 42 * 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: cmpci.c,v 1.37 2008/04/01 13:35:39 xtraeme Exp $"); 47 48 #if defined(AUDIO_DEBUG) || defined(DEBUG) 49 #define DPRINTF(x) if (cmpcidebug) printf x 50 int cmpcidebug = 0; 51 #else 52 #define DPRINTF(x) 53 #endif 54 55 #include "mpu.h" 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/kernel.h> 60 #include <sys/malloc.h> 61 #include <sys/device.h> 62 #include <sys/proc.h> 63 64 #include <dev/pci/pcidevs.h> 65 #include <dev/pci/pcivar.h> 66 67 #include <sys/audioio.h> 68 #include <dev/audio_if.h> 69 #include <dev/midi_if.h> 70 71 #include <dev/mulaw.h> 72 #include <dev/auconv.h> 73 #include <dev/pci/cmpcireg.h> 74 #include <dev/pci/cmpcivar.h> 75 76 #include <dev/ic/mpuvar.h> 77 #include <sys/bus.h> 78 #include <sys/intr.h> 79 80 /* 81 * Low-level HW interface 82 */ 83 static inline uint8_t cmpci_mixerreg_read(struct cmpci_softc *, uint8_t); 84 static inline void cmpci_mixerreg_write(struct cmpci_softc *, 85 uint8_t, uint8_t); 86 static inline void cmpci_reg_partial_write_1(struct cmpci_softc *, int, int, 87 unsigned, unsigned); 88 static inline void cmpci_reg_partial_write_4(struct cmpci_softc *, int, int, 89 uint32_t, uint32_t); 90 static inline void cmpci_reg_set_1(struct cmpci_softc *, int, uint8_t); 91 static inline void cmpci_reg_clear_1(struct cmpci_softc *, int, uint8_t); 92 static inline void cmpci_reg_set_4(struct cmpci_softc *, int, uint32_t); 93 static inline void cmpci_reg_clear_4(struct cmpci_softc *, int, uint32_t); 94 static inline void cmpci_reg_set_reg_misc(struct cmpci_softc *, uint32_t); 95 static inline void cmpci_reg_clear_reg_misc(struct cmpci_softc *, uint32_t); 96 static int cmpci_rate_to_index(int); 97 static inline int cmpci_index_to_rate(int); 98 static inline int cmpci_index_to_divider(int); 99 100 static int cmpci_adjust(int, int); 101 static void cmpci_set_mixer_gain(struct cmpci_softc *, int); 102 static void cmpci_set_out_ports(struct cmpci_softc *); 103 static int cmpci_set_in_ports(struct cmpci_softc *); 104 105 106 /* 107 * autoconf interface 108 */ 109 static int cmpci_match(struct device *, struct cfdata *, void *); 110 static void cmpci_attach(struct device *, struct device *, void *); 111 112 CFATTACH_DECL(cmpci, sizeof (struct cmpci_softc), 113 cmpci_match, cmpci_attach, NULL, NULL); 114 115 /* interrupt */ 116 static int cmpci_intr(void *); 117 118 119 /* 120 * DMA stuffs 121 */ 122 static int cmpci_alloc_dmamem(struct cmpci_softc *, size_t, 123 struct malloc_type *, int, void **); 124 static int cmpci_free_dmamem(struct cmpci_softc *, void *, 125 struct malloc_type *); 126 static struct cmpci_dmanode * cmpci_find_dmamem(struct cmpci_softc *, 127 void *); 128 129 130 /* 131 * interface to machine independent layer 132 */ 133 static int cmpci_query_encoding(void *, struct audio_encoding *); 134 static int cmpci_set_params(void *, int, int, audio_params_t *, 135 audio_params_t *, stream_filter_list_t *, stream_filter_list_t *); 136 static int cmpci_round_blocksize(void *, int, int, const audio_params_t *); 137 static int cmpci_halt_output(void *); 138 static int cmpci_halt_input(void *); 139 static int cmpci_getdev(void *, struct audio_device *); 140 static int cmpci_set_port(void *, mixer_ctrl_t *); 141 static int cmpci_get_port(void *, mixer_ctrl_t *); 142 static int cmpci_query_devinfo(void *, mixer_devinfo_t *); 143 static void *cmpci_allocm(void *, int, size_t, struct malloc_type *, int); 144 static void cmpci_freem(void *, void *, struct malloc_type *); 145 static size_t cmpci_round_buffersize(void *, int, size_t); 146 static paddr_t cmpci_mappage(void *, void *, off_t, int); 147 static int cmpci_get_props(void *); 148 static int cmpci_trigger_output(void *, void *, void *, int, 149 void (*)(void *), void *, const audio_params_t *); 150 static int cmpci_trigger_input(void *, void *, void *, int, 151 void (*)(void *), void *, const audio_params_t *); 152 153 static const struct audio_hw_if cmpci_hw_if = { 154 NULL, /* open */ 155 NULL, /* close */ 156 NULL, /* drain */ 157 cmpci_query_encoding, /* query_encoding */ 158 cmpci_set_params, /* set_params */ 159 cmpci_round_blocksize, /* round_blocksize */ 160 NULL, /* commit_settings */ 161 NULL, /* init_output */ 162 NULL, /* init_input */ 163 NULL, /* start_output */ 164 NULL, /* start_input */ 165 cmpci_halt_output, /* halt_output */ 166 cmpci_halt_input, /* halt_input */ 167 NULL, /* speaker_ctl */ 168 cmpci_getdev, /* getdev */ 169 NULL, /* setfd */ 170 cmpci_set_port, /* set_port */ 171 cmpci_get_port, /* get_port */ 172 cmpci_query_devinfo, /* query_devinfo */ 173 cmpci_allocm, /* allocm */ 174 cmpci_freem, /* freem */ 175 cmpci_round_buffersize,/* round_buffersize */ 176 cmpci_mappage, /* mappage */ 177 cmpci_get_props, /* get_props */ 178 cmpci_trigger_output, /* trigger_output */ 179 cmpci_trigger_input, /* trigger_input */ 180 NULL, /* dev_ioctl */ 181 NULL, /* powerstate */ 182 }; 183 184 #define CMPCI_NFORMATS 4 185 static const struct audio_format cmpci_formats[CMPCI_NFORMATS] = { 186 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 187 2, AUFMT_STEREO, 0, {5512, 48000}}, 188 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 189 1, AUFMT_MONAURAL, 0, {5512, 48000}}, 190 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8, 191 2, AUFMT_STEREO, 0, {5512, 48000}}, 192 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8, 193 1, AUFMT_MONAURAL, 0, {5512, 48000}}, 194 }; 195 196 197 /* 198 * Low-level HW interface 199 */ 200 201 /* mixer register read/write */ 202 static inline uint8_t 203 cmpci_mixerreg_read(struct cmpci_softc *sc, uint8_t no) 204 { 205 uint8_t ret; 206 207 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no); 208 delay(10); 209 ret = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA); 210 delay(10); 211 return ret; 212 } 213 214 static inline void 215 cmpci_mixerreg_write(struct cmpci_softc *sc, uint8_t no, uint8_t val) 216 { 217 218 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no); 219 delay(10); 220 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA, val); 221 delay(10); 222 } 223 224 225 /* register partial write */ 226 static inline void 227 cmpci_reg_partial_write_1(struct cmpci_softc *sc, int no, int shift, 228 unsigned mask, unsigned val) 229 { 230 231 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 232 (val<<shift) | 233 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift))); 234 delay(10); 235 } 236 237 static inline void 238 cmpci_reg_partial_write_4(struct cmpci_softc *sc, int no, int shift, 239 uint32_t mask, uint32_t val) 240 { 241 242 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 243 (val<<shift) | 244 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift))); 245 delay(10); 246 } 247 248 /* register set/clear bit */ 249 static inline void 250 cmpci_reg_set_1(struct cmpci_softc *sc, int no, uint8_t mask) 251 { 252 253 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 254 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) | mask)); 255 delay(10); 256 } 257 258 static inline void 259 cmpci_reg_clear_1(struct cmpci_softc *sc, int no, uint8_t mask) 260 { 261 262 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 263 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~mask)); 264 delay(10); 265 } 266 267 static inline void 268 cmpci_reg_set_4(struct cmpci_softc *sc, int no, uint32_t mask) 269 { 270 271 /* use cmpci_reg_set_reg_misc() for CMPCI_REG_MISC */ 272 KDASSERT(no != CMPCI_REG_MISC); 273 274 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 275 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) | mask)); 276 delay(10); 277 } 278 279 static inline void 280 cmpci_reg_clear_4(struct cmpci_softc *sc, int no, uint32_t mask) 281 { 282 283 /* use cmpci_reg_clear_reg_misc() for CMPCI_REG_MISC */ 284 KDASSERT(no != CMPCI_REG_MISC); 285 286 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 287 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~mask)); 288 delay(10); 289 } 290 291 /* 292 * The CMPCI_REG_MISC register needs special handling, since one of 293 * its bits has different read/write values. 294 */ 295 static inline void 296 cmpci_reg_set_reg_misc(struct cmpci_softc *sc, uint32_t mask) 297 { 298 299 sc->sc_reg_misc |= mask; 300 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC, 301 sc->sc_reg_misc); 302 delay(10); 303 } 304 305 static inline void 306 cmpci_reg_clear_reg_misc(struct cmpci_softc *sc, uint32_t mask) 307 { 308 309 sc->sc_reg_misc &= ~mask; 310 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC, 311 sc->sc_reg_misc); 312 delay(10); 313 } 314 315 /* rate */ 316 static const struct { 317 int rate; 318 int divider; 319 } cmpci_rate_table[CMPCI_REG_NUMRATE] = { 320 #define _RATE(n) { n, CMPCI_REG_RATE_ ## n } 321 _RATE(5512), 322 _RATE(8000), 323 _RATE(11025), 324 _RATE(16000), 325 _RATE(22050), 326 _RATE(32000), 327 _RATE(44100), 328 _RATE(48000) 329 #undef _RATE 330 }; 331 332 static int 333 cmpci_rate_to_index(int rate) 334 { 335 int i; 336 337 for (i = 0; i < CMPCI_REG_NUMRATE - 1; i++) 338 if (rate <= 339 (cmpci_rate_table[i].rate+cmpci_rate_table[i+1].rate) / 2) 340 return i; 341 return i; /* 48000 */ 342 } 343 344 static inline int 345 cmpci_index_to_rate(int index) 346 { 347 348 return cmpci_rate_table[index].rate; 349 } 350 351 static inline int 352 cmpci_index_to_divider(int index) 353 { 354 355 return cmpci_rate_table[index].divider; 356 } 357 358 /* 359 * interface to configure the device. 360 */ 361 static int 362 cmpci_match(struct device *parent, struct cfdata *match, 363 void *aux) 364 { 365 struct pci_attach_args *pa; 366 367 pa = (struct pci_attach_args *)aux; 368 if ( PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CMEDIA && 369 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338A || 370 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338B || 371 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738 || 372 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738B) ) 373 return 1; 374 375 return 0; 376 } 377 378 static void 379 cmpci_attach(struct device *parent, struct device *self, void *aux) 380 { 381 struct cmpci_softc *sc; 382 struct pci_attach_args *pa; 383 struct audio_attach_args aa; 384 pci_intr_handle_t ih; 385 char const *strintr; 386 char devinfo[256]; 387 int i, v; 388 389 sc = (struct cmpci_softc *)self; 390 pa = (struct pci_attach_args *)aux; 391 aprint_naive(": Audio controller\n"); 392 393 sc->sc_id = pa->pa_id; 394 sc->sc_class = pa->pa_class; 395 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 396 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, 397 PCI_REVISION(sc->sc_class)); 398 switch (PCI_PRODUCT(sc->sc_id)) { 399 case PCI_PRODUCT_CMEDIA_CMI8338A: 400 /*FALLTHROUGH*/ 401 case PCI_PRODUCT_CMEDIA_CMI8338B: 402 sc->sc_capable = CMPCI_CAP_CMI8338; 403 break; 404 case PCI_PRODUCT_CMEDIA_CMI8738: 405 /*FALLTHROUGH*/ 406 case PCI_PRODUCT_CMEDIA_CMI8738B: 407 sc->sc_capable = CMPCI_CAP_CMI8738; 408 break; 409 } 410 411 /* map I/O space */ 412 if (pci_mapreg_map(pa, CMPCI_PCI_IOBASEREG, PCI_MAPREG_TYPE_IO, 0, 413 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 414 aprint_error("%s: failed to map I/O space\n", 415 sc->sc_dev.dv_xname); 416 return; 417 } 418 419 /* interrupt */ 420 if (pci_intr_map(pa, &ih)) { 421 aprint_error("%s: failed to map interrupt\n", 422 sc->sc_dev.dv_xname); 423 return; 424 } 425 strintr = pci_intr_string(pa->pa_pc, ih); 426 sc->sc_ih=pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, cmpci_intr, sc); 427 if (sc->sc_ih == NULL) { 428 aprint_error("%s: failed to establish interrupt", 429 sc->sc_dev.dv_xname); 430 if (strintr != NULL) 431 aprint_normal(" at %s", strintr); 432 aprint_normal("\n"); 433 return; 434 } 435 aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, strintr); 436 437 sc->sc_dmat = pa->pa_dmat; 438 439 audio_attach_mi(&cmpci_hw_if, sc, &sc->sc_dev); 440 441 /* attach OPL device */ 442 aa.type = AUDIODEV_TYPE_OPL; 443 aa.hwif = NULL; 444 aa.hdl = NULL; 445 (void)config_found(&sc->sc_dev, &aa, audioprint); 446 447 /* attach MPU-401 device */ 448 aa.type = AUDIODEV_TYPE_MPU; 449 aa.hwif = NULL; 450 aa.hdl = NULL; 451 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh, 452 CMPCI_REG_MPU_BASE, CMPCI_REG_MPU_SIZE, &sc->sc_mpu_ioh) == 0) 453 sc->sc_mpudev = config_found(&sc->sc_dev, &aa, audioprint); 454 455 /* get initial value (this is 0 and may be omitted but just in case) */ 456 sc->sc_reg_misc = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 457 CMPCI_REG_MISC) & ~CMPCI_REG_SPDIF48K; 458 459 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_RESET, 0); 460 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0); 461 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0); 462 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, 463 CMPCI_SB16_SW_CD|CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE); 464 for (i = 0; i < CMPCI_NDEVS; i++) { 465 switch(i) { 466 /* 467 * CMI8738 defaults are 468 * master: 0xe0 (0x00 - 0xf8) 469 * FM, DAC: 0xc0 (0x00 - 0xf8) 470 * PC speaker: 0x80 (0x00 - 0xc0) 471 * others: 0 472 */ 473 /* volume */ 474 case CMPCI_MASTER_VOL: 475 v = 128; /* 224 */ 476 break; 477 case CMPCI_FM_VOL: 478 case CMPCI_DAC_VOL: 479 v = 192; 480 break; 481 case CMPCI_PCSPEAKER: 482 v = 128; 483 break; 484 485 /* booleans, set to true */ 486 case CMPCI_CD_MUTE: 487 case CMPCI_MIC_MUTE: 488 case CMPCI_LINE_IN_MUTE: 489 case CMPCI_AUX_IN_MUTE: 490 v = 1; 491 break; 492 493 /* volume with inital value 0 */ 494 case CMPCI_CD_VOL: 495 case CMPCI_LINE_IN_VOL: 496 case CMPCI_AUX_IN_VOL: 497 case CMPCI_MIC_VOL: 498 case CMPCI_MIC_RECVOL: 499 /* FALLTHROUGH */ 500 501 /* others are cleared */ 502 case CMPCI_MIC_PREAMP: 503 case CMPCI_RECORD_SOURCE: 504 case CMPCI_PLAYBACK_MODE: 505 case CMPCI_SPDIF_IN_SELECT: 506 case CMPCI_SPDIF_IN_PHASE: 507 case CMPCI_SPDIF_LOOP: 508 case CMPCI_SPDIF_OUT_PLAYBACK: 509 case CMPCI_SPDIF_OUT_VOLTAGE: 510 case CMPCI_MONITOR_DAC: 511 case CMPCI_REAR: 512 case CMPCI_INDIVIDUAL: 513 case CMPCI_REVERSE: 514 case CMPCI_SURROUND: 515 default: 516 v = 0; 517 break; 518 } 519 sc->sc_gain[i][CMPCI_LEFT] = sc->sc_gain[i][CMPCI_RIGHT] = v; 520 cmpci_set_mixer_gain(sc, i); 521 } 522 } 523 524 static int 525 cmpci_intr(void *handle) 526 { 527 struct cmpci_softc *sc = handle; 528 #if NMPU > 0 529 struct mpu_softc *sc_mpu = device_private(sc->sc_mpudev); 530 #endif 531 uint32_t intrstat; 532 533 intrstat = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 534 CMPCI_REG_INTR_STATUS); 535 536 if (!(intrstat & CMPCI_REG_ANY_INTR)) 537 return 0; 538 539 delay(10); 540 541 /* disable and reset intr */ 542 if (intrstat & CMPCI_REG_CH0_INTR) 543 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, 544 CMPCI_REG_CH0_INTR_ENABLE); 545 if (intrstat & CMPCI_REG_CH1_INTR) 546 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, 547 CMPCI_REG_CH1_INTR_ENABLE); 548 549 if (intrstat & CMPCI_REG_CH0_INTR) { 550 if (sc->sc_play.intr != NULL) 551 (*sc->sc_play.intr)(sc->sc_play.intr_arg); 552 } 553 if (intrstat & CMPCI_REG_CH1_INTR) { 554 if (sc->sc_rec.intr != NULL) 555 (*sc->sc_rec.intr)(sc->sc_rec.intr_arg); 556 } 557 558 /* enable intr */ 559 if (intrstat & CMPCI_REG_CH0_INTR) 560 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, 561 CMPCI_REG_CH0_INTR_ENABLE); 562 if (intrstat & CMPCI_REG_CH1_INTR) 563 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, 564 CMPCI_REG_CH1_INTR_ENABLE); 565 566 #if NMPU > 0 567 if (intrstat & CMPCI_REG_UART_INTR && sc_mpu != NULL) 568 mpu_intr(sc_mpu); 569 #endif 570 571 return 1; 572 } 573 574 static int 575 cmpci_query_encoding(void *handle, struct audio_encoding *fp) 576 { 577 578 switch (fp->index) { 579 case 0: 580 strcpy(fp->name, AudioEulinear); 581 fp->encoding = AUDIO_ENCODING_ULINEAR; 582 fp->precision = 8; 583 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 584 break; 585 case 1: 586 strcpy(fp->name, AudioEmulaw); 587 fp->encoding = AUDIO_ENCODING_ULAW; 588 fp->precision = 8; 589 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 590 break; 591 case 2: 592 strcpy(fp->name, AudioEalaw); 593 fp->encoding = AUDIO_ENCODING_ALAW; 594 fp->precision = 8; 595 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 596 break; 597 case 3: 598 strcpy(fp->name, AudioEslinear); 599 fp->encoding = AUDIO_ENCODING_SLINEAR; 600 fp->precision = 8; 601 fp->flags = 0; 602 break; 603 case 4: 604 strcpy(fp->name, AudioEslinear_le); 605 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 606 fp->precision = 16; 607 fp->flags = 0; 608 break; 609 case 5: 610 strcpy(fp->name, AudioEulinear_le); 611 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 612 fp->precision = 16; 613 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 614 break; 615 case 6: 616 strcpy(fp->name, AudioEslinear_be); 617 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 618 fp->precision = 16; 619 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 620 break; 621 case 7: 622 strcpy(fp->name, AudioEulinear_be); 623 fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 624 fp->precision = 16; 625 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 626 break; 627 default: 628 return EINVAL; 629 } 630 return 0; 631 } 632 633 634 static int 635 cmpci_set_params(void *handle, int setmode, int usemode, 636 audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil, 637 stream_filter_list_t *rfil) 638 { 639 int i; 640 struct cmpci_softc *sc; 641 642 sc = handle; 643 for (i = 0; i < 2; i++) { 644 int md_format; 645 int md_divide; 646 int md_index; 647 int mode; 648 audio_params_t *p; 649 stream_filter_list_t *fil; 650 int ind; 651 652 switch (i) { 653 case 0: 654 mode = AUMODE_PLAY; 655 p = play; 656 fil = pfil; 657 break; 658 case 1: 659 mode = AUMODE_RECORD; 660 p = rec; 661 fil = rfil; 662 break; 663 default: 664 return EINVAL; 665 } 666 667 if (!(setmode & mode)) 668 continue; 669 670 md_index = cmpci_rate_to_index(p->sample_rate); 671 md_divide = cmpci_index_to_divider(md_index); 672 p->sample_rate = cmpci_index_to_rate(md_index); 673 DPRINTF(("%s: sample:%u, divider=%d\n", 674 sc->sc_dev.dv_xname, p->sample_rate, md_divide)); 675 676 ind = auconv_set_converter(cmpci_formats, CMPCI_NFORMATS, 677 mode, p, FALSE, fil); 678 if (ind < 0) 679 return EINVAL; 680 if (fil->req_size > 0) 681 p = &fil->filters[0].param; 682 683 /* format */ 684 md_format = p->channels == 1 685 ? CMPCI_REG_FORMAT_MONO : CMPCI_REG_FORMAT_STEREO; 686 md_format |= p->precision == 16 687 ? CMPCI_REG_FORMAT_16BIT : CMPCI_REG_FORMAT_8BIT; 688 if (mode & AUMODE_PLAY) { 689 cmpci_reg_partial_write_4(sc, 690 CMPCI_REG_CHANNEL_FORMAT, 691 CMPCI_REG_CH0_FORMAT_SHIFT, 692 CMPCI_REG_CH0_FORMAT_MASK, md_format); 693 cmpci_reg_partial_write_4(sc, 694 CMPCI_REG_FUNC_1, CMPCI_REG_DAC_FS_SHIFT, 695 CMPCI_REG_DAC_FS_MASK, md_divide); 696 sc->sc_play.md_divide = md_divide; 697 } else { 698 cmpci_reg_partial_write_4(sc, 699 CMPCI_REG_CHANNEL_FORMAT, 700 CMPCI_REG_CH1_FORMAT_SHIFT, 701 CMPCI_REG_CH1_FORMAT_MASK, md_format); 702 cmpci_reg_partial_write_4(sc, 703 CMPCI_REG_FUNC_1, CMPCI_REG_ADC_FS_SHIFT, 704 CMPCI_REG_ADC_FS_MASK, md_divide); 705 sc->sc_rec.md_divide = md_divide; 706 } 707 cmpci_set_out_ports(sc); 708 cmpci_set_in_ports(sc); 709 } 710 return 0; 711 } 712 713 /* ARGSUSED */ 714 static int 715 cmpci_round_blocksize(void *handle, int block, 716 int mode, const audio_params_t *param) 717 { 718 719 return block & -4; 720 } 721 722 static int 723 cmpci_halt_output(void *handle) 724 { 725 struct cmpci_softc *sc; 726 int s; 727 728 sc = handle; 729 s = splaudio(); 730 sc->sc_play.intr = NULL; 731 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 732 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); 733 /* wait for reset DMA */ 734 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); 735 delay(10); 736 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); 737 splx(s); 738 739 return 0; 740 } 741 742 static int 743 cmpci_halt_input(void *handle) 744 { 745 struct cmpci_softc *sc; 746 int s; 747 748 sc = handle; 749 s = splaudio(); 750 sc->sc_rec.intr = NULL; 751 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 752 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); 753 /* wait for reset DMA */ 754 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); 755 delay(10); 756 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); 757 splx(s); 758 759 return 0; 760 } 761 762 /* get audio device information */ 763 static int 764 cmpci_getdev(void *handle, struct audio_device *ad) 765 { 766 struct cmpci_softc *sc; 767 768 sc = handle; 769 strncpy(ad->name, "CMI PCI Audio", sizeof(ad->name)); 770 snprintf(ad->version, sizeof(ad->version), "0x%02x", 771 PCI_REVISION(sc->sc_class)); 772 switch (PCI_PRODUCT(sc->sc_id)) { 773 case PCI_PRODUCT_CMEDIA_CMI8338A: 774 strncpy(ad->config, "CMI8338A", sizeof(ad->config)); 775 break; 776 case PCI_PRODUCT_CMEDIA_CMI8338B: 777 strncpy(ad->config, "CMI8338B", sizeof(ad->config)); 778 break; 779 case PCI_PRODUCT_CMEDIA_CMI8738: 780 strncpy(ad->config, "CMI8738", sizeof(ad->config)); 781 break; 782 case PCI_PRODUCT_CMEDIA_CMI8738B: 783 strncpy(ad->config, "CMI8738B", sizeof(ad->config)); 784 break; 785 default: 786 strncpy(ad->config, "unknown", sizeof(ad->config)); 787 } 788 789 return 0; 790 } 791 792 /* mixer device information */ 793 int 794 cmpci_query_devinfo(void *handle, mixer_devinfo_t *dip) 795 { 796 static const char *const mixer_port_names[] = { 797 AudioNdac, AudioNfmsynth, AudioNcd, AudioNline, AudioNaux, 798 AudioNmicrophone 799 }; 800 static const char *const mixer_classes[] = { 801 AudioCinputs, AudioCoutputs, AudioCrecord, CmpciCplayback, 802 CmpciCspdif 803 }; 804 struct cmpci_softc *sc; 805 int i; 806 807 sc = handle; 808 dip->prev = dip->next = AUDIO_MIXER_LAST; 809 810 switch (dip->index) { 811 case CMPCI_INPUT_CLASS: 812 case CMPCI_OUTPUT_CLASS: 813 case CMPCI_RECORD_CLASS: 814 case CMPCI_PLAYBACK_CLASS: 815 case CMPCI_SPDIF_CLASS: 816 dip->type = AUDIO_MIXER_CLASS; 817 dip->mixer_class = dip->index; 818 strcpy(dip->label.name, 819 mixer_classes[dip->index - CMPCI_INPUT_CLASS]); 820 return 0; 821 822 case CMPCI_AUX_IN_VOL: 823 dip->un.v.delta = 1 << (8 - CMPCI_REG_AUX_VALBITS); 824 goto vol1; 825 case CMPCI_DAC_VOL: 826 case CMPCI_FM_VOL: 827 case CMPCI_CD_VOL: 828 case CMPCI_LINE_IN_VOL: 829 case CMPCI_MIC_VOL: 830 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS); 831 vol1: dip->mixer_class = CMPCI_INPUT_CLASS; 832 dip->next = dip->index + 6; /* CMPCI_xxx_MUTE */ 833 strcpy(dip->label.name, mixer_port_names[dip->index]); 834 dip->un.v.num_channels = (dip->index == CMPCI_MIC_VOL ? 1 : 2); 835 vol: 836 dip->type = AUDIO_MIXER_VALUE; 837 strcpy(dip->un.v.units.name, AudioNvolume); 838 return 0; 839 840 case CMPCI_MIC_MUTE: 841 dip->next = CMPCI_MIC_PREAMP; 842 /* FALLTHROUGH */ 843 case CMPCI_DAC_MUTE: 844 case CMPCI_FM_MUTE: 845 case CMPCI_CD_MUTE: 846 case CMPCI_LINE_IN_MUTE: 847 case CMPCI_AUX_IN_MUTE: 848 dip->prev = dip->index - 6; /* CMPCI_xxx_VOL */ 849 dip->mixer_class = CMPCI_INPUT_CLASS; 850 strcpy(dip->label.name, AudioNmute); 851 goto on_off; 852 on_off: 853 dip->type = AUDIO_MIXER_ENUM; 854 dip->un.e.num_mem = 2; 855 strcpy(dip->un.e.member[0].label.name, AudioNoff); 856 dip->un.e.member[0].ord = 0; 857 strcpy(dip->un.e.member[1].label.name, AudioNon); 858 dip->un.e.member[1].ord = 1; 859 return 0; 860 861 case CMPCI_MIC_PREAMP: 862 dip->mixer_class = CMPCI_INPUT_CLASS; 863 dip->prev = CMPCI_MIC_MUTE; 864 strcpy(dip->label.name, AudioNpreamp); 865 goto on_off; 866 case CMPCI_PCSPEAKER: 867 dip->mixer_class = CMPCI_INPUT_CLASS; 868 strcpy(dip->label.name, AudioNspeaker); 869 dip->un.v.num_channels = 1; 870 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_SPEAKER_VALBITS); 871 goto vol; 872 case CMPCI_RECORD_SOURCE: 873 dip->mixer_class = CMPCI_RECORD_CLASS; 874 strcpy(dip->label.name, AudioNsource); 875 dip->type = AUDIO_MIXER_SET; 876 dip->un.s.num_mem = 7; 877 strcpy(dip->un.s.member[0].label.name, AudioNmicrophone); 878 dip->un.s.member[0].mask = CMPCI_RECORD_SOURCE_MIC; 879 strcpy(dip->un.s.member[1].label.name, AudioNcd); 880 dip->un.s.member[1].mask = CMPCI_RECORD_SOURCE_CD; 881 strcpy(dip->un.s.member[2].label.name, AudioNline); 882 dip->un.s.member[2].mask = CMPCI_RECORD_SOURCE_LINE_IN; 883 strcpy(dip->un.s.member[3].label.name, AudioNaux); 884 dip->un.s.member[3].mask = CMPCI_RECORD_SOURCE_AUX_IN; 885 strcpy(dip->un.s.member[4].label.name, AudioNwave); 886 dip->un.s.member[4].mask = CMPCI_RECORD_SOURCE_WAVE; 887 strcpy(dip->un.s.member[5].label.name, AudioNfmsynth); 888 dip->un.s.member[5].mask = CMPCI_RECORD_SOURCE_FM; 889 strcpy(dip->un.s.member[6].label.name, CmpciNspdif); 890 dip->un.s.member[6].mask = CMPCI_RECORD_SOURCE_SPDIF; 891 return 0; 892 case CMPCI_MIC_RECVOL: 893 dip->mixer_class = CMPCI_RECORD_CLASS; 894 strcpy(dip->label.name, AudioNmicrophone); 895 dip->un.v.num_channels = 1; 896 dip->un.v.delta = 1 << (8 - CMPCI_REG_ADMIC_VALBITS); 897 goto vol; 898 899 case CMPCI_PLAYBACK_MODE: 900 dip->mixer_class = CMPCI_PLAYBACK_CLASS; 901 dip->type = AUDIO_MIXER_ENUM; 902 strcpy(dip->label.name, AudioNmode); 903 dip->un.e.num_mem = 2; 904 strcpy(dip->un.e.member[0].label.name, AudioNdac); 905 dip->un.e.member[0].ord = CMPCI_PLAYBACK_MODE_WAVE; 906 strcpy(dip->un.e.member[1].label.name, CmpciNspdif); 907 dip->un.e.member[1].ord = CMPCI_PLAYBACK_MODE_SPDIF; 908 return 0; 909 case CMPCI_SPDIF_IN_SELECT: 910 dip->mixer_class = CMPCI_SPDIF_CLASS; 911 dip->type = AUDIO_MIXER_ENUM; 912 dip->next = CMPCI_SPDIF_IN_PHASE; 913 strcpy(dip->label.name, AudioNinput); 914 i = 0; 915 strcpy(dip->un.e.member[i].label.name, CmpciNspdin1); 916 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN1; 917 if (CMPCI_ISCAP(sc, 2ND_SPDIN)) { 918 strcpy(dip->un.e.member[i].label.name, CmpciNspdin2); 919 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN2; 920 } 921 strcpy(dip->un.e.member[i].label.name, CmpciNspdout); 922 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDOUT; 923 dip->un.e.num_mem = i; 924 return 0; 925 case CMPCI_SPDIF_IN_PHASE: 926 dip->mixer_class = CMPCI_SPDIF_CLASS; 927 dip->prev = CMPCI_SPDIF_IN_SELECT; 928 strcpy(dip->label.name, CmpciNphase); 929 dip->type = AUDIO_MIXER_ENUM; 930 dip->un.e.num_mem = 2; 931 strcpy(dip->un.e.member[0].label.name, CmpciNpositive); 932 dip->un.e.member[0].ord = CMPCI_SPDIF_IN_PHASE_POSITIVE; 933 strcpy(dip->un.e.member[1].label.name, CmpciNnegative); 934 dip->un.e.member[1].ord = CMPCI_SPDIF_IN_PHASE_NEGATIVE; 935 return 0; 936 case CMPCI_SPDIF_LOOP: 937 dip->mixer_class = CMPCI_SPDIF_CLASS; 938 dip->next = CMPCI_SPDIF_OUT_PLAYBACK; 939 strcpy(dip->label.name, AudioNoutput); 940 dip->type = AUDIO_MIXER_ENUM; 941 dip->un.e.num_mem = 2; 942 strcpy(dip->un.e.member[0].label.name, CmpciNplayback); 943 dip->un.e.member[0].ord = CMPCI_SPDIF_LOOP_OFF; 944 strcpy(dip->un.e.member[1].label.name, CmpciNspdin); 945 dip->un.e.member[1].ord = CMPCI_SPDIF_LOOP_ON; 946 return 0; 947 case CMPCI_SPDIF_OUT_PLAYBACK: 948 dip->mixer_class = CMPCI_SPDIF_CLASS; 949 dip->prev = CMPCI_SPDIF_LOOP; 950 dip->next = CMPCI_SPDIF_OUT_VOLTAGE; 951 strcpy(dip->label.name, CmpciNplayback); 952 dip->type = AUDIO_MIXER_ENUM; 953 dip->un.e.num_mem = 2; 954 strcpy(dip->un.e.member[0].label.name, AudioNwave); 955 dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_PLAYBACK_WAVE; 956 strcpy(dip->un.e.member[1].label.name, CmpciNlegacy); 957 dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_PLAYBACK_LEGACY; 958 return 0; 959 case CMPCI_SPDIF_OUT_VOLTAGE: 960 dip->mixer_class = CMPCI_SPDIF_CLASS; 961 dip->prev = CMPCI_SPDIF_OUT_PLAYBACK; 962 strcpy(dip->label.name, CmpciNvoltage); 963 dip->type = AUDIO_MIXER_ENUM; 964 dip->un.e.num_mem = 2; 965 strcpy(dip->un.e.member[0].label.name, CmpciNhigh_v); 966 dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_VOLTAGE_HIGH; 967 strcpy(dip->un.e.member[1].label.name, CmpciNlow_v); 968 dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_VOLTAGE_LOW; 969 return 0; 970 case CMPCI_MONITOR_DAC: 971 dip->mixer_class = CMPCI_SPDIF_CLASS; 972 strcpy(dip->label.name, AudioNmonitor); 973 dip->type = AUDIO_MIXER_ENUM; 974 dip->un.e.num_mem = 3; 975 strcpy(dip->un.e.member[0].label.name, AudioNoff); 976 dip->un.e.member[0].ord = CMPCI_MONITOR_DAC_OFF; 977 strcpy(dip->un.e.member[1].label.name, CmpciNspdin); 978 dip->un.e.member[1].ord = CMPCI_MONITOR_DAC_SPDIN; 979 strcpy(dip->un.e.member[2].label.name, CmpciNspdout); 980 dip->un.e.member[2].ord = CMPCI_MONITOR_DAC_SPDOUT; 981 return 0; 982 983 case CMPCI_MASTER_VOL: 984 dip->mixer_class = CMPCI_OUTPUT_CLASS; 985 strcpy(dip->label.name, AudioNmaster); 986 dip->un.v.num_channels = 2; 987 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS); 988 goto vol; 989 case CMPCI_REAR: 990 dip->mixer_class = CMPCI_OUTPUT_CLASS; 991 dip->next = CMPCI_INDIVIDUAL; 992 strcpy(dip->label.name, CmpciNrear); 993 goto on_off; 994 case CMPCI_INDIVIDUAL: 995 dip->mixer_class = CMPCI_OUTPUT_CLASS; 996 dip->prev = CMPCI_REAR; 997 dip->next = CMPCI_REVERSE; 998 strcpy(dip->label.name, CmpciNindividual); 999 goto on_off; 1000 case CMPCI_REVERSE: 1001 dip->mixer_class = CMPCI_OUTPUT_CLASS; 1002 dip->prev = CMPCI_INDIVIDUAL; 1003 strcpy(dip->label.name, CmpciNreverse); 1004 goto on_off; 1005 case CMPCI_SURROUND: 1006 dip->mixer_class = CMPCI_OUTPUT_CLASS; 1007 strcpy(dip->label.name, CmpciNsurround); 1008 goto on_off; 1009 } 1010 1011 return ENXIO; 1012 } 1013 1014 static int 1015 cmpci_alloc_dmamem(struct cmpci_softc *sc, size_t size, struct malloc_type *type, 1016 int flags, void **r_addr) 1017 { 1018 int error; 1019 struct cmpci_dmanode *n; 1020 int w; 1021 1022 error = 0; 1023 n = malloc(sizeof(struct cmpci_dmanode), type, flags); 1024 if (n == NULL) { 1025 error = ENOMEM; 1026 goto quit; 1027 } 1028 1029 w = (flags & M_NOWAIT) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK; 1030 #define CMPCI_DMABUF_ALIGN 0x4 1031 #define CMPCI_DMABUF_BOUNDARY 0x0 1032 n->cd_tag = sc->sc_dmat; 1033 n->cd_size = size; 1034 error = bus_dmamem_alloc(n->cd_tag, n->cd_size, 1035 CMPCI_DMABUF_ALIGN, CMPCI_DMABUF_BOUNDARY, n->cd_segs, 1036 sizeof(n->cd_segs)/sizeof(n->cd_segs[0]), &n->cd_nsegs, w); 1037 if (error) 1038 goto mfree; 1039 error = bus_dmamem_map(n->cd_tag, n->cd_segs, n->cd_nsegs, n->cd_size, 1040 &n->cd_addr, w | BUS_DMA_COHERENT); 1041 if (error) 1042 goto dmafree; 1043 error = bus_dmamap_create(n->cd_tag, n->cd_size, 1, n->cd_size, 0, 1044 w, &n->cd_map); 1045 if (error) 1046 goto unmap; 1047 error = bus_dmamap_load(n->cd_tag, n->cd_map, n->cd_addr, n->cd_size, 1048 NULL, w); 1049 if (error) 1050 goto destroy; 1051 1052 n->cd_next = sc->sc_dmap; 1053 sc->sc_dmap = n; 1054 *r_addr = KVADDR(n); 1055 return 0; 1056 1057 destroy: 1058 bus_dmamap_destroy(n->cd_tag, n->cd_map); 1059 unmap: 1060 bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size); 1061 dmafree: 1062 bus_dmamem_free(n->cd_tag, 1063 n->cd_segs, sizeof(n->cd_segs)/sizeof(n->cd_segs[0])); 1064 mfree: 1065 free(n, type); 1066 quit: 1067 return error; 1068 } 1069 1070 static int 1071 cmpci_free_dmamem(struct cmpci_softc *sc, void *addr, struct malloc_type *type) 1072 { 1073 struct cmpci_dmanode **nnp; 1074 1075 for (nnp = &sc->sc_dmap; *nnp; nnp= &(*nnp)->cd_next) { 1076 if ((*nnp)->cd_addr == addr) { 1077 struct cmpci_dmanode *n = *nnp; 1078 bus_dmamap_unload(n->cd_tag, n->cd_map); 1079 bus_dmamap_destroy(n->cd_tag, n->cd_map); 1080 bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size); 1081 bus_dmamem_free(n->cd_tag, n->cd_segs, 1082 sizeof(n->cd_segs)/sizeof(n->cd_segs[0])); 1083 free(n, type); 1084 return 0; 1085 } 1086 } 1087 return -1; 1088 } 1089 1090 static struct cmpci_dmanode * 1091 cmpci_find_dmamem(struct cmpci_softc *sc, void *addr) 1092 { 1093 struct cmpci_dmanode *p; 1094 1095 for (p = sc->sc_dmap; p; p = p->cd_next) 1096 if (KVADDR(p) == (void *)addr) 1097 break; 1098 return p; 1099 } 1100 1101 #if 0 1102 static void 1103 cmpci_print_dmamem(struct cmpci_dmanode *); 1104 static void 1105 cmpci_print_dmamem(struct cmpci_dmanode *p) 1106 { 1107 1108 DPRINTF(("DMA at virt:%p, dmaseg:%p, mapseg:%p, size:%p\n", 1109 (void *)p->cd_addr, (void *)p->cd_segs[0].ds_addr, 1110 (void *)DMAADDR(p), (void *)p->cd_size)); 1111 } 1112 #endif /* DEBUG */ 1113 1114 static void * 1115 cmpci_allocm(void *handle, int direction, size_t size, 1116 struct malloc_type *type, int flags) 1117 { 1118 void *addr; 1119 1120 addr = NULL; /* XXX gcc */ 1121 1122 if (cmpci_alloc_dmamem(handle, size, type, flags, &addr)) 1123 return NULL; 1124 return addr; 1125 } 1126 1127 static void 1128 cmpci_freem(void *handle, void *addr, struct malloc_type *type) 1129 { 1130 1131 cmpci_free_dmamem(handle, addr, type); 1132 } 1133 1134 #define MAXVAL 256 1135 static int 1136 cmpci_adjust(int val, int mask) 1137 { 1138 1139 val += (MAXVAL - mask) >> 1; 1140 if (val >= MAXVAL) 1141 val = MAXVAL-1; 1142 return val & mask; 1143 } 1144 1145 static void 1146 cmpci_set_mixer_gain(struct cmpci_softc *sc, int port) 1147 { 1148 int src; 1149 int bits, mask; 1150 1151 switch (port) { 1152 case CMPCI_MIC_VOL: 1153 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_MIC, 1154 CMPCI_ADJUST_MIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1155 return; 1156 case CMPCI_MASTER_VOL: 1157 src = CMPCI_SB16_MIXER_MASTER_L; 1158 break; 1159 case CMPCI_LINE_IN_VOL: 1160 src = CMPCI_SB16_MIXER_LINE_L; 1161 break; 1162 case CMPCI_AUX_IN_VOL: 1163 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MIXER_AUX, 1164 CMPCI_ADJUST_AUX_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT], 1165 sc->sc_gain[port][CMPCI_RIGHT])); 1166 return; 1167 case CMPCI_MIC_RECVOL: 1168 cmpci_reg_partial_write_1(sc, CMPCI_REG_MIXER25, 1169 CMPCI_REG_ADMIC_SHIFT, CMPCI_REG_ADMIC_MASK, 1170 CMPCI_ADJUST_ADMIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1171 return; 1172 case CMPCI_DAC_VOL: 1173 src = CMPCI_SB16_MIXER_VOICE_L; 1174 break; 1175 case CMPCI_FM_VOL: 1176 src = CMPCI_SB16_MIXER_FM_L; 1177 break; 1178 case CMPCI_CD_VOL: 1179 src = CMPCI_SB16_MIXER_CDDA_L; 1180 break; 1181 case CMPCI_PCSPEAKER: 1182 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_SPEAKER, 1183 CMPCI_ADJUST_2_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1184 return; 1185 case CMPCI_MIC_PREAMP: 1186 if (sc->sc_gain[port][CMPCI_LR]) 1187 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1188 CMPCI_REG_MICGAINZ); 1189 else 1190 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1191 CMPCI_REG_MICGAINZ); 1192 return; 1193 1194 case CMPCI_DAC_MUTE: 1195 if (sc->sc_gain[port][CMPCI_LR]) 1196 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1197 CMPCI_REG_WSMUTE); 1198 else 1199 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1200 CMPCI_REG_WSMUTE); 1201 return; 1202 case CMPCI_FM_MUTE: 1203 if (sc->sc_gain[port][CMPCI_LR]) 1204 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1205 CMPCI_REG_FMMUTE); 1206 else 1207 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1208 CMPCI_REG_FMMUTE); 1209 return; 1210 case CMPCI_AUX_IN_MUTE: 1211 if (sc->sc_gain[port][CMPCI_LR]) 1212 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1213 CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM); 1214 else 1215 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1216 CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM); 1217 return; 1218 case CMPCI_CD_MUTE: 1219 mask = CMPCI_SB16_SW_CD; 1220 goto sbmute; 1221 case CMPCI_MIC_MUTE: 1222 mask = CMPCI_SB16_SW_MIC; 1223 goto sbmute; 1224 case CMPCI_LINE_IN_MUTE: 1225 mask = CMPCI_SB16_SW_LINE; 1226 sbmute: 1227 bits = cmpci_mixerreg_read(sc, CMPCI_SB16_MIXER_OUTMIX); 1228 if (sc->sc_gain[port][CMPCI_LR]) 1229 bits = bits & ~mask; 1230 else 1231 bits = bits | mask; 1232 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, bits); 1233 return; 1234 1235 case CMPCI_SPDIF_IN_SELECT: 1236 case CMPCI_MONITOR_DAC: 1237 case CMPCI_PLAYBACK_MODE: 1238 case CMPCI_SPDIF_LOOP: 1239 case CMPCI_SPDIF_OUT_PLAYBACK: 1240 cmpci_set_out_ports(sc); 1241 return; 1242 case CMPCI_SPDIF_OUT_VOLTAGE: 1243 if (CMPCI_ISCAP(sc, SPDOUT_VOLTAGE)) { 1244 if (sc->sc_gain[CMPCI_SPDIF_OUT_VOLTAGE][CMPCI_LR] 1245 == CMPCI_SPDIF_OUT_VOLTAGE_HIGH) 1246 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_5V); 1247 else 1248 cmpci_reg_set_reg_misc(sc, CMPCI_REG_5V); 1249 } 1250 return; 1251 case CMPCI_SURROUND: 1252 if (CMPCI_ISCAP(sc, SURROUND)) { 1253 if (sc->sc_gain[CMPCI_SURROUND][CMPCI_LR]) 1254 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1255 CMPCI_REG_SURROUND); 1256 else 1257 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1258 CMPCI_REG_SURROUND); 1259 } 1260 return; 1261 case CMPCI_REAR: 1262 if (CMPCI_ISCAP(sc, REAR)) { 1263 if (sc->sc_gain[CMPCI_REAR][CMPCI_LR]) 1264 cmpci_reg_set_reg_misc(sc, CMPCI_REG_N4SPK3D); 1265 else 1266 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_N4SPK3D); 1267 } 1268 return; 1269 case CMPCI_INDIVIDUAL: 1270 if (CMPCI_ISCAP(sc, INDIVIDUAL_REAR)) { 1271 if (sc->sc_gain[CMPCI_REAR][CMPCI_LR]) 1272 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1273 CMPCI_REG_INDIVIDUAL); 1274 else 1275 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1276 CMPCI_REG_INDIVIDUAL); 1277 } 1278 return; 1279 case CMPCI_REVERSE: 1280 if (CMPCI_ISCAP(sc, REVERSE_FR)) { 1281 if (sc->sc_gain[CMPCI_REVERSE][CMPCI_LR]) 1282 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1283 CMPCI_REG_REVERSE_FR); 1284 else 1285 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1286 CMPCI_REG_REVERSE_FR); 1287 } 1288 return; 1289 case CMPCI_SPDIF_IN_PHASE: 1290 if (CMPCI_ISCAP(sc, SPDIN_PHASE)) { 1291 if (sc->sc_gain[CMPCI_SPDIF_IN_PHASE][CMPCI_LR] 1292 == CMPCI_SPDIF_IN_PHASE_POSITIVE) 1293 cmpci_reg_clear_1(sc, CMPCI_REG_CHANNEL_FORMAT, 1294 CMPCI_REG_SPDIN_PHASE); 1295 else 1296 cmpci_reg_set_1(sc, CMPCI_REG_CHANNEL_FORMAT, 1297 CMPCI_REG_SPDIN_PHASE); 1298 } 1299 return; 1300 default: 1301 return; 1302 } 1303 1304 cmpci_mixerreg_write(sc, src, 1305 CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT])); 1306 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_L_TO_R(src), 1307 CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_RIGHT])); 1308 } 1309 1310 static void 1311 cmpci_set_out_ports(struct cmpci_softc *sc) 1312 { 1313 uint8_t v; 1314 int enspdout; 1315 1316 if (!CMPCI_ISCAP(sc, SPDLOOP)) 1317 return; 1318 1319 /* SPDIF/out select */ 1320 if (sc->sc_gain[CMPCI_SPDIF_LOOP][CMPCI_LR] == CMPCI_SPDIF_LOOP_OFF) { 1321 /* playback */ 1322 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP); 1323 } else { 1324 /* monitor SPDIF/in */ 1325 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP); 1326 } 1327 1328 /* SPDIF in select */ 1329 v = sc->sc_gain[CMPCI_SPDIF_IN_SELECT][CMPCI_LR]; 1330 if (v & CMPCI_SPDIFIN_SPDIFIN2) 1331 cmpci_reg_set_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN); 1332 else 1333 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN); 1334 if (v & CMPCI_SPDIFIN_SPDIFOUT) 1335 cmpci_reg_set_reg_misc(sc, CMPCI_REG_SPDFLOOPI); 1336 else 1337 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPDFLOOPI); 1338 1339 enspdout = 0; 1340 /* playback to ... */ 1341 if (CMPCI_ISCAP(sc, SPDOUT) && 1342 sc->sc_gain[CMPCI_PLAYBACK_MODE][CMPCI_LR] 1343 == CMPCI_PLAYBACK_MODE_SPDIF && 1344 (sc->sc_play.md_divide == CMPCI_REG_RATE_44100 || 1345 (CMPCI_ISCAP(sc, SPDOUT_48K) && 1346 sc->sc_play.md_divide==CMPCI_REG_RATE_48000))) { 1347 /* playback to SPDIF */ 1348 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE); 1349 enspdout = 1; 1350 if (sc->sc_play.md_divide==CMPCI_REG_RATE_48000) 1351 cmpci_reg_set_reg_misc(sc, 1352 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1353 else 1354 cmpci_reg_clear_reg_misc(sc, 1355 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1356 } else { 1357 /* playback to DAC */ 1358 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, 1359 CMPCI_REG_SPDIF0_ENABLE); 1360 if (CMPCI_ISCAP(sc, SPDOUT_48K)) 1361 cmpci_reg_clear_reg_misc(sc, 1362 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1363 } 1364 1365 /* legacy to SPDIF/out or not */ 1366 if (CMPCI_ISCAP(sc, SPDLEGACY)) { 1367 if (sc->sc_gain[CMPCI_SPDIF_OUT_PLAYBACK][CMPCI_LR] 1368 == CMPCI_SPDIF_OUT_PLAYBACK_WAVE) 1369 cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL, 1370 CMPCI_REG_LEGACY_SPDIF_ENABLE); 1371 else { 1372 cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL, 1373 CMPCI_REG_LEGACY_SPDIF_ENABLE); 1374 enspdout = 1; 1375 } 1376 } 1377 1378 /* enable/disable SPDIF/out */ 1379 if (CMPCI_ISCAP(sc, XSPDOUT) && enspdout) 1380 cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL, 1381 CMPCI_REG_XSPDIF_ENABLE); 1382 else 1383 cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL, 1384 CMPCI_REG_XSPDIF_ENABLE); 1385 1386 /* SPDIF monitor (digital to analog output) */ 1387 if (CMPCI_ISCAP(sc, SPDIN_MONITOR)) { 1388 v = sc->sc_gain[CMPCI_MONITOR_DAC][CMPCI_LR]; 1389 if (!(v & CMPCI_MONDAC_ENABLE)) 1390 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1391 CMPCI_REG_SPDIN_MONITOR); 1392 if (v & CMPCI_MONDAC_SPDOUT) 1393 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, 1394 CMPCI_REG_SPDIFOUT_DAC); 1395 else 1396 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, 1397 CMPCI_REG_SPDIFOUT_DAC); 1398 if (v & CMPCI_MONDAC_ENABLE) 1399 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1400 CMPCI_REG_SPDIN_MONITOR); 1401 } 1402 } 1403 1404 static int 1405 cmpci_set_in_ports(struct cmpci_softc *sc) 1406 { 1407 int mask; 1408 int bitsl, bitsr; 1409 1410 mask = sc->sc_in_mask; 1411 1412 /* 1413 * Note CMPCI_RECORD_SOURCE_CD, CMPCI_RECORD_SOURCE_LINE_IN and 1414 * CMPCI_RECORD_SOURCE_FM are defined to the corresponding bit 1415 * of the mixer register. 1416 */ 1417 bitsr = mask & (CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN | 1418 CMPCI_RECORD_SOURCE_FM); 1419 1420 bitsl = CMPCI_SB16_MIXER_SRC_R_TO_L(bitsr); 1421 if (mask & CMPCI_RECORD_SOURCE_MIC) { 1422 bitsl |= CMPCI_SB16_MIXER_MIC_SRC; 1423 bitsr |= CMPCI_SB16_MIXER_MIC_SRC; 1424 } 1425 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, bitsl); 1426 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, bitsr); 1427 1428 if (mask & CMPCI_RECORD_SOURCE_AUX_IN) 1429 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1430 CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN); 1431 else 1432 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1433 CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN); 1434 1435 if (mask & CMPCI_RECORD_SOURCE_WAVE) 1436 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1437 CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR); 1438 else 1439 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1440 CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR); 1441 1442 if (CMPCI_ISCAP(sc, SPDIN) && 1443 (sc->sc_rec.md_divide == CMPCI_REG_RATE_44100 || 1444 (CMPCI_ISCAP(sc, SPDOUT_48K) && 1445 sc->sc_rec.md_divide == CMPCI_REG_RATE_48000/* XXX? */))) { 1446 if (mask & CMPCI_RECORD_SOURCE_SPDIF) { 1447 /* enable SPDIF/in */ 1448 cmpci_reg_set_4(sc, 1449 CMPCI_REG_FUNC_1, 1450 CMPCI_REG_SPDIF1_ENABLE); 1451 } else { 1452 cmpci_reg_clear_4(sc, 1453 CMPCI_REG_FUNC_1, 1454 CMPCI_REG_SPDIF1_ENABLE); 1455 } 1456 } 1457 1458 return 0; 1459 } 1460 1461 static int 1462 cmpci_set_port(void *handle, mixer_ctrl_t *cp) 1463 { 1464 struct cmpci_softc *sc; 1465 int lgain, rgain; 1466 1467 sc = handle; 1468 switch (cp->dev) { 1469 case CMPCI_MIC_VOL: 1470 case CMPCI_PCSPEAKER: 1471 case CMPCI_MIC_RECVOL: 1472 if (cp->un.value.num_channels != 1) 1473 return EINVAL; 1474 /* FALLTHROUGH */ 1475 case CMPCI_DAC_VOL: 1476 case CMPCI_FM_VOL: 1477 case CMPCI_CD_VOL: 1478 case CMPCI_LINE_IN_VOL: 1479 case CMPCI_AUX_IN_VOL: 1480 case CMPCI_MASTER_VOL: 1481 if (cp->type != AUDIO_MIXER_VALUE) 1482 return EINVAL; 1483 switch (cp->un.value.num_channels) { 1484 case 1: 1485 lgain = rgain = 1486 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]; 1487 break; 1488 case 2: 1489 lgain = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]; 1490 rgain = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]; 1491 break; 1492 default: 1493 return EINVAL; 1494 } 1495 sc->sc_gain[cp->dev][CMPCI_LEFT] = lgain; 1496 sc->sc_gain[cp->dev][CMPCI_RIGHT] = rgain; 1497 1498 cmpci_set_mixer_gain(sc, cp->dev); 1499 break; 1500 1501 case CMPCI_RECORD_SOURCE: 1502 if (cp->type != AUDIO_MIXER_SET) 1503 return EINVAL; 1504 1505 if (cp->un.mask & ~(CMPCI_RECORD_SOURCE_MIC | 1506 CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN | 1507 CMPCI_RECORD_SOURCE_AUX_IN | CMPCI_RECORD_SOURCE_WAVE | 1508 CMPCI_RECORD_SOURCE_FM | CMPCI_RECORD_SOURCE_SPDIF)) 1509 return EINVAL; 1510 1511 if (cp->un.mask & CMPCI_RECORD_SOURCE_SPDIF) 1512 cp->un.mask = CMPCI_RECORD_SOURCE_SPDIF; 1513 1514 sc->sc_in_mask = cp->un.mask; 1515 return cmpci_set_in_ports(sc); 1516 1517 /* boolean */ 1518 case CMPCI_DAC_MUTE: 1519 case CMPCI_FM_MUTE: 1520 case CMPCI_CD_MUTE: 1521 case CMPCI_LINE_IN_MUTE: 1522 case CMPCI_AUX_IN_MUTE: 1523 case CMPCI_MIC_MUTE: 1524 case CMPCI_MIC_PREAMP: 1525 case CMPCI_PLAYBACK_MODE: 1526 case CMPCI_SPDIF_IN_PHASE: 1527 case CMPCI_SPDIF_LOOP: 1528 case CMPCI_SPDIF_OUT_PLAYBACK: 1529 case CMPCI_SPDIF_OUT_VOLTAGE: 1530 case CMPCI_REAR: 1531 case CMPCI_INDIVIDUAL: 1532 case CMPCI_REVERSE: 1533 case CMPCI_SURROUND: 1534 if (cp->type != AUDIO_MIXER_ENUM) 1535 return EINVAL; 1536 sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord != 0; 1537 cmpci_set_mixer_gain(sc, cp->dev); 1538 break; 1539 1540 case CMPCI_SPDIF_IN_SELECT: 1541 switch (cp->un.ord) { 1542 case CMPCI_SPDIF_IN_SPDIN1: 1543 case CMPCI_SPDIF_IN_SPDIN2: 1544 case CMPCI_SPDIF_IN_SPDOUT: 1545 break; 1546 default: 1547 return EINVAL; 1548 } 1549 goto xenum; 1550 case CMPCI_MONITOR_DAC: 1551 switch (cp->un.ord) { 1552 case CMPCI_MONITOR_DAC_OFF: 1553 case CMPCI_MONITOR_DAC_SPDIN: 1554 case CMPCI_MONITOR_DAC_SPDOUT: 1555 break; 1556 default: 1557 return EINVAL; 1558 } 1559 xenum: 1560 if (cp->type != AUDIO_MIXER_ENUM) 1561 return EINVAL; 1562 sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord; 1563 cmpci_set_mixer_gain(sc, cp->dev); 1564 break; 1565 1566 default: 1567 return EINVAL; 1568 } 1569 1570 return 0; 1571 } 1572 1573 static int 1574 cmpci_get_port(void *handle, mixer_ctrl_t *cp) 1575 { 1576 struct cmpci_softc *sc; 1577 1578 sc = handle; 1579 switch (cp->dev) { 1580 case CMPCI_MIC_VOL: 1581 case CMPCI_PCSPEAKER: 1582 case CMPCI_MIC_RECVOL: 1583 if (cp->un.value.num_channels != 1) 1584 return EINVAL; 1585 /*FALLTHROUGH*/ 1586 case CMPCI_DAC_VOL: 1587 case CMPCI_FM_VOL: 1588 case CMPCI_CD_VOL: 1589 case CMPCI_LINE_IN_VOL: 1590 case CMPCI_AUX_IN_VOL: 1591 case CMPCI_MASTER_VOL: 1592 switch (cp->un.value.num_channels) { 1593 case 1: 1594 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = 1595 sc->sc_gain[cp->dev][CMPCI_LEFT]; 1596 break; 1597 case 2: 1598 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 1599 sc->sc_gain[cp->dev][CMPCI_LEFT]; 1600 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 1601 sc->sc_gain[cp->dev][CMPCI_RIGHT]; 1602 break; 1603 default: 1604 return EINVAL; 1605 } 1606 break; 1607 1608 case CMPCI_RECORD_SOURCE: 1609 cp->un.mask = sc->sc_in_mask; 1610 break; 1611 1612 case CMPCI_DAC_MUTE: 1613 case CMPCI_FM_MUTE: 1614 case CMPCI_CD_MUTE: 1615 case CMPCI_LINE_IN_MUTE: 1616 case CMPCI_AUX_IN_MUTE: 1617 case CMPCI_MIC_MUTE: 1618 case CMPCI_MIC_PREAMP: 1619 case CMPCI_PLAYBACK_MODE: 1620 case CMPCI_SPDIF_IN_SELECT: 1621 case CMPCI_SPDIF_IN_PHASE: 1622 case CMPCI_SPDIF_LOOP: 1623 case CMPCI_SPDIF_OUT_PLAYBACK: 1624 case CMPCI_SPDIF_OUT_VOLTAGE: 1625 case CMPCI_MONITOR_DAC: 1626 case CMPCI_REAR: 1627 case CMPCI_INDIVIDUAL: 1628 case CMPCI_REVERSE: 1629 case CMPCI_SURROUND: 1630 cp->un.ord = sc->sc_gain[cp->dev][CMPCI_LR]; 1631 break; 1632 1633 default: 1634 return EINVAL; 1635 } 1636 1637 return 0; 1638 } 1639 1640 /* ARGSUSED */ 1641 static size_t 1642 cmpci_round_buffersize(void *handle, int direction, 1643 size_t bufsize) 1644 { 1645 1646 if (bufsize > 0x10000) 1647 bufsize = 0x10000; 1648 1649 return bufsize; 1650 } 1651 1652 static paddr_t 1653 cmpci_mappage(void *handle, void *addr, off_t offset, int prot) 1654 { 1655 struct cmpci_dmanode *p; 1656 1657 if (offset < 0 || NULL == (p = cmpci_find_dmamem(handle, addr))) 1658 return -1; 1659 1660 return bus_dmamem_mmap(p->cd_tag, p->cd_segs, 1661 sizeof(p->cd_segs)/sizeof(p->cd_segs[0]), 1662 offset, prot, BUS_DMA_WAITOK); 1663 } 1664 1665 /* ARGSUSED */ 1666 static int 1667 cmpci_get_props(void *handle) 1668 { 1669 1670 return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 1671 } 1672 1673 static int 1674 cmpci_trigger_output(void *handle, void *start, void *end, int blksize, 1675 void (*intr)(void *), void *arg, 1676 const audio_params_t *param) 1677 { 1678 struct cmpci_softc *sc; 1679 struct cmpci_dmanode *p; 1680 int bps; 1681 1682 sc = handle; 1683 sc->sc_play.intr = intr; 1684 sc->sc_play.intr_arg = arg; 1685 bps = param->channels * param->precision / 8; 1686 if (!bps) 1687 return EINVAL; 1688 1689 /* set DMA frame */ 1690 if (!(p = cmpci_find_dmamem(sc, start))) 1691 return EINVAL; 1692 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BASE, 1693 DMAADDR(p)); 1694 delay(10); 1695 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BYTES, 1696 ((char *)end - (char *)start + 1) / bps - 1); 1697 delay(10); 1698 1699 /* set interrupt count */ 1700 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_SAMPLES, 1701 (blksize + bps - 1) / bps - 1); 1702 delay(10); 1703 1704 /* start DMA */ 1705 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); /* PLAY */ 1706 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 1707 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); 1708 1709 return 0; 1710 } 1711 1712 static int 1713 cmpci_trigger_input(void *handle, void *start, void *end, int blksize, 1714 void (*intr)(void *), void *arg, 1715 const audio_params_t *param) 1716 { 1717 struct cmpci_softc *sc; 1718 struct cmpci_dmanode *p; 1719 int bps; 1720 1721 sc = handle; 1722 sc->sc_rec.intr = intr; 1723 sc->sc_rec.intr_arg = arg; 1724 bps = param->channels * param->precision / 8; 1725 if (!bps) 1726 return EINVAL; 1727 1728 /* set DMA frame */ 1729 if (!(p=cmpci_find_dmamem(sc, start))) 1730 return EINVAL; 1731 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BASE, 1732 DMAADDR(p)); 1733 delay(10); 1734 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BYTES, 1735 ((char *)end - (char *)start + 1) / bps - 1); 1736 delay(10); 1737 1738 /* set interrupt count */ 1739 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_SAMPLES, 1740 (blksize + bps - 1) / bps - 1); 1741 delay(10); 1742 1743 /* start DMA */ 1744 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_DIR); /* REC */ 1745 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 1746 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); 1747 1748 return 0; 1749 } 1750 1751 /* end of file */ 1752
Indexes created Sat Sep 27 21:09:56 GMT 2025