cmpci.c revision 1.38
1 /* $NetBSD: cmpci.c,v 1.38 2008/04/10 19:13:36 cegger Exp $ */ 2 3 /* 4 * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Takuya SHIOZAKI <tshiozak (at) NetBSD.org> . 9 * 10 * This code is derived from software contributed to The NetBSD Foundation 11 * by ITOH Yasufumi. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 /* 37 * C-Media CMI8x38 Audio Chip Support. 38 * 39 * TODO: 40 * - 4ch / 6ch support. 41 * - Joystick support. 42 * 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: cmpci.c,v 1.38 2008/04/10 19:13:36 cegger Exp $"); 47 48 #if defined(AUDIO_DEBUG) || defined(DEBUG) 49 #define DPRINTF(x) if (cmpcidebug) printf x 50 int cmpcidebug = 0; 51 #else 52 #define DPRINTF(x) 53 #endif 54 55 #include "mpu.h" 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/kernel.h> 60 #include <sys/malloc.h> 61 #include <sys/device.h> 62 #include <sys/proc.h> 63 64 #include <dev/pci/pcidevs.h> 65 #include <dev/pci/pcivar.h> 66 67 #include <sys/audioio.h> 68 #include <dev/audio_if.h> 69 #include <dev/midi_if.h> 70 71 #include <dev/mulaw.h> 72 #include <dev/auconv.h> 73 #include <dev/pci/cmpcireg.h> 74 #include <dev/pci/cmpcivar.h> 75 76 #include <dev/ic/mpuvar.h> 77 #include <sys/bus.h> 78 #include <sys/intr.h> 79 80 /* 81 * Low-level HW interface 82 */ 83 static inline uint8_t cmpci_mixerreg_read(struct cmpci_softc *, uint8_t); 84 static inline void cmpci_mixerreg_write(struct cmpci_softc *, 85 uint8_t, uint8_t); 86 static inline void cmpci_reg_partial_write_1(struct cmpci_softc *, int, int, 87 unsigned, unsigned); 88 static inline void cmpci_reg_partial_write_4(struct cmpci_softc *, int, int, 89 uint32_t, uint32_t); 90 static inline void cmpci_reg_set_1(struct cmpci_softc *, int, uint8_t); 91 static inline void cmpci_reg_clear_1(struct cmpci_softc *, int, uint8_t); 92 static inline void cmpci_reg_set_4(struct cmpci_softc *, int, uint32_t); 93 static inline void cmpci_reg_clear_4(struct cmpci_softc *, int, uint32_t); 94 static inline void cmpci_reg_set_reg_misc(struct cmpci_softc *, uint32_t); 95 static inline void cmpci_reg_clear_reg_misc(struct cmpci_softc *, uint32_t); 96 static int cmpci_rate_to_index(int); 97 static inline int cmpci_index_to_rate(int); 98 static inline int cmpci_index_to_divider(int); 99 100 static int cmpci_adjust(int, int); 101 static void cmpci_set_mixer_gain(struct cmpci_softc *, int); 102 static void cmpci_set_out_ports(struct cmpci_softc *); 103 static int cmpci_set_in_ports(struct cmpci_softc *); 104 105 106 /* 107 * autoconf interface 108 */ 109 static int cmpci_match(struct device *, struct cfdata *, void *); 110 static void cmpci_attach(struct device *, struct device *, void *); 111 112 CFATTACH_DECL(cmpci, sizeof (struct cmpci_softc), 113 cmpci_match, cmpci_attach, NULL, NULL); 114 115 /* interrupt */ 116 static int cmpci_intr(void *); 117 118 119 /* 120 * DMA stuffs 121 */ 122 static int cmpci_alloc_dmamem(struct cmpci_softc *, size_t, 123 struct malloc_type *, int, void **); 124 static int cmpci_free_dmamem(struct cmpci_softc *, void *, 125 struct malloc_type *); 126 static struct cmpci_dmanode * cmpci_find_dmamem(struct cmpci_softc *, 127 void *); 128 129 130 /* 131 * interface to machine independent layer 132 */ 133 static int cmpci_query_encoding(void *, struct audio_encoding *); 134 static int cmpci_set_params(void *, int, int, audio_params_t *, 135 audio_params_t *, stream_filter_list_t *, stream_filter_list_t *); 136 static int cmpci_round_blocksize(void *, int, int, const audio_params_t *); 137 static int cmpci_halt_output(void *); 138 static int cmpci_halt_input(void *); 139 static int cmpci_getdev(void *, struct audio_device *); 140 static int cmpci_set_port(void *, mixer_ctrl_t *); 141 static int cmpci_get_port(void *, mixer_ctrl_t *); 142 static int cmpci_query_devinfo(void *, mixer_devinfo_t *); 143 static void *cmpci_allocm(void *, int, size_t, struct malloc_type *, int); 144 static void cmpci_freem(void *, void *, struct malloc_type *); 145 static size_t cmpci_round_buffersize(void *, int, size_t); 146 static paddr_t cmpci_mappage(void *, void *, off_t, int); 147 static int cmpci_get_props(void *); 148 static int cmpci_trigger_output(void *, void *, void *, int, 149 void (*)(void *), void *, const audio_params_t *); 150 static int cmpci_trigger_input(void *, void *, void *, int, 151 void (*)(void *), void *, const audio_params_t *); 152 153 static const struct audio_hw_if cmpci_hw_if = { 154 NULL, /* open */ 155 NULL, /* close */ 156 NULL, /* drain */ 157 cmpci_query_encoding, /* query_encoding */ 158 cmpci_set_params, /* set_params */ 159 cmpci_round_blocksize, /* round_blocksize */ 160 NULL, /* commit_settings */ 161 NULL, /* init_output */ 162 NULL, /* init_input */ 163 NULL, /* start_output */ 164 NULL, /* start_input */ 165 cmpci_halt_output, /* halt_output */ 166 cmpci_halt_input, /* halt_input */ 167 NULL, /* speaker_ctl */ 168 cmpci_getdev, /* getdev */ 169 NULL, /* setfd */ 170 cmpci_set_port, /* set_port */ 171 cmpci_get_port, /* get_port */ 172 cmpci_query_devinfo, /* query_devinfo */ 173 cmpci_allocm, /* allocm */ 174 cmpci_freem, /* freem */ 175 cmpci_round_buffersize,/* round_buffersize */ 176 cmpci_mappage, /* mappage */ 177 cmpci_get_props, /* get_props */ 178 cmpci_trigger_output, /* trigger_output */ 179 cmpci_trigger_input, /* trigger_input */ 180 NULL, /* dev_ioctl */ 181 NULL, /* powerstate */ 182 }; 183 184 #define CMPCI_NFORMATS 4 185 static const struct audio_format cmpci_formats[CMPCI_NFORMATS] = { 186 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 187 2, AUFMT_STEREO, 0, {5512, 48000}}, 188 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 189 1, AUFMT_MONAURAL, 0, {5512, 48000}}, 190 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8, 191 2, AUFMT_STEREO, 0, {5512, 48000}}, 192 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8, 193 1, AUFMT_MONAURAL, 0, {5512, 48000}}, 194 }; 195 196 197 /* 198 * Low-level HW interface 199 */ 200 201 /* mixer register read/write */ 202 static inline uint8_t 203 cmpci_mixerreg_read(struct cmpci_softc *sc, uint8_t no) 204 { 205 uint8_t ret; 206 207 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no); 208 delay(10); 209 ret = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA); 210 delay(10); 211 return ret; 212 } 213 214 static inline void 215 cmpci_mixerreg_write(struct cmpci_softc *sc, uint8_t no, uint8_t val) 216 { 217 218 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no); 219 delay(10); 220 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA, val); 221 delay(10); 222 } 223 224 225 /* register partial write */ 226 static inline void 227 cmpci_reg_partial_write_1(struct cmpci_softc *sc, int no, int shift, 228 unsigned mask, unsigned val) 229 { 230 231 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 232 (val<<shift) | 233 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift))); 234 delay(10); 235 } 236 237 static inline void 238 cmpci_reg_partial_write_4(struct cmpci_softc *sc, int no, int shift, 239 uint32_t mask, uint32_t val) 240 { 241 242 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 243 (val<<shift) | 244 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift))); 245 delay(10); 246 } 247 248 /* register set/clear bit */ 249 static inline void 250 cmpci_reg_set_1(struct cmpci_softc *sc, int no, uint8_t mask) 251 { 252 253 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 254 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) | mask)); 255 delay(10); 256 } 257 258 static inline void 259 cmpci_reg_clear_1(struct cmpci_softc *sc, int no, uint8_t mask) 260 { 261 262 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 263 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~mask)); 264 delay(10); 265 } 266 267 static inline void 268 cmpci_reg_set_4(struct cmpci_softc *sc, int no, uint32_t mask) 269 { 270 271 /* use cmpci_reg_set_reg_misc() for CMPCI_REG_MISC */ 272 KDASSERT(no != CMPCI_REG_MISC); 273 274 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 275 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) | mask)); 276 delay(10); 277 } 278 279 static inline void 280 cmpci_reg_clear_4(struct cmpci_softc *sc, int no, uint32_t mask) 281 { 282 283 /* use cmpci_reg_clear_reg_misc() for CMPCI_REG_MISC */ 284 KDASSERT(no != CMPCI_REG_MISC); 285 286 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 287 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~mask)); 288 delay(10); 289 } 290 291 /* 292 * The CMPCI_REG_MISC register needs special handling, since one of 293 * its bits has different read/write values. 294 */ 295 static inline void 296 cmpci_reg_set_reg_misc(struct cmpci_softc *sc, uint32_t mask) 297 { 298 299 sc->sc_reg_misc |= mask; 300 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC, 301 sc->sc_reg_misc); 302 delay(10); 303 } 304 305 static inline void 306 cmpci_reg_clear_reg_misc(struct cmpci_softc *sc, uint32_t mask) 307 { 308 309 sc->sc_reg_misc &= ~mask; 310 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC, 311 sc->sc_reg_misc); 312 delay(10); 313 } 314 315 /* rate */ 316 static const struct { 317 int rate; 318 int divider; 319 } cmpci_rate_table[CMPCI_REG_NUMRATE] = { 320 #define _RATE(n) { n, CMPCI_REG_RATE_ ## n } 321 _RATE(5512), 322 _RATE(8000), 323 _RATE(11025), 324 _RATE(16000), 325 _RATE(22050), 326 _RATE(32000), 327 _RATE(44100), 328 _RATE(48000) 329 #undef _RATE 330 }; 331 332 static int 333 cmpci_rate_to_index(int rate) 334 { 335 int i; 336 337 for (i = 0; i < CMPCI_REG_NUMRATE - 1; i++) 338 if (rate <= 339 (cmpci_rate_table[i].rate+cmpci_rate_table[i+1].rate) / 2) 340 return i; 341 return i; /* 48000 */ 342 } 343 344 static inline int 345 cmpci_index_to_rate(int index) 346 { 347 348 return cmpci_rate_table[index].rate; 349 } 350 351 static inline int 352 cmpci_index_to_divider(int index) 353 { 354 355 return cmpci_rate_table[index].divider; 356 } 357 358 /* 359 * interface to configure the device. 360 */ 361 static int 362 cmpci_match(struct device *parent, struct cfdata *match, 363 void *aux) 364 { 365 struct pci_attach_args *pa; 366 367 pa = (struct pci_attach_args *)aux; 368 if ( PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CMEDIA && 369 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338A || 370 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338B || 371 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738 || 372 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738B) ) 373 return 1; 374 375 return 0; 376 } 377 378 static void 379 cmpci_attach(struct device *parent, struct device *self, void *aux) 380 { 381 struct cmpci_softc *sc; 382 struct pci_attach_args *pa; 383 struct audio_attach_args aa; 384 pci_intr_handle_t ih; 385 char const *strintr; 386 char devinfo[256]; 387 int i, v; 388 389 sc = (struct cmpci_softc *)self; 390 pa = (struct pci_attach_args *)aux; 391 aprint_naive(": Audio controller\n"); 392 393 sc->sc_id = pa->pa_id; 394 sc->sc_class = pa->pa_class; 395 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 396 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, 397 PCI_REVISION(sc->sc_class)); 398 switch (PCI_PRODUCT(sc->sc_id)) { 399 case PCI_PRODUCT_CMEDIA_CMI8338A: 400 /*FALLTHROUGH*/ 401 case PCI_PRODUCT_CMEDIA_CMI8338B: 402 sc->sc_capable = CMPCI_CAP_CMI8338; 403 break; 404 case PCI_PRODUCT_CMEDIA_CMI8738: 405 /*FALLTHROUGH*/ 406 case PCI_PRODUCT_CMEDIA_CMI8738B: 407 sc->sc_capable = CMPCI_CAP_CMI8738; 408 break; 409 } 410 411 /* map I/O space */ 412 if (pci_mapreg_map(pa, CMPCI_PCI_IOBASEREG, PCI_MAPREG_TYPE_IO, 0, 413 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 414 aprint_error_dev(&sc->sc_dev, "failed to map I/O space\n"); 415 return; 416 } 417 418 /* interrupt */ 419 if (pci_intr_map(pa, &ih)) { 420 aprint_error_dev(&sc->sc_dev, "failed to map interrupt\n"); 421 return; 422 } 423 strintr = pci_intr_string(pa->pa_pc, ih); 424 sc->sc_ih=pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, cmpci_intr, sc); 425 if (sc->sc_ih == NULL) { 426 aprint_error_dev(&sc->sc_dev, "failed to establish interrupt"); 427 if (strintr != NULL) 428 aprint_normal(" at %s", strintr); 429 aprint_normal("\n"); 430 return; 431 } 432 aprint_normal_dev(&sc->sc_dev, "interrupting at %s\n", strintr); 433 434 sc->sc_dmat = pa->pa_dmat; 435 436 audio_attach_mi(&cmpci_hw_if, sc, &sc->sc_dev); 437 438 /* attach OPL device */ 439 aa.type = AUDIODEV_TYPE_OPL; 440 aa.hwif = NULL; 441 aa.hdl = NULL; 442 (void)config_found(&sc->sc_dev, &aa, audioprint); 443 444 /* attach MPU-401 device */ 445 aa.type = AUDIODEV_TYPE_MPU; 446 aa.hwif = NULL; 447 aa.hdl = NULL; 448 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh, 449 CMPCI_REG_MPU_BASE, CMPCI_REG_MPU_SIZE, &sc->sc_mpu_ioh) == 0) 450 sc->sc_mpudev = config_found(&sc->sc_dev, &aa, audioprint); 451 452 /* get initial value (this is 0 and may be omitted but just in case) */ 453 sc->sc_reg_misc = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 454 CMPCI_REG_MISC) & ~CMPCI_REG_SPDIF48K; 455 456 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_RESET, 0); 457 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0); 458 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0); 459 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, 460 CMPCI_SB16_SW_CD|CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE); 461 for (i = 0; i < CMPCI_NDEVS; i++) { 462 switch(i) { 463 /* 464 * CMI8738 defaults are 465 * master: 0xe0 (0x00 - 0xf8) 466 * FM, DAC: 0xc0 (0x00 - 0xf8) 467 * PC speaker: 0x80 (0x00 - 0xc0) 468 * others: 0 469 */ 470 /* volume */ 471 case CMPCI_MASTER_VOL: 472 v = 128; /* 224 */ 473 break; 474 case CMPCI_FM_VOL: 475 case CMPCI_DAC_VOL: 476 v = 192; 477 break; 478 case CMPCI_PCSPEAKER: 479 v = 128; 480 break; 481 482 /* booleans, set to true */ 483 case CMPCI_CD_MUTE: 484 case CMPCI_MIC_MUTE: 485 case CMPCI_LINE_IN_MUTE: 486 case CMPCI_AUX_IN_MUTE: 487 v = 1; 488 break; 489 490 /* volume with inital value 0 */ 491 case CMPCI_CD_VOL: 492 case CMPCI_LINE_IN_VOL: 493 case CMPCI_AUX_IN_VOL: 494 case CMPCI_MIC_VOL: 495 case CMPCI_MIC_RECVOL: 496 /* FALLTHROUGH */ 497 498 /* others are cleared */ 499 case CMPCI_MIC_PREAMP: 500 case CMPCI_RECORD_SOURCE: 501 case CMPCI_PLAYBACK_MODE: 502 case CMPCI_SPDIF_IN_SELECT: 503 case CMPCI_SPDIF_IN_PHASE: 504 case CMPCI_SPDIF_LOOP: 505 case CMPCI_SPDIF_OUT_PLAYBACK: 506 case CMPCI_SPDIF_OUT_VOLTAGE: 507 case CMPCI_MONITOR_DAC: 508 case CMPCI_REAR: 509 case CMPCI_INDIVIDUAL: 510 case CMPCI_REVERSE: 511 case CMPCI_SURROUND: 512 default: 513 v = 0; 514 break; 515 } 516 sc->sc_gain[i][CMPCI_LEFT] = sc->sc_gain[i][CMPCI_RIGHT] = v; 517 cmpci_set_mixer_gain(sc, i); 518 } 519 } 520 521 static int 522 cmpci_intr(void *handle) 523 { 524 struct cmpci_softc *sc = handle; 525 #if NMPU > 0 526 struct mpu_softc *sc_mpu = device_private(sc->sc_mpudev); 527 #endif 528 uint32_t intrstat; 529 530 intrstat = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 531 CMPCI_REG_INTR_STATUS); 532 533 if (!(intrstat & CMPCI_REG_ANY_INTR)) 534 return 0; 535 536 delay(10); 537 538 /* disable and reset intr */ 539 if (intrstat & CMPCI_REG_CH0_INTR) 540 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, 541 CMPCI_REG_CH0_INTR_ENABLE); 542 if (intrstat & CMPCI_REG_CH1_INTR) 543 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, 544 CMPCI_REG_CH1_INTR_ENABLE); 545 546 if (intrstat & CMPCI_REG_CH0_INTR) { 547 if (sc->sc_play.intr != NULL) 548 (*sc->sc_play.intr)(sc->sc_play.intr_arg); 549 } 550 if (intrstat & CMPCI_REG_CH1_INTR) { 551 if (sc->sc_rec.intr != NULL) 552 (*sc->sc_rec.intr)(sc->sc_rec.intr_arg); 553 } 554 555 /* enable intr */ 556 if (intrstat & CMPCI_REG_CH0_INTR) 557 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, 558 CMPCI_REG_CH0_INTR_ENABLE); 559 if (intrstat & CMPCI_REG_CH1_INTR) 560 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, 561 CMPCI_REG_CH1_INTR_ENABLE); 562 563 #if NMPU > 0 564 if (intrstat & CMPCI_REG_UART_INTR && sc_mpu != NULL) 565 mpu_intr(sc_mpu); 566 #endif 567 568 return 1; 569 } 570 571 static int 572 cmpci_query_encoding(void *handle, struct audio_encoding *fp) 573 { 574 575 switch (fp->index) { 576 case 0: 577 strcpy(fp->name, AudioEulinear); 578 fp->encoding = AUDIO_ENCODING_ULINEAR; 579 fp->precision = 8; 580 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 581 break; 582 case 1: 583 strcpy(fp->name, AudioEmulaw); 584 fp->encoding = AUDIO_ENCODING_ULAW; 585 fp->precision = 8; 586 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 587 break; 588 case 2: 589 strcpy(fp->name, AudioEalaw); 590 fp->encoding = AUDIO_ENCODING_ALAW; 591 fp->precision = 8; 592 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 593 break; 594 case 3: 595 strcpy(fp->name, AudioEslinear); 596 fp->encoding = AUDIO_ENCODING_SLINEAR; 597 fp->precision = 8; 598 fp->flags = 0; 599 break; 600 case 4: 601 strcpy(fp->name, AudioEslinear_le); 602 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 603 fp->precision = 16; 604 fp->flags = 0; 605 break; 606 case 5: 607 strcpy(fp->name, AudioEulinear_le); 608 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 609 fp->precision = 16; 610 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 611 break; 612 case 6: 613 strcpy(fp->name, AudioEslinear_be); 614 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 615 fp->precision = 16; 616 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 617 break; 618 case 7: 619 strcpy(fp->name, AudioEulinear_be); 620 fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 621 fp->precision = 16; 622 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 623 break; 624 default: 625 return EINVAL; 626 } 627 return 0; 628 } 629 630 631 static int 632 cmpci_set_params(void *handle, int setmode, int usemode, 633 audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil, 634 stream_filter_list_t *rfil) 635 { 636 int i; 637 struct cmpci_softc *sc; 638 639 sc = handle; 640 for (i = 0; i < 2; i++) { 641 int md_format; 642 int md_divide; 643 int md_index; 644 int mode; 645 audio_params_t *p; 646 stream_filter_list_t *fil; 647 int ind; 648 649 switch (i) { 650 case 0: 651 mode = AUMODE_PLAY; 652 p = play; 653 fil = pfil; 654 break; 655 case 1: 656 mode = AUMODE_RECORD; 657 p = rec; 658 fil = rfil; 659 break; 660 default: 661 return EINVAL; 662 } 663 664 if (!(setmode & mode)) 665 continue; 666 667 md_index = cmpci_rate_to_index(p->sample_rate); 668 md_divide = cmpci_index_to_divider(md_index); 669 p->sample_rate = cmpci_index_to_rate(md_index); 670 DPRINTF(("%s: sample:%u, divider=%d\n", 671 device_xname(&sc->sc_dev), p->sample_rate, md_divide)); 672 673 ind = auconv_set_converter(cmpci_formats, CMPCI_NFORMATS, 674 mode, p, FALSE, fil); 675 if (ind < 0) 676 return EINVAL; 677 if (fil->req_size > 0) 678 p = &fil->filters[0].param; 679 680 /* format */ 681 md_format = p->channels == 1 682 ? CMPCI_REG_FORMAT_MONO : CMPCI_REG_FORMAT_STEREO; 683 md_format |= p->precision == 16 684 ? CMPCI_REG_FORMAT_16BIT : CMPCI_REG_FORMAT_8BIT; 685 if (mode & AUMODE_PLAY) { 686 cmpci_reg_partial_write_4(sc, 687 CMPCI_REG_CHANNEL_FORMAT, 688 CMPCI_REG_CH0_FORMAT_SHIFT, 689 CMPCI_REG_CH0_FORMAT_MASK, md_format); 690 cmpci_reg_partial_write_4(sc, 691 CMPCI_REG_FUNC_1, CMPCI_REG_DAC_FS_SHIFT, 692 CMPCI_REG_DAC_FS_MASK, md_divide); 693 sc->sc_play.md_divide = md_divide; 694 } else { 695 cmpci_reg_partial_write_4(sc, 696 CMPCI_REG_CHANNEL_FORMAT, 697 CMPCI_REG_CH1_FORMAT_SHIFT, 698 CMPCI_REG_CH1_FORMAT_MASK, md_format); 699 cmpci_reg_partial_write_4(sc, 700 CMPCI_REG_FUNC_1, CMPCI_REG_ADC_FS_SHIFT, 701 CMPCI_REG_ADC_FS_MASK, md_divide); 702 sc->sc_rec.md_divide = md_divide; 703 } 704 cmpci_set_out_ports(sc); 705 cmpci_set_in_ports(sc); 706 } 707 return 0; 708 } 709 710 /* ARGSUSED */ 711 static int 712 cmpci_round_blocksize(void *handle, int block, 713 int mode, const audio_params_t *param) 714 { 715 716 return block & -4; 717 } 718 719 static int 720 cmpci_halt_output(void *handle) 721 { 722 struct cmpci_softc *sc; 723 int s; 724 725 sc = handle; 726 s = splaudio(); 727 sc->sc_play.intr = NULL; 728 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 729 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); 730 /* wait for reset DMA */ 731 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); 732 delay(10); 733 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); 734 splx(s); 735 736 return 0; 737 } 738 739 static int 740 cmpci_halt_input(void *handle) 741 { 742 struct cmpci_softc *sc; 743 int s; 744 745 sc = handle; 746 s = splaudio(); 747 sc->sc_rec.intr = NULL; 748 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 749 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); 750 /* wait for reset DMA */ 751 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); 752 delay(10); 753 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); 754 splx(s); 755 756 return 0; 757 } 758 759 /* get audio device information */ 760 static int 761 cmpci_getdev(void *handle, struct audio_device *ad) 762 { 763 struct cmpci_softc *sc; 764 765 sc = handle; 766 strncpy(ad->name, "CMI PCI Audio", sizeof(ad->name)); 767 snprintf(ad->version, sizeof(ad->version), "0x%02x", 768 PCI_REVISION(sc->sc_class)); 769 switch (PCI_PRODUCT(sc->sc_id)) { 770 case PCI_PRODUCT_CMEDIA_CMI8338A: 771 strncpy(ad->config, "CMI8338A", sizeof(ad->config)); 772 break; 773 case PCI_PRODUCT_CMEDIA_CMI8338B: 774 strncpy(ad->config, "CMI8338B", sizeof(ad->config)); 775 break; 776 case PCI_PRODUCT_CMEDIA_CMI8738: 777 strncpy(ad->config, "CMI8738", sizeof(ad->config)); 778 break; 779 case PCI_PRODUCT_CMEDIA_CMI8738B: 780 strncpy(ad->config, "CMI8738B", sizeof(ad->config)); 781 break; 782 default: 783 strncpy(ad->config, "unknown", sizeof(ad->config)); 784 } 785 786 return 0; 787 } 788 789 /* mixer device information */ 790 int 791 cmpci_query_devinfo(void *handle, mixer_devinfo_t *dip) 792 { 793 static const char *const mixer_port_names[] = { 794 AudioNdac, AudioNfmsynth, AudioNcd, AudioNline, AudioNaux, 795 AudioNmicrophone 796 }; 797 static const char *const mixer_classes[] = { 798 AudioCinputs, AudioCoutputs, AudioCrecord, CmpciCplayback, 799 CmpciCspdif 800 }; 801 struct cmpci_softc *sc; 802 int i; 803 804 sc = handle; 805 dip->prev = dip->next = AUDIO_MIXER_LAST; 806 807 switch (dip->index) { 808 case CMPCI_INPUT_CLASS: 809 case CMPCI_OUTPUT_CLASS: 810 case CMPCI_RECORD_CLASS: 811 case CMPCI_PLAYBACK_CLASS: 812 case CMPCI_SPDIF_CLASS: 813 dip->type = AUDIO_MIXER_CLASS; 814 dip->mixer_class = dip->index; 815 strcpy(dip->label.name, 816 mixer_classes[dip->index - CMPCI_INPUT_CLASS]); 817 return 0; 818 819 case CMPCI_AUX_IN_VOL: 820 dip->un.v.delta = 1 << (8 - CMPCI_REG_AUX_VALBITS); 821 goto vol1; 822 case CMPCI_DAC_VOL: 823 case CMPCI_FM_VOL: 824 case CMPCI_CD_VOL: 825 case CMPCI_LINE_IN_VOL: 826 case CMPCI_MIC_VOL: 827 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS); 828 vol1: dip->mixer_class = CMPCI_INPUT_CLASS; 829 dip->next = dip->index + 6; /* CMPCI_xxx_MUTE */ 830 strcpy(dip->label.name, mixer_port_names[dip->index]); 831 dip->un.v.num_channels = (dip->index == CMPCI_MIC_VOL ? 1 : 2); 832 vol: 833 dip->type = AUDIO_MIXER_VALUE; 834 strcpy(dip->un.v.units.name, AudioNvolume); 835 return 0; 836 837 case CMPCI_MIC_MUTE: 838 dip->next = CMPCI_MIC_PREAMP; 839 /* FALLTHROUGH */ 840 case CMPCI_DAC_MUTE: 841 case CMPCI_FM_MUTE: 842 case CMPCI_CD_MUTE: 843 case CMPCI_LINE_IN_MUTE: 844 case CMPCI_AUX_IN_MUTE: 845 dip->prev = dip->index - 6; /* CMPCI_xxx_VOL */ 846 dip->mixer_class = CMPCI_INPUT_CLASS; 847 strcpy(dip->label.name, AudioNmute); 848 goto on_off; 849 on_off: 850 dip->type = AUDIO_MIXER_ENUM; 851 dip->un.e.num_mem = 2; 852 strcpy(dip->un.e.member[0].label.name, AudioNoff); 853 dip->un.e.member[0].ord = 0; 854 strcpy(dip->un.e.member[1].label.name, AudioNon); 855 dip->un.e.member[1].ord = 1; 856 return 0; 857 858 case CMPCI_MIC_PREAMP: 859 dip->mixer_class = CMPCI_INPUT_CLASS; 860 dip->prev = CMPCI_MIC_MUTE; 861 strcpy(dip->label.name, AudioNpreamp); 862 goto on_off; 863 case CMPCI_PCSPEAKER: 864 dip->mixer_class = CMPCI_INPUT_CLASS; 865 strcpy(dip->label.name, AudioNspeaker); 866 dip->un.v.num_channels = 1; 867 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_SPEAKER_VALBITS); 868 goto vol; 869 case CMPCI_RECORD_SOURCE: 870 dip->mixer_class = CMPCI_RECORD_CLASS; 871 strcpy(dip->label.name, AudioNsource); 872 dip->type = AUDIO_MIXER_SET; 873 dip->un.s.num_mem = 7; 874 strcpy(dip->un.s.member[0].label.name, AudioNmicrophone); 875 dip->un.s.member[0].mask = CMPCI_RECORD_SOURCE_MIC; 876 strcpy(dip->un.s.member[1].label.name, AudioNcd); 877 dip->un.s.member[1].mask = CMPCI_RECORD_SOURCE_CD; 878 strcpy(dip->un.s.member[2].label.name, AudioNline); 879 dip->un.s.member[2].mask = CMPCI_RECORD_SOURCE_LINE_IN; 880 strcpy(dip->un.s.member[3].label.name, AudioNaux); 881 dip->un.s.member[3].mask = CMPCI_RECORD_SOURCE_AUX_IN; 882 strcpy(dip->un.s.member[4].label.name, AudioNwave); 883 dip->un.s.member[4].mask = CMPCI_RECORD_SOURCE_WAVE; 884 strcpy(dip->un.s.member[5].label.name, AudioNfmsynth); 885 dip->un.s.member[5].mask = CMPCI_RECORD_SOURCE_FM; 886 strcpy(dip->un.s.member[6].label.name, CmpciNspdif); 887 dip->un.s.member[6].mask = CMPCI_RECORD_SOURCE_SPDIF; 888 return 0; 889 case CMPCI_MIC_RECVOL: 890 dip->mixer_class = CMPCI_RECORD_CLASS; 891 strcpy(dip->label.name, AudioNmicrophone); 892 dip->un.v.num_channels = 1; 893 dip->un.v.delta = 1 << (8 - CMPCI_REG_ADMIC_VALBITS); 894 goto vol; 895 896 case CMPCI_PLAYBACK_MODE: 897 dip->mixer_class = CMPCI_PLAYBACK_CLASS; 898 dip->type = AUDIO_MIXER_ENUM; 899 strcpy(dip->label.name, AudioNmode); 900 dip->un.e.num_mem = 2; 901 strcpy(dip->un.e.member[0].label.name, AudioNdac); 902 dip->un.e.member[0].ord = CMPCI_PLAYBACK_MODE_WAVE; 903 strcpy(dip->un.e.member[1].label.name, CmpciNspdif); 904 dip->un.e.member[1].ord = CMPCI_PLAYBACK_MODE_SPDIF; 905 return 0; 906 case CMPCI_SPDIF_IN_SELECT: 907 dip->mixer_class = CMPCI_SPDIF_CLASS; 908 dip->type = AUDIO_MIXER_ENUM; 909 dip->next = CMPCI_SPDIF_IN_PHASE; 910 strcpy(dip->label.name, AudioNinput); 911 i = 0; 912 strcpy(dip->un.e.member[i].label.name, CmpciNspdin1); 913 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN1; 914 if (CMPCI_ISCAP(sc, 2ND_SPDIN)) { 915 strcpy(dip->un.e.member[i].label.name, CmpciNspdin2); 916 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN2; 917 } 918 strcpy(dip->un.e.member[i].label.name, CmpciNspdout); 919 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDOUT; 920 dip->un.e.num_mem = i; 921 return 0; 922 case CMPCI_SPDIF_IN_PHASE: 923 dip->mixer_class = CMPCI_SPDIF_CLASS; 924 dip->prev = CMPCI_SPDIF_IN_SELECT; 925 strcpy(dip->label.name, CmpciNphase); 926 dip->type = AUDIO_MIXER_ENUM; 927 dip->un.e.num_mem = 2; 928 strcpy(dip->un.e.member[0].label.name, CmpciNpositive); 929 dip->un.e.member[0].ord = CMPCI_SPDIF_IN_PHASE_POSITIVE; 930 strcpy(dip->un.e.member[1].label.name, CmpciNnegative); 931 dip->un.e.member[1].ord = CMPCI_SPDIF_IN_PHASE_NEGATIVE; 932 return 0; 933 case CMPCI_SPDIF_LOOP: 934 dip->mixer_class = CMPCI_SPDIF_CLASS; 935 dip->next = CMPCI_SPDIF_OUT_PLAYBACK; 936 strcpy(dip->label.name, AudioNoutput); 937 dip->type = AUDIO_MIXER_ENUM; 938 dip->un.e.num_mem = 2; 939 strcpy(dip->un.e.member[0].label.name, CmpciNplayback); 940 dip->un.e.member[0].ord = CMPCI_SPDIF_LOOP_OFF; 941 strcpy(dip->un.e.member[1].label.name, CmpciNspdin); 942 dip->un.e.member[1].ord = CMPCI_SPDIF_LOOP_ON; 943 return 0; 944 case CMPCI_SPDIF_OUT_PLAYBACK: 945 dip->mixer_class = CMPCI_SPDIF_CLASS; 946 dip->prev = CMPCI_SPDIF_LOOP; 947 dip->next = CMPCI_SPDIF_OUT_VOLTAGE; 948 strcpy(dip->label.name, CmpciNplayback); 949 dip->type = AUDIO_MIXER_ENUM; 950 dip->un.e.num_mem = 2; 951 strcpy(dip->un.e.member[0].label.name, AudioNwave); 952 dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_PLAYBACK_WAVE; 953 strcpy(dip->un.e.member[1].label.name, CmpciNlegacy); 954 dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_PLAYBACK_LEGACY; 955 return 0; 956 case CMPCI_SPDIF_OUT_VOLTAGE: 957 dip->mixer_class = CMPCI_SPDIF_CLASS; 958 dip->prev = CMPCI_SPDIF_OUT_PLAYBACK; 959 strcpy(dip->label.name, CmpciNvoltage); 960 dip->type = AUDIO_MIXER_ENUM; 961 dip->un.e.num_mem = 2; 962 strcpy(dip->un.e.member[0].label.name, CmpciNhigh_v); 963 dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_VOLTAGE_HIGH; 964 strcpy(dip->un.e.member[1].label.name, CmpciNlow_v); 965 dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_VOLTAGE_LOW; 966 return 0; 967 case CMPCI_MONITOR_DAC: 968 dip->mixer_class = CMPCI_SPDIF_CLASS; 969 strcpy(dip->label.name, AudioNmonitor); 970 dip->type = AUDIO_MIXER_ENUM; 971 dip->un.e.num_mem = 3; 972 strcpy(dip->un.e.member[0].label.name, AudioNoff); 973 dip->un.e.member[0].ord = CMPCI_MONITOR_DAC_OFF; 974 strcpy(dip->un.e.member[1].label.name, CmpciNspdin); 975 dip->un.e.member[1].ord = CMPCI_MONITOR_DAC_SPDIN; 976 strcpy(dip->un.e.member[2].label.name, CmpciNspdout); 977 dip->un.e.member[2].ord = CMPCI_MONITOR_DAC_SPDOUT; 978 return 0; 979 980 case CMPCI_MASTER_VOL: 981 dip->mixer_class = CMPCI_OUTPUT_CLASS; 982 strcpy(dip->label.name, AudioNmaster); 983 dip->un.v.num_channels = 2; 984 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS); 985 goto vol; 986 case CMPCI_REAR: 987 dip->mixer_class = CMPCI_OUTPUT_CLASS; 988 dip->next = CMPCI_INDIVIDUAL; 989 strcpy(dip->label.name, CmpciNrear); 990 goto on_off; 991 case CMPCI_INDIVIDUAL: 992 dip->mixer_class = CMPCI_OUTPUT_CLASS; 993 dip->prev = CMPCI_REAR; 994 dip->next = CMPCI_REVERSE; 995 strcpy(dip->label.name, CmpciNindividual); 996 goto on_off; 997 case CMPCI_REVERSE: 998 dip->mixer_class = CMPCI_OUTPUT_CLASS; 999 dip->prev = CMPCI_INDIVIDUAL; 1000 strcpy(dip->label.name, CmpciNreverse); 1001 goto on_off; 1002 case CMPCI_SURROUND: 1003 dip->mixer_class = CMPCI_OUTPUT_CLASS; 1004 strcpy(dip->label.name, CmpciNsurround); 1005 goto on_off; 1006 } 1007 1008 return ENXIO; 1009 } 1010 1011 static int 1012 cmpci_alloc_dmamem(struct cmpci_softc *sc, size_t size, struct malloc_type *type, 1013 int flags, void **r_addr) 1014 { 1015 int error; 1016 struct cmpci_dmanode *n; 1017 int w; 1018 1019 error = 0; 1020 n = malloc(sizeof(struct cmpci_dmanode), type, flags); 1021 if (n == NULL) { 1022 error = ENOMEM; 1023 goto quit; 1024 } 1025 1026 w = (flags & M_NOWAIT) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK; 1027 #define CMPCI_DMABUF_ALIGN 0x4 1028 #define CMPCI_DMABUF_BOUNDARY 0x0 1029 n->cd_tag = sc->sc_dmat; 1030 n->cd_size = size; 1031 error = bus_dmamem_alloc(n->cd_tag, n->cd_size, 1032 CMPCI_DMABUF_ALIGN, CMPCI_DMABUF_BOUNDARY, n->cd_segs, 1033 sizeof(n->cd_segs)/sizeof(n->cd_segs[0]), &n->cd_nsegs, w); 1034 if (error) 1035 goto mfree; 1036 error = bus_dmamem_map(n->cd_tag, n->cd_segs, n->cd_nsegs, n->cd_size, 1037 &n->cd_addr, w | BUS_DMA_COHERENT); 1038 if (error) 1039 goto dmafree; 1040 error = bus_dmamap_create(n->cd_tag, n->cd_size, 1, n->cd_size, 0, 1041 w, &n->cd_map); 1042 if (error) 1043 goto unmap; 1044 error = bus_dmamap_load(n->cd_tag, n->cd_map, n->cd_addr, n->cd_size, 1045 NULL, w); 1046 if (error) 1047 goto destroy; 1048 1049 n->cd_next = sc->sc_dmap; 1050 sc->sc_dmap = n; 1051 *r_addr = KVADDR(n); 1052 return 0; 1053 1054 destroy: 1055 bus_dmamap_destroy(n->cd_tag, n->cd_map); 1056 unmap: 1057 bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size); 1058 dmafree: 1059 bus_dmamem_free(n->cd_tag, 1060 n->cd_segs, sizeof(n->cd_segs)/sizeof(n->cd_segs[0])); 1061 mfree: 1062 free(n, type); 1063 quit: 1064 return error; 1065 } 1066 1067 static int 1068 cmpci_free_dmamem(struct cmpci_softc *sc, void *addr, struct malloc_type *type) 1069 { 1070 struct cmpci_dmanode **nnp; 1071 1072 for (nnp = &sc->sc_dmap; *nnp; nnp= &(*nnp)->cd_next) { 1073 if ((*nnp)->cd_addr == addr) { 1074 struct cmpci_dmanode *n = *nnp; 1075 bus_dmamap_unload(n->cd_tag, n->cd_map); 1076 bus_dmamap_destroy(n->cd_tag, n->cd_map); 1077 bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size); 1078 bus_dmamem_free(n->cd_tag, n->cd_segs, 1079 sizeof(n->cd_segs)/sizeof(n->cd_segs[0])); 1080 free(n, type); 1081 return 0; 1082 } 1083 } 1084 return -1; 1085 } 1086 1087 static struct cmpci_dmanode * 1088 cmpci_find_dmamem(struct cmpci_softc *sc, void *addr) 1089 { 1090 struct cmpci_dmanode *p; 1091 1092 for (p = sc->sc_dmap; p; p = p->cd_next) 1093 if (KVADDR(p) == (void *)addr) 1094 break; 1095 return p; 1096 } 1097 1098 #if 0 1099 static void 1100 cmpci_print_dmamem(struct cmpci_dmanode *); 1101 static void 1102 cmpci_print_dmamem(struct cmpci_dmanode *p) 1103 { 1104 1105 DPRINTF(("DMA at virt:%p, dmaseg:%p, mapseg:%p, size:%p\n", 1106 (void *)p->cd_addr, (void *)p->cd_segs[0].ds_addr, 1107 (void *)DMAADDR(p), (void *)p->cd_size)); 1108 } 1109 #endif /* DEBUG */ 1110 1111 static void * 1112 cmpci_allocm(void *handle, int direction, size_t size, 1113 struct malloc_type *type, int flags) 1114 { 1115 void *addr; 1116 1117 addr = NULL; /* XXX gcc */ 1118 1119 if (cmpci_alloc_dmamem(handle, size, type, flags, &addr)) 1120 return NULL; 1121 return addr; 1122 } 1123 1124 static void 1125 cmpci_freem(void *handle, void *addr, struct malloc_type *type) 1126 { 1127 1128 cmpci_free_dmamem(handle, addr, type); 1129 } 1130 1131 #define MAXVAL 256 1132 static int 1133 cmpci_adjust(int val, int mask) 1134 { 1135 1136 val += (MAXVAL - mask) >> 1; 1137 if (val >= MAXVAL) 1138 val = MAXVAL-1; 1139 return val & mask; 1140 } 1141 1142 static void 1143 cmpci_set_mixer_gain(struct cmpci_softc *sc, int port) 1144 { 1145 int src; 1146 int bits, mask; 1147 1148 switch (port) { 1149 case CMPCI_MIC_VOL: 1150 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_MIC, 1151 CMPCI_ADJUST_MIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1152 return; 1153 case CMPCI_MASTER_VOL: 1154 src = CMPCI_SB16_MIXER_MASTER_L; 1155 break; 1156 case CMPCI_LINE_IN_VOL: 1157 src = CMPCI_SB16_MIXER_LINE_L; 1158 break; 1159 case CMPCI_AUX_IN_VOL: 1160 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MIXER_AUX, 1161 CMPCI_ADJUST_AUX_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT], 1162 sc->sc_gain[port][CMPCI_RIGHT])); 1163 return; 1164 case CMPCI_MIC_RECVOL: 1165 cmpci_reg_partial_write_1(sc, CMPCI_REG_MIXER25, 1166 CMPCI_REG_ADMIC_SHIFT, CMPCI_REG_ADMIC_MASK, 1167 CMPCI_ADJUST_ADMIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1168 return; 1169 case CMPCI_DAC_VOL: 1170 src = CMPCI_SB16_MIXER_VOICE_L; 1171 break; 1172 case CMPCI_FM_VOL: 1173 src = CMPCI_SB16_MIXER_FM_L; 1174 break; 1175 case CMPCI_CD_VOL: 1176 src = CMPCI_SB16_MIXER_CDDA_L; 1177 break; 1178 case CMPCI_PCSPEAKER: 1179 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_SPEAKER, 1180 CMPCI_ADJUST_2_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1181 return; 1182 case CMPCI_MIC_PREAMP: 1183 if (sc->sc_gain[port][CMPCI_LR]) 1184 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1185 CMPCI_REG_MICGAINZ); 1186 else 1187 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1188 CMPCI_REG_MICGAINZ); 1189 return; 1190 1191 case CMPCI_DAC_MUTE: 1192 if (sc->sc_gain[port][CMPCI_LR]) 1193 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1194 CMPCI_REG_WSMUTE); 1195 else 1196 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1197 CMPCI_REG_WSMUTE); 1198 return; 1199 case CMPCI_FM_MUTE: 1200 if (sc->sc_gain[port][CMPCI_LR]) 1201 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1202 CMPCI_REG_FMMUTE); 1203 else 1204 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1205 CMPCI_REG_FMMUTE); 1206 return; 1207 case CMPCI_AUX_IN_MUTE: 1208 if (sc->sc_gain[port][CMPCI_LR]) 1209 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1210 CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM); 1211 else 1212 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1213 CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM); 1214 return; 1215 case CMPCI_CD_MUTE: 1216 mask = CMPCI_SB16_SW_CD; 1217 goto sbmute; 1218 case CMPCI_MIC_MUTE: 1219 mask = CMPCI_SB16_SW_MIC; 1220 goto sbmute; 1221 case CMPCI_LINE_IN_MUTE: 1222 mask = CMPCI_SB16_SW_LINE; 1223 sbmute: 1224 bits = cmpci_mixerreg_read(sc, CMPCI_SB16_MIXER_OUTMIX); 1225 if (sc->sc_gain[port][CMPCI_LR]) 1226 bits = bits & ~mask; 1227 else 1228 bits = bits | mask; 1229 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, bits); 1230 return; 1231 1232 case CMPCI_SPDIF_IN_SELECT: 1233 case CMPCI_MONITOR_DAC: 1234 case CMPCI_PLAYBACK_MODE: 1235 case CMPCI_SPDIF_LOOP: 1236 case CMPCI_SPDIF_OUT_PLAYBACK: 1237 cmpci_set_out_ports(sc); 1238 return; 1239 case CMPCI_SPDIF_OUT_VOLTAGE: 1240 if (CMPCI_ISCAP(sc, SPDOUT_VOLTAGE)) { 1241 if (sc->sc_gain[CMPCI_SPDIF_OUT_VOLTAGE][CMPCI_LR] 1242 == CMPCI_SPDIF_OUT_VOLTAGE_HIGH) 1243 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_5V); 1244 else 1245 cmpci_reg_set_reg_misc(sc, CMPCI_REG_5V); 1246 } 1247 return; 1248 case CMPCI_SURROUND: 1249 if (CMPCI_ISCAP(sc, SURROUND)) { 1250 if (sc->sc_gain[CMPCI_SURROUND][CMPCI_LR]) 1251 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1252 CMPCI_REG_SURROUND); 1253 else 1254 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1255 CMPCI_REG_SURROUND); 1256 } 1257 return; 1258 case CMPCI_REAR: 1259 if (CMPCI_ISCAP(sc, REAR)) { 1260 if (sc->sc_gain[CMPCI_REAR][CMPCI_LR]) 1261 cmpci_reg_set_reg_misc(sc, CMPCI_REG_N4SPK3D); 1262 else 1263 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_N4SPK3D); 1264 } 1265 return; 1266 case CMPCI_INDIVIDUAL: 1267 if (CMPCI_ISCAP(sc, INDIVIDUAL_REAR)) { 1268 if (sc->sc_gain[CMPCI_REAR][CMPCI_LR]) 1269 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1270 CMPCI_REG_INDIVIDUAL); 1271 else 1272 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1273 CMPCI_REG_INDIVIDUAL); 1274 } 1275 return; 1276 case CMPCI_REVERSE: 1277 if (CMPCI_ISCAP(sc, REVERSE_FR)) { 1278 if (sc->sc_gain[CMPCI_REVERSE][CMPCI_LR]) 1279 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1280 CMPCI_REG_REVERSE_FR); 1281 else 1282 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1283 CMPCI_REG_REVERSE_FR); 1284 } 1285 return; 1286 case CMPCI_SPDIF_IN_PHASE: 1287 if (CMPCI_ISCAP(sc, SPDIN_PHASE)) { 1288 if (sc->sc_gain[CMPCI_SPDIF_IN_PHASE][CMPCI_LR] 1289 == CMPCI_SPDIF_IN_PHASE_POSITIVE) 1290 cmpci_reg_clear_1(sc, CMPCI_REG_CHANNEL_FORMAT, 1291 CMPCI_REG_SPDIN_PHASE); 1292 else 1293 cmpci_reg_set_1(sc, CMPCI_REG_CHANNEL_FORMAT, 1294 CMPCI_REG_SPDIN_PHASE); 1295 } 1296 return; 1297 default: 1298 return; 1299 } 1300 1301 cmpci_mixerreg_write(sc, src, 1302 CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT])); 1303 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_L_TO_R(src), 1304 CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_RIGHT])); 1305 } 1306 1307 static void 1308 cmpci_set_out_ports(struct cmpci_softc *sc) 1309 { 1310 uint8_t v; 1311 int enspdout; 1312 1313 if (!CMPCI_ISCAP(sc, SPDLOOP)) 1314 return; 1315 1316 /* SPDIF/out select */ 1317 if (sc->sc_gain[CMPCI_SPDIF_LOOP][CMPCI_LR] == CMPCI_SPDIF_LOOP_OFF) { 1318 /* playback */ 1319 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP); 1320 } else { 1321 /* monitor SPDIF/in */ 1322 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP); 1323 } 1324 1325 /* SPDIF in select */ 1326 v = sc->sc_gain[CMPCI_SPDIF_IN_SELECT][CMPCI_LR]; 1327 if (v & CMPCI_SPDIFIN_SPDIFIN2) 1328 cmpci_reg_set_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN); 1329 else 1330 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN); 1331 if (v & CMPCI_SPDIFIN_SPDIFOUT) 1332 cmpci_reg_set_reg_misc(sc, CMPCI_REG_SPDFLOOPI); 1333 else 1334 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPDFLOOPI); 1335 1336 enspdout = 0; 1337 /* playback to ... */ 1338 if (CMPCI_ISCAP(sc, SPDOUT) && 1339 sc->sc_gain[CMPCI_PLAYBACK_MODE][CMPCI_LR] 1340 == CMPCI_PLAYBACK_MODE_SPDIF && 1341 (sc->sc_play.md_divide == CMPCI_REG_RATE_44100 || 1342 (CMPCI_ISCAP(sc, SPDOUT_48K) && 1343 sc->sc_play.md_divide==CMPCI_REG_RATE_48000))) { 1344 /* playback to SPDIF */ 1345 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE); 1346 enspdout = 1; 1347 if (sc->sc_play.md_divide==CMPCI_REG_RATE_48000) 1348 cmpci_reg_set_reg_misc(sc, 1349 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1350 else 1351 cmpci_reg_clear_reg_misc(sc, 1352 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1353 } else { 1354 /* playback to DAC */ 1355 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, 1356 CMPCI_REG_SPDIF0_ENABLE); 1357 if (CMPCI_ISCAP(sc, SPDOUT_48K)) 1358 cmpci_reg_clear_reg_misc(sc, 1359 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1360 } 1361 1362 /* legacy to SPDIF/out or not */ 1363 if (CMPCI_ISCAP(sc, SPDLEGACY)) { 1364 if (sc->sc_gain[CMPCI_SPDIF_OUT_PLAYBACK][CMPCI_LR] 1365 == CMPCI_SPDIF_OUT_PLAYBACK_WAVE) 1366 cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL, 1367 CMPCI_REG_LEGACY_SPDIF_ENABLE); 1368 else { 1369 cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL, 1370 CMPCI_REG_LEGACY_SPDIF_ENABLE); 1371 enspdout = 1; 1372 } 1373 } 1374 1375 /* enable/disable SPDIF/out */ 1376 if (CMPCI_ISCAP(sc, XSPDOUT) && enspdout) 1377 cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL, 1378 CMPCI_REG_XSPDIF_ENABLE); 1379 else 1380 cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL, 1381 CMPCI_REG_XSPDIF_ENABLE); 1382 1383 /* SPDIF monitor (digital to analog output) */ 1384 if (CMPCI_ISCAP(sc, SPDIN_MONITOR)) { 1385 v = sc->sc_gain[CMPCI_MONITOR_DAC][CMPCI_LR]; 1386 if (!(v & CMPCI_MONDAC_ENABLE)) 1387 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1388 CMPCI_REG_SPDIN_MONITOR); 1389 if (v & CMPCI_MONDAC_SPDOUT) 1390 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, 1391 CMPCI_REG_SPDIFOUT_DAC); 1392 else 1393 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, 1394 CMPCI_REG_SPDIFOUT_DAC); 1395 if (v & CMPCI_MONDAC_ENABLE) 1396 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1397 CMPCI_REG_SPDIN_MONITOR); 1398 } 1399 } 1400 1401 static int 1402 cmpci_set_in_ports(struct cmpci_softc *sc) 1403 { 1404 int mask; 1405 int bitsl, bitsr; 1406 1407 mask = sc->sc_in_mask; 1408 1409 /* 1410 * Note CMPCI_RECORD_SOURCE_CD, CMPCI_RECORD_SOURCE_LINE_IN and 1411 * CMPCI_RECORD_SOURCE_FM are defined to the corresponding bit 1412 * of the mixer register. 1413 */ 1414 bitsr = mask & (CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN | 1415 CMPCI_RECORD_SOURCE_FM); 1416 1417 bitsl = CMPCI_SB16_MIXER_SRC_R_TO_L(bitsr); 1418 if (mask & CMPCI_RECORD_SOURCE_MIC) { 1419 bitsl |= CMPCI_SB16_MIXER_MIC_SRC; 1420 bitsr |= CMPCI_SB16_MIXER_MIC_SRC; 1421 } 1422 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, bitsl); 1423 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, bitsr); 1424 1425 if (mask & CMPCI_RECORD_SOURCE_AUX_IN) 1426 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1427 CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN); 1428 else 1429 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1430 CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN); 1431 1432 if (mask & CMPCI_RECORD_SOURCE_WAVE) 1433 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1434 CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR); 1435 else 1436 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1437 CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR); 1438 1439 if (CMPCI_ISCAP(sc, SPDIN) && 1440 (sc->sc_rec.md_divide == CMPCI_REG_RATE_44100 || 1441 (CMPCI_ISCAP(sc, SPDOUT_48K) && 1442 sc->sc_rec.md_divide == CMPCI_REG_RATE_48000/* XXX? */))) { 1443 if (mask & CMPCI_RECORD_SOURCE_SPDIF) { 1444 /* enable SPDIF/in */ 1445 cmpci_reg_set_4(sc, 1446 CMPCI_REG_FUNC_1, 1447 CMPCI_REG_SPDIF1_ENABLE); 1448 } else { 1449 cmpci_reg_clear_4(sc, 1450 CMPCI_REG_FUNC_1, 1451 CMPCI_REG_SPDIF1_ENABLE); 1452 } 1453 } 1454 1455 return 0; 1456 } 1457 1458 static int 1459 cmpci_set_port(void *handle, mixer_ctrl_t *cp) 1460 { 1461 struct cmpci_softc *sc; 1462 int lgain, rgain; 1463 1464 sc = handle; 1465 switch (cp->dev) { 1466 case CMPCI_MIC_VOL: 1467 case CMPCI_PCSPEAKER: 1468 case CMPCI_MIC_RECVOL: 1469 if (cp->un.value.num_channels != 1) 1470 return EINVAL; 1471 /* FALLTHROUGH */ 1472 case CMPCI_DAC_VOL: 1473 case CMPCI_FM_VOL: 1474 case CMPCI_CD_VOL: 1475 case CMPCI_LINE_IN_VOL: 1476 case CMPCI_AUX_IN_VOL: 1477 case CMPCI_MASTER_VOL: 1478 if (cp->type != AUDIO_MIXER_VALUE) 1479 return EINVAL; 1480 switch (cp->un.value.num_channels) { 1481 case 1: 1482 lgain = rgain = 1483 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]; 1484 break; 1485 case 2: 1486 lgain = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]; 1487 rgain = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]; 1488 break; 1489 default: 1490 return EINVAL; 1491 } 1492 sc->sc_gain[cp->dev][CMPCI_LEFT] = lgain; 1493 sc->sc_gain[cp->dev][CMPCI_RIGHT] = rgain; 1494 1495 cmpci_set_mixer_gain(sc, cp->dev); 1496 break; 1497 1498 case CMPCI_RECORD_SOURCE: 1499 if (cp->type != AUDIO_MIXER_SET) 1500 return EINVAL; 1501 1502 if (cp->un.mask & ~(CMPCI_RECORD_SOURCE_MIC | 1503 CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN | 1504 CMPCI_RECORD_SOURCE_AUX_IN | CMPCI_RECORD_SOURCE_WAVE | 1505 CMPCI_RECORD_SOURCE_FM | CMPCI_RECORD_SOURCE_SPDIF)) 1506 return EINVAL; 1507 1508 if (cp->un.mask & CMPCI_RECORD_SOURCE_SPDIF) 1509 cp->un.mask = CMPCI_RECORD_SOURCE_SPDIF; 1510 1511 sc->sc_in_mask = cp->un.mask; 1512 return cmpci_set_in_ports(sc); 1513 1514 /* boolean */ 1515 case CMPCI_DAC_MUTE: 1516 case CMPCI_FM_MUTE: 1517 case CMPCI_CD_MUTE: 1518 case CMPCI_LINE_IN_MUTE: 1519 case CMPCI_AUX_IN_MUTE: 1520 case CMPCI_MIC_MUTE: 1521 case CMPCI_MIC_PREAMP: 1522 case CMPCI_PLAYBACK_MODE: 1523 case CMPCI_SPDIF_IN_PHASE: 1524 case CMPCI_SPDIF_LOOP: 1525 case CMPCI_SPDIF_OUT_PLAYBACK: 1526 case CMPCI_SPDIF_OUT_VOLTAGE: 1527 case CMPCI_REAR: 1528 case CMPCI_INDIVIDUAL: 1529 case CMPCI_REVERSE: 1530 case CMPCI_SURROUND: 1531 if (cp->type != AUDIO_MIXER_ENUM) 1532 return EINVAL; 1533 sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord != 0; 1534 cmpci_set_mixer_gain(sc, cp->dev); 1535 break; 1536 1537 case CMPCI_SPDIF_IN_SELECT: 1538 switch (cp->un.ord) { 1539 case CMPCI_SPDIF_IN_SPDIN1: 1540 case CMPCI_SPDIF_IN_SPDIN2: 1541 case CMPCI_SPDIF_IN_SPDOUT: 1542 break; 1543 default: 1544 return EINVAL; 1545 } 1546 goto xenum; 1547 case CMPCI_MONITOR_DAC: 1548 switch (cp->un.ord) { 1549 case CMPCI_MONITOR_DAC_OFF: 1550 case CMPCI_MONITOR_DAC_SPDIN: 1551 case CMPCI_MONITOR_DAC_SPDOUT: 1552 break; 1553 default: 1554 return EINVAL; 1555 } 1556 xenum: 1557 if (cp->type != AUDIO_MIXER_ENUM) 1558 return EINVAL; 1559 sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord; 1560 cmpci_set_mixer_gain(sc, cp->dev); 1561 break; 1562 1563 default: 1564 return EINVAL; 1565 } 1566 1567 return 0; 1568 } 1569 1570 static int 1571 cmpci_get_port(void *handle, mixer_ctrl_t *cp) 1572 { 1573 struct cmpci_softc *sc; 1574 1575 sc = handle; 1576 switch (cp->dev) { 1577 case CMPCI_MIC_VOL: 1578 case CMPCI_PCSPEAKER: 1579 case CMPCI_MIC_RECVOL: 1580 if (cp->un.value.num_channels != 1) 1581 return EINVAL; 1582 /*FALLTHROUGH*/ 1583 case CMPCI_DAC_VOL: 1584 case CMPCI_FM_VOL: 1585 case CMPCI_CD_VOL: 1586 case CMPCI_LINE_IN_VOL: 1587 case CMPCI_AUX_IN_VOL: 1588 case CMPCI_MASTER_VOL: 1589 switch (cp->un.value.num_channels) { 1590 case 1: 1591 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = 1592 sc->sc_gain[cp->dev][CMPCI_LEFT]; 1593 break; 1594 case 2: 1595 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 1596 sc->sc_gain[cp->dev][CMPCI_LEFT]; 1597 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 1598 sc->sc_gain[cp->dev][CMPCI_RIGHT]; 1599 break; 1600 default: 1601 return EINVAL; 1602 } 1603 break; 1604 1605 case CMPCI_RECORD_SOURCE: 1606 cp->un.mask = sc->sc_in_mask; 1607 break; 1608 1609 case CMPCI_DAC_MUTE: 1610 case CMPCI_FM_MUTE: 1611 case CMPCI_CD_MUTE: 1612 case CMPCI_LINE_IN_MUTE: 1613 case CMPCI_AUX_IN_MUTE: 1614 case CMPCI_MIC_MUTE: 1615 case CMPCI_MIC_PREAMP: 1616 case CMPCI_PLAYBACK_MODE: 1617 case CMPCI_SPDIF_IN_SELECT: 1618 case CMPCI_SPDIF_IN_PHASE: 1619 case CMPCI_SPDIF_LOOP: 1620 case CMPCI_SPDIF_OUT_PLAYBACK: 1621 case CMPCI_SPDIF_OUT_VOLTAGE: 1622 case CMPCI_MONITOR_DAC: 1623 case CMPCI_REAR: 1624 case CMPCI_INDIVIDUAL: 1625 case CMPCI_REVERSE: 1626 case CMPCI_SURROUND: 1627 cp->un.ord = sc->sc_gain[cp->dev][CMPCI_LR]; 1628 break; 1629 1630 default: 1631 return EINVAL; 1632 } 1633 1634 return 0; 1635 } 1636 1637 /* ARGSUSED */ 1638 static size_t 1639 cmpci_round_buffersize(void *handle, int direction, 1640 size_t bufsize) 1641 { 1642 1643 if (bufsize > 0x10000) 1644 bufsize = 0x10000; 1645 1646 return bufsize; 1647 } 1648 1649 static paddr_t 1650 cmpci_mappage(void *handle, void *addr, off_t offset, int prot) 1651 { 1652 struct cmpci_dmanode *p; 1653 1654 if (offset < 0 || NULL == (p = cmpci_find_dmamem(handle, addr))) 1655 return -1; 1656 1657 return bus_dmamem_mmap(p->cd_tag, p->cd_segs, 1658 sizeof(p->cd_segs)/sizeof(p->cd_segs[0]), 1659 offset, prot, BUS_DMA_WAITOK); 1660 } 1661 1662 /* ARGSUSED */ 1663 static int 1664 cmpci_get_props(void *handle) 1665 { 1666 1667 return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 1668 } 1669 1670 static int 1671 cmpci_trigger_output(void *handle, void *start, void *end, int blksize, 1672 void (*intr)(void *), void *arg, 1673 const audio_params_t *param) 1674 { 1675 struct cmpci_softc *sc; 1676 struct cmpci_dmanode *p; 1677 int bps; 1678 1679 sc = handle; 1680 sc->sc_play.intr = intr; 1681 sc->sc_play.intr_arg = arg; 1682 bps = param->channels * param->precision / 8; 1683 if (!bps) 1684 return EINVAL; 1685 1686 /* set DMA frame */ 1687 if (!(p = cmpci_find_dmamem(sc, start))) 1688 return EINVAL; 1689 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BASE, 1690 DMAADDR(p)); 1691 delay(10); 1692 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BYTES, 1693 ((char *)end - (char *)start + 1) / bps - 1); 1694 delay(10); 1695 1696 /* set interrupt count */ 1697 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_SAMPLES, 1698 (blksize + bps - 1) / bps - 1); 1699 delay(10); 1700 1701 /* start DMA */ 1702 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); /* PLAY */ 1703 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 1704 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); 1705 1706 return 0; 1707 } 1708 1709 static int 1710 cmpci_trigger_input(void *handle, void *start, void *end, int blksize, 1711 void (*intr)(void *), void *arg, 1712 const audio_params_t *param) 1713 { 1714 struct cmpci_softc *sc; 1715 struct cmpci_dmanode *p; 1716 int bps; 1717 1718 sc = handle; 1719 sc->sc_rec.intr = intr; 1720 sc->sc_rec.intr_arg = arg; 1721 bps = param->channels * param->precision / 8; 1722 if (!bps) 1723 return EINVAL; 1724 1725 /* set DMA frame */ 1726 if (!(p=cmpci_find_dmamem(sc, start))) 1727 return EINVAL; 1728 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BASE, 1729 DMAADDR(p)); 1730 delay(10); 1731 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BYTES, 1732 ((char *)end - (char *)start + 1) / bps - 1); 1733 delay(10); 1734 1735 /* set interrupt count */ 1736 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_SAMPLES, 1737 (blksize + bps - 1) / bps - 1); 1738 delay(10); 1739 1740 /* start DMA */ 1741 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_DIR); /* REC */ 1742 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 1743 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); 1744 1745 return 0; 1746 } 1747 1748 /* end of file */ 1749
Indexes created Sat Sep 27 21:09:56 GMT 2025