cmpci.c revision 1.42.14.2
1 /* $NetBSD: cmpci.c,v 1.42.14.2 2011/11/22 22:47:08 jmcneill Exp $ */ 2 3 /* 4 * Copyright (c) 2000, 2001, 2008 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Takuya SHIOZAKI <tshiozak (at) NetBSD.org> . 9 * 10 * This code is derived from software contributed to The NetBSD Foundation 11 * by ITOH Yasufumi. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 /* 37 * C-Media CMI8x38 Audio Chip Support. 38 * 39 * TODO: 40 * - 4ch / 6ch support. 41 * - Joystick support. 42 * 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: cmpci.c,v 1.42.14.2 2011/11/22 22:47:08 jmcneill Exp $"); 47 48 #if defined(AUDIO_DEBUG) || defined(DEBUG) 49 #define DPRINTF(x) if (cmpcidebug) printf x 50 int cmpcidebug = 0; 51 #else 52 #define DPRINTF(x) 53 #endif 54 55 #include "mpu.h" 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/kernel.h> 60 #include <sys/kmem.h> 61 #include <sys/device.h> 62 #include <sys/proc.h> 63 64 #include <dev/pci/pcidevs.h> 65 #include <dev/pci/pcivar.h> 66 67 #include <sys/audioio.h> 68 #include <dev/audio_if.h> 69 #include <dev/midi_if.h> 70 71 #include <dev/mulaw.h> 72 #include <dev/auconv.h> 73 #include <dev/pci/cmpcireg.h> 74 #include <dev/pci/cmpcivar.h> 75 76 #include <dev/ic/mpuvar.h> 77 #include <sys/bus.h> 78 #include <sys/intr.h> 79 80 /* 81 * Low-level HW interface 82 */ 83 static inline uint8_t cmpci_mixerreg_read(struct cmpci_softc *, uint8_t); 84 static inline void cmpci_mixerreg_write(struct cmpci_softc *, 85 uint8_t, uint8_t); 86 static inline void cmpci_reg_partial_write_1(struct cmpci_softc *, int, int, 87 unsigned, unsigned); 88 static inline void cmpci_reg_partial_write_4(struct cmpci_softc *, int, int, 89 uint32_t, uint32_t); 90 static inline void cmpci_reg_set_1(struct cmpci_softc *, int, uint8_t); 91 static inline void cmpci_reg_clear_1(struct cmpci_softc *, int, uint8_t); 92 static inline void cmpci_reg_set_4(struct cmpci_softc *, int, uint32_t); 93 static inline void cmpci_reg_clear_4(struct cmpci_softc *, int, uint32_t); 94 static inline void cmpci_reg_set_reg_misc(struct cmpci_softc *, uint32_t); 95 static inline void cmpci_reg_clear_reg_misc(struct cmpci_softc *, uint32_t); 96 static int cmpci_rate_to_index(int); 97 static inline int cmpci_index_to_rate(int); 98 static inline int cmpci_index_to_divider(int); 99 100 static int cmpci_adjust(int, int); 101 static void cmpci_set_mixer_gain(struct cmpci_softc *, int); 102 static void cmpci_set_out_ports(struct cmpci_softc *); 103 static int cmpci_set_in_ports(struct cmpci_softc *); 104 105 106 /* 107 * autoconf interface 108 */ 109 static int cmpci_match(device_t, cfdata_t, void *); 110 static void cmpci_attach(device_t, device_t, void *); 111 112 CFATTACH_DECL(cmpci, sizeof (struct cmpci_softc), 113 cmpci_match, cmpci_attach, NULL, NULL); 114 115 /* interrupt */ 116 static int cmpci_intr(void *); 117 118 119 /* 120 * DMA stuffs 121 */ 122 static int cmpci_alloc_dmamem(struct cmpci_softc *, size_t, void **); 123 static int cmpci_free_dmamem(struct cmpci_softc *, void *, size_t); 124 static struct cmpci_dmanode * cmpci_find_dmamem(struct cmpci_softc *, 125 void *); 126 127 128 /* 129 * interface to machine independent layer 130 */ 131 static int cmpci_query_encoding(void *, struct audio_encoding *); 132 static int cmpci_set_params(void *, int, int, audio_params_t *, 133 audio_params_t *, stream_filter_list_t *, stream_filter_list_t *); 134 static int cmpci_round_blocksize(void *, int, int, const audio_params_t *); 135 static int cmpci_halt_output(void *); 136 static int cmpci_halt_input(void *); 137 static int cmpci_getdev(void *, struct audio_device *); 138 static int cmpci_set_port(void *, mixer_ctrl_t *); 139 static int cmpci_get_port(void *, mixer_ctrl_t *); 140 static int cmpci_query_devinfo(void *, mixer_devinfo_t *); 141 static void *cmpci_allocm(void *, int, size_t); 142 static void cmpci_freem(void *, void *, size_t); 143 static size_t cmpci_round_buffersize(void *, int, size_t); 144 static paddr_t cmpci_mappage(void *, void *, off_t, int); 145 static int cmpci_get_props(void *); 146 static int cmpci_trigger_output(void *, void *, void *, int, 147 void (*)(void *), void *, const audio_params_t *); 148 static int cmpci_trigger_input(void *, void *, void *, int, 149 void (*)(void *), void *, const audio_params_t *); 150 static void cmpci_get_locks(void *, kmutex_t **, kmutex_t **); 151 152 static const struct audio_hw_if cmpci_hw_if = { 153 NULL, /* open */ 154 NULL, /* close */ 155 NULL, /* drain */ 156 cmpci_query_encoding, /* query_encoding */ 157 cmpci_set_params, /* set_params */ 158 cmpci_round_blocksize, /* round_blocksize */ 159 NULL, /* commit_settings */ 160 NULL, /* init_output */ 161 NULL, /* init_input */ 162 NULL, /* start_output */ 163 NULL, /* start_input */ 164 cmpci_halt_output, /* halt_output */ 165 cmpci_halt_input, /* halt_input */ 166 NULL, /* speaker_ctl */ 167 cmpci_getdev, /* getdev */ 168 NULL, /* setfd */ 169 cmpci_set_port, /* set_port */ 170 cmpci_get_port, /* get_port */ 171 cmpci_query_devinfo, /* query_devinfo */ 172 cmpci_allocm, /* allocm */ 173 cmpci_freem, /* freem */ 174 cmpci_round_buffersize,/* round_buffersize */ 175 cmpci_mappage, /* mappage */ 176 cmpci_get_props, /* get_props */ 177 cmpci_trigger_output, /* trigger_output */ 178 cmpci_trigger_input, /* trigger_input */ 179 NULL, /* dev_ioctl */ 180 cmpci_get_locks, /* get_locks */ 181 }; 182 183 #define CMPCI_NFORMATS 4 184 static const struct audio_format cmpci_formats[CMPCI_NFORMATS] = { 185 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 186 2, AUFMT_STEREO, 0, {5512, 48000}}, 187 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 188 1, AUFMT_MONAURAL, 0, {5512, 48000}}, 189 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8, 190 2, AUFMT_STEREO, 0, {5512, 48000}}, 191 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8, 192 1, AUFMT_MONAURAL, 0, {5512, 48000}}, 193 }; 194 195 196 /* 197 * Low-level HW interface 198 */ 199 200 /* mixer register read/write */ 201 static inline uint8_t 202 cmpci_mixerreg_read(struct cmpci_softc *sc, uint8_t no) 203 { 204 uint8_t ret; 205 206 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no); 207 delay(10); 208 ret = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA); 209 delay(10); 210 return ret; 211 } 212 213 static inline void 214 cmpci_mixerreg_write(struct cmpci_softc *sc, uint8_t no, uint8_t val) 215 { 216 217 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no); 218 delay(10); 219 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA, val); 220 delay(10); 221 } 222 223 224 /* register partial write */ 225 static inline void 226 cmpci_reg_partial_write_1(struct cmpci_softc *sc, int no, int shift, 227 unsigned mask, unsigned val) 228 { 229 230 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 231 (val<<shift) | 232 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift))); 233 delay(10); 234 } 235 236 static inline void 237 cmpci_reg_partial_write_4(struct cmpci_softc *sc, int no, int shift, 238 uint32_t mask, uint32_t val) 239 { 240 241 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 242 (val<<shift) | 243 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift))); 244 delay(10); 245 } 246 247 /* register set/clear bit */ 248 static inline void 249 cmpci_reg_set_1(struct cmpci_softc *sc, int no, uint8_t mask) 250 { 251 252 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 253 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) | mask)); 254 delay(10); 255 } 256 257 static inline void 258 cmpci_reg_clear_1(struct cmpci_softc *sc, int no, uint8_t mask) 259 { 260 261 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 262 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~mask)); 263 delay(10); 264 } 265 266 static inline void 267 cmpci_reg_set_4(struct cmpci_softc *sc, int no, uint32_t mask) 268 { 269 270 /* use cmpci_reg_set_reg_misc() for CMPCI_REG_MISC */ 271 KDASSERT(no != CMPCI_REG_MISC); 272 273 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 274 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) | mask)); 275 delay(10); 276 } 277 278 static inline void 279 cmpci_reg_clear_4(struct cmpci_softc *sc, int no, uint32_t mask) 280 { 281 282 /* use cmpci_reg_clear_reg_misc() for CMPCI_REG_MISC */ 283 KDASSERT(no != CMPCI_REG_MISC); 284 285 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 286 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~mask)); 287 delay(10); 288 } 289 290 /* 291 * The CMPCI_REG_MISC register needs special handling, since one of 292 * its bits has different read/write values. 293 */ 294 static inline void 295 cmpci_reg_set_reg_misc(struct cmpci_softc *sc, uint32_t mask) 296 { 297 298 sc->sc_reg_misc |= mask; 299 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC, 300 sc->sc_reg_misc); 301 delay(10); 302 } 303 304 static inline void 305 cmpci_reg_clear_reg_misc(struct cmpci_softc *sc, uint32_t mask) 306 { 307 308 sc->sc_reg_misc &= ~mask; 309 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC, 310 sc->sc_reg_misc); 311 delay(10); 312 } 313 314 /* rate */ 315 static const struct { 316 int rate; 317 int divider; 318 } cmpci_rate_table[CMPCI_REG_NUMRATE] = { 319 #define _RATE(n) { n, CMPCI_REG_RATE_ ## n } 320 _RATE(5512), 321 _RATE(8000), 322 _RATE(11025), 323 _RATE(16000), 324 _RATE(22050), 325 _RATE(32000), 326 _RATE(44100), 327 _RATE(48000) 328 #undef _RATE 329 }; 330 331 static int 332 cmpci_rate_to_index(int rate) 333 { 334 int i; 335 336 for (i = 0; i < CMPCI_REG_NUMRATE - 1; i++) 337 if (rate <= 338 (cmpci_rate_table[i].rate+cmpci_rate_table[i+1].rate) / 2) 339 return i; 340 return i; /* 48000 */ 341 } 342 343 static inline int 344 cmpci_index_to_rate(int index) 345 { 346 347 return cmpci_rate_table[index].rate; 348 } 349 350 static inline int 351 cmpci_index_to_divider(int index) 352 { 353 354 return cmpci_rate_table[index].divider; 355 } 356 357 /* 358 * interface to configure the device. 359 */ 360 static int 361 cmpci_match(device_t parent, cfdata_t match, void *aux) 362 { 363 struct pci_attach_args *pa; 364 365 pa = (struct pci_attach_args *)aux; 366 if ( PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CMEDIA && 367 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338A || 368 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338B || 369 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738 || 370 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738B) ) 371 return 1; 372 373 return 0; 374 } 375 376 static void 377 cmpci_attach(device_t parent, device_t self, void *aux) 378 { 379 struct cmpci_softc *sc; 380 struct pci_attach_args *pa; 381 struct audio_attach_args aa; 382 pci_intr_handle_t ih; 383 char const *strintr; 384 char devinfo[256]; 385 int i, v; 386 387 sc = device_private(self); 388 pa = (struct pci_attach_args *)aux; 389 aprint_naive(": Audio controller\n"); 390 391 sc->sc_id = pa->pa_id; 392 sc->sc_class = pa->pa_class; 393 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 394 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, 395 PCI_REVISION(sc->sc_class)); 396 switch (PCI_PRODUCT(sc->sc_id)) { 397 case PCI_PRODUCT_CMEDIA_CMI8338A: 398 /*FALLTHROUGH*/ 399 case PCI_PRODUCT_CMEDIA_CMI8338B: 400 sc->sc_capable = CMPCI_CAP_CMI8338; 401 break; 402 case PCI_PRODUCT_CMEDIA_CMI8738: 403 /*FALLTHROUGH*/ 404 case PCI_PRODUCT_CMEDIA_CMI8738B: 405 sc->sc_capable = CMPCI_CAP_CMI8738; 406 break; 407 } 408 409 /* map I/O space */ 410 if (pci_mapreg_map(pa, CMPCI_PCI_IOBASEREG, PCI_MAPREG_TYPE_IO, 0, 411 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 412 aprint_error_dev(&sc->sc_dev, "failed to map I/O space\n"); 413 return; 414 } 415 416 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 417 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED); 418 419 /* interrupt */ 420 if (pci_intr_map(pa, &ih)) { 421 aprint_error_dev(&sc->sc_dev, "failed to map interrupt\n"); 422 return; 423 } 424 strintr = pci_intr_string(pa->pa_pc, ih); 425 sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_SCHED, cmpci_intr, 426 sc); 427 if (sc->sc_ih == NULL) { 428 aprint_error_dev(&sc->sc_dev, "failed to establish interrupt"); 429 if (strintr != NULL) 430 aprint_error(" at %s", strintr); 431 aprint_error("\n"); 432 mutex_destroy(&sc->sc_lock); 433 mutex_destroy(&sc->sc_intr_lock); 434 return; 435 } 436 aprint_normal_dev(&sc->sc_dev, "interrupting at %s\n", strintr); 437 438 sc->sc_dmat = pa->pa_dmat; 439 440 audio_attach_mi(&cmpci_hw_if, sc, &sc->sc_dev); 441 442 /* attach OPL device */ 443 aa.type = AUDIODEV_TYPE_OPL; 444 aa.hwif = NULL; 445 aa.hdl = NULL; 446 (void)config_found(&sc->sc_dev, &aa, audioprint); 447 448 /* attach MPU-401 device */ 449 aa.type = AUDIODEV_TYPE_MPU; 450 aa.hwif = NULL; 451 aa.hdl = NULL; 452 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh, 453 CMPCI_REG_MPU_BASE, CMPCI_REG_MPU_SIZE, &sc->sc_mpu_ioh) == 0) 454 sc->sc_mpudev = config_found(&sc->sc_dev, &aa, audioprint); 455 456 /* get initial value (this is 0 and may be omitted but just in case) */ 457 sc->sc_reg_misc = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 458 CMPCI_REG_MISC) & ~CMPCI_REG_SPDIF48K; 459 460 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_RESET, 0); 461 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0); 462 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0); 463 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, 464 CMPCI_SB16_SW_CD|CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE); 465 for (i = 0; i < CMPCI_NDEVS; i++) { 466 switch(i) { 467 /* 468 * CMI8738 defaults are 469 * master: 0xe0 (0x00 - 0xf8) 470 * FM, DAC: 0xc0 (0x00 - 0xf8) 471 * PC speaker: 0x80 (0x00 - 0xc0) 472 * others: 0 473 */ 474 /* volume */ 475 case CMPCI_MASTER_VOL: 476 v = 128; /* 224 */ 477 break; 478 case CMPCI_FM_VOL: 479 case CMPCI_DAC_VOL: 480 v = 192; 481 break; 482 case CMPCI_PCSPEAKER: 483 v = 128; 484 break; 485 486 /* booleans, set to true */ 487 case CMPCI_CD_MUTE: 488 case CMPCI_MIC_MUTE: 489 case CMPCI_LINE_IN_MUTE: 490 case CMPCI_AUX_IN_MUTE: 491 v = 1; 492 break; 493 494 /* volume with inital value 0 */ 495 case CMPCI_CD_VOL: 496 case CMPCI_LINE_IN_VOL: 497 case CMPCI_AUX_IN_VOL: 498 case CMPCI_MIC_VOL: 499 case CMPCI_MIC_RECVOL: 500 /* FALLTHROUGH */ 501 502 /* others are cleared */ 503 case CMPCI_MIC_PREAMP: 504 case CMPCI_RECORD_SOURCE: 505 case CMPCI_PLAYBACK_MODE: 506 case CMPCI_SPDIF_IN_SELECT: 507 case CMPCI_SPDIF_IN_PHASE: 508 case CMPCI_SPDIF_LOOP: 509 case CMPCI_SPDIF_OUT_PLAYBACK: 510 case CMPCI_SPDIF_OUT_VOLTAGE: 511 case CMPCI_MONITOR_DAC: 512 case CMPCI_REAR: 513 case CMPCI_INDIVIDUAL: 514 case CMPCI_REVERSE: 515 case CMPCI_SURROUND: 516 default: 517 v = 0; 518 break; 519 } 520 sc->sc_gain[i][CMPCI_LEFT] = sc->sc_gain[i][CMPCI_RIGHT] = v; 521 cmpci_set_mixer_gain(sc, i); 522 } 523 } 524 525 static int 526 cmpci_intr(void *handle) 527 { 528 struct cmpci_softc *sc = handle; 529 #if NMPU > 0 530 struct mpu_softc *sc_mpu = device_private(sc->sc_mpudev); 531 #endif 532 uint32_t intrstat; 533 534 mutex_spin_enter(&sc->sc_intr_lock); 535 536 intrstat = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 537 CMPCI_REG_INTR_STATUS); 538 539 if (!(intrstat & CMPCI_REG_ANY_INTR)) { 540 mutex_spin_exit(&sc->sc_intr_lock); 541 return 0; 542 } 543 544 delay(10); 545 546 /* disable and reset intr */ 547 if (intrstat & CMPCI_REG_CH0_INTR) 548 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, 549 CMPCI_REG_CH0_INTR_ENABLE); 550 if (intrstat & CMPCI_REG_CH1_INTR) 551 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, 552 CMPCI_REG_CH1_INTR_ENABLE); 553 554 if (intrstat & CMPCI_REG_CH0_INTR) { 555 if (sc->sc_play.intr != NULL) 556 (*sc->sc_play.intr)(sc->sc_play.intr_arg); 557 } 558 if (intrstat & CMPCI_REG_CH1_INTR) { 559 if (sc->sc_rec.intr != NULL) 560 (*sc->sc_rec.intr)(sc->sc_rec.intr_arg); 561 } 562 563 /* enable intr */ 564 if (intrstat & CMPCI_REG_CH0_INTR) 565 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, 566 CMPCI_REG_CH0_INTR_ENABLE); 567 if (intrstat & CMPCI_REG_CH1_INTR) 568 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, 569 CMPCI_REG_CH1_INTR_ENABLE); 570 571 #if NMPU > 0 572 if (intrstat & CMPCI_REG_UART_INTR && sc_mpu != NULL) 573 mpu_intr(sc_mpu); 574 #endif 575 576 mutex_spin_exit(&sc->sc_intr_lock); 577 return 1; 578 } 579 580 static int 581 cmpci_query_encoding(void *handle, struct audio_encoding *fp) 582 { 583 584 switch (fp->index) { 585 case 0: 586 strcpy(fp->name, AudioEulinear); 587 fp->encoding = AUDIO_ENCODING_ULINEAR; 588 fp->precision = 8; 589 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 590 break; 591 case 1: 592 strcpy(fp->name, AudioEmulaw); 593 fp->encoding = AUDIO_ENCODING_ULAW; 594 fp->precision = 8; 595 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 596 break; 597 case 2: 598 strcpy(fp->name, AudioEalaw); 599 fp->encoding = AUDIO_ENCODING_ALAW; 600 fp->precision = 8; 601 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 602 break; 603 case 3: 604 strcpy(fp->name, AudioEslinear); 605 fp->encoding = AUDIO_ENCODING_SLINEAR; 606 fp->precision = 8; 607 fp->flags = 0; 608 break; 609 case 4: 610 strcpy(fp->name, AudioEslinear_le); 611 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 612 fp->precision = 16; 613 fp->flags = 0; 614 break; 615 case 5: 616 strcpy(fp->name, AudioEulinear_le); 617 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 618 fp->precision = 16; 619 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 620 break; 621 case 6: 622 strcpy(fp->name, AudioEslinear_be); 623 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 624 fp->precision = 16; 625 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 626 break; 627 case 7: 628 strcpy(fp->name, AudioEulinear_be); 629 fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 630 fp->precision = 16; 631 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 632 break; 633 default: 634 return EINVAL; 635 } 636 return 0; 637 } 638 639 640 static int 641 cmpci_set_params(void *handle, int setmode, int usemode, 642 audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil, 643 stream_filter_list_t *rfil) 644 { 645 int i; 646 struct cmpci_softc *sc; 647 648 sc = handle; 649 for (i = 0; i < 2; i++) { 650 int md_format; 651 int md_divide; 652 int md_index; 653 int mode; 654 audio_params_t *p; 655 stream_filter_list_t *fil; 656 int ind; 657 658 switch (i) { 659 case 0: 660 mode = AUMODE_PLAY; 661 p = play; 662 fil = pfil; 663 break; 664 case 1: 665 mode = AUMODE_RECORD; 666 p = rec; 667 fil = rfil; 668 break; 669 default: 670 return EINVAL; 671 } 672 673 if (!(setmode & mode)) 674 continue; 675 676 md_index = cmpci_rate_to_index(p->sample_rate); 677 md_divide = cmpci_index_to_divider(md_index); 678 p->sample_rate = cmpci_index_to_rate(md_index); 679 DPRINTF(("%s: sample:%u, divider=%d\n", 680 device_xname(&sc->sc_dev), p->sample_rate, md_divide)); 681 682 ind = auconv_set_converter(cmpci_formats, CMPCI_NFORMATS, 683 mode, p, FALSE, fil); 684 if (ind < 0) 685 return EINVAL; 686 if (fil->req_size > 0) 687 p = &fil->filters[0].param; 688 689 /* format */ 690 md_format = p->channels == 1 691 ? CMPCI_REG_FORMAT_MONO : CMPCI_REG_FORMAT_STEREO; 692 md_format |= p->precision == 16 693 ? CMPCI_REG_FORMAT_16BIT : CMPCI_REG_FORMAT_8BIT; 694 if (mode & AUMODE_PLAY) { 695 cmpci_reg_partial_write_4(sc, 696 CMPCI_REG_CHANNEL_FORMAT, 697 CMPCI_REG_CH0_FORMAT_SHIFT, 698 CMPCI_REG_CH0_FORMAT_MASK, md_format); 699 cmpci_reg_partial_write_4(sc, 700 CMPCI_REG_FUNC_1, CMPCI_REG_DAC_FS_SHIFT, 701 CMPCI_REG_DAC_FS_MASK, md_divide); 702 sc->sc_play.md_divide = md_divide; 703 } else { 704 cmpci_reg_partial_write_4(sc, 705 CMPCI_REG_CHANNEL_FORMAT, 706 CMPCI_REG_CH1_FORMAT_SHIFT, 707 CMPCI_REG_CH1_FORMAT_MASK, md_format); 708 cmpci_reg_partial_write_4(sc, 709 CMPCI_REG_FUNC_1, CMPCI_REG_ADC_FS_SHIFT, 710 CMPCI_REG_ADC_FS_MASK, md_divide); 711 sc->sc_rec.md_divide = md_divide; 712 } 713 cmpci_set_out_ports(sc); 714 cmpci_set_in_ports(sc); 715 } 716 return 0; 717 } 718 719 /* ARGSUSED */ 720 static int 721 cmpci_round_blocksize(void *handle, int block, 722 int mode, const audio_params_t *param) 723 { 724 725 return block & -4; 726 } 727 728 static int 729 cmpci_halt_output(void *handle) 730 { 731 struct cmpci_softc *sc; 732 733 sc = handle; 734 sc->sc_play.intr = NULL; 735 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 736 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); 737 /* wait for reset DMA */ 738 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); 739 delay(10); 740 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); 741 742 return 0; 743 } 744 745 static int 746 cmpci_halt_input(void *handle) 747 { 748 struct cmpci_softc *sc; 749 750 sc = handle; 751 sc->sc_rec.intr = NULL; 752 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 753 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); 754 /* wait for reset DMA */ 755 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); 756 delay(10); 757 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); 758 759 return 0; 760 } 761 762 /* get audio device information */ 763 static int 764 cmpci_getdev(void *handle, struct audio_device *ad) 765 { 766 struct cmpci_softc *sc; 767 768 sc = handle; 769 strncpy(ad->name, "CMI PCI Audio", sizeof(ad->name)); 770 snprintf(ad->version, sizeof(ad->version), "0x%02x", 771 PCI_REVISION(sc->sc_class)); 772 switch (PCI_PRODUCT(sc->sc_id)) { 773 case PCI_PRODUCT_CMEDIA_CMI8338A: 774 strncpy(ad->config, "CMI8338A", sizeof(ad->config)); 775 break; 776 case PCI_PRODUCT_CMEDIA_CMI8338B: 777 strncpy(ad->config, "CMI8338B", sizeof(ad->config)); 778 break; 779 case PCI_PRODUCT_CMEDIA_CMI8738: 780 strncpy(ad->config, "CMI8738", sizeof(ad->config)); 781 break; 782 case PCI_PRODUCT_CMEDIA_CMI8738B: 783 strncpy(ad->config, "CMI8738B", sizeof(ad->config)); 784 break; 785 default: 786 strncpy(ad->config, "unknown", sizeof(ad->config)); 787 } 788 789 return 0; 790 } 791 792 /* mixer device information */ 793 int 794 cmpci_query_devinfo(void *handle, mixer_devinfo_t *dip) 795 { 796 static const char *const mixer_port_names[] = { 797 AudioNdac, AudioNfmsynth, AudioNcd, AudioNline, AudioNaux, 798 AudioNmicrophone 799 }; 800 static const char *const mixer_classes[] = { 801 AudioCinputs, AudioCoutputs, AudioCrecord, CmpciCplayback, 802 CmpciCspdif 803 }; 804 struct cmpci_softc *sc; 805 int i; 806 807 sc = handle; 808 dip->prev = dip->next = AUDIO_MIXER_LAST; 809 810 switch (dip->index) { 811 case CMPCI_INPUT_CLASS: 812 case CMPCI_OUTPUT_CLASS: 813 case CMPCI_RECORD_CLASS: 814 case CMPCI_PLAYBACK_CLASS: 815 case CMPCI_SPDIF_CLASS: 816 dip->type = AUDIO_MIXER_CLASS; 817 dip->mixer_class = dip->index; 818 strcpy(dip->label.name, 819 mixer_classes[dip->index - CMPCI_INPUT_CLASS]); 820 return 0; 821 822 case CMPCI_AUX_IN_VOL: 823 dip->un.v.delta = 1 << (8 - CMPCI_REG_AUX_VALBITS); 824 goto vol1; 825 case CMPCI_DAC_VOL: 826 case CMPCI_FM_VOL: 827 case CMPCI_CD_VOL: 828 case CMPCI_LINE_IN_VOL: 829 case CMPCI_MIC_VOL: 830 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS); 831 vol1: dip->mixer_class = CMPCI_INPUT_CLASS; 832 dip->next = dip->index + 6; /* CMPCI_xxx_MUTE */ 833 strcpy(dip->label.name, mixer_port_names[dip->index]); 834 dip->un.v.num_channels = (dip->index == CMPCI_MIC_VOL ? 1 : 2); 835 vol: 836 dip->type = AUDIO_MIXER_VALUE; 837 strcpy(dip->un.v.units.name, AudioNvolume); 838 return 0; 839 840 case CMPCI_MIC_MUTE: 841 dip->next = CMPCI_MIC_PREAMP; 842 /* FALLTHROUGH */ 843 case CMPCI_DAC_MUTE: 844 case CMPCI_FM_MUTE: 845 case CMPCI_CD_MUTE: 846 case CMPCI_LINE_IN_MUTE: 847 case CMPCI_AUX_IN_MUTE: 848 dip->prev = dip->index - 6; /* CMPCI_xxx_VOL */ 849 dip->mixer_class = CMPCI_INPUT_CLASS; 850 strcpy(dip->label.name, AudioNmute); 851 goto on_off; 852 on_off: 853 dip->type = AUDIO_MIXER_ENUM; 854 dip->un.e.num_mem = 2; 855 strcpy(dip->un.e.member[0].label.name, AudioNoff); 856 dip->un.e.member[0].ord = 0; 857 strcpy(dip->un.e.member[1].label.name, AudioNon); 858 dip->un.e.member[1].ord = 1; 859 return 0; 860 861 case CMPCI_MIC_PREAMP: 862 dip->mixer_class = CMPCI_INPUT_CLASS; 863 dip->prev = CMPCI_MIC_MUTE; 864 strcpy(dip->label.name, AudioNpreamp); 865 goto on_off; 866 case CMPCI_PCSPEAKER: 867 dip->mixer_class = CMPCI_INPUT_CLASS; 868 strcpy(dip->label.name, AudioNspeaker); 869 dip->un.v.num_channels = 1; 870 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_SPEAKER_VALBITS); 871 goto vol; 872 case CMPCI_RECORD_SOURCE: 873 dip->mixer_class = CMPCI_RECORD_CLASS; 874 strcpy(dip->label.name, AudioNsource); 875 dip->type = AUDIO_MIXER_SET; 876 dip->un.s.num_mem = 7; 877 strcpy(dip->un.s.member[0].label.name, AudioNmicrophone); 878 dip->un.s.member[0].mask = CMPCI_RECORD_SOURCE_MIC; 879 strcpy(dip->un.s.member[1].label.name, AudioNcd); 880 dip->un.s.member[1].mask = CMPCI_RECORD_SOURCE_CD; 881 strcpy(dip->un.s.member[2].label.name, AudioNline); 882 dip->un.s.member[2].mask = CMPCI_RECORD_SOURCE_LINE_IN; 883 strcpy(dip->un.s.member[3].label.name, AudioNaux); 884 dip->un.s.member[3].mask = CMPCI_RECORD_SOURCE_AUX_IN; 885 strcpy(dip->un.s.member[4].label.name, AudioNwave); 886 dip->un.s.member[4].mask = CMPCI_RECORD_SOURCE_WAVE; 887 strcpy(dip->un.s.member[5].label.name, AudioNfmsynth); 888 dip->un.s.member[5].mask = CMPCI_RECORD_SOURCE_FM; 889 strcpy(dip->un.s.member[6].label.name, CmpciNspdif); 890 dip->un.s.member[6].mask = CMPCI_RECORD_SOURCE_SPDIF; 891 return 0; 892 case CMPCI_MIC_RECVOL: 893 dip->mixer_class = CMPCI_RECORD_CLASS; 894 strcpy(dip->label.name, AudioNmicrophone); 895 dip->un.v.num_channels = 1; 896 dip->un.v.delta = 1 << (8 - CMPCI_REG_ADMIC_VALBITS); 897 goto vol; 898 899 case CMPCI_PLAYBACK_MODE: 900 dip->mixer_class = CMPCI_PLAYBACK_CLASS; 901 dip->type = AUDIO_MIXER_ENUM; 902 strcpy(dip->label.name, AudioNmode); 903 dip->un.e.num_mem = 2; 904 strcpy(dip->un.e.member[0].label.name, AudioNdac); 905 dip->un.e.member[0].ord = CMPCI_PLAYBACK_MODE_WAVE; 906 strcpy(dip->un.e.member[1].label.name, CmpciNspdif); 907 dip->un.e.member[1].ord = CMPCI_PLAYBACK_MODE_SPDIF; 908 return 0; 909 case CMPCI_SPDIF_IN_SELECT: 910 dip->mixer_class = CMPCI_SPDIF_CLASS; 911 dip->type = AUDIO_MIXER_ENUM; 912 dip->next = CMPCI_SPDIF_IN_PHASE; 913 strcpy(dip->label.name, AudioNinput); 914 i = 0; 915 strcpy(dip->un.e.member[i].label.name, CmpciNspdin1); 916 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN1; 917 if (CMPCI_ISCAP(sc, 2ND_SPDIN)) { 918 strcpy(dip->un.e.member[i].label.name, CmpciNspdin2); 919 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN2; 920 } 921 strcpy(dip->un.e.member[i].label.name, CmpciNspdout); 922 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDOUT; 923 dip->un.e.num_mem = i; 924 return 0; 925 case CMPCI_SPDIF_IN_PHASE: 926 dip->mixer_class = CMPCI_SPDIF_CLASS; 927 dip->prev = CMPCI_SPDIF_IN_SELECT; 928 strcpy(dip->label.name, CmpciNphase); 929 dip->type = AUDIO_MIXER_ENUM; 930 dip->un.e.num_mem = 2; 931 strcpy(dip->un.e.member[0].label.name, CmpciNpositive); 932 dip->un.e.member[0].ord = CMPCI_SPDIF_IN_PHASE_POSITIVE; 933 strcpy(dip->un.e.member[1].label.name, CmpciNnegative); 934 dip->un.e.member[1].ord = CMPCI_SPDIF_IN_PHASE_NEGATIVE; 935 return 0; 936 case CMPCI_SPDIF_LOOP: 937 dip->mixer_class = CMPCI_SPDIF_CLASS; 938 dip->next = CMPCI_SPDIF_OUT_PLAYBACK; 939 strcpy(dip->label.name, AudioNoutput); 940 dip->type = AUDIO_MIXER_ENUM; 941 dip->un.e.num_mem = 2; 942 strcpy(dip->un.e.member[0].label.name, CmpciNplayback); 943 dip->un.e.member[0].ord = CMPCI_SPDIF_LOOP_OFF; 944 strcpy(dip->un.e.member[1].label.name, CmpciNspdin); 945 dip->un.e.member[1].ord = CMPCI_SPDIF_LOOP_ON; 946 return 0; 947 case CMPCI_SPDIF_OUT_PLAYBACK: 948 dip->mixer_class = CMPCI_SPDIF_CLASS; 949 dip->prev = CMPCI_SPDIF_LOOP; 950 dip->next = CMPCI_SPDIF_OUT_VOLTAGE; 951 strcpy(dip->label.name, CmpciNplayback); 952 dip->type = AUDIO_MIXER_ENUM; 953 dip->un.e.num_mem = 2; 954 strcpy(dip->un.e.member[0].label.name, AudioNwave); 955 dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_PLAYBACK_WAVE; 956 strcpy(dip->un.e.member[1].label.name, CmpciNlegacy); 957 dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_PLAYBACK_LEGACY; 958 return 0; 959 case CMPCI_SPDIF_OUT_VOLTAGE: 960 dip->mixer_class = CMPCI_SPDIF_CLASS; 961 dip->prev = CMPCI_SPDIF_OUT_PLAYBACK; 962 strcpy(dip->label.name, CmpciNvoltage); 963 dip->type = AUDIO_MIXER_ENUM; 964 dip->un.e.num_mem = 2; 965 strcpy(dip->un.e.member[0].label.name, CmpciNhigh_v); 966 dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_VOLTAGE_HIGH; 967 strcpy(dip->un.e.member[1].label.name, CmpciNlow_v); 968 dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_VOLTAGE_LOW; 969 return 0; 970 case CMPCI_MONITOR_DAC: 971 dip->mixer_class = CMPCI_SPDIF_CLASS; 972 strcpy(dip->label.name, AudioNmonitor); 973 dip->type = AUDIO_MIXER_ENUM; 974 dip->un.e.num_mem = 3; 975 strcpy(dip->un.e.member[0].label.name, AudioNoff); 976 dip->un.e.member[0].ord = CMPCI_MONITOR_DAC_OFF; 977 strcpy(dip->un.e.member[1].label.name, CmpciNspdin); 978 dip->un.e.member[1].ord = CMPCI_MONITOR_DAC_SPDIN; 979 strcpy(dip->un.e.member[2].label.name, CmpciNspdout); 980 dip->un.e.member[2].ord = CMPCI_MONITOR_DAC_SPDOUT; 981 return 0; 982 983 case CMPCI_MASTER_VOL: 984 dip->mixer_class = CMPCI_OUTPUT_CLASS; 985 strcpy(dip->label.name, AudioNmaster); 986 dip->un.v.num_channels = 2; 987 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS); 988 goto vol; 989 case CMPCI_REAR: 990 dip->mixer_class = CMPCI_OUTPUT_CLASS; 991 dip->next = CMPCI_INDIVIDUAL; 992 strcpy(dip->label.name, CmpciNrear); 993 goto on_off; 994 case CMPCI_INDIVIDUAL: 995 dip->mixer_class = CMPCI_OUTPUT_CLASS; 996 dip->prev = CMPCI_REAR; 997 dip->next = CMPCI_REVERSE; 998 strcpy(dip->label.name, CmpciNindividual); 999 goto on_off; 1000 case CMPCI_REVERSE: 1001 dip->mixer_class = CMPCI_OUTPUT_CLASS; 1002 dip->prev = CMPCI_INDIVIDUAL; 1003 strcpy(dip->label.name, CmpciNreverse); 1004 goto on_off; 1005 case CMPCI_SURROUND: 1006 dip->mixer_class = CMPCI_OUTPUT_CLASS; 1007 strcpy(dip->label.name, CmpciNsurround); 1008 goto on_off; 1009 } 1010 1011 return ENXIO; 1012 } 1013 1014 static int 1015 cmpci_alloc_dmamem(struct cmpci_softc *sc, size_t size, void **r_addr) 1016 { 1017 int error; 1018 struct cmpci_dmanode *n; 1019 1020 error = 0; 1021 n = kmem_alloc(sizeof(struct cmpci_dmanode), KM_SLEEP); 1022 if (n == NULL) { 1023 error = ENOMEM; 1024 goto quit; 1025 } 1026 1027 #define CMPCI_DMABUF_ALIGN 0x4 1028 #define CMPCI_DMABUF_BOUNDARY 0x0 1029 n->cd_tag = sc->sc_dmat; 1030 n->cd_size = size; 1031 error = bus_dmamem_alloc(n->cd_tag, n->cd_size, 1032 CMPCI_DMABUF_ALIGN, CMPCI_DMABUF_BOUNDARY, n->cd_segs, 1033 sizeof(n->cd_segs)/sizeof(n->cd_segs[0]), &n->cd_nsegs, 1034 BUS_DMA_WAITOK); 1035 if (error) 1036 goto mfree; 1037 error = bus_dmamem_map(n->cd_tag, n->cd_segs, n->cd_nsegs, n->cd_size, 1038 &n->cd_addr, BUS_DMA_WAITOK | BUS_DMA_COHERENT); 1039 if (error) 1040 goto dmafree; 1041 error = bus_dmamap_create(n->cd_tag, n->cd_size, 1, n->cd_size, 0, 1042 BUS_DMA_WAITOK, &n->cd_map); 1043 if (error) 1044 goto unmap; 1045 error = bus_dmamap_load(n->cd_tag, n->cd_map, n->cd_addr, n->cd_size, 1046 NULL, BUS_DMA_WAITOK); 1047 if (error) 1048 goto destroy; 1049 1050 n->cd_next = sc->sc_dmap; 1051 sc->sc_dmap = n; 1052 *r_addr = KVADDR(n); 1053 return 0; 1054 1055 destroy: 1056 bus_dmamap_destroy(n->cd_tag, n->cd_map); 1057 unmap: 1058 bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size); 1059 dmafree: 1060 bus_dmamem_free(n->cd_tag, 1061 n->cd_segs, sizeof(n->cd_segs)/sizeof(n->cd_segs[0])); 1062 mfree: 1063 kmem_free(n, sizeof(*n)); 1064 quit: 1065 return error; 1066 } 1067 1068 static int 1069 cmpci_free_dmamem(struct cmpci_softc *sc, void *addr, size_t size) 1070 { 1071 struct cmpci_dmanode **nnp; 1072 1073 for (nnp = &sc->sc_dmap; *nnp; nnp= &(*nnp)->cd_next) { 1074 if ((*nnp)->cd_addr == addr) { 1075 struct cmpci_dmanode *n = *nnp; 1076 bus_dmamap_unload(n->cd_tag, n->cd_map); 1077 bus_dmamap_destroy(n->cd_tag, n->cd_map); 1078 bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size); 1079 bus_dmamem_free(n->cd_tag, n->cd_segs, 1080 sizeof(n->cd_segs)/sizeof(n->cd_segs[0])); 1081 kmem_free(n, sizeof(*n)); 1082 return 0; 1083 } 1084 } 1085 return -1; 1086 } 1087 1088 static struct cmpci_dmanode * 1089 cmpci_find_dmamem(struct cmpci_softc *sc, void *addr) 1090 { 1091 struct cmpci_dmanode *p; 1092 1093 for (p = sc->sc_dmap; p; p = p->cd_next) 1094 if (KVADDR(p) == (void *)addr) 1095 break; 1096 return p; 1097 } 1098 1099 #if 0 1100 static void 1101 cmpci_print_dmamem(struct cmpci_dmanode *); 1102 static void 1103 cmpci_print_dmamem(struct cmpci_dmanode *p) 1104 { 1105 1106 DPRINTF(("DMA at virt:%p, dmaseg:%p, mapseg:%p, size:%p\n", 1107 (void *)p->cd_addr, (void *)p->cd_segs[0].ds_addr, 1108 (void *)DMAADDR(p), (void *)p->cd_size)); 1109 } 1110 #endif /* DEBUG */ 1111 1112 static void * 1113 cmpci_allocm(void *handle, int direction, size_t size) 1114 { 1115 void *addr; 1116 1117 addr = NULL; /* XXX gcc */ 1118 1119 if (cmpci_alloc_dmamem(handle, size, &addr)) 1120 return NULL; 1121 return addr; 1122 } 1123 1124 static void 1125 cmpci_freem(void *handle, void *addr, size_t size) 1126 { 1127 1128 cmpci_free_dmamem(handle, addr, size); 1129 } 1130 1131 #define MAXVAL 256 1132 static int 1133 cmpci_adjust(int val, int mask) 1134 { 1135 1136 val += (MAXVAL - mask) >> 1; 1137 if (val >= MAXVAL) 1138 val = MAXVAL-1; 1139 return val & mask; 1140 } 1141 1142 static void 1143 cmpci_set_mixer_gain(struct cmpci_softc *sc, int port) 1144 { 1145 int src; 1146 int bits, mask; 1147 1148 switch (port) { 1149 case CMPCI_MIC_VOL: 1150 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_MIC, 1151 CMPCI_ADJUST_MIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1152 return; 1153 case CMPCI_MASTER_VOL: 1154 src = CMPCI_SB16_MIXER_MASTER_L; 1155 break; 1156 case CMPCI_LINE_IN_VOL: 1157 src = CMPCI_SB16_MIXER_LINE_L; 1158 break; 1159 case CMPCI_AUX_IN_VOL: 1160 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MIXER_AUX, 1161 CMPCI_ADJUST_AUX_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT], 1162 sc->sc_gain[port][CMPCI_RIGHT])); 1163 return; 1164 case CMPCI_MIC_RECVOL: 1165 cmpci_reg_partial_write_1(sc, CMPCI_REG_MIXER25, 1166 CMPCI_REG_ADMIC_SHIFT, CMPCI_REG_ADMIC_MASK, 1167 CMPCI_ADJUST_ADMIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1168 return; 1169 case CMPCI_DAC_VOL: 1170 src = CMPCI_SB16_MIXER_VOICE_L; 1171 break; 1172 case CMPCI_FM_VOL: 1173 src = CMPCI_SB16_MIXER_FM_L; 1174 break; 1175 case CMPCI_CD_VOL: 1176 src = CMPCI_SB16_MIXER_CDDA_L; 1177 break; 1178 case CMPCI_PCSPEAKER: 1179 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_SPEAKER, 1180 CMPCI_ADJUST_2_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1181 return; 1182 case CMPCI_MIC_PREAMP: 1183 if (sc->sc_gain[port][CMPCI_LR]) 1184 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1185 CMPCI_REG_MICGAINZ); 1186 else 1187 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1188 CMPCI_REG_MICGAINZ); 1189 return; 1190 1191 case CMPCI_DAC_MUTE: 1192 if (sc->sc_gain[port][CMPCI_LR]) 1193 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1194 CMPCI_REG_WSMUTE); 1195 else 1196 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1197 CMPCI_REG_WSMUTE); 1198 return; 1199 case CMPCI_FM_MUTE: 1200 if (sc->sc_gain[port][CMPCI_LR]) 1201 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1202 CMPCI_REG_FMMUTE); 1203 else 1204 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1205 CMPCI_REG_FMMUTE); 1206 return; 1207 case CMPCI_AUX_IN_MUTE: 1208 if (sc->sc_gain[port][CMPCI_LR]) 1209 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1210 CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM); 1211 else 1212 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1213 CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM); 1214 return; 1215 case CMPCI_CD_MUTE: 1216 mask = CMPCI_SB16_SW_CD; 1217 goto sbmute; 1218 case CMPCI_MIC_MUTE: 1219 mask = CMPCI_SB16_SW_MIC; 1220 goto sbmute; 1221 case CMPCI_LINE_IN_MUTE: 1222 mask = CMPCI_SB16_SW_LINE; 1223 sbmute: 1224 bits = cmpci_mixerreg_read(sc, CMPCI_SB16_MIXER_OUTMIX); 1225 if (sc->sc_gain[port][CMPCI_LR]) 1226 bits = bits & ~mask; 1227 else 1228 bits = bits | mask; 1229 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, bits); 1230 return; 1231 1232 case CMPCI_SPDIF_IN_SELECT: 1233 case CMPCI_MONITOR_DAC: 1234 case CMPCI_PLAYBACK_MODE: 1235 case CMPCI_SPDIF_LOOP: 1236 case CMPCI_SPDIF_OUT_PLAYBACK: 1237 cmpci_set_out_ports(sc); 1238 return; 1239 case CMPCI_SPDIF_OUT_VOLTAGE: 1240 if (CMPCI_ISCAP(sc, SPDOUT_VOLTAGE)) { 1241 if (sc->sc_gain[CMPCI_SPDIF_OUT_VOLTAGE][CMPCI_LR] 1242 == CMPCI_SPDIF_OUT_VOLTAGE_HIGH) 1243 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_5V); 1244 else 1245 cmpci_reg_set_reg_misc(sc, CMPCI_REG_5V); 1246 } 1247 return; 1248 case CMPCI_SURROUND: 1249 if (CMPCI_ISCAP(sc, SURROUND)) { 1250 if (sc->sc_gain[CMPCI_SURROUND][CMPCI_LR]) 1251 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1252 CMPCI_REG_SURROUND); 1253 else 1254 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1255 CMPCI_REG_SURROUND); 1256 } 1257 return; 1258 case CMPCI_REAR: 1259 if (CMPCI_ISCAP(sc, REAR)) { 1260 if (sc->sc_gain[CMPCI_REAR][CMPCI_LR]) 1261 cmpci_reg_set_reg_misc(sc, CMPCI_REG_N4SPK3D); 1262 else 1263 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_N4SPK3D); 1264 } 1265 return; 1266 case CMPCI_INDIVIDUAL: 1267 if (CMPCI_ISCAP(sc, INDIVIDUAL_REAR)) { 1268 if (sc->sc_gain[CMPCI_REAR][CMPCI_LR]) 1269 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1270 CMPCI_REG_INDIVIDUAL); 1271 else 1272 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1273 CMPCI_REG_INDIVIDUAL); 1274 } 1275 return; 1276 case CMPCI_REVERSE: 1277 if (CMPCI_ISCAP(sc, REVERSE_FR)) { 1278 if (sc->sc_gain[CMPCI_REVERSE][CMPCI_LR]) 1279 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1280 CMPCI_REG_REVERSE_FR); 1281 else 1282 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1283 CMPCI_REG_REVERSE_FR); 1284 } 1285 return; 1286 case CMPCI_SPDIF_IN_PHASE: 1287 if (CMPCI_ISCAP(sc, SPDIN_PHASE)) { 1288 if (sc->sc_gain[CMPCI_SPDIF_IN_PHASE][CMPCI_LR] 1289 == CMPCI_SPDIF_IN_PHASE_POSITIVE) 1290 cmpci_reg_clear_1(sc, CMPCI_REG_CHANNEL_FORMAT, 1291 CMPCI_REG_SPDIN_PHASE); 1292 else 1293 cmpci_reg_set_1(sc, CMPCI_REG_CHANNEL_FORMAT, 1294 CMPCI_REG_SPDIN_PHASE); 1295 } 1296 return; 1297 default: 1298 return; 1299 } 1300 1301 cmpci_mixerreg_write(sc, src, 1302 CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT])); 1303 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_L_TO_R(src), 1304 CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_RIGHT])); 1305 } 1306 1307 static void 1308 cmpci_set_out_ports(struct cmpci_softc *sc) 1309 { 1310 uint8_t v; 1311 int enspdout; 1312 1313 if (!CMPCI_ISCAP(sc, SPDLOOP)) 1314 return; 1315 1316 /* SPDIF/out select */ 1317 if (sc->sc_gain[CMPCI_SPDIF_LOOP][CMPCI_LR] == CMPCI_SPDIF_LOOP_OFF) { 1318 /* playback */ 1319 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP); 1320 } else { 1321 /* monitor SPDIF/in */ 1322 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP); 1323 } 1324 1325 /* SPDIF in select */ 1326 v = sc->sc_gain[CMPCI_SPDIF_IN_SELECT][CMPCI_LR]; 1327 if (v & CMPCI_SPDIFIN_SPDIFIN2) 1328 cmpci_reg_set_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN); 1329 else 1330 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN); 1331 if (v & CMPCI_SPDIFIN_SPDIFOUT) 1332 cmpci_reg_set_reg_misc(sc, CMPCI_REG_SPDFLOOPI); 1333 else 1334 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPDFLOOPI); 1335 1336 enspdout = 0; 1337 /* playback to ... */ 1338 if (CMPCI_ISCAP(sc, SPDOUT) && 1339 sc->sc_gain[CMPCI_PLAYBACK_MODE][CMPCI_LR] 1340 == CMPCI_PLAYBACK_MODE_SPDIF && 1341 (sc->sc_play.md_divide == CMPCI_REG_RATE_44100 || 1342 (CMPCI_ISCAP(sc, SPDOUT_48K) && 1343 sc->sc_play.md_divide==CMPCI_REG_RATE_48000))) { 1344 /* playback to SPDIF */ 1345 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE); 1346 enspdout = 1; 1347 if (sc->sc_play.md_divide==CMPCI_REG_RATE_48000) 1348 cmpci_reg_set_reg_misc(sc, 1349 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1350 else 1351 cmpci_reg_clear_reg_misc(sc, 1352 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1353 } else { 1354 /* playback to DAC */ 1355 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, 1356 CMPCI_REG_SPDIF0_ENABLE); 1357 if (CMPCI_ISCAP(sc, SPDOUT_48K)) 1358 cmpci_reg_clear_reg_misc(sc, 1359 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1360 } 1361 1362 /* legacy to SPDIF/out or not */ 1363 if (CMPCI_ISCAP(sc, SPDLEGACY)) { 1364 if (sc->sc_gain[CMPCI_SPDIF_OUT_PLAYBACK][CMPCI_LR] 1365 == CMPCI_SPDIF_OUT_PLAYBACK_WAVE) 1366 cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL, 1367 CMPCI_REG_LEGACY_SPDIF_ENABLE); 1368 else { 1369 cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL, 1370 CMPCI_REG_LEGACY_SPDIF_ENABLE); 1371 enspdout = 1; 1372 } 1373 } 1374 1375 /* enable/disable SPDIF/out */ 1376 if (CMPCI_ISCAP(sc, XSPDOUT) && enspdout) 1377 cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL, 1378 CMPCI_REG_XSPDIF_ENABLE); 1379 else 1380 cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL, 1381 CMPCI_REG_XSPDIF_ENABLE); 1382 1383 /* SPDIF monitor (digital to analog output) */ 1384 if (CMPCI_ISCAP(sc, SPDIN_MONITOR)) { 1385 v = sc->sc_gain[CMPCI_MONITOR_DAC][CMPCI_LR]; 1386 if (!(v & CMPCI_MONDAC_ENABLE)) 1387 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1388 CMPCI_REG_SPDIN_MONITOR); 1389 if (v & CMPCI_MONDAC_SPDOUT) 1390 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, 1391 CMPCI_REG_SPDIFOUT_DAC); 1392 else 1393 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, 1394 CMPCI_REG_SPDIFOUT_DAC); 1395 if (v & CMPCI_MONDAC_ENABLE) 1396 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1397 CMPCI_REG_SPDIN_MONITOR); 1398 } 1399 } 1400 1401 static int 1402 cmpci_set_in_ports(struct cmpci_softc *sc) 1403 { 1404 int mask; 1405 int bitsl, bitsr; 1406 1407 mask = sc->sc_in_mask; 1408 1409 /* 1410 * Note CMPCI_RECORD_SOURCE_CD, CMPCI_RECORD_SOURCE_LINE_IN and 1411 * CMPCI_RECORD_SOURCE_FM are defined to the corresponding bit 1412 * of the mixer register. 1413 */ 1414 bitsr = mask & (CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN | 1415 CMPCI_RECORD_SOURCE_FM); 1416 1417 bitsl = CMPCI_SB16_MIXER_SRC_R_TO_L(bitsr); 1418 if (mask & CMPCI_RECORD_SOURCE_MIC) { 1419 bitsl |= CMPCI_SB16_MIXER_MIC_SRC; 1420 bitsr |= CMPCI_SB16_MIXER_MIC_SRC; 1421 } 1422 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, bitsl); 1423 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, bitsr); 1424 1425 if (mask & CMPCI_RECORD_SOURCE_AUX_IN) 1426 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1427 CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN); 1428 else 1429 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1430 CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN); 1431 1432 if (mask & CMPCI_RECORD_SOURCE_WAVE) 1433 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1434 CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR); 1435 else 1436 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1437 CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR); 1438 1439 if (CMPCI_ISCAP(sc, SPDIN) && 1440 (sc->sc_rec.md_divide == CMPCI_REG_RATE_44100 || 1441 (CMPCI_ISCAP(sc, SPDOUT_48K) && 1442 sc->sc_rec.md_divide == CMPCI_REG_RATE_48000/* XXX? */))) { 1443 if (mask & CMPCI_RECORD_SOURCE_SPDIF) { 1444 /* enable SPDIF/in */ 1445 cmpci_reg_set_4(sc, 1446 CMPCI_REG_FUNC_1, 1447 CMPCI_REG_SPDIF1_ENABLE); 1448 } else { 1449 cmpci_reg_clear_4(sc, 1450 CMPCI_REG_FUNC_1, 1451 CMPCI_REG_SPDIF1_ENABLE); 1452 } 1453 } 1454 1455 return 0; 1456 } 1457 1458 static int 1459 cmpci_set_port(void *handle, mixer_ctrl_t *cp) 1460 { 1461 struct cmpci_softc *sc; 1462 int lgain, rgain; 1463 1464 sc = handle; 1465 switch (cp->dev) { 1466 case CMPCI_MIC_VOL: 1467 case CMPCI_PCSPEAKER: 1468 case CMPCI_MIC_RECVOL: 1469 if (cp->un.value.num_channels != 1) 1470 return EINVAL; 1471 /* FALLTHROUGH */ 1472 case CMPCI_DAC_VOL: 1473 case CMPCI_FM_VOL: 1474 case CMPCI_CD_VOL: 1475 case CMPCI_LINE_IN_VOL: 1476 case CMPCI_AUX_IN_VOL: 1477 case CMPCI_MASTER_VOL: 1478 if (cp->type != AUDIO_MIXER_VALUE) 1479 return EINVAL; 1480 switch (cp->un.value.num_channels) { 1481 case 1: 1482 lgain = rgain = 1483 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]; 1484 break; 1485 case 2: 1486 lgain = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]; 1487 rgain = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]; 1488 break; 1489 default: 1490 return EINVAL; 1491 } 1492 sc->sc_gain[cp->dev][CMPCI_LEFT] = lgain; 1493 sc->sc_gain[cp->dev][CMPCI_RIGHT] = rgain; 1494 1495 cmpci_set_mixer_gain(sc, cp->dev); 1496 break; 1497 1498 case CMPCI_RECORD_SOURCE: 1499 if (cp->type != AUDIO_MIXER_SET) 1500 return EINVAL; 1501 1502 if (cp->un.mask & ~(CMPCI_RECORD_SOURCE_MIC | 1503 CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN | 1504 CMPCI_RECORD_SOURCE_AUX_IN | CMPCI_RECORD_SOURCE_WAVE | 1505 CMPCI_RECORD_SOURCE_FM | CMPCI_RECORD_SOURCE_SPDIF)) 1506 return EINVAL; 1507 1508 if (cp->un.mask & CMPCI_RECORD_SOURCE_SPDIF) 1509 cp->un.mask = CMPCI_RECORD_SOURCE_SPDIF; 1510 1511 sc->sc_in_mask = cp->un.mask; 1512 return cmpci_set_in_ports(sc); 1513 1514 /* boolean */ 1515 case CMPCI_DAC_MUTE: 1516 case CMPCI_FM_MUTE: 1517 case CMPCI_CD_MUTE: 1518 case CMPCI_LINE_IN_MUTE: 1519 case CMPCI_AUX_IN_MUTE: 1520 case CMPCI_MIC_MUTE: 1521 case CMPCI_MIC_PREAMP: 1522 case CMPCI_PLAYBACK_MODE: 1523 case CMPCI_SPDIF_IN_PHASE: 1524 case CMPCI_SPDIF_LOOP: 1525 case CMPCI_SPDIF_OUT_PLAYBACK: 1526 case CMPCI_SPDIF_OUT_VOLTAGE: 1527 case CMPCI_REAR: 1528 case CMPCI_INDIVIDUAL: 1529 case CMPCI_REVERSE: 1530 case CMPCI_SURROUND: 1531 if (cp->type != AUDIO_MIXER_ENUM) 1532 return EINVAL; 1533 sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord != 0; 1534 cmpci_set_mixer_gain(sc, cp->dev); 1535 break; 1536 1537 case CMPCI_SPDIF_IN_SELECT: 1538 switch (cp->un.ord) { 1539 case CMPCI_SPDIF_IN_SPDIN1: 1540 case CMPCI_SPDIF_IN_SPDIN2: 1541 case CMPCI_SPDIF_IN_SPDOUT: 1542 break; 1543 default: 1544 return EINVAL; 1545 } 1546 goto xenum; 1547 case CMPCI_MONITOR_DAC: 1548 switch (cp->un.ord) { 1549 case CMPCI_MONITOR_DAC_OFF: 1550 case CMPCI_MONITOR_DAC_SPDIN: 1551 case CMPCI_MONITOR_DAC_SPDOUT: 1552 break; 1553 default: 1554 return EINVAL; 1555 } 1556 xenum: 1557 if (cp->type != AUDIO_MIXER_ENUM) 1558 return EINVAL; 1559 sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord; 1560 cmpci_set_mixer_gain(sc, cp->dev); 1561 break; 1562 1563 default: 1564 return EINVAL; 1565 } 1566 1567 return 0; 1568 } 1569 1570 static int 1571 cmpci_get_port(void *handle, mixer_ctrl_t *cp) 1572 { 1573 struct cmpci_softc *sc; 1574 1575 sc = handle; 1576 switch (cp->dev) { 1577 case CMPCI_MIC_VOL: 1578 case CMPCI_PCSPEAKER: 1579 case CMPCI_MIC_RECVOL: 1580 if (cp->un.value.num_channels != 1) 1581 return EINVAL; 1582 /*FALLTHROUGH*/ 1583 case CMPCI_DAC_VOL: 1584 case CMPCI_FM_VOL: 1585 case CMPCI_CD_VOL: 1586 case CMPCI_LINE_IN_VOL: 1587 case CMPCI_AUX_IN_VOL: 1588 case CMPCI_MASTER_VOL: 1589 switch (cp->un.value.num_channels) { 1590 case 1: 1591 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = 1592 sc->sc_gain[cp->dev][CMPCI_LEFT]; 1593 break; 1594 case 2: 1595 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 1596 sc->sc_gain[cp->dev][CMPCI_LEFT]; 1597 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 1598 sc->sc_gain[cp->dev][CMPCI_RIGHT]; 1599 break; 1600 default: 1601 return EINVAL; 1602 } 1603 break; 1604 1605 case CMPCI_RECORD_SOURCE: 1606 cp->un.mask = sc->sc_in_mask; 1607 break; 1608 1609 case CMPCI_DAC_MUTE: 1610 case CMPCI_FM_MUTE: 1611 case CMPCI_CD_MUTE: 1612 case CMPCI_LINE_IN_MUTE: 1613 case CMPCI_AUX_IN_MUTE: 1614 case CMPCI_MIC_MUTE: 1615 case CMPCI_MIC_PREAMP: 1616 case CMPCI_PLAYBACK_MODE: 1617 case CMPCI_SPDIF_IN_SELECT: 1618 case CMPCI_SPDIF_IN_PHASE: 1619 case CMPCI_SPDIF_LOOP: 1620 case CMPCI_SPDIF_OUT_PLAYBACK: 1621 case CMPCI_SPDIF_OUT_VOLTAGE: 1622 case CMPCI_MONITOR_DAC: 1623 case CMPCI_REAR: 1624 case CMPCI_INDIVIDUAL: 1625 case CMPCI_REVERSE: 1626 case CMPCI_SURROUND: 1627 cp->un.ord = sc->sc_gain[cp->dev][CMPCI_LR]; 1628 break; 1629 1630 default: 1631 return EINVAL; 1632 } 1633 1634 return 0; 1635 } 1636 1637 /* ARGSUSED */ 1638 static size_t 1639 cmpci_round_buffersize(void *handle, int direction, 1640 size_t bufsize) 1641 { 1642 1643 if (bufsize > 0x10000) 1644 bufsize = 0x10000; 1645 1646 return bufsize; 1647 } 1648 1649 static paddr_t 1650 cmpci_mappage(void *handle, void *addr, off_t offset, int prot) 1651 { 1652 struct cmpci_dmanode *p; 1653 1654 if (offset < 0 || NULL == (p = cmpci_find_dmamem(handle, addr))) 1655 return -1; 1656 1657 return bus_dmamem_mmap(p->cd_tag, p->cd_segs, 1658 sizeof(p->cd_segs)/sizeof(p->cd_segs[0]), 1659 offset, prot, BUS_DMA_WAITOK); 1660 } 1661 1662 /* ARGSUSED */ 1663 static int 1664 cmpci_get_props(void *handle) 1665 { 1666 1667 return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 1668 } 1669 1670 static int 1671 cmpci_trigger_output(void *handle, void *start, void *end, int blksize, 1672 void (*intr)(void *), void *arg, 1673 const audio_params_t *param) 1674 { 1675 struct cmpci_softc *sc; 1676 struct cmpci_dmanode *p; 1677 int bps; 1678 1679 sc = handle; 1680 sc->sc_play.intr = intr; 1681 sc->sc_play.intr_arg = arg; 1682 bps = param->channels * param->precision / 8; 1683 if (!bps) 1684 return EINVAL; 1685 1686 /* set DMA frame */ 1687 if (!(p = cmpci_find_dmamem(sc, start))) 1688 return EINVAL; 1689 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BASE, 1690 DMAADDR(p)); 1691 delay(10); 1692 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BYTES, 1693 ((char *)end - (char *)start + 1) / bps - 1); 1694 delay(10); 1695 1696 /* set interrupt count */ 1697 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_SAMPLES, 1698 (blksize + bps - 1) / bps - 1); 1699 delay(10); 1700 1701 /* start DMA */ 1702 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); /* PLAY */ 1703 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 1704 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); 1705 1706 return 0; 1707 } 1708 1709 static int 1710 cmpci_trigger_input(void *handle, void *start, void *end, int blksize, 1711 void (*intr)(void *), void *arg, 1712 const audio_params_t *param) 1713 { 1714 struct cmpci_softc *sc; 1715 struct cmpci_dmanode *p; 1716 int bps; 1717 1718 sc = handle; 1719 sc->sc_rec.intr = intr; 1720 sc->sc_rec.intr_arg = arg; 1721 bps = param->channels * param->precision / 8; 1722 if (!bps) 1723 return EINVAL; 1724 1725 /* set DMA frame */ 1726 if (!(p=cmpci_find_dmamem(sc, start))) 1727 return EINVAL; 1728 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BASE, 1729 DMAADDR(p)); 1730 delay(10); 1731 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BYTES, 1732 ((char *)end - (char *)start + 1) / bps - 1); 1733 delay(10); 1734 1735 /* set interrupt count */ 1736 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_SAMPLES, 1737 (blksize + bps - 1) / bps - 1); 1738 delay(10); 1739 1740 /* start DMA */ 1741 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_DIR); /* REC */ 1742 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 1743 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); 1744 1745 return 0; 1746 } 1747 1748 static void 1749 cmpci_get_locks(void *addr, kmutex_t **intr, kmutex_t **thread) 1750 { 1751 struct cmpci_softc *sc; 1752 1753 sc = addr; 1754 *intr = &sc->sc_intr_lock; 1755 *thread = &sc->sc_lock; 1756 } 1757 1758 /* end of file */ 1759
Indexes created Sat Sep 27 22:09:54 GMT 2025