cmpci.c revision 1.44.2.1
1 /* $NetBSD: cmpci.c,v 1.44.2.1 2012/02/18 07:34:36 mrg Exp $ */ 2 3 /* 4 * Copyright (c) 2000, 2001, 2008 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Takuya SHIOZAKI <tshiozak (at) NetBSD.org> . 9 * 10 * This code is derived from software contributed to The NetBSD Foundation 11 * by ITOH Yasufumi. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 /* 37 * C-Media CMI8x38 Audio Chip Support. 38 * 39 * TODO: 40 * - 4ch / 6ch support. 41 * - Joystick support. 42 * 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: cmpci.c,v 1.44.2.1 2012/02/18 07:34:36 mrg Exp $"); 47 48 #if defined(AUDIO_DEBUG) || defined(DEBUG) 49 #define DPRINTF(x) if (cmpcidebug) printf x 50 int cmpcidebug = 0; 51 #else 52 #define DPRINTF(x) 53 #endif 54 55 #include "mpu.h" 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/kernel.h> 60 #include <sys/kmem.h> 61 #include <sys/device.h> 62 #include <sys/proc.h> 63 64 #include <dev/pci/pcidevs.h> 65 #include <dev/pci/pcivar.h> 66 67 #include <sys/audioio.h> 68 #include <dev/audio_if.h> 69 #include <dev/midi_if.h> 70 71 #include <dev/mulaw.h> 72 #include <dev/auconv.h> 73 #include <dev/pci/cmpcireg.h> 74 #include <dev/pci/cmpcivar.h> 75 76 #include <dev/ic/mpuvar.h> 77 #include <sys/bus.h> 78 #include <sys/intr.h> 79 80 /* 81 * Low-level HW interface 82 */ 83 static inline uint8_t cmpci_mixerreg_read(struct cmpci_softc *, uint8_t); 84 static inline void cmpci_mixerreg_write(struct cmpci_softc *, 85 uint8_t, uint8_t); 86 static inline void cmpci_reg_partial_write_1(struct cmpci_softc *, int, int, 87 unsigned, unsigned); 88 static inline void cmpci_reg_partial_write_4(struct cmpci_softc *, int, int, 89 uint32_t, uint32_t); 90 static inline void cmpci_reg_set_1(struct cmpci_softc *, int, uint8_t); 91 static inline void cmpci_reg_clear_1(struct cmpci_softc *, int, uint8_t); 92 static inline void cmpci_reg_set_4(struct cmpci_softc *, int, uint32_t); 93 static inline void cmpci_reg_clear_4(struct cmpci_softc *, int, uint32_t); 94 static inline void cmpci_reg_set_reg_misc(struct cmpci_softc *, uint32_t); 95 static inline void cmpci_reg_clear_reg_misc(struct cmpci_softc *, uint32_t); 96 static int cmpci_rate_to_index(int); 97 static inline int cmpci_index_to_rate(int); 98 static inline int cmpci_index_to_divider(int); 99 100 static int cmpci_adjust(int, int); 101 static void cmpci_set_mixer_gain(struct cmpci_softc *, int); 102 static void cmpci_set_out_ports(struct cmpci_softc *); 103 static int cmpci_set_in_ports(struct cmpci_softc *); 104 105 106 /* 107 * autoconf interface 108 */ 109 static int cmpci_match(device_t, cfdata_t, void *); 110 static void cmpci_attach(device_t, device_t, void *); 111 112 CFATTACH_DECL(cmpci, sizeof (struct cmpci_softc), 113 cmpci_match, cmpci_attach, NULL, NULL); 114 115 /* interrupt */ 116 static int cmpci_intr(void *); 117 118 119 /* 120 * DMA stuffs 121 */ 122 static int cmpci_alloc_dmamem(struct cmpci_softc *, size_t, void **); 123 static int cmpci_free_dmamem(struct cmpci_softc *, void *, size_t); 124 static struct cmpci_dmanode * cmpci_find_dmamem(struct cmpci_softc *, 125 void *); 126 127 128 /* 129 * interface to machine independent layer 130 */ 131 static int cmpci_query_encoding(void *, struct audio_encoding *); 132 static int cmpci_set_params(void *, int, int, audio_params_t *, 133 audio_params_t *, stream_filter_list_t *, stream_filter_list_t *); 134 static int cmpci_round_blocksize(void *, int, int, const audio_params_t *); 135 static int cmpci_halt_output(void *); 136 static int cmpci_halt_input(void *); 137 static int cmpci_getdev(void *, struct audio_device *); 138 static int cmpci_set_port(void *, mixer_ctrl_t *); 139 static int cmpci_get_port(void *, mixer_ctrl_t *); 140 static int cmpci_query_devinfo(void *, mixer_devinfo_t *); 141 static void *cmpci_allocm(void *, int, size_t); 142 static void cmpci_freem(void *, void *, size_t); 143 static size_t cmpci_round_buffersize(void *, int, size_t); 144 static paddr_t cmpci_mappage(void *, void *, off_t, int); 145 static int cmpci_get_props(void *); 146 static int cmpci_trigger_output(void *, void *, void *, int, 147 void (*)(void *), void *, const audio_params_t *); 148 static int cmpci_trigger_input(void *, void *, void *, int, 149 void (*)(void *), void *, const audio_params_t *); 150 static void cmpci_get_locks(void *, kmutex_t **, kmutex_t **); 151 152 static const struct audio_hw_if cmpci_hw_if = { 153 NULL, /* open */ 154 NULL, /* close */ 155 NULL, /* drain */ 156 cmpci_query_encoding, /* query_encoding */ 157 cmpci_set_params, /* set_params */ 158 cmpci_round_blocksize, /* round_blocksize */ 159 NULL, /* commit_settings */ 160 NULL, /* init_output */ 161 NULL, /* init_input */ 162 NULL, /* start_output */ 163 NULL, /* start_input */ 164 cmpci_halt_output, /* halt_output */ 165 cmpci_halt_input, /* halt_input */ 166 NULL, /* speaker_ctl */ 167 cmpci_getdev, /* getdev */ 168 NULL, /* setfd */ 169 cmpci_set_port, /* set_port */ 170 cmpci_get_port, /* get_port */ 171 cmpci_query_devinfo, /* query_devinfo */ 172 cmpci_allocm, /* allocm */ 173 cmpci_freem, /* freem */ 174 cmpci_round_buffersize,/* round_buffersize */ 175 cmpci_mappage, /* mappage */ 176 cmpci_get_props, /* get_props */ 177 cmpci_trigger_output, /* trigger_output */ 178 cmpci_trigger_input, /* trigger_input */ 179 NULL, /* dev_ioctl */ 180 cmpci_get_locks, /* get_locks */ 181 }; 182 183 #define CMPCI_NFORMATS 4 184 static const struct audio_format cmpci_formats[CMPCI_NFORMATS] = { 185 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 186 2, AUFMT_STEREO, 0, {5512, 48000}}, 187 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 188 1, AUFMT_MONAURAL, 0, {5512, 48000}}, 189 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8, 190 2, AUFMT_STEREO, 0, {5512, 48000}}, 191 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8, 192 1, AUFMT_MONAURAL, 0, {5512, 48000}}, 193 }; 194 195 196 /* 197 * Low-level HW interface 198 */ 199 200 /* mixer register read/write */ 201 static inline uint8_t 202 cmpci_mixerreg_read(struct cmpci_softc *sc, uint8_t no) 203 { 204 uint8_t ret; 205 206 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no); 207 delay(10); 208 ret = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA); 209 delay(10); 210 return ret; 211 } 212 213 static inline void 214 cmpci_mixerreg_write(struct cmpci_softc *sc, uint8_t no, uint8_t val) 215 { 216 217 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no); 218 delay(10); 219 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA, val); 220 delay(10); 221 } 222 223 224 /* register partial write */ 225 static inline void 226 cmpci_reg_partial_write_1(struct cmpci_softc *sc, int no, int shift, 227 unsigned mask, unsigned val) 228 { 229 230 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 231 (val<<shift) | 232 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift))); 233 delay(10); 234 } 235 236 static inline void 237 cmpci_reg_partial_write_4(struct cmpci_softc *sc, int no, int shift, 238 uint32_t mask, uint32_t val) 239 { 240 241 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 242 (val<<shift) | 243 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift))); 244 delay(10); 245 } 246 247 /* register set/clear bit */ 248 static inline void 249 cmpci_reg_set_1(struct cmpci_softc *sc, int no, uint8_t mask) 250 { 251 252 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 253 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) | mask)); 254 delay(10); 255 } 256 257 static inline void 258 cmpci_reg_clear_1(struct cmpci_softc *sc, int no, uint8_t mask) 259 { 260 261 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 262 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~mask)); 263 delay(10); 264 } 265 266 static inline void 267 cmpci_reg_set_4(struct cmpci_softc *sc, int no, uint32_t mask) 268 { 269 270 /* use cmpci_reg_set_reg_misc() for CMPCI_REG_MISC */ 271 KDASSERT(no != CMPCI_REG_MISC); 272 273 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 274 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) | mask)); 275 delay(10); 276 } 277 278 static inline void 279 cmpci_reg_clear_4(struct cmpci_softc *sc, int no, uint32_t mask) 280 { 281 282 /* use cmpci_reg_clear_reg_misc() for CMPCI_REG_MISC */ 283 KDASSERT(no != CMPCI_REG_MISC); 284 285 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 286 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~mask)); 287 delay(10); 288 } 289 290 /* 291 * The CMPCI_REG_MISC register needs special handling, since one of 292 * its bits has different read/write values. 293 */ 294 static inline void 295 cmpci_reg_set_reg_misc(struct cmpci_softc *sc, uint32_t mask) 296 { 297 298 sc->sc_reg_misc |= mask; 299 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC, 300 sc->sc_reg_misc); 301 delay(10); 302 } 303 304 static inline void 305 cmpci_reg_clear_reg_misc(struct cmpci_softc *sc, uint32_t mask) 306 { 307 308 sc->sc_reg_misc &= ~mask; 309 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC, 310 sc->sc_reg_misc); 311 delay(10); 312 } 313 314 /* rate */ 315 static const struct { 316 int rate; 317 int divider; 318 } cmpci_rate_table[CMPCI_REG_NUMRATE] = { 319 #define _RATE(n) { n, CMPCI_REG_RATE_ ## n } 320 _RATE(5512), 321 _RATE(8000), 322 _RATE(11025), 323 _RATE(16000), 324 _RATE(22050), 325 _RATE(32000), 326 _RATE(44100), 327 _RATE(48000) 328 #undef _RATE 329 }; 330 331 static int 332 cmpci_rate_to_index(int rate) 333 { 334 int i; 335 336 for (i = 0; i < CMPCI_REG_NUMRATE - 1; i++) 337 if (rate <= 338 (cmpci_rate_table[i].rate+cmpci_rate_table[i+1].rate) / 2) 339 return i; 340 return i; /* 48000 */ 341 } 342 343 static inline int 344 cmpci_index_to_rate(int index) 345 { 346 347 return cmpci_rate_table[index].rate; 348 } 349 350 static inline int 351 cmpci_index_to_divider(int index) 352 { 353 354 return cmpci_rate_table[index].divider; 355 } 356 357 /* 358 * interface to configure the device. 359 */ 360 static int 361 cmpci_match(device_t parent, cfdata_t match, void *aux) 362 { 363 struct pci_attach_args *pa; 364 365 pa = (struct pci_attach_args *)aux; 366 if ( PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CMEDIA && 367 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338A || 368 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338B || 369 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738 || 370 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738B) ) 371 return 1; 372 373 return 0; 374 } 375 376 static void 377 cmpci_attach(device_t parent, device_t self, void *aux) 378 { 379 struct cmpci_softc *sc; 380 struct pci_attach_args *pa; 381 struct audio_attach_args aa; 382 pci_intr_handle_t ih; 383 char const *strintr; 384 int i, v; 385 386 sc = device_private(self); 387 pa = (struct pci_attach_args *)aux; 388 389 sc->sc_id = pa->pa_id; 390 sc->sc_class = pa->pa_class; 391 pci_aprint_devinfo(pa, "Audio controller"); 392 switch (PCI_PRODUCT(sc->sc_id)) { 393 case PCI_PRODUCT_CMEDIA_CMI8338A: 394 /*FALLTHROUGH*/ 395 case PCI_PRODUCT_CMEDIA_CMI8338B: 396 sc->sc_capable = CMPCI_CAP_CMI8338; 397 break; 398 case PCI_PRODUCT_CMEDIA_CMI8738: 399 /*FALLTHROUGH*/ 400 case PCI_PRODUCT_CMEDIA_CMI8738B: 401 sc->sc_capable = CMPCI_CAP_CMI8738; 402 break; 403 } 404 405 /* map I/O space */ 406 if (pci_mapreg_map(pa, CMPCI_PCI_IOBASEREG, PCI_MAPREG_TYPE_IO, 0, 407 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 408 aprint_error_dev(&sc->sc_dev, "failed to map I/O space\n"); 409 return; 410 } 411 412 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 413 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO); 414 415 /* interrupt */ 416 if (pci_intr_map(pa, &ih)) { 417 aprint_error_dev(&sc->sc_dev, "failed to map interrupt\n"); 418 return; 419 } 420 strintr = pci_intr_string(pa->pa_pc, ih); 421 sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, cmpci_intr, 422 sc); 423 if (sc->sc_ih == NULL) { 424 aprint_error_dev(&sc->sc_dev, "failed to establish interrupt"); 425 if (strintr != NULL) 426 aprint_error(" at %s", strintr); 427 aprint_error("\n"); 428 mutex_destroy(&sc->sc_lock); 429 mutex_destroy(&sc->sc_intr_lock); 430 return; 431 } 432 aprint_normal_dev(&sc->sc_dev, "interrupting at %s\n", strintr); 433 434 sc->sc_dmat = pa->pa_dmat; 435 436 audio_attach_mi(&cmpci_hw_if, sc, &sc->sc_dev); 437 438 /* attach OPL device */ 439 aa.type = AUDIODEV_TYPE_OPL; 440 aa.hwif = NULL; 441 aa.hdl = NULL; 442 (void)config_found(&sc->sc_dev, &aa, audioprint); 443 444 /* attach MPU-401 device */ 445 aa.type = AUDIODEV_TYPE_MPU; 446 aa.hwif = NULL; 447 aa.hdl = NULL; 448 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh, 449 CMPCI_REG_MPU_BASE, CMPCI_REG_MPU_SIZE, &sc->sc_mpu_ioh) == 0) 450 sc->sc_mpudev = config_found(&sc->sc_dev, &aa, audioprint); 451 452 /* get initial value (this is 0 and may be omitted but just in case) */ 453 sc->sc_reg_misc = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 454 CMPCI_REG_MISC) & ~CMPCI_REG_SPDIF48K; 455 456 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_RESET, 0); 457 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0); 458 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0); 459 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, 460 CMPCI_SB16_SW_CD|CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE); 461 for (i = 0; i < CMPCI_NDEVS; i++) { 462 switch(i) { 463 /* 464 * CMI8738 defaults are 465 * master: 0xe0 (0x00 - 0xf8) 466 * FM, DAC: 0xc0 (0x00 - 0xf8) 467 * PC speaker: 0x80 (0x00 - 0xc0) 468 * others: 0 469 */ 470 /* volume */ 471 case CMPCI_MASTER_VOL: 472 v = 128; /* 224 */ 473 break; 474 case CMPCI_FM_VOL: 475 case CMPCI_DAC_VOL: 476 v = 192; 477 break; 478 case CMPCI_PCSPEAKER: 479 v = 128; 480 break; 481 482 /* booleans, set to true */ 483 case CMPCI_CD_MUTE: 484 case CMPCI_MIC_MUTE: 485 case CMPCI_LINE_IN_MUTE: 486 case CMPCI_AUX_IN_MUTE: 487 v = 1; 488 break; 489 490 /* volume with inital value 0 */ 491 case CMPCI_CD_VOL: 492 case CMPCI_LINE_IN_VOL: 493 case CMPCI_AUX_IN_VOL: 494 case CMPCI_MIC_VOL: 495 case CMPCI_MIC_RECVOL: 496 /* FALLTHROUGH */ 497 498 /* others are cleared */ 499 case CMPCI_MIC_PREAMP: 500 case CMPCI_RECORD_SOURCE: 501 case CMPCI_PLAYBACK_MODE: 502 case CMPCI_SPDIF_IN_SELECT: 503 case CMPCI_SPDIF_IN_PHASE: 504 case CMPCI_SPDIF_LOOP: 505 case CMPCI_SPDIF_OUT_PLAYBACK: 506 case CMPCI_SPDIF_OUT_VOLTAGE: 507 case CMPCI_MONITOR_DAC: 508 case CMPCI_REAR: 509 case CMPCI_INDIVIDUAL: 510 case CMPCI_REVERSE: 511 case CMPCI_SURROUND: 512 default: 513 v = 0; 514 break; 515 } 516 sc->sc_gain[i][CMPCI_LEFT] = sc->sc_gain[i][CMPCI_RIGHT] = v; 517 cmpci_set_mixer_gain(sc, i); 518 } 519 } 520 521 static int 522 cmpci_intr(void *handle) 523 { 524 struct cmpci_softc *sc = handle; 525 #if NMPU > 0 526 struct mpu_softc *sc_mpu = device_private(sc->sc_mpudev); 527 #endif 528 uint32_t intrstat; 529 530 mutex_spin_enter(&sc->sc_intr_lock); 531 532 intrstat = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 533 CMPCI_REG_INTR_STATUS); 534 535 if (!(intrstat & CMPCI_REG_ANY_INTR)) { 536 mutex_spin_exit(&sc->sc_intr_lock); 537 return 0; 538 } 539 540 delay(10); 541 542 /* disable and reset intr */ 543 if (intrstat & CMPCI_REG_CH0_INTR) 544 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, 545 CMPCI_REG_CH0_INTR_ENABLE); 546 if (intrstat & CMPCI_REG_CH1_INTR) 547 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, 548 CMPCI_REG_CH1_INTR_ENABLE); 549 550 if (intrstat & CMPCI_REG_CH0_INTR) { 551 if (sc->sc_play.intr != NULL) 552 (*sc->sc_play.intr)(sc->sc_play.intr_arg); 553 } 554 if (intrstat & CMPCI_REG_CH1_INTR) { 555 if (sc->sc_rec.intr != NULL) 556 (*sc->sc_rec.intr)(sc->sc_rec.intr_arg); 557 } 558 559 /* enable intr */ 560 if (intrstat & CMPCI_REG_CH0_INTR) 561 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, 562 CMPCI_REG_CH0_INTR_ENABLE); 563 if (intrstat & CMPCI_REG_CH1_INTR) 564 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, 565 CMPCI_REG_CH1_INTR_ENABLE); 566 567 #if NMPU > 0 568 if (intrstat & CMPCI_REG_UART_INTR && sc_mpu != NULL) 569 mpu_intr(sc_mpu); 570 #endif 571 572 mutex_spin_exit(&sc->sc_intr_lock); 573 return 1; 574 } 575 576 static int 577 cmpci_query_encoding(void *handle, struct audio_encoding *fp) 578 { 579 580 switch (fp->index) { 581 case 0: 582 strcpy(fp->name, AudioEulinear); 583 fp->encoding = AUDIO_ENCODING_ULINEAR; 584 fp->precision = 8; 585 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 586 break; 587 case 1: 588 strcpy(fp->name, AudioEmulaw); 589 fp->encoding = AUDIO_ENCODING_ULAW; 590 fp->precision = 8; 591 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 592 break; 593 case 2: 594 strcpy(fp->name, AudioEalaw); 595 fp->encoding = AUDIO_ENCODING_ALAW; 596 fp->precision = 8; 597 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 598 break; 599 case 3: 600 strcpy(fp->name, AudioEslinear); 601 fp->encoding = AUDIO_ENCODING_SLINEAR; 602 fp->precision = 8; 603 fp->flags = 0; 604 break; 605 case 4: 606 strcpy(fp->name, AudioEslinear_le); 607 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 608 fp->precision = 16; 609 fp->flags = 0; 610 break; 611 case 5: 612 strcpy(fp->name, AudioEulinear_le); 613 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 614 fp->precision = 16; 615 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 616 break; 617 case 6: 618 strcpy(fp->name, AudioEslinear_be); 619 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 620 fp->precision = 16; 621 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 622 break; 623 case 7: 624 strcpy(fp->name, AudioEulinear_be); 625 fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 626 fp->precision = 16; 627 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 628 break; 629 default: 630 return EINVAL; 631 } 632 return 0; 633 } 634 635 636 static int 637 cmpci_set_params(void *handle, int setmode, int usemode, 638 audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil, 639 stream_filter_list_t *rfil) 640 { 641 int i; 642 struct cmpci_softc *sc; 643 644 sc = handle; 645 for (i = 0; i < 2; i++) { 646 int md_format; 647 int md_divide; 648 int md_index; 649 int mode; 650 audio_params_t *p; 651 stream_filter_list_t *fil; 652 int ind; 653 654 switch (i) { 655 case 0: 656 mode = AUMODE_PLAY; 657 p = play; 658 fil = pfil; 659 break; 660 case 1: 661 mode = AUMODE_RECORD; 662 p = rec; 663 fil = rfil; 664 break; 665 default: 666 return EINVAL; 667 } 668 669 if (!(setmode & mode)) 670 continue; 671 672 md_index = cmpci_rate_to_index(p->sample_rate); 673 md_divide = cmpci_index_to_divider(md_index); 674 p->sample_rate = cmpci_index_to_rate(md_index); 675 DPRINTF(("%s: sample:%u, divider=%d\n", 676 device_xname(&sc->sc_dev), p->sample_rate, md_divide)); 677 678 ind = auconv_set_converter(cmpci_formats, CMPCI_NFORMATS, 679 mode, p, FALSE, fil); 680 if (ind < 0) 681 return EINVAL; 682 if (fil->req_size > 0) 683 p = &fil->filters[0].param; 684 685 /* format */ 686 md_format = p->channels == 1 687 ? CMPCI_REG_FORMAT_MONO : CMPCI_REG_FORMAT_STEREO; 688 md_format |= p->precision == 16 689 ? CMPCI_REG_FORMAT_16BIT : CMPCI_REG_FORMAT_8BIT; 690 if (mode & AUMODE_PLAY) { 691 cmpci_reg_partial_write_4(sc, 692 CMPCI_REG_CHANNEL_FORMAT, 693 CMPCI_REG_CH0_FORMAT_SHIFT, 694 CMPCI_REG_CH0_FORMAT_MASK, md_format); 695 cmpci_reg_partial_write_4(sc, 696 CMPCI_REG_FUNC_1, CMPCI_REG_DAC_FS_SHIFT, 697 CMPCI_REG_DAC_FS_MASK, md_divide); 698 sc->sc_play.md_divide = md_divide; 699 } else { 700 cmpci_reg_partial_write_4(sc, 701 CMPCI_REG_CHANNEL_FORMAT, 702 CMPCI_REG_CH1_FORMAT_SHIFT, 703 CMPCI_REG_CH1_FORMAT_MASK, md_format); 704 cmpci_reg_partial_write_4(sc, 705 CMPCI_REG_FUNC_1, CMPCI_REG_ADC_FS_SHIFT, 706 CMPCI_REG_ADC_FS_MASK, md_divide); 707 sc->sc_rec.md_divide = md_divide; 708 } 709 cmpci_set_out_ports(sc); 710 cmpci_set_in_ports(sc); 711 } 712 return 0; 713 } 714 715 /* ARGSUSED */ 716 static int 717 cmpci_round_blocksize(void *handle, int block, 718 int mode, const audio_params_t *param) 719 { 720 721 return block & -4; 722 } 723 724 static int 725 cmpci_halt_output(void *handle) 726 { 727 struct cmpci_softc *sc; 728 729 sc = handle; 730 sc->sc_play.intr = NULL; 731 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 732 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); 733 /* wait for reset DMA */ 734 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); 735 delay(10); 736 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); 737 738 return 0; 739 } 740 741 static int 742 cmpci_halt_input(void *handle) 743 { 744 struct cmpci_softc *sc; 745 746 sc = handle; 747 sc->sc_rec.intr = NULL; 748 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 749 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); 750 /* wait for reset DMA */ 751 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); 752 delay(10); 753 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); 754 755 return 0; 756 } 757 758 /* get audio device information */ 759 static int 760 cmpci_getdev(void *handle, struct audio_device *ad) 761 { 762 struct cmpci_softc *sc; 763 764 sc = handle; 765 strncpy(ad->name, "CMI PCI Audio", sizeof(ad->name)); 766 snprintf(ad->version, sizeof(ad->version), "0x%02x", 767 PCI_REVISION(sc->sc_class)); 768 switch (PCI_PRODUCT(sc->sc_id)) { 769 case PCI_PRODUCT_CMEDIA_CMI8338A: 770 strncpy(ad->config, "CMI8338A", sizeof(ad->config)); 771 break; 772 case PCI_PRODUCT_CMEDIA_CMI8338B: 773 strncpy(ad->config, "CMI8338B", sizeof(ad->config)); 774 break; 775 case PCI_PRODUCT_CMEDIA_CMI8738: 776 strncpy(ad->config, "CMI8738", sizeof(ad->config)); 777 break; 778 case PCI_PRODUCT_CMEDIA_CMI8738B: 779 strncpy(ad->config, "CMI8738B", sizeof(ad->config)); 780 break; 781 default: 782 strncpy(ad->config, "unknown", sizeof(ad->config)); 783 } 784 785 return 0; 786 } 787 788 /* mixer device information */ 789 int 790 cmpci_query_devinfo(void *handle, mixer_devinfo_t *dip) 791 { 792 static const char *const mixer_port_names[] = { 793 AudioNdac, AudioNfmsynth, AudioNcd, AudioNline, AudioNaux, 794 AudioNmicrophone 795 }; 796 static const char *const mixer_classes[] = { 797 AudioCinputs, AudioCoutputs, AudioCrecord, CmpciCplayback, 798 CmpciCspdif 799 }; 800 struct cmpci_softc *sc; 801 int i; 802 803 sc = handle; 804 dip->prev = dip->next = AUDIO_MIXER_LAST; 805 806 switch (dip->index) { 807 case CMPCI_INPUT_CLASS: 808 case CMPCI_OUTPUT_CLASS: 809 case CMPCI_RECORD_CLASS: 810 case CMPCI_PLAYBACK_CLASS: 811 case CMPCI_SPDIF_CLASS: 812 dip->type = AUDIO_MIXER_CLASS; 813 dip->mixer_class = dip->index; 814 strcpy(dip->label.name, 815 mixer_classes[dip->index - CMPCI_INPUT_CLASS]); 816 return 0; 817 818 case CMPCI_AUX_IN_VOL: 819 dip->un.v.delta = 1 << (8 - CMPCI_REG_AUX_VALBITS); 820 goto vol1; 821 case CMPCI_DAC_VOL: 822 case CMPCI_FM_VOL: 823 case CMPCI_CD_VOL: 824 case CMPCI_LINE_IN_VOL: 825 case CMPCI_MIC_VOL: 826 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS); 827 vol1: dip->mixer_class = CMPCI_INPUT_CLASS; 828 dip->next = dip->index + 6; /* CMPCI_xxx_MUTE */ 829 strcpy(dip->label.name, mixer_port_names[dip->index]); 830 dip->un.v.num_channels = (dip->index == CMPCI_MIC_VOL ? 1 : 2); 831 vol: 832 dip->type = AUDIO_MIXER_VALUE; 833 strcpy(dip->un.v.units.name, AudioNvolume); 834 return 0; 835 836 case CMPCI_MIC_MUTE: 837 dip->next = CMPCI_MIC_PREAMP; 838 /* FALLTHROUGH */ 839 case CMPCI_DAC_MUTE: 840 case CMPCI_FM_MUTE: 841 case CMPCI_CD_MUTE: 842 case CMPCI_LINE_IN_MUTE: 843 case CMPCI_AUX_IN_MUTE: 844 dip->prev = dip->index - 6; /* CMPCI_xxx_VOL */ 845 dip->mixer_class = CMPCI_INPUT_CLASS; 846 strcpy(dip->label.name, AudioNmute); 847 goto on_off; 848 on_off: 849 dip->type = AUDIO_MIXER_ENUM; 850 dip->un.e.num_mem = 2; 851 strcpy(dip->un.e.member[0].label.name, AudioNoff); 852 dip->un.e.member[0].ord = 0; 853 strcpy(dip->un.e.member[1].label.name, AudioNon); 854 dip->un.e.member[1].ord = 1; 855 return 0; 856 857 case CMPCI_MIC_PREAMP: 858 dip->mixer_class = CMPCI_INPUT_CLASS; 859 dip->prev = CMPCI_MIC_MUTE; 860 strcpy(dip->label.name, AudioNpreamp); 861 goto on_off; 862 case CMPCI_PCSPEAKER: 863 dip->mixer_class = CMPCI_INPUT_CLASS; 864 strcpy(dip->label.name, AudioNspeaker); 865 dip->un.v.num_channels = 1; 866 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_SPEAKER_VALBITS); 867 goto vol; 868 case CMPCI_RECORD_SOURCE: 869 dip->mixer_class = CMPCI_RECORD_CLASS; 870 strcpy(dip->label.name, AudioNsource); 871 dip->type = AUDIO_MIXER_SET; 872 dip->un.s.num_mem = 7; 873 strcpy(dip->un.s.member[0].label.name, AudioNmicrophone); 874 dip->un.s.member[0].mask = CMPCI_RECORD_SOURCE_MIC; 875 strcpy(dip->un.s.member[1].label.name, AudioNcd); 876 dip->un.s.member[1].mask = CMPCI_RECORD_SOURCE_CD; 877 strcpy(dip->un.s.member[2].label.name, AudioNline); 878 dip->un.s.member[2].mask = CMPCI_RECORD_SOURCE_LINE_IN; 879 strcpy(dip->un.s.member[3].label.name, AudioNaux); 880 dip->un.s.member[3].mask = CMPCI_RECORD_SOURCE_AUX_IN; 881 strcpy(dip->un.s.member[4].label.name, AudioNwave); 882 dip->un.s.member[4].mask = CMPCI_RECORD_SOURCE_WAVE; 883 strcpy(dip->un.s.member[5].label.name, AudioNfmsynth); 884 dip->un.s.member[5].mask = CMPCI_RECORD_SOURCE_FM; 885 strcpy(dip->un.s.member[6].label.name, CmpciNspdif); 886 dip->un.s.member[6].mask = CMPCI_RECORD_SOURCE_SPDIF; 887 return 0; 888 case CMPCI_MIC_RECVOL: 889 dip->mixer_class = CMPCI_RECORD_CLASS; 890 strcpy(dip->label.name, AudioNmicrophone); 891 dip->un.v.num_channels = 1; 892 dip->un.v.delta = 1 << (8 - CMPCI_REG_ADMIC_VALBITS); 893 goto vol; 894 895 case CMPCI_PLAYBACK_MODE: 896 dip->mixer_class = CMPCI_PLAYBACK_CLASS; 897 dip->type = AUDIO_MIXER_ENUM; 898 strcpy(dip->label.name, AudioNmode); 899 dip->un.e.num_mem = 2; 900 strcpy(dip->un.e.member[0].label.name, AudioNdac); 901 dip->un.e.member[0].ord = CMPCI_PLAYBACK_MODE_WAVE; 902 strcpy(dip->un.e.member[1].label.name, CmpciNspdif); 903 dip->un.e.member[1].ord = CMPCI_PLAYBACK_MODE_SPDIF; 904 return 0; 905 case CMPCI_SPDIF_IN_SELECT: 906 dip->mixer_class = CMPCI_SPDIF_CLASS; 907 dip->type = AUDIO_MIXER_ENUM; 908 dip->next = CMPCI_SPDIF_IN_PHASE; 909 strcpy(dip->label.name, AudioNinput); 910 i = 0; 911 strcpy(dip->un.e.member[i].label.name, CmpciNspdin1); 912 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN1; 913 if (CMPCI_ISCAP(sc, 2ND_SPDIN)) { 914 strcpy(dip->un.e.member[i].label.name, CmpciNspdin2); 915 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN2; 916 } 917 strcpy(dip->un.e.member[i].label.name, CmpciNspdout); 918 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDOUT; 919 dip->un.e.num_mem = i; 920 return 0; 921 case CMPCI_SPDIF_IN_PHASE: 922 dip->mixer_class = CMPCI_SPDIF_CLASS; 923 dip->prev = CMPCI_SPDIF_IN_SELECT; 924 strcpy(dip->label.name, CmpciNphase); 925 dip->type = AUDIO_MIXER_ENUM; 926 dip->un.e.num_mem = 2; 927 strcpy(dip->un.e.member[0].label.name, CmpciNpositive); 928 dip->un.e.member[0].ord = CMPCI_SPDIF_IN_PHASE_POSITIVE; 929 strcpy(dip->un.e.member[1].label.name, CmpciNnegative); 930 dip->un.e.member[1].ord = CMPCI_SPDIF_IN_PHASE_NEGATIVE; 931 return 0; 932 case CMPCI_SPDIF_LOOP: 933 dip->mixer_class = CMPCI_SPDIF_CLASS; 934 dip->next = CMPCI_SPDIF_OUT_PLAYBACK; 935 strcpy(dip->label.name, AudioNoutput); 936 dip->type = AUDIO_MIXER_ENUM; 937 dip->un.e.num_mem = 2; 938 strcpy(dip->un.e.member[0].label.name, CmpciNplayback); 939 dip->un.e.member[0].ord = CMPCI_SPDIF_LOOP_OFF; 940 strcpy(dip->un.e.member[1].label.name, CmpciNspdin); 941 dip->un.e.member[1].ord = CMPCI_SPDIF_LOOP_ON; 942 return 0; 943 case CMPCI_SPDIF_OUT_PLAYBACK: 944 dip->mixer_class = CMPCI_SPDIF_CLASS; 945 dip->prev = CMPCI_SPDIF_LOOP; 946 dip->next = CMPCI_SPDIF_OUT_VOLTAGE; 947 strcpy(dip->label.name, CmpciNplayback); 948 dip->type = AUDIO_MIXER_ENUM; 949 dip->un.e.num_mem = 2; 950 strcpy(dip->un.e.member[0].label.name, AudioNwave); 951 dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_PLAYBACK_WAVE; 952 strcpy(dip->un.e.member[1].label.name, CmpciNlegacy); 953 dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_PLAYBACK_LEGACY; 954 return 0; 955 case CMPCI_SPDIF_OUT_VOLTAGE: 956 dip->mixer_class = CMPCI_SPDIF_CLASS; 957 dip->prev = CMPCI_SPDIF_OUT_PLAYBACK; 958 strcpy(dip->label.name, CmpciNvoltage); 959 dip->type = AUDIO_MIXER_ENUM; 960 dip->un.e.num_mem = 2; 961 strcpy(dip->un.e.member[0].label.name, CmpciNhigh_v); 962 dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_VOLTAGE_HIGH; 963 strcpy(dip->un.e.member[1].label.name, CmpciNlow_v); 964 dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_VOLTAGE_LOW; 965 return 0; 966 case CMPCI_MONITOR_DAC: 967 dip->mixer_class = CMPCI_SPDIF_CLASS; 968 strcpy(dip->label.name, AudioNmonitor); 969 dip->type = AUDIO_MIXER_ENUM; 970 dip->un.e.num_mem = 3; 971 strcpy(dip->un.e.member[0].label.name, AudioNoff); 972 dip->un.e.member[0].ord = CMPCI_MONITOR_DAC_OFF; 973 strcpy(dip->un.e.member[1].label.name, CmpciNspdin); 974 dip->un.e.member[1].ord = CMPCI_MONITOR_DAC_SPDIN; 975 strcpy(dip->un.e.member[2].label.name, CmpciNspdout); 976 dip->un.e.member[2].ord = CMPCI_MONITOR_DAC_SPDOUT; 977 return 0; 978 979 case CMPCI_MASTER_VOL: 980 dip->mixer_class = CMPCI_OUTPUT_CLASS; 981 strcpy(dip->label.name, AudioNmaster); 982 dip->un.v.num_channels = 2; 983 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS); 984 goto vol; 985 case CMPCI_REAR: 986 dip->mixer_class = CMPCI_OUTPUT_CLASS; 987 dip->next = CMPCI_INDIVIDUAL; 988 strcpy(dip->label.name, CmpciNrear); 989 goto on_off; 990 case CMPCI_INDIVIDUAL: 991 dip->mixer_class = CMPCI_OUTPUT_CLASS; 992 dip->prev = CMPCI_REAR; 993 dip->next = CMPCI_REVERSE; 994 strcpy(dip->label.name, CmpciNindividual); 995 goto on_off; 996 case CMPCI_REVERSE: 997 dip->mixer_class = CMPCI_OUTPUT_CLASS; 998 dip->prev = CMPCI_INDIVIDUAL; 999 strcpy(dip->label.name, CmpciNreverse); 1000 goto on_off; 1001 case CMPCI_SURROUND: 1002 dip->mixer_class = CMPCI_OUTPUT_CLASS; 1003 strcpy(dip->label.name, CmpciNsurround); 1004 goto on_off; 1005 } 1006 1007 return ENXIO; 1008 } 1009 1010 static int 1011 cmpci_alloc_dmamem(struct cmpci_softc *sc, size_t size, void **r_addr) 1012 { 1013 int error; 1014 struct cmpci_dmanode *n; 1015 1016 error = 0; 1017 n = kmem_alloc(sizeof(struct cmpci_dmanode), KM_SLEEP); 1018 if (n == NULL) { 1019 error = ENOMEM; 1020 goto quit; 1021 } 1022 1023 #define CMPCI_DMABUF_ALIGN 0x4 1024 #define CMPCI_DMABUF_BOUNDARY 0x0 1025 n->cd_tag = sc->sc_dmat; 1026 n->cd_size = size; 1027 error = bus_dmamem_alloc(n->cd_tag, n->cd_size, 1028 CMPCI_DMABUF_ALIGN, CMPCI_DMABUF_BOUNDARY, n->cd_segs, 1029 sizeof(n->cd_segs)/sizeof(n->cd_segs[0]), &n->cd_nsegs, 1030 BUS_DMA_WAITOK); 1031 if (error) 1032 goto mfree; 1033 error = bus_dmamem_map(n->cd_tag, n->cd_segs, n->cd_nsegs, n->cd_size, 1034 &n->cd_addr, BUS_DMA_WAITOK | BUS_DMA_COHERENT); 1035 if (error) 1036 goto dmafree; 1037 error = bus_dmamap_create(n->cd_tag, n->cd_size, 1, n->cd_size, 0, 1038 BUS_DMA_WAITOK, &n->cd_map); 1039 if (error) 1040 goto unmap; 1041 error = bus_dmamap_load(n->cd_tag, n->cd_map, n->cd_addr, n->cd_size, 1042 NULL, BUS_DMA_WAITOK); 1043 if (error) 1044 goto destroy; 1045 1046 n->cd_next = sc->sc_dmap; 1047 sc->sc_dmap = n; 1048 *r_addr = KVADDR(n); 1049 return 0; 1050 1051 destroy: 1052 bus_dmamap_destroy(n->cd_tag, n->cd_map); 1053 unmap: 1054 bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size); 1055 dmafree: 1056 bus_dmamem_free(n->cd_tag, 1057 n->cd_segs, sizeof(n->cd_segs)/sizeof(n->cd_segs[0])); 1058 mfree: 1059 kmem_free(n, sizeof(*n)); 1060 quit: 1061 return error; 1062 } 1063 1064 static int 1065 cmpci_free_dmamem(struct cmpci_softc *sc, void *addr, size_t size) 1066 { 1067 struct cmpci_dmanode **nnp; 1068 1069 for (nnp = &sc->sc_dmap; *nnp; nnp= &(*nnp)->cd_next) { 1070 if ((*nnp)->cd_addr == addr) { 1071 struct cmpci_dmanode *n = *nnp; 1072 bus_dmamap_unload(n->cd_tag, n->cd_map); 1073 bus_dmamap_destroy(n->cd_tag, n->cd_map); 1074 bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size); 1075 bus_dmamem_free(n->cd_tag, n->cd_segs, 1076 sizeof(n->cd_segs)/sizeof(n->cd_segs[0])); 1077 kmem_free(n, sizeof(*n)); 1078 return 0; 1079 } 1080 } 1081 return -1; 1082 } 1083 1084 static struct cmpci_dmanode * 1085 cmpci_find_dmamem(struct cmpci_softc *sc, void *addr) 1086 { 1087 struct cmpci_dmanode *p; 1088 1089 for (p = sc->sc_dmap; p; p = p->cd_next) 1090 if (KVADDR(p) == (void *)addr) 1091 break; 1092 return p; 1093 } 1094 1095 #if 0 1096 static void 1097 cmpci_print_dmamem(struct cmpci_dmanode *); 1098 static void 1099 cmpci_print_dmamem(struct cmpci_dmanode *p) 1100 { 1101 1102 DPRINTF(("DMA at virt:%p, dmaseg:%p, mapseg:%p, size:%p\n", 1103 (void *)p->cd_addr, (void *)p->cd_segs[0].ds_addr, 1104 (void *)DMAADDR(p), (void *)p->cd_size)); 1105 } 1106 #endif /* DEBUG */ 1107 1108 static void * 1109 cmpci_allocm(void *handle, int direction, size_t size) 1110 { 1111 void *addr; 1112 1113 addr = NULL; /* XXX gcc */ 1114 1115 if (cmpci_alloc_dmamem(handle, size, &addr)) 1116 return NULL; 1117 return addr; 1118 } 1119 1120 static void 1121 cmpci_freem(void *handle, void *addr, size_t size) 1122 { 1123 1124 cmpci_free_dmamem(handle, addr, size); 1125 } 1126 1127 #define MAXVAL 256 1128 static int 1129 cmpci_adjust(int val, int mask) 1130 { 1131 1132 val += (MAXVAL - mask) >> 1; 1133 if (val >= MAXVAL) 1134 val = MAXVAL-1; 1135 return val & mask; 1136 } 1137 1138 static void 1139 cmpci_set_mixer_gain(struct cmpci_softc *sc, int port) 1140 { 1141 int src; 1142 int bits, mask; 1143 1144 switch (port) { 1145 case CMPCI_MIC_VOL: 1146 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_MIC, 1147 CMPCI_ADJUST_MIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1148 return; 1149 case CMPCI_MASTER_VOL: 1150 src = CMPCI_SB16_MIXER_MASTER_L; 1151 break; 1152 case CMPCI_LINE_IN_VOL: 1153 src = CMPCI_SB16_MIXER_LINE_L; 1154 break; 1155 case CMPCI_AUX_IN_VOL: 1156 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MIXER_AUX, 1157 CMPCI_ADJUST_AUX_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT], 1158 sc->sc_gain[port][CMPCI_RIGHT])); 1159 return; 1160 case CMPCI_MIC_RECVOL: 1161 cmpci_reg_partial_write_1(sc, CMPCI_REG_MIXER25, 1162 CMPCI_REG_ADMIC_SHIFT, CMPCI_REG_ADMIC_MASK, 1163 CMPCI_ADJUST_ADMIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1164 return; 1165 case CMPCI_DAC_VOL: 1166 src = CMPCI_SB16_MIXER_VOICE_L; 1167 break; 1168 case CMPCI_FM_VOL: 1169 src = CMPCI_SB16_MIXER_FM_L; 1170 break; 1171 case CMPCI_CD_VOL: 1172 src = CMPCI_SB16_MIXER_CDDA_L; 1173 break; 1174 case CMPCI_PCSPEAKER: 1175 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_SPEAKER, 1176 CMPCI_ADJUST_2_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1177 return; 1178 case CMPCI_MIC_PREAMP: 1179 if (sc->sc_gain[port][CMPCI_LR]) 1180 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1181 CMPCI_REG_MICGAINZ); 1182 else 1183 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1184 CMPCI_REG_MICGAINZ); 1185 return; 1186 1187 case CMPCI_DAC_MUTE: 1188 if (sc->sc_gain[port][CMPCI_LR]) 1189 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1190 CMPCI_REG_WSMUTE); 1191 else 1192 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1193 CMPCI_REG_WSMUTE); 1194 return; 1195 case CMPCI_FM_MUTE: 1196 if (sc->sc_gain[port][CMPCI_LR]) 1197 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1198 CMPCI_REG_FMMUTE); 1199 else 1200 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1201 CMPCI_REG_FMMUTE); 1202 return; 1203 case CMPCI_AUX_IN_MUTE: 1204 if (sc->sc_gain[port][CMPCI_LR]) 1205 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1206 CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM); 1207 else 1208 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1209 CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM); 1210 return; 1211 case CMPCI_CD_MUTE: 1212 mask = CMPCI_SB16_SW_CD; 1213 goto sbmute; 1214 case CMPCI_MIC_MUTE: 1215 mask = CMPCI_SB16_SW_MIC; 1216 goto sbmute; 1217 case CMPCI_LINE_IN_MUTE: 1218 mask = CMPCI_SB16_SW_LINE; 1219 sbmute: 1220 bits = cmpci_mixerreg_read(sc, CMPCI_SB16_MIXER_OUTMIX); 1221 if (sc->sc_gain[port][CMPCI_LR]) 1222 bits = bits & ~mask; 1223 else 1224 bits = bits | mask; 1225 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, bits); 1226 return; 1227 1228 case CMPCI_SPDIF_IN_SELECT: 1229 case CMPCI_MONITOR_DAC: 1230 case CMPCI_PLAYBACK_MODE: 1231 case CMPCI_SPDIF_LOOP: 1232 case CMPCI_SPDIF_OUT_PLAYBACK: 1233 cmpci_set_out_ports(sc); 1234 return; 1235 case CMPCI_SPDIF_OUT_VOLTAGE: 1236 if (CMPCI_ISCAP(sc, SPDOUT_VOLTAGE)) { 1237 if (sc->sc_gain[CMPCI_SPDIF_OUT_VOLTAGE][CMPCI_LR] 1238 == CMPCI_SPDIF_OUT_VOLTAGE_HIGH) 1239 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_5V); 1240 else 1241 cmpci_reg_set_reg_misc(sc, CMPCI_REG_5V); 1242 } 1243 return; 1244 case CMPCI_SURROUND: 1245 if (CMPCI_ISCAP(sc, SURROUND)) { 1246 if (sc->sc_gain[CMPCI_SURROUND][CMPCI_LR]) 1247 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1248 CMPCI_REG_SURROUND); 1249 else 1250 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1251 CMPCI_REG_SURROUND); 1252 } 1253 return; 1254 case CMPCI_REAR: 1255 if (CMPCI_ISCAP(sc, REAR)) { 1256 if (sc->sc_gain[CMPCI_REAR][CMPCI_LR]) 1257 cmpci_reg_set_reg_misc(sc, CMPCI_REG_N4SPK3D); 1258 else 1259 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_N4SPK3D); 1260 } 1261 return; 1262 case CMPCI_INDIVIDUAL: 1263 if (CMPCI_ISCAP(sc, INDIVIDUAL_REAR)) { 1264 if (sc->sc_gain[CMPCI_REAR][CMPCI_LR]) 1265 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1266 CMPCI_REG_INDIVIDUAL); 1267 else 1268 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1269 CMPCI_REG_INDIVIDUAL); 1270 } 1271 return; 1272 case CMPCI_REVERSE: 1273 if (CMPCI_ISCAP(sc, REVERSE_FR)) { 1274 if (sc->sc_gain[CMPCI_REVERSE][CMPCI_LR]) 1275 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1276 CMPCI_REG_REVERSE_FR); 1277 else 1278 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1279 CMPCI_REG_REVERSE_FR); 1280 } 1281 return; 1282 case CMPCI_SPDIF_IN_PHASE: 1283 if (CMPCI_ISCAP(sc, SPDIN_PHASE)) { 1284 if (sc->sc_gain[CMPCI_SPDIF_IN_PHASE][CMPCI_LR] 1285 == CMPCI_SPDIF_IN_PHASE_POSITIVE) 1286 cmpci_reg_clear_1(sc, CMPCI_REG_CHANNEL_FORMAT, 1287 CMPCI_REG_SPDIN_PHASE); 1288 else 1289 cmpci_reg_set_1(sc, CMPCI_REG_CHANNEL_FORMAT, 1290 CMPCI_REG_SPDIN_PHASE); 1291 } 1292 return; 1293 default: 1294 return; 1295 } 1296 1297 cmpci_mixerreg_write(sc, src, 1298 CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT])); 1299 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_L_TO_R(src), 1300 CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_RIGHT])); 1301 } 1302 1303 static void 1304 cmpci_set_out_ports(struct cmpci_softc *sc) 1305 { 1306 uint8_t v; 1307 int enspdout; 1308 1309 if (!CMPCI_ISCAP(sc, SPDLOOP)) 1310 return; 1311 1312 /* SPDIF/out select */ 1313 if (sc->sc_gain[CMPCI_SPDIF_LOOP][CMPCI_LR] == CMPCI_SPDIF_LOOP_OFF) { 1314 /* playback */ 1315 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP); 1316 } else { 1317 /* monitor SPDIF/in */ 1318 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP); 1319 } 1320 1321 /* SPDIF in select */ 1322 v = sc->sc_gain[CMPCI_SPDIF_IN_SELECT][CMPCI_LR]; 1323 if (v & CMPCI_SPDIFIN_SPDIFIN2) 1324 cmpci_reg_set_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN); 1325 else 1326 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN); 1327 if (v & CMPCI_SPDIFIN_SPDIFOUT) 1328 cmpci_reg_set_reg_misc(sc, CMPCI_REG_SPDFLOOPI); 1329 else 1330 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPDFLOOPI); 1331 1332 enspdout = 0; 1333 /* playback to ... */ 1334 if (CMPCI_ISCAP(sc, SPDOUT) && 1335 sc->sc_gain[CMPCI_PLAYBACK_MODE][CMPCI_LR] 1336 == CMPCI_PLAYBACK_MODE_SPDIF && 1337 (sc->sc_play.md_divide == CMPCI_REG_RATE_44100 || 1338 (CMPCI_ISCAP(sc, SPDOUT_48K) && 1339 sc->sc_play.md_divide==CMPCI_REG_RATE_48000))) { 1340 /* playback to SPDIF */ 1341 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE); 1342 enspdout = 1; 1343 if (sc->sc_play.md_divide==CMPCI_REG_RATE_48000) 1344 cmpci_reg_set_reg_misc(sc, 1345 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1346 else 1347 cmpci_reg_clear_reg_misc(sc, 1348 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1349 } else { 1350 /* playback to DAC */ 1351 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, 1352 CMPCI_REG_SPDIF0_ENABLE); 1353 if (CMPCI_ISCAP(sc, SPDOUT_48K)) 1354 cmpci_reg_clear_reg_misc(sc, 1355 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1356 } 1357 1358 /* legacy to SPDIF/out or not */ 1359 if (CMPCI_ISCAP(sc, SPDLEGACY)) { 1360 if (sc->sc_gain[CMPCI_SPDIF_OUT_PLAYBACK][CMPCI_LR] 1361 == CMPCI_SPDIF_OUT_PLAYBACK_WAVE) 1362 cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL, 1363 CMPCI_REG_LEGACY_SPDIF_ENABLE); 1364 else { 1365 cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL, 1366 CMPCI_REG_LEGACY_SPDIF_ENABLE); 1367 enspdout = 1; 1368 } 1369 } 1370 1371 /* enable/disable SPDIF/out */ 1372 if (CMPCI_ISCAP(sc, XSPDOUT) && enspdout) 1373 cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL, 1374 CMPCI_REG_XSPDIF_ENABLE); 1375 else 1376 cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL, 1377 CMPCI_REG_XSPDIF_ENABLE); 1378 1379 /* SPDIF monitor (digital to analog output) */ 1380 if (CMPCI_ISCAP(sc, SPDIN_MONITOR)) { 1381 v = sc->sc_gain[CMPCI_MONITOR_DAC][CMPCI_LR]; 1382 if (!(v & CMPCI_MONDAC_ENABLE)) 1383 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1384 CMPCI_REG_SPDIN_MONITOR); 1385 if (v & CMPCI_MONDAC_SPDOUT) 1386 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, 1387 CMPCI_REG_SPDIFOUT_DAC); 1388 else 1389 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, 1390 CMPCI_REG_SPDIFOUT_DAC); 1391 if (v & CMPCI_MONDAC_ENABLE) 1392 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1393 CMPCI_REG_SPDIN_MONITOR); 1394 } 1395 } 1396 1397 static int 1398 cmpci_set_in_ports(struct cmpci_softc *sc) 1399 { 1400 int mask; 1401 int bitsl, bitsr; 1402 1403 mask = sc->sc_in_mask; 1404 1405 /* 1406 * Note CMPCI_RECORD_SOURCE_CD, CMPCI_RECORD_SOURCE_LINE_IN and 1407 * CMPCI_RECORD_SOURCE_FM are defined to the corresponding bit 1408 * of the mixer register. 1409 */ 1410 bitsr = mask & (CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN | 1411 CMPCI_RECORD_SOURCE_FM); 1412 1413 bitsl = CMPCI_SB16_MIXER_SRC_R_TO_L(bitsr); 1414 if (mask & CMPCI_RECORD_SOURCE_MIC) { 1415 bitsl |= CMPCI_SB16_MIXER_MIC_SRC; 1416 bitsr |= CMPCI_SB16_MIXER_MIC_SRC; 1417 } 1418 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, bitsl); 1419 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, bitsr); 1420 1421 if (mask & CMPCI_RECORD_SOURCE_AUX_IN) 1422 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1423 CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN); 1424 else 1425 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1426 CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN); 1427 1428 if (mask & CMPCI_RECORD_SOURCE_WAVE) 1429 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1430 CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR); 1431 else 1432 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1433 CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR); 1434 1435 if (CMPCI_ISCAP(sc, SPDIN) && 1436 (sc->sc_rec.md_divide == CMPCI_REG_RATE_44100 || 1437 (CMPCI_ISCAP(sc, SPDOUT_48K) && 1438 sc->sc_rec.md_divide == CMPCI_REG_RATE_48000/* XXX? */))) { 1439 if (mask & CMPCI_RECORD_SOURCE_SPDIF) { 1440 /* enable SPDIF/in */ 1441 cmpci_reg_set_4(sc, 1442 CMPCI_REG_FUNC_1, 1443 CMPCI_REG_SPDIF1_ENABLE); 1444 } else { 1445 cmpci_reg_clear_4(sc, 1446 CMPCI_REG_FUNC_1, 1447 CMPCI_REG_SPDIF1_ENABLE); 1448 } 1449 } 1450 1451 return 0; 1452 } 1453 1454 static int 1455 cmpci_set_port(void *handle, mixer_ctrl_t *cp) 1456 { 1457 struct cmpci_softc *sc; 1458 int lgain, rgain; 1459 1460 sc = handle; 1461 switch (cp->dev) { 1462 case CMPCI_MIC_VOL: 1463 case CMPCI_PCSPEAKER: 1464 case CMPCI_MIC_RECVOL: 1465 if (cp->un.value.num_channels != 1) 1466 return EINVAL; 1467 /* FALLTHROUGH */ 1468 case CMPCI_DAC_VOL: 1469 case CMPCI_FM_VOL: 1470 case CMPCI_CD_VOL: 1471 case CMPCI_LINE_IN_VOL: 1472 case CMPCI_AUX_IN_VOL: 1473 case CMPCI_MASTER_VOL: 1474 if (cp->type != AUDIO_MIXER_VALUE) 1475 return EINVAL; 1476 switch (cp->un.value.num_channels) { 1477 case 1: 1478 lgain = rgain = 1479 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]; 1480 break; 1481 case 2: 1482 lgain = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]; 1483 rgain = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]; 1484 break; 1485 default: 1486 return EINVAL; 1487 } 1488 sc->sc_gain[cp->dev][CMPCI_LEFT] = lgain; 1489 sc->sc_gain[cp->dev][CMPCI_RIGHT] = rgain; 1490 1491 cmpci_set_mixer_gain(sc, cp->dev); 1492 break; 1493 1494 case CMPCI_RECORD_SOURCE: 1495 if (cp->type != AUDIO_MIXER_SET) 1496 return EINVAL; 1497 1498 if (cp->un.mask & ~(CMPCI_RECORD_SOURCE_MIC | 1499 CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN | 1500 CMPCI_RECORD_SOURCE_AUX_IN | CMPCI_RECORD_SOURCE_WAVE | 1501 CMPCI_RECORD_SOURCE_FM | CMPCI_RECORD_SOURCE_SPDIF)) 1502 return EINVAL; 1503 1504 if (cp->un.mask & CMPCI_RECORD_SOURCE_SPDIF) 1505 cp->un.mask = CMPCI_RECORD_SOURCE_SPDIF; 1506 1507 sc->sc_in_mask = cp->un.mask; 1508 return cmpci_set_in_ports(sc); 1509 1510 /* boolean */ 1511 case CMPCI_DAC_MUTE: 1512 case CMPCI_FM_MUTE: 1513 case CMPCI_CD_MUTE: 1514 case CMPCI_LINE_IN_MUTE: 1515 case CMPCI_AUX_IN_MUTE: 1516 case CMPCI_MIC_MUTE: 1517 case CMPCI_MIC_PREAMP: 1518 case CMPCI_PLAYBACK_MODE: 1519 case CMPCI_SPDIF_IN_PHASE: 1520 case CMPCI_SPDIF_LOOP: 1521 case CMPCI_SPDIF_OUT_PLAYBACK: 1522 case CMPCI_SPDIF_OUT_VOLTAGE: 1523 case CMPCI_REAR: 1524 case CMPCI_INDIVIDUAL: 1525 case CMPCI_REVERSE: 1526 case CMPCI_SURROUND: 1527 if (cp->type != AUDIO_MIXER_ENUM) 1528 return EINVAL; 1529 sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord != 0; 1530 cmpci_set_mixer_gain(sc, cp->dev); 1531 break; 1532 1533 case CMPCI_SPDIF_IN_SELECT: 1534 switch (cp->un.ord) { 1535 case CMPCI_SPDIF_IN_SPDIN1: 1536 case CMPCI_SPDIF_IN_SPDIN2: 1537 case CMPCI_SPDIF_IN_SPDOUT: 1538 break; 1539 default: 1540 return EINVAL; 1541 } 1542 goto xenum; 1543 case CMPCI_MONITOR_DAC: 1544 switch (cp->un.ord) { 1545 case CMPCI_MONITOR_DAC_OFF: 1546 case CMPCI_MONITOR_DAC_SPDIN: 1547 case CMPCI_MONITOR_DAC_SPDOUT: 1548 break; 1549 default: 1550 return EINVAL; 1551 } 1552 xenum: 1553 if (cp->type != AUDIO_MIXER_ENUM) 1554 return EINVAL; 1555 sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord; 1556 cmpci_set_mixer_gain(sc, cp->dev); 1557 break; 1558 1559 default: 1560 return EINVAL; 1561 } 1562 1563 return 0; 1564 } 1565 1566 static int 1567 cmpci_get_port(void *handle, mixer_ctrl_t *cp) 1568 { 1569 struct cmpci_softc *sc; 1570 1571 sc = handle; 1572 switch (cp->dev) { 1573 case CMPCI_MIC_VOL: 1574 case CMPCI_PCSPEAKER: 1575 case CMPCI_MIC_RECVOL: 1576 if (cp->un.value.num_channels != 1) 1577 return EINVAL; 1578 /*FALLTHROUGH*/ 1579 case CMPCI_DAC_VOL: 1580 case CMPCI_FM_VOL: 1581 case CMPCI_CD_VOL: 1582 case CMPCI_LINE_IN_VOL: 1583 case CMPCI_AUX_IN_VOL: 1584 case CMPCI_MASTER_VOL: 1585 switch (cp->un.value.num_channels) { 1586 case 1: 1587 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = 1588 sc->sc_gain[cp->dev][CMPCI_LEFT]; 1589 break; 1590 case 2: 1591 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 1592 sc->sc_gain[cp->dev][CMPCI_LEFT]; 1593 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 1594 sc->sc_gain[cp->dev][CMPCI_RIGHT]; 1595 break; 1596 default: 1597 return EINVAL; 1598 } 1599 break; 1600 1601 case CMPCI_RECORD_SOURCE: 1602 cp->un.mask = sc->sc_in_mask; 1603 break; 1604 1605 case CMPCI_DAC_MUTE: 1606 case CMPCI_FM_MUTE: 1607 case CMPCI_CD_MUTE: 1608 case CMPCI_LINE_IN_MUTE: 1609 case CMPCI_AUX_IN_MUTE: 1610 case CMPCI_MIC_MUTE: 1611 case CMPCI_MIC_PREAMP: 1612 case CMPCI_PLAYBACK_MODE: 1613 case CMPCI_SPDIF_IN_SELECT: 1614 case CMPCI_SPDIF_IN_PHASE: 1615 case CMPCI_SPDIF_LOOP: 1616 case CMPCI_SPDIF_OUT_PLAYBACK: 1617 case CMPCI_SPDIF_OUT_VOLTAGE: 1618 case CMPCI_MONITOR_DAC: 1619 case CMPCI_REAR: 1620 case CMPCI_INDIVIDUAL: 1621 case CMPCI_REVERSE: 1622 case CMPCI_SURROUND: 1623 cp->un.ord = sc->sc_gain[cp->dev][CMPCI_LR]; 1624 break; 1625 1626 default: 1627 return EINVAL; 1628 } 1629 1630 return 0; 1631 } 1632 1633 /* ARGSUSED */ 1634 static size_t 1635 cmpci_round_buffersize(void *handle, int direction, 1636 size_t bufsize) 1637 { 1638 1639 if (bufsize > 0x10000) 1640 bufsize = 0x10000; 1641 1642 return bufsize; 1643 } 1644 1645 static paddr_t 1646 cmpci_mappage(void *handle, void *addr, off_t offset, int prot) 1647 { 1648 struct cmpci_dmanode *p; 1649 1650 if (offset < 0 || NULL == (p = cmpci_find_dmamem(handle, addr))) 1651 return -1; 1652 1653 return bus_dmamem_mmap(p->cd_tag, p->cd_segs, 1654 sizeof(p->cd_segs)/sizeof(p->cd_segs[0]), 1655 offset, prot, BUS_DMA_WAITOK); 1656 } 1657 1658 /* ARGSUSED */ 1659 static int 1660 cmpci_get_props(void *handle) 1661 { 1662 1663 return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 1664 } 1665 1666 static int 1667 cmpci_trigger_output(void *handle, void *start, void *end, int blksize, 1668 void (*intr)(void *), void *arg, 1669 const audio_params_t *param) 1670 { 1671 struct cmpci_softc *sc; 1672 struct cmpci_dmanode *p; 1673 int bps; 1674 1675 sc = handle; 1676 sc->sc_play.intr = intr; 1677 sc->sc_play.intr_arg = arg; 1678 bps = param->channels * param->precision / 8; 1679 if (!bps) 1680 return EINVAL; 1681 1682 /* set DMA frame */ 1683 if (!(p = cmpci_find_dmamem(sc, start))) 1684 return EINVAL; 1685 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BASE, 1686 DMAADDR(p)); 1687 delay(10); 1688 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BYTES, 1689 ((char *)end - (char *)start + 1) / bps - 1); 1690 delay(10); 1691 1692 /* set interrupt count */ 1693 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_SAMPLES, 1694 (blksize + bps - 1) / bps - 1); 1695 delay(10); 1696 1697 /* start DMA */ 1698 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); /* PLAY */ 1699 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 1700 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); 1701 1702 return 0; 1703 } 1704 1705 static int 1706 cmpci_trigger_input(void *handle, void *start, void *end, int blksize, 1707 void (*intr)(void *), void *arg, 1708 const audio_params_t *param) 1709 { 1710 struct cmpci_softc *sc; 1711 struct cmpci_dmanode *p; 1712 int bps; 1713 1714 sc = handle; 1715 sc->sc_rec.intr = intr; 1716 sc->sc_rec.intr_arg = arg; 1717 bps = param->channels * param->precision / 8; 1718 if (!bps) 1719 return EINVAL; 1720 1721 /* set DMA frame */ 1722 if (!(p=cmpci_find_dmamem(sc, start))) 1723 return EINVAL; 1724 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BASE, 1725 DMAADDR(p)); 1726 delay(10); 1727 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BYTES, 1728 ((char *)end - (char *)start + 1) / bps - 1); 1729 delay(10); 1730 1731 /* set interrupt count */ 1732 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_SAMPLES, 1733 (blksize + bps - 1) / bps - 1); 1734 delay(10); 1735 1736 /* start DMA */ 1737 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_DIR); /* REC */ 1738 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 1739 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); 1740 1741 return 0; 1742 } 1743 1744 static void 1745 cmpci_get_locks(void *addr, kmutex_t **intr, kmutex_t **thread) 1746 { 1747 struct cmpci_softc *sc; 1748 1749 sc = addr; 1750 *intr = &sc->sc_intr_lock; 1751 *thread = &sc->sc_lock; 1752 } 1753 1754 /* end of file */ 1755
Indexes created Sun Sep 28 07:09:56 GMT 2025