cmpci.c revision 1.51
1 /* $NetBSD: cmpci.c,v 1.51 2018/12/09 11:14:01 jdolecek Exp $ */ 2 3 /* 4 * Copyright (c) 2000, 2001, 2008 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Takuya SHIOZAKI <tshiozak (at) NetBSD.org> . 9 * 10 * This code is derived from software contributed to The NetBSD Foundation 11 * by ITOH Yasufumi. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 /* 37 * C-Media CMI8x38 Audio Chip Support. 38 * 39 * TODO: 40 * - 4ch / 6ch support. 41 * - Joystick support. 42 * 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: cmpci.c,v 1.51 2018/12/09 11:14:01 jdolecek Exp $"); 47 48 #if defined(AUDIO_DEBUG) || defined(DEBUG) 49 #define DPRINTF(x) if (cmpcidebug) printf x 50 int cmpcidebug = 0; 51 #else 52 #define DPRINTF(x) 53 #endif 54 55 #include "mpu.h" 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/kernel.h> 60 #include <sys/kmem.h> 61 #include <sys/device.h> 62 #include <sys/proc.h> 63 64 #include <dev/pci/pcidevs.h> 65 #include <dev/pci/pcivar.h> 66 67 #include <sys/audioio.h> 68 #include <dev/audio_if.h> 69 #include <dev/midi_if.h> 70 71 #include <dev/mulaw.h> 72 #include <dev/auconv.h> 73 #include <dev/pci/cmpcireg.h> 74 #include <dev/pci/cmpcivar.h> 75 76 #include <dev/ic/mpuvar.h> 77 #include <sys/bus.h> 78 #include <sys/intr.h> 79 80 /* 81 * Low-level HW interface 82 */ 83 static inline uint8_t cmpci_mixerreg_read(struct cmpci_softc *, uint8_t); 84 static inline void cmpci_mixerreg_write(struct cmpci_softc *, 85 uint8_t, uint8_t); 86 static inline void cmpci_reg_partial_write_1(struct cmpci_softc *, int, int, 87 unsigned, unsigned); 88 static inline void cmpci_reg_partial_write_4(struct cmpci_softc *, int, int, 89 uint32_t, uint32_t); 90 static inline void cmpci_reg_set_1(struct cmpci_softc *, int, uint8_t); 91 static inline void cmpci_reg_clear_1(struct cmpci_softc *, int, uint8_t); 92 static inline void cmpci_reg_set_4(struct cmpci_softc *, int, uint32_t); 93 static inline void cmpci_reg_clear_4(struct cmpci_softc *, int, uint32_t); 94 static inline void cmpci_reg_set_reg_misc(struct cmpci_softc *, uint32_t); 95 static inline void cmpci_reg_clear_reg_misc(struct cmpci_softc *, uint32_t); 96 static int cmpci_rate_to_index(int); 97 static inline int cmpci_index_to_rate(int); 98 static inline int cmpci_index_to_divider(int); 99 100 static int cmpci_adjust(int, int); 101 static void cmpci_set_mixer_gain(struct cmpci_softc *, int); 102 static void cmpci_set_out_ports(struct cmpci_softc *); 103 static int cmpci_set_in_ports(struct cmpci_softc *); 104 105 106 /* 107 * autoconf interface 108 */ 109 static int cmpci_match(device_t, cfdata_t, void *); 110 static void cmpci_attach(device_t, device_t, void *); 111 112 CFATTACH_DECL_NEW(cmpci, sizeof (struct cmpci_softc), 113 cmpci_match, cmpci_attach, NULL, NULL); 114 115 /* interrupt */ 116 static int cmpci_intr(void *); 117 118 119 /* 120 * DMA stuffs 121 */ 122 static int cmpci_alloc_dmamem(struct cmpci_softc *, size_t, void **); 123 static int cmpci_free_dmamem(struct cmpci_softc *, void *, size_t); 124 static struct cmpci_dmanode * cmpci_find_dmamem(struct cmpci_softc *, 125 void *); 126 127 128 /* 129 * interface to machine independent layer 130 */ 131 static int cmpci_query_encoding(void *, struct audio_encoding *); 132 static int cmpci_set_params(void *, int, int, audio_params_t *, 133 audio_params_t *, stream_filter_list_t *, stream_filter_list_t *); 134 static int cmpci_round_blocksize(void *, int, int, const audio_params_t *); 135 static int cmpci_halt_output(void *); 136 static int cmpci_halt_input(void *); 137 static int cmpci_getdev(void *, struct audio_device *); 138 static int cmpci_set_port(void *, mixer_ctrl_t *); 139 static int cmpci_get_port(void *, mixer_ctrl_t *); 140 static int cmpci_query_devinfo(void *, mixer_devinfo_t *); 141 static void *cmpci_allocm(void *, int, size_t); 142 static void cmpci_freem(void *, void *, size_t); 143 static size_t cmpci_round_buffersize(void *, int, size_t); 144 static paddr_t cmpci_mappage(void *, void *, off_t, int); 145 static int cmpci_get_props(void *); 146 static int cmpci_trigger_output(void *, void *, void *, int, 147 void (*)(void *), void *, const audio_params_t *); 148 static int cmpci_trigger_input(void *, void *, void *, int, 149 void (*)(void *), void *, const audio_params_t *); 150 static void cmpci_get_locks(void *, kmutex_t **, kmutex_t **); 151 152 static const struct audio_hw_if cmpci_hw_if = { 153 NULL, /* open */ 154 NULL, /* close */ 155 NULL, /* drain */ 156 cmpci_query_encoding, /* query_encoding */ 157 cmpci_set_params, /* set_params */ 158 cmpci_round_blocksize, /* round_blocksize */ 159 NULL, /* commit_settings */ 160 NULL, /* init_output */ 161 NULL, /* init_input */ 162 NULL, /* start_output */ 163 NULL, /* start_input */ 164 cmpci_halt_output, /* halt_output */ 165 cmpci_halt_input, /* halt_input */ 166 NULL, /* speaker_ctl */ 167 cmpci_getdev, /* getdev */ 168 NULL, /* setfd */ 169 cmpci_set_port, /* set_port */ 170 cmpci_get_port, /* get_port */ 171 cmpci_query_devinfo, /* query_devinfo */ 172 cmpci_allocm, /* allocm */ 173 cmpci_freem, /* freem */ 174 cmpci_round_buffersize,/* round_buffersize */ 175 cmpci_mappage, /* mappage */ 176 cmpci_get_props, /* get_props */ 177 cmpci_trigger_output, /* trigger_output */ 178 cmpci_trigger_input, /* trigger_input */ 179 NULL, /* dev_ioctl */ 180 cmpci_get_locks, /* get_locks */ 181 }; 182 183 #define CMPCI_NFORMATS 4 184 static const struct audio_format cmpci_formats[CMPCI_NFORMATS] = { 185 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 186 2, AUFMT_STEREO, 0, {5512, 48000}}, 187 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 188 1, AUFMT_MONAURAL, 0, {5512, 48000}}, 189 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8, 190 2, AUFMT_STEREO, 0, {5512, 48000}}, 191 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8, 192 1, AUFMT_MONAURAL, 0, {5512, 48000}}, 193 }; 194 195 196 /* 197 * Low-level HW interface 198 */ 199 200 /* mixer register read/write */ 201 static inline uint8_t 202 cmpci_mixerreg_read(struct cmpci_softc *sc, uint8_t no) 203 { 204 uint8_t ret; 205 206 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no); 207 delay(10); 208 ret = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA); 209 delay(10); 210 return ret; 211 } 212 213 static inline void 214 cmpci_mixerreg_write(struct cmpci_softc *sc, uint8_t no, uint8_t val) 215 { 216 217 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no); 218 delay(10); 219 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA, val); 220 delay(10); 221 } 222 223 224 /* register partial write */ 225 static inline void 226 cmpci_reg_partial_write_1(struct cmpci_softc *sc, int no, int shift, 227 unsigned mask, unsigned val) 228 { 229 230 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 231 (val<<shift) | 232 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift))); 233 delay(10); 234 } 235 236 static inline void 237 cmpci_reg_partial_write_4(struct cmpci_softc *sc, int no, int shift, 238 uint32_t mask, uint32_t val) 239 { 240 241 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 242 (val<<shift) | 243 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift))); 244 delay(10); 245 } 246 247 /* register set/clear bit */ 248 static inline void 249 cmpci_reg_set_1(struct cmpci_softc *sc, int no, uint8_t mask) 250 { 251 252 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 253 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) | mask)); 254 delay(10); 255 } 256 257 static inline void 258 cmpci_reg_clear_1(struct cmpci_softc *sc, int no, uint8_t mask) 259 { 260 261 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 262 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~mask)); 263 delay(10); 264 } 265 266 static inline void 267 cmpci_reg_set_4(struct cmpci_softc *sc, int no, uint32_t mask) 268 { 269 270 /* use cmpci_reg_set_reg_misc() for CMPCI_REG_MISC */ 271 KDASSERT(no != CMPCI_REG_MISC); 272 273 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 274 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) | mask)); 275 delay(10); 276 } 277 278 static inline void 279 cmpci_reg_clear_4(struct cmpci_softc *sc, int no, uint32_t mask) 280 { 281 282 /* use cmpci_reg_clear_reg_misc() for CMPCI_REG_MISC */ 283 KDASSERT(no != CMPCI_REG_MISC); 284 285 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 286 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~mask)); 287 delay(10); 288 } 289 290 /* 291 * The CMPCI_REG_MISC register needs special handling, since one of 292 * its bits has different read/write values. 293 */ 294 static inline void 295 cmpci_reg_set_reg_misc(struct cmpci_softc *sc, uint32_t mask) 296 { 297 298 sc->sc_reg_misc |= mask; 299 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC, 300 sc->sc_reg_misc); 301 delay(10); 302 } 303 304 static inline void 305 cmpci_reg_clear_reg_misc(struct cmpci_softc *sc, uint32_t mask) 306 { 307 308 sc->sc_reg_misc &= ~mask; 309 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC, 310 sc->sc_reg_misc); 311 delay(10); 312 } 313 314 /* rate */ 315 static const struct { 316 int rate; 317 int divider; 318 } cmpci_rate_table[CMPCI_REG_NUMRATE] = { 319 #define _RATE(n) { n, CMPCI_REG_RATE_ ## n } 320 _RATE(5512), 321 _RATE(8000), 322 _RATE(11025), 323 _RATE(16000), 324 _RATE(22050), 325 _RATE(32000), 326 _RATE(44100), 327 _RATE(48000) 328 #undef _RATE 329 }; 330 331 static int 332 cmpci_rate_to_index(int rate) 333 { 334 int i; 335 336 for (i = 0; i < CMPCI_REG_NUMRATE - 1; i++) 337 if (rate <= 338 (cmpci_rate_table[i].rate+cmpci_rate_table[i+1].rate) / 2) 339 return i; 340 return i; /* 48000 */ 341 } 342 343 static inline int 344 cmpci_index_to_rate(int index) 345 { 346 347 return cmpci_rate_table[index].rate; 348 } 349 350 static inline int 351 cmpci_index_to_divider(int index) 352 { 353 354 return cmpci_rate_table[index].divider; 355 } 356 357 /* 358 * interface to configure the device. 359 */ 360 static int 361 cmpci_match(device_t parent, cfdata_t match, void *aux) 362 { 363 struct pci_attach_args *pa; 364 365 pa = (struct pci_attach_args *)aux; 366 if ( PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CMEDIA && 367 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338A || 368 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338B || 369 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738 || 370 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738B) ) 371 return 1; 372 373 return 0; 374 } 375 376 static void 377 cmpci_attach(device_t parent, device_t self, void *aux) 378 { 379 struct cmpci_softc *sc; 380 struct pci_attach_args *pa; 381 struct audio_attach_args aa; 382 pci_intr_handle_t ih; 383 char const *strintr; 384 int i, v; 385 char intrbuf[PCI_INTRSTR_LEN]; 386 387 sc = device_private(self); 388 sc->sc_dev = self; 389 pa = (struct pci_attach_args *)aux; 390 391 sc->sc_id = pa->pa_id; 392 sc->sc_class = pa->pa_class; 393 pci_aprint_devinfo(pa, "Audio controller"); 394 switch (PCI_PRODUCT(sc->sc_id)) { 395 case PCI_PRODUCT_CMEDIA_CMI8338A: 396 /*FALLTHROUGH*/ 397 case PCI_PRODUCT_CMEDIA_CMI8338B: 398 sc->sc_capable = CMPCI_CAP_CMI8338; 399 break; 400 case PCI_PRODUCT_CMEDIA_CMI8738: 401 /*FALLTHROUGH*/ 402 case PCI_PRODUCT_CMEDIA_CMI8738B: 403 sc->sc_capable = CMPCI_CAP_CMI8738; 404 break; 405 } 406 407 /* map I/O space */ 408 if (pci_mapreg_map(pa, CMPCI_PCI_IOBASEREG, PCI_MAPREG_TYPE_IO, 0, 409 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 410 aprint_error_dev(sc->sc_dev, "failed to map I/O space\n"); 411 return; 412 } 413 414 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 415 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO); 416 417 /* interrupt */ 418 if (pci_intr_map(pa, &ih)) { 419 aprint_error_dev(sc->sc_dev, "failed to map interrupt\n"); 420 return; 421 } 422 strintr = pci_intr_string(pa->pa_pc, ih, intrbuf, sizeof(intrbuf)); 423 sc->sc_ih = pci_intr_establish_xname(pa->pa_pc, ih, IPL_AUDIO, 424 cmpci_intr, sc, device_xname(self)); 425 if (sc->sc_ih == NULL) { 426 aprint_error_dev(sc->sc_dev, "failed to establish interrupt"); 427 if (strintr != NULL) 428 aprint_error(" at %s", strintr); 429 aprint_error("\n"); 430 mutex_destroy(&sc->sc_lock); 431 mutex_destroy(&sc->sc_intr_lock); 432 return; 433 } 434 aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", strintr); 435 436 sc->sc_dmat = pa->pa_dmat; 437 438 audio_attach_mi(&cmpci_hw_if, sc, sc->sc_dev); 439 440 /* attach OPL device */ 441 aa.type = AUDIODEV_TYPE_OPL; 442 aa.hwif = NULL; 443 aa.hdl = NULL; 444 (void)config_found(sc->sc_dev, &aa, audioprint); 445 446 /* attach MPU-401 device */ 447 aa.type = AUDIODEV_TYPE_MPU; 448 aa.hwif = NULL; 449 aa.hdl = NULL; 450 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh, 451 CMPCI_REG_MPU_BASE, CMPCI_REG_MPU_SIZE, &sc->sc_mpu_ioh) == 0) 452 sc->sc_mpudev = config_found(sc->sc_dev, &aa, audioprint); 453 454 /* get initial value (this is 0 and may be omitted but just in case) */ 455 sc->sc_reg_misc = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 456 CMPCI_REG_MISC) & ~CMPCI_REG_SPDIF48K; 457 458 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_RESET, 0); 459 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0); 460 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0); 461 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, 462 CMPCI_SB16_SW_CD|CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE); 463 for (i = 0; i < CMPCI_NDEVS; i++) { 464 switch (i) { 465 /* 466 * CMI8738 defaults are 467 * master: 0xe0 (0x00 - 0xf8) 468 * FM, DAC: 0xc0 (0x00 - 0xf8) 469 * PC speaker: 0x80 (0x00 - 0xc0) 470 * others: 0 471 */ 472 /* volume */ 473 case CMPCI_MASTER_VOL: 474 v = 128; /* 224 */ 475 break; 476 case CMPCI_FM_VOL: 477 case CMPCI_DAC_VOL: 478 v = 192; 479 break; 480 case CMPCI_PCSPEAKER: 481 v = 128; 482 break; 483 484 /* booleans, set to true */ 485 case CMPCI_CD_MUTE: 486 case CMPCI_MIC_MUTE: 487 case CMPCI_LINE_IN_MUTE: 488 case CMPCI_AUX_IN_MUTE: 489 v = 1; 490 break; 491 492 /* volume with inital value 0 */ 493 case CMPCI_CD_VOL: 494 case CMPCI_LINE_IN_VOL: 495 case CMPCI_AUX_IN_VOL: 496 case CMPCI_MIC_VOL: 497 case CMPCI_MIC_RECVOL: 498 /* FALLTHROUGH */ 499 500 /* others are cleared */ 501 case CMPCI_MIC_PREAMP: 502 case CMPCI_RECORD_SOURCE: 503 case CMPCI_PLAYBACK_MODE: 504 case CMPCI_SPDIF_IN_SELECT: 505 case CMPCI_SPDIF_IN_PHASE: 506 case CMPCI_SPDIF_LOOP: 507 case CMPCI_SPDIF_OUT_PLAYBACK: 508 case CMPCI_SPDIF_OUT_VOLTAGE: 509 case CMPCI_MONITOR_DAC: 510 case CMPCI_REAR: 511 case CMPCI_INDIVIDUAL: 512 case CMPCI_REVERSE: 513 case CMPCI_SURROUND: 514 default: 515 v = 0; 516 break; 517 } 518 sc->sc_gain[i][CMPCI_LEFT] = sc->sc_gain[i][CMPCI_RIGHT] = v; 519 cmpci_set_mixer_gain(sc, i); 520 } 521 } 522 523 static int 524 cmpci_intr(void *handle) 525 { 526 struct cmpci_softc *sc = handle; 527 #if NMPU > 0 528 struct mpu_softc *sc_mpu = device_private(sc->sc_mpudev); 529 #endif 530 uint32_t intrstat; 531 532 mutex_spin_enter(&sc->sc_intr_lock); 533 534 intrstat = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 535 CMPCI_REG_INTR_STATUS); 536 537 if (!(intrstat & CMPCI_REG_ANY_INTR)) { 538 mutex_spin_exit(&sc->sc_intr_lock); 539 return 0; 540 } 541 542 delay(10); 543 544 /* disable and reset intr */ 545 if (intrstat & CMPCI_REG_CH0_INTR) 546 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, 547 CMPCI_REG_CH0_INTR_ENABLE); 548 if (intrstat & CMPCI_REG_CH1_INTR) 549 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, 550 CMPCI_REG_CH1_INTR_ENABLE); 551 552 if (intrstat & CMPCI_REG_CH0_INTR) { 553 if (sc->sc_play.intr != NULL) 554 (*sc->sc_play.intr)(sc->sc_play.intr_arg); 555 } 556 if (intrstat & CMPCI_REG_CH1_INTR) { 557 if (sc->sc_rec.intr != NULL) 558 (*sc->sc_rec.intr)(sc->sc_rec.intr_arg); 559 } 560 561 /* enable intr */ 562 if (intrstat & CMPCI_REG_CH0_INTR) 563 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, 564 CMPCI_REG_CH0_INTR_ENABLE); 565 if (intrstat & CMPCI_REG_CH1_INTR) 566 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, 567 CMPCI_REG_CH1_INTR_ENABLE); 568 569 #if NMPU > 0 570 if (intrstat & CMPCI_REG_UART_INTR && sc_mpu != NULL) 571 mpu_intr(sc_mpu); 572 #endif 573 574 mutex_spin_exit(&sc->sc_intr_lock); 575 return 1; 576 } 577 578 static int 579 cmpci_query_encoding(void *handle, struct audio_encoding *fp) 580 { 581 582 switch (fp->index) { 583 case 0: 584 strcpy(fp->name, AudioEulinear); 585 fp->encoding = AUDIO_ENCODING_ULINEAR; 586 fp->precision = 8; 587 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 588 break; 589 case 1: 590 strcpy(fp->name, AudioEmulaw); 591 fp->encoding = AUDIO_ENCODING_ULAW; 592 fp->precision = 8; 593 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 594 break; 595 case 2: 596 strcpy(fp->name, AudioEalaw); 597 fp->encoding = AUDIO_ENCODING_ALAW; 598 fp->precision = 8; 599 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 600 break; 601 case 3: 602 strcpy(fp->name, AudioEslinear); 603 fp->encoding = AUDIO_ENCODING_SLINEAR; 604 fp->precision = 8; 605 fp->flags = 0; 606 break; 607 case 4: 608 strcpy(fp->name, AudioEslinear_le); 609 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 610 fp->precision = 16; 611 fp->flags = 0; 612 break; 613 case 5: 614 strcpy(fp->name, AudioEulinear_le); 615 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 616 fp->precision = 16; 617 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 618 break; 619 case 6: 620 strcpy(fp->name, AudioEslinear_be); 621 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 622 fp->precision = 16; 623 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 624 break; 625 case 7: 626 strcpy(fp->name, AudioEulinear_be); 627 fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 628 fp->precision = 16; 629 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 630 break; 631 default: 632 return EINVAL; 633 } 634 return 0; 635 } 636 637 638 static int 639 cmpci_set_params(void *handle, int setmode, int usemode, 640 audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil, 641 stream_filter_list_t *rfil) 642 { 643 int i; 644 struct cmpci_softc *sc; 645 646 sc = handle; 647 for (i = 0; i < 2; i++) { 648 int md_format; 649 int md_divide; 650 int md_index; 651 int mode; 652 audio_params_t *p; 653 stream_filter_list_t *fil; 654 int ind; 655 656 switch (i) { 657 case 0: 658 mode = AUMODE_PLAY; 659 p = play; 660 fil = pfil; 661 break; 662 case 1: 663 mode = AUMODE_RECORD; 664 p = rec; 665 fil = rfil; 666 break; 667 default: 668 return EINVAL; 669 } 670 671 if (!(setmode & mode)) 672 continue; 673 674 md_index = cmpci_rate_to_index(p->sample_rate); 675 md_divide = cmpci_index_to_divider(md_index); 676 p->sample_rate = cmpci_index_to_rate(md_index); 677 DPRINTF(("%s: sample:%u, divider=%d\n", 678 device_xname(sc->sc_dev), p->sample_rate, md_divide)); 679 680 ind = auconv_set_converter(cmpci_formats, CMPCI_NFORMATS, 681 mode, p, FALSE, fil); 682 if (ind < 0) 683 return EINVAL; 684 if (fil->req_size > 0) 685 p = &fil->filters[0].param; 686 687 /* format */ 688 md_format = p->channels == 1 689 ? CMPCI_REG_FORMAT_MONO : CMPCI_REG_FORMAT_STEREO; 690 md_format |= p->precision == 16 691 ? CMPCI_REG_FORMAT_16BIT : CMPCI_REG_FORMAT_8BIT; 692 if (mode & AUMODE_PLAY) { 693 cmpci_reg_partial_write_4(sc, 694 CMPCI_REG_CHANNEL_FORMAT, 695 CMPCI_REG_CH0_FORMAT_SHIFT, 696 CMPCI_REG_CH0_FORMAT_MASK, md_format); 697 cmpci_reg_partial_write_4(sc, 698 CMPCI_REG_FUNC_1, CMPCI_REG_DAC_FS_SHIFT, 699 CMPCI_REG_DAC_FS_MASK, md_divide); 700 sc->sc_play.md_divide = md_divide; 701 } else { 702 cmpci_reg_partial_write_4(sc, 703 CMPCI_REG_CHANNEL_FORMAT, 704 CMPCI_REG_CH1_FORMAT_SHIFT, 705 CMPCI_REG_CH1_FORMAT_MASK, md_format); 706 cmpci_reg_partial_write_4(sc, 707 CMPCI_REG_FUNC_1, CMPCI_REG_ADC_FS_SHIFT, 708 CMPCI_REG_ADC_FS_MASK, md_divide); 709 sc->sc_rec.md_divide = md_divide; 710 } 711 cmpci_set_out_ports(sc); 712 cmpci_set_in_ports(sc); 713 } 714 return 0; 715 } 716 717 /* ARGSUSED */ 718 static int 719 cmpci_round_blocksize(void *handle, int block, 720 int mode, const audio_params_t *param) 721 { 722 723 return block & -4; 724 } 725 726 static int 727 cmpci_halt_output(void *handle) 728 { 729 struct cmpci_softc *sc; 730 731 sc = handle; 732 sc->sc_play.intr = NULL; 733 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 734 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); 735 /* wait for reset DMA */ 736 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); 737 delay(10); 738 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); 739 740 return 0; 741 } 742 743 static int 744 cmpci_halt_input(void *handle) 745 { 746 struct cmpci_softc *sc; 747 748 sc = handle; 749 sc->sc_rec.intr = NULL; 750 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 751 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); 752 /* wait for reset DMA */ 753 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); 754 delay(10); 755 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); 756 757 return 0; 758 } 759 760 /* get audio device information */ 761 static int 762 cmpci_getdev(void *handle, struct audio_device *ad) 763 { 764 struct cmpci_softc *sc; 765 766 sc = handle; 767 strncpy(ad->name, "CMI PCI Audio", sizeof(ad->name)); 768 snprintf(ad->version, sizeof(ad->version), "0x%02x", 769 PCI_REVISION(sc->sc_class)); 770 switch (PCI_PRODUCT(sc->sc_id)) { 771 case PCI_PRODUCT_CMEDIA_CMI8338A: 772 strncpy(ad->config, "CMI8338A", sizeof(ad->config)); 773 break; 774 case PCI_PRODUCT_CMEDIA_CMI8338B: 775 strncpy(ad->config, "CMI8338B", sizeof(ad->config)); 776 break; 777 case PCI_PRODUCT_CMEDIA_CMI8738: 778 strncpy(ad->config, "CMI8738", sizeof(ad->config)); 779 break; 780 case PCI_PRODUCT_CMEDIA_CMI8738B: 781 strncpy(ad->config, "CMI8738B", sizeof(ad->config)); 782 break; 783 default: 784 strncpy(ad->config, "unknown", sizeof(ad->config)); 785 } 786 787 return 0; 788 } 789 790 /* mixer device information */ 791 int 792 cmpci_query_devinfo(void *handle, mixer_devinfo_t *dip) 793 { 794 static const char *const mixer_port_names[] = { 795 AudioNdac, AudioNfmsynth, AudioNcd, AudioNline, AudioNaux, 796 AudioNmicrophone 797 }; 798 static const char *const mixer_classes[] = { 799 AudioCinputs, AudioCoutputs, AudioCrecord, CmpciCplayback, 800 CmpciCspdif 801 }; 802 struct cmpci_softc *sc; 803 int i; 804 805 sc = handle; 806 dip->prev = dip->next = AUDIO_MIXER_LAST; 807 808 switch (dip->index) { 809 case CMPCI_INPUT_CLASS: 810 case CMPCI_OUTPUT_CLASS: 811 case CMPCI_RECORD_CLASS: 812 case CMPCI_PLAYBACK_CLASS: 813 case CMPCI_SPDIF_CLASS: 814 dip->type = AUDIO_MIXER_CLASS; 815 dip->mixer_class = dip->index; 816 strcpy(dip->label.name, 817 mixer_classes[dip->index - CMPCI_INPUT_CLASS]); 818 return 0; 819 820 case CMPCI_AUX_IN_VOL: 821 dip->un.v.delta = 1 << (8 - CMPCI_REG_AUX_VALBITS); 822 goto vol1; 823 case CMPCI_DAC_VOL: 824 case CMPCI_FM_VOL: 825 case CMPCI_CD_VOL: 826 case CMPCI_LINE_IN_VOL: 827 case CMPCI_MIC_VOL: 828 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS); 829 vol1: dip->mixer_class = CMPCI_INPUT_CLASS; 830 dip->next = dip->index + 6; /* CMPCI_xxx_MUTE */ 831 strcpy(dip->label.name, mixer_port_names[dip->index]); 832 dip->un.v.num_channels = (dip->index == CMPCI_MIC_VOL ? 1 : 2); 833 vol: 834 dip->type = AUDIO_MIXER_VALUE; 835 strcpy(dip->un.v.units.name, AudioNvolume); 836 return 0; 837 838 case CMPCI_MIC_MUTE: 839 dip->next = CMPCI_MIC_PREAMP; 840 /* FALLTHROUGH */ 841 case CMPCI_DAC_MUTE: 842 case CMPCI_FM_MUTE: 843 case CMPCI_CD_MUTE: 844 case CMPCI_LINE_IN_MUTE: 845 case CMPCI_AUX_IN_MUTE: 846 dip->prev = dip->index - 6; /* CMPCI_xxx_VOL */ 847 dip->mixer_class = CMPCI_INPUT_CLASS; 848 strcpy(dip->label.name, AudioNmute); 849 goto on_off; 850 on_off: 851 dip->type = AUDIO_MIXER_ENUM; 852 dip->un.e.num_mem = 2; 853 strcpy(dip->un.e.member[0].label.name, AudioNoff); 854 dip->un.e.member[0].ord = 0; 855 strcpy(dip->un.e.member[1].label.name, AudioNon); 856 dip->un.e.member[1].ord = 1; 857 return 0; 858 859 case CMPCI_MIC_PREAMP: 860 dip->mixer_class = CMPCI_INPUT_CLASS; 861 dip->prev = CMPCI_MIC_MUTE; 862 strcpy(dip->label.name, AudioNpreamp); 863 goto on_off; 864 case CMPCI_PCSPEAKER: 865 dip->mixer_class = CMPCI_INPUT_CLASS; 866 strcpy(dip->label.name, AudioNspeaker); 867 dip->un.v.num_channels = 1; 868 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_SPEAKER_VALBITS); 869 goto vol; 870 case CMPCI_RECORD_SOURCE: 871 dip->mixer_class = CMPCI_RECORD_CLASS; 872 strcpy(dip->label.name, AudioNsource); 873 dip->type = AUDIO_MIXER_SET; 874 dip->un.s.num_mem = 7; 875 strcpy(dip->un.s.member[0].label.name, AudioNmicrophone); 876 dip->un.s.member[0].mask = CMPCI_RECORD_SOURCE_MIC; 877 strcpy(dip->un.s.member[1].label.name, AudioNcd); 878 dip->un.s.member[1].mask = CMPCI_RECORD_SOURCE_CD; 879 strcpy(dip->un.s.member[2].label.name, AudioNline); 880 dip->un.s.member[2].mask = CMPCI_RECORD_SOURCE_LINE_IN; 881 strcpy(dip->un.s.member[3].label.name, AudioNaux); 882 dip->un.s.member[3].mask = CMPCI_RECORD_SOURCE_AUX_IN; 883 strcpy(dip->un.s.member[4].label.name, AudioNwave); 884 dip->un.s.member[4].mask = CMPCI_RECORD_SOURCE_WAVE; 885 strcpy(dip->un.s.member[5].label.name, AudioNfmsynth); 886 dip->un.s.member[5].mask = CMPCI_RECORD_SOURCE_FM; 887 strcpy(dip->un.s.member[6].label.name, CmpciNspdif); 888 dip->un.s.member[6].mask = CMPCI_RECORD_SOURCE_SPDIF; 889 return 0; 890 case CMPCI_MIC_RECVOL: 891 dip->mixer_class = CMPCI_RECORD_CLASS; 892 strcpy(dip->label.name, AudioNmicrophone); 893 dip->un.v.num_channels = 1; 894 dip->un.v.delta = 1 << (8 - CMPCI_REG_ADMIC_VALBITS); 895 goto vol; 896 897 case CMPCI_PLAYBACK_MODE: 898 dip->mixer_class = CMPCI_PLAYBACK_CLASS; 899 dip->type = AUDIO_MIXER_ENUM; 900 strcpy(dip->label.name, AudioNmode); 901 dip->un.e.num_mem = 2; 902 strcpy(dip->un.e.member[0].label.name, AudioNdac); 903 dip->un.e.member[0].ord = CMPCI_PLAYBACK_MODE_WAVE; 904 strcpy(dip->un.e.member[1].label.name, CmpciNspdif); 905 dip->un.e.member[1].ord = CMPCI_PLAYBACK_MODE_SPDIF; 906 return 0; 907 case CMPCI_SPDIF_IN_SELECT: 908 dip->mixer_class = CMPCI_SPDIF_CLASS; 909 dip->type = AUDIO_MIXER_ENUM; 910 dip->next = CMPCI_SPDIF_IN_PHASE; 911 strcpy(dip->label.name, AudioNinput); 912 i = 0; 913 strcpy(dip->un.e.member[i].label.name, CmpciNspdin1); 914 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN1; 915 if (CMPCI_ISCAP(sc, 2ND_SPDIN)) { 916 strcpy(dip->un.e.member[i].label.name, CmpciNspdin2); 917 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN2; 918 } 919 strcpy(dip->un.e.member[i].label.name, CmpciNspdout); 920 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDOUT; 921 dip->un.e.num_mem = i; 922 return 0; 923 case CMPCI_SPDIF_IN_PHASE: 924 dip->mixer_class = CMPCI_SPDIF_CLASS; 925 dip->prev = CMPCI_SPDIF_IN_SELECT; 926 strcpy(dip->label.name, CmpciNphase); 927 dip->type = AUDIO_MIXER_ENUM; 928 dip->un.e.num_mem = 2; 929 strcpy(dip->un.e.member[0].label.name, CmpciNpositive); 930 dip->un.e.member[0].ord = CMPCI_SPDIF_IN_PHASE_POSITIVE; 931 strcpy(dip->un.e.member[1].label.name, CmpciNnegative); 932 dip->un.e.member[1].ord = CMPCI_SPDIF_IN_PHASE_NEGATIVE; 933 return 0; 934 case CMPCI_SPDIF_LOOP: 935 dip->mixer_class = CMPCI_SPDIF_CLASS; 936 dip->next = CMPCI_SPDIF_OUT_PLAYBACK; 937 strcpy(dip->label.name, AudioNoutput); 938 dip->type = AUDIO_MIXER_ENUM; 939 dip->un.e.num_mem = 2; 940 strcpy(dip->un.e.member[0].label.name, CmpciNplayback); 941 dip->un.e.member[0].ord = CMPCI_SPDIF_LOOP_OFF; 942 strcpy(dip->un.e.member[1].label.name, CmpciNspdin); 943 dip->un.e.member[1].ord = CMPCI_SPDIF_LOOP_ON; 944 return 0; 945 case CMPCI_SPDIF_OUT_PLAYBACK: 946 dip->mixer_class = CMPCI_SPDIF_CLASS; 947 dip->prev = CMPCI_SPDIF_LOOP; 948 dip->next = CMPCI_SPDIF_OUT_VOLTAGE; 949 strcpy(dip->label.name, CmpciNplayback); 950 dip->type = AUDIO_MIXER_ENUM; 951 dip->un.e.num_mem = 2; 952 strcpy(dip->un.e.member[0].label.name, AudioNwave); 953 dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_PLAYBACK_WAVE; 954 strcpy(dip->un.e.member[1].label.name, CmpciNlegacy); 955 dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_PLAYBACK_LEGACY; 956 return 0; 957 case CMPCI_SPDIF_OUT_VOLTAGE: 958 dip->mixer_class = CMPCI_SPDIF_CLASS; 959 dip->prev = CMPCI_SPDIF_OUT_PLAYBACK; 960 strcpy(dip->label.name, CmpciNvoltage); 961 dip->type = AUDIO_MIXER_ENUM; 962 dip->un.e.num_mem = 2; 963 strcpy(dip->un.e.member[0].label.name, CmpciNhigh_v); 964 dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_VOLTAGE_HIGH; 965 strcpy(dip->un.e.member[1].label.name, CmpciNlow_v); 966 dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_VOLTAGE_LOW; 967 return 0; 968 case CMPCI_MONITOR_DAC: 969 dip->mixer_class = CMPCI_SPDIF_CLASS; 970 strcpy(dip->label.name, AudioNmonitor); 971 dip->type = AUDIO_MIXER_ENUM; 972 dip->un.e.num_mem = 3; 973 strcpy(dip->un.e.member[0].label.name, AudioNoff); 974 dip->un.e.member[0].ord = CMPCI_MONITOR_DAC_OFF; 975 strcpy(dip->un.e.member[1].label.name, CmpciNspdin); 976 dip->un.e.member[1].ord = CMPCI_MONITOR_DAC_SPDIN; 977 strcpy(dip->un.e.member[2].label.name, CmpciNspdout); 978 dip->un.e.member[2].ord = CMPCI_MONITOR_DAC_SPDOUT; 979 return 0; 980 981 case CMPCI_MASTER_VOL: 982 dip->mixer_class = CMPCI_OUTPUT_CLASS; 983 strcpy(dip->label.name, AudioNmaster); 984 dip->un.v.num_channels = 2; 985 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS); 986 goto vol; 987 case CMPCI_REAR: 988 dip->mixer_class = CMPCI_OUTPUT_CLASS; 989 dip->next = CMPCI_INDIVIDUAL; 990 strcpy(dip->label.name, CmpciNrear); 991 goto on_off; 992 case CMPCI_INDIVIDUAL: 993 dip->mixer_class = CMPCI_OUTPUT_CLASS; 994 dip->prev = CMPCI_REAR; 995 dip->next = CMPCI_REVERSE; 996 strcpy(dip->label.name, CmpciNindividual); 997 goto on_off; 998 case CMPCI_REVERSE: 999 dip->mixer_class = CMPCI_OUTPUT_CLASS; 1000 dip->prev = CMPCI_INDIVIDUAL; 1001 strcpy(dip->label.name, CmpciNreverse); 1002 goto on_off; 1003 case CMPCI_SURROUND: 1004 dip->mixer_class = CMPCI_OUTPUT_CLASS; 1005 strcpy(dip->label.name, CmpciNsurround); 1006 goto on_off; 1007 } 1008 1009 return ENXIO; 1010 } 1011 1012 static int 1013 cmpci_alloc_dmamem(struct cmpci_softc *sc, size_t size, void **r_addr) 1014 { 1015 int error; 1016 struct cmpci_dmanode *n; 1017 1018 error = 0; 1019 n = kmem_alloc(sizeof(*n), KM_SLEEP); 1020 1021 #define CMPCI_DMABUF_ALIGN 0x4 1022 #define CMPCI_DMABUF_BOUNDARY 0x0 1023 n->cd_tag = sc->sc_dmat; 1024 n->cd_size = size; 1025 error = bus_dmamem_alloc(n->cd_tag, n->cd_size, 1026 CMPCI_DMABUF_ALIGN, CMPCI_DMABUF_BOUNDARY, n->cd_segs, 1027 sizeof(n->cd_segs)/sizeof(n->cd_segs[0]), &n->cd_nsegs, 1028 BUS_DMA_WAITOK); 1029 if (error) 1030 goto mfree; 1031 error = bus_dmamem_map(n->cd_tag, n->cd_segs, n->cd_nsegs, n->cd_size, 1032 &n->cd_addr, BUS_DMA_WAITOK | BUS_DMA_COHERENT); 1033 if (error) 1034 goto dmafree; 1035 error = bus_dmamap_create(n->cd_tag, n->cd_size, 1, n->cd_size, 0, 1036 BUS_DMA_WAITOK, &n->cd_map); 1037 if (error) 1038 goto unmap; 1039 error = bus_dmamap_load(n->cd_tag, n->cd_map, n->cd_addr, n->cd_size, 1040 NULL, BUS_DMA_WAITOK); 1041 if (error) 1042 goto destroy; 1043 1044 n->cd_next = sc->sc_dmap; 1045 sc->sc_dmap = n; 1046 *r_addr = KVADDR(n); 1047 return 0; 1048 1049 destroy: 1050 bus_dmamap_destroy(n->cd_tag, n->cd_map); 1051 unmap: 1052 bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size); 1053 dmafree: 1054 bus_dmamem_free(n->cd_tag, 1055 n->cd_segs, sizeof(n->cd_segs)/sizeof(n->cd_segs[0])); 1056 mfree: 1057 kmem_free(n, sizeof(*n)); 1058 return error; 1059 } 1060 1061 static int 1062 cmpci_free_dmamem(struct cmpci_softc *sc, void *addr, size_t size) 1063 { 1064 struct cmpci_dmanode **nnp; 1065 1066 for (nnp = &sc->sc_dmap; *nnp; nnp= &(*nnp)->cd_next) { 1067 if ((*nnp)->cd_addr == addr) { 1068 struct cmpci_dmanode *n = *nnp; 1069 bus_dmamap_unload(n->cd_tag, n->cd_map); 1070 bus_dmamap_destroy(n->cd_tag, n->cd_map); 1071 bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size); 1072 bus_dmamem_free(n->cd_tag, n->cd_segs, 1073 sizeof(n->cd_segs)/sizeof(n->cd_segs[0])); 1074 kmem_free(n, sizeof(*n)); 1075 return 0; 1076 } 1077 } 1078 return -1; 1079 } 1080 1081 static struct cmpci_dmanode * 1082 cmpci_find_dmamem(struct cmpci_softc *sc, void *addr) 1083 { 1084 struct cmpci_dmanode *p; 1085 1086 for (p = sc->sc_dmap; p; p = p->cd_next) 1087 if (KVADDR(p) == (void *)addr) 1088 break; 1089 return p; 1090 } 1091 1092 #if 0 1093 static void 1094 cmpci_print_dmamem(struct cmpci_dmanode *); 1095 static void 1096 cmpci_print_dmamem(struct cmpci_dmanode *p) 1097 { 1098 1099 DPRINTF(("DMA at virt:%p, dmaseg:%p, mapseg:%p, size:%p\n", 1100 (void *)p->cd_addr, (void *)p->cd_segs[0].ds_addr, 1101 (void *)DMAADDR(p), (void *)p->cd_size)); 1102 } 1103 #endif /* DEBUG */ 1104 1105 static void * 1106 cmpci_allocm(void *handle, int direction, size_t size) 1107 { 1108 void *addr; 1109 1110 addr = NULL; /* XXX gcc */ 1111 1112 if (cmpci_alloc_dmamem(handle, size, &addr)) 1113 return NULL; 1114 return addr; 1115 } 1116 1117 static void 1118 cmpci_freem(void *handle, void *addr, size_t size) 1119 { 1120 1121 cmpci_free_dmamem(handle, addr, size); 1122 } 1123 1124 #define MAXVAL 256 1125 static int 1126 cmpci_adjust(int val, int mask) 1127 { 1128 1129 val += (MAXVAL - mask) >> 1; 1130 if (val >= MAXVAL) 1131 val = MAXVAL-1; 1132 return val & mask; 1133 } 1134 1135 static void 1136 cmpci_set_mixer_gain(struct cmpci_softc *sc, int port) 1137 { 1138 int src; 1139 int bits, mask; 1140 1141 switch (port) { 1142 case CMPCI_MIC_VOL: 1143 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_MIC, 1144 CMPCI_ADJUST_MIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1145 return; 1146 case CMPCI_MASTER_VOL: 1147 src = CMPCI_SB16_MIXER_MASTER_L; 1148 break; 1149 case CMPCI_LINE_IN_VOL: 1150 src = CMPCI_SB16_MIXER_LINE_L; 1151 break; 1152 case CMPCI_AUX_IN_VOL: 1153 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MIXER_AUX, 1154 CMPCI_ADJUST_AUX_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT], 1155 sc->sc_gain[port][CMPCI_RIGHT])); 1156 return; 1157 case CMPCI_MIC_RECVOL: 1158 cmpci_reg_partial_write_1(sc, CMPCI_REG_MIXER25, 1159 CMPCI_REG_ADMIC_SHIFT, CMPCI_REG_ADMIC_MASK, 1160 CMPCI_ADJUST_ADMIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1161 return; 1162 case CMPCI_DAC_VOL: 1163 src = CMPCI_SB16_MIXER_VOICE_L; 1164 break; 1165 case CMPCI_FM_VOL: 1166 src = CMPCI_SB16_MIXER_FM_L; 1167 break; 1168 case CMPCI_CD_VOL: 1169 src = CMPCI_SB16_MIXER_CDDA_L; 1170 break; 1171 case CMPCI_PCSPEAKER: 1172 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_SPEAKER, 1173 CMPCI_ADJUST_2_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1174 return; 1175 case CMPCI_MIC_PREAMP: 1176 if (sc->sc_gain[port][CMPCI_LR]) 1177 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1178 CMPCI_REG_MICGAINZ); 1179 else 1180 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1181 CMPCI_REG_MICGAINZ); 1182 return; 1183 1184 case CMPCI_DAC_MUTE: 1185 if (sc->sc_gain[port][CMPCI_LR]) 1186 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1187 CMPCI_REG_WSMUTE); 1188 else 1189 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1190 CMPCI_REG_WSMUTE); 1191 return; 1192 case CMPCI_FM_MUTE: 1193 if (sc->sc_gain[port][CMPCI_LR]) 1194 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1195 CMPCI_REG_FMMUTE); 1196 else 1197 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1198 CMPCI_REG_FMMUTE); 1199 return; 1200 case CMPCI_AUX_IN_MUTE: 1201 if (sc->sc_gain[port][CMPCI_LR]) 1202 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1203 CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM); 1204 else 1205 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1206 CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM); 1207 return; 1208 case CMPCI_CD_MUTE: 1209 mask = CMPCI_SB16_SW_CD; 1210 goto sbmute; 1211 case CMPCI_MIC_MUTE: 1212 mask = CMPCI_SB16_SW_MIC; 1213 goto sbmute; 1214 case CMPCI_LINE_IN_MUTE: 1215 mask = CMPCI_SB16_SW_LINE; 1216 sbmute: 1217 bits = cmpci_mixerreg_read(sc, CMPCI_SB16_MIXER_OUTMIX); 1218 if (sc->sc_gain[port][CMPCI_LR]) 1219 bits = bits & ~mask; 1220 else 1221 bits = bits | mask; 1222 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, bits); 1223 return; 1224 1225 case CMPCI_SPDIF_IN_SELECT: 1226 case CMPCI_MONITOR_DAC: 1227 case CMPCI_PLAYBACK_MODE: 1228 case CMPCI_SPDIF_LOOP: 1229 case CMPCI_SPDIF_OUT_PLAYBACK: 1230 cmpci_set_out_ports(sc); 1231 return; 1232 case CMPCI_SPDIF_OUT_VOLTAGE: 1233 if (CMPCI_ISCAP(sc, SPDOUT_VOLTAGE)) { 1234 if (sc->sc_gain[CMPCI_SPDIF_OUT_VOLTAGE][CMPCI_LR] 1235 == CMPCI_SPDIF_OUT_VOLTAGE_HIGH) 1236 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_5V); 1237 else 1238 cmpci_reg_set_reg_misc(sc, CMPCI_REG_5V); 1239 } 1240 return; 1241 case CMPCI_SURROUND: 1242 if (CMPCI_ISCAP(sc, SURROUND)) { 1243 if (sc->sc_gain[CMPCI_SURROUND][CMPCI_LR]) 1244 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1245 CMPCI_REG_SURROUND); 1246 else 1247 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1248 CMPCI_REG_SURROUND); 1249 } 1250 return; 1251 case CMPCI_REAR: 1252 if (CMPCI_ISCAP(sc, REAR)) { 1253 if (sc->sc_gain[CMPCI_REAR][CMPCI_LR]) 1254 cmpci_reg_set_reg_misc(sc, CMPCI_REG_N4SPK3D); 1255 else 1256 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_N4SPK3D); 1257 } 1258 return; 1259 case CMPCI_INDIVIDUAL: 1260 if (CMPCI_ISCAP(sc, INDIVIDUAL_REAR)) { 1261 if (sc->sc_gain[CMPCI_REAR][CMPCI_LR]) 1262 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1263 CMPCI_REG_INDIVIDUAL); 1264 else 1265 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1266 CMPCI_REG_INDIVIDUAL); 1267 } 1268 return; 1269 case CMPCI_REVERSE: 1270 if (CMPCI_ISCAP(sc, REVERSE_FR)) { 1271 if (sc->sc_gain[CMPCI_REVERSE][CMPCI_LR]) 1272 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1273 CMPCI_REG_REVERSE_FR); 1274 else 1275 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1276 CMPCI_REG_REVERSE_FR); 1277 } 1278 return; 1279 case CMPCI_SPDIF_IN_PHASE: 1280 if (CMPCI_ISCAP(sc, SPDIN_PHASE)) { 1281 if (sc->sc_gain[CMPCI_SPDIF_IN_PHASE][CMPCI_LR] 1282 == CMPCI_SPDIF_IN_PHASE_POSITIVE) 1283 cmpci_reg_clear_1(sc, CMPCI_REG_CHANNEL_FORMAT, 1284 CMPCI_REG_SPDIN_PHASE); 1285 else 1286 cmpci_reg_set_1(sc, CMPCI_REG_CHANNEL_FORMAT, 1287 CMPCI_REG_SPDIN_PHASE); 1288 } 1289 return; 1290 default: 1291 return; 1292 } 1293 1294 cmpci_mixerreg_write(sc, src, 1295 CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT])); 1296 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_L_TO_R(src), 1297 CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_RIGHT])); 1298 } 1299 1300 static void 1301 cmpci_set_out_ports(struct cmpci_softc *sc) 1302 { 1303 uint8_t v; 1304 int enspdout; 1305 1306 if (!CMPCI_ISCAP(sc, SPDLOOP)) 1307 return; 1308 1309 /* SPDIF/out select */ 1310 if (sc->sc_gain[CMPCI_SPDIF_LOOP][CMPCI_LR] == CMPCI_SPDIF_LOOP_OFF) { 1311 /* playback */ 1312 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP); 1313 } else { 1314 /* monitor SPDIF/in */ 1315 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP); 1316 } 1317 1318 /* SPDIF in select */ 1319 v = sc->sc_gain[CMPCI_SPDIF_IN_SELECT][CMPCI_LR]; 1320 if (v & CMPCI_SPDIFIN_SPDIFIN2) 1321 cmpci_reg_set_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN); 1322 else 1323 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN); 1324 if (v & CMPCI_SPDIFIN_SPDIFOUT) 1325 cmpci_reg_set_reg_misc(sc, CMPCI_REG_SPDFLOOPI); 1326 else 1327 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPDFLOOPI); 1328 1329 enspdout = 0; 1330 /* playback to ... */ 1331 if (CMPCI_ISCAP(sc, SPDOUT) && 1332 sc->sc_gain[CMPCI_PLAYBACK_MODE][CMPCI_LR] 1333 == CMPCI_PLAYBACK_MODE_SPDIF && 1334 (sc->sc_play.md_divide == CMPCI_REG_RATE_44100 || 1335 (CMPCI_ISCAP(sc, SPDOUT_48K) && 1336 sc->sc_play.md_divide==CMPCI_REG_RATE_48000))) { 1337 /* playback to SPDIF */ 1338 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE); 1339 enspdout = 1; 1340 if (sc->sc_play.md_divide==CMPCI_REG_RATE_48000) 1341 cmpci_reg_set_reg_misc(sc, 1342 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1343 else 1344 cmpci_reg_clear_reg_misc(sc, 1345 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1346 } else { 1347 /* playback to DAC */ 1348 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, 1349 CMPCI_REG_SPDIF0_ENABLE); 1350 if (CMPCI_ISCAP(sc, SPDOUT_48K)) 1351 cmpci_reg_clear_reg_misc(sc, 1352 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1353 } 1354 1355 /* legacy to SPDIF/out or not */ 1356 if (CMPCI_ISCAP(sc, SPDLEGACY)) { 1357 if (sc->sc_gain[CMPCI_SPDIF_OUT_PLAYBACK][CMPCI_LR] 1358 == CMPCI_SPDIF_OUT_PLAYBACK_WAVE) 1359 cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL, 1360 CMPCI_REG_LEGACY_SPDIF_ENABLE); 1361 else { 1362 cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL, 1363 CMPCI_REG_LEGACY_SPDIF_ENABLE); 1364 enspdout = 1; 1365 } 1366 } 1367 1368 /* enable/disable SPDIF/out */ 1369 if (CMPCI_ISCAP(sc, XSPDOUT) && enspdout) 1370 cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL, 1371 CMPCI_REG_XSPDIF_ENABLE); 1372 else 1373 cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL, 1374 CMPCI_REG_XSPDIF_ENABLE); 1375 1376 /* SPDIF monitor (digital to analog output) */ 1377 if (CMPCI_ISCAP(sc, SPDIN_MONITOR)) { 1378 v = sc->sc_gain[CMPCI_MONITOR_DAC][CMPCI_LR]; 1379 if (!(v & CMPCI_MONDAC_ENABLE)) 1380 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1381 CMPCI_REG_SPDIN_MONITOR); 1382 if (v & CMPCI_MONDAC_SPDOUT) 1383 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, 1384 CMPCI_REG_SPDIFOUT_DAC); 1385 else 1386 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, 1387 CMPCI_REG_SPDIFOUT_DAC); 1388 if (v & CMPCI_MONDAC_ENABLE) 1389 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1390 CMPCI_REG_SPDIN_MONITOR); 1391 } 1392 } 1393 1394 static int 1395 cmpci_set_in_ports(struct cmpci_softc *sc) 1396 { 1397 int mask; 1398 int bitsl, bitsr; 1399 1400 mask = sc->sc_in_mask; 1401 1402 /* 1403 * Note CMPCI_RECORD_SOURCE_CD, CMPCI_RECORD_SOURCE_LINE_IN and 1404 * CMPCI_RECORD_SOURCE_FM are defined to the corresponding bit 1405 * of the mixer register. 1406 */ 1407 bitsr = mask & (CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN | 1408 CMPCI_RECORD_SOURCE_FM); 1409 1410 bitsl = CMPCI_SB16_MIXER_SRC_R_TO_L(bitsr); 1411 if (mask & CMPCI_RECORD_SOURCE_MIC) { 1412 bitsl |= CMPCI_SB16_MIXER_MIC_SRC; 1413 bitsr |= CMPCI_SB16_MIXER_MIC_SRC; 1414 } 1415 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, bitsl); 1416 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, bitsr); 1417 1418 if (mask & CMPCI_RECORD_SOURCE_AUX_IN) 1419 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1420 CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN); 1421 else 1422 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1423 CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN); 1424 1425 if (mask & CMPCI_RECORD_SOURCE_WAVE) 1426 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1427 CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR); 1428 else 1429 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1430 CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR); 1431 1432 if (CMPCI_ISCAP(sc, SPDIN) && 1433 (sc->sc_rec.md_divide == CMPCI_REG_RATE_44100 || 1434 (CMPCI_ISCAP(sc, SPDOUT_48K) && 1435 sc->sc_rec.md_divide == CMPCI_REG_RATE_48000/* XXX? */))) { 1436 if (mask & CMPCI_RECORD_SOURCE_SPDIF) { 1437 /* enable SPDIF/in */ 1438 cmpci_reg_set_4(sc, 1439 CMPCI_REG_FUNC_1, 1440 CMPCI_REG_SPDIF1_ENABLE); 1441 } else { 1442 cmpci_reg_clear_4(sc, 1443 CMPCI_REG_FUNC_1, 1444 CMPCI_REG_SPDIF1_ENABLE); 1445 } 1446 } 1447 1448 return 0; 1449 } 1450 1451 static int 1452 cmpci_set_port(void *handle, mixer_ctrl_t *cp) 1453 { 1454 struct cmpci_softc *sc; 1455 int lgain, rgain; 1456 1457 sc = handle; 1458 switch (cp->dev) { 1459 case CMPCI_MIC_VOL: 1460 case CMPCI_PCSPEAKER: 1461 case CMPCI_MIC_RECVOL: 1462 if (cp->un.value.num_channels != 1) 1463 return EINVAL; 1464 /* FALLTHROUGH */ 1465 case CMPCI_DAC_VOL: 1466 case CMPCI_FM_VOL: 1467 case CMPCI_CD_VOL: 1468 case CMPCI_LINE_IN_VOL: 1469 case CMPCI_AUX_IN_VOL: 1470 case CMPCI_MASTER_VOL: 1471 if (cp->type != AUDIO_MIXER_VALUE) 1472 return EINVAL; 1473 switch (cp->un.value.num_channels) { 1474 case 1: 1475 lgain = rgain = 1476 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]; 1477 break; 1478 case 2: 1479 lgain = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]; 1480 rgain = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]; 1481 break; 1482 default: 1483 return EINVAL; 1484 } 1485 sc->sc_gain[cp->dev][CMPCI_LEFT] = lgain; 1486 sc->sc_gain[cp->dev][CMPCI_RIGHT] = rgain; 1487 1488 cmpci_set_mixer_gain(sc, cp->dev); 1489 break; 1490 1491 case CMPCI_RECORD_SOURCE: 1492 if (cp->type != AUDIO_MIXER_SET) 1493 return EINVAL; 1494 1495 if (cp->un.mask & ~(CMPCI_RECORD_SOURCE_MIC | 1496 CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN | 1497 CMPCI_RECORD_SOURCE_AUX_IN | CMPCI_RECORD_SOURCE_WAVE | 1498 CMPCI_RECORD_SOURCE_FM | CMPCI_RECORD_SOURCE_SPDIF)) 1499 return EINVAL; 1500 1501 if (cp->un.mask & CMPCI_RECORD_SOURCE_SPDIF) 1502 cp->un.mask = CMPCI_RECORD_SOURCE_SPDIF; 1503 1504 sc->sc_in_mask = cp->un.mask; 1505 return cmpci_set_in_ports(sc); 1506 1507 /* boolean */ 1508 case CMPCI_DAC_MUTE: 1509 case CMPCI_FM_MUTE: 1510 case CMPCI_CD_MUTE: 1511 case CMPCI_LINE_IN_MUTE: 1512 case CMPCI_AUX_IN_MUTE: 1513 case CMPCI_MIC_MUTE: 1514 case CMPCI_MIC_PREAMP: 1515 case CMPCI_PLAYBACK_MODE: 1516 case CMPCI_SPDIF_IN_PHASE: 1517 case CMPCI_SPDIF_LOOP: 1518 case CMPCI_SPDIF_OUT_PLAYBACK: 1519 case CMPCI_SPDIF_OUT_VOLTAGE: 1520 case CMPCI_REAR: 1521 case CMPCI_INDIVIDUAL: 1522 case CMPCI_REVERSE: 1523 case CMPCI_SURROUND: 1524 if (cp->type != AUDIO_MIXER_ENUM) 1525 return EINVAL; 1526 sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord != 0; 1527 cmpci_set_mixer_gain(sc, cp->dev); 1528 break; 1529 1530 case CMPCI_SPDIF_IN_SELECT: 1531 switch (cp->un.ord) { 1532 case CMPCI_SPDIF_IN_SPDIN1: 1533 case CMPCI_SPDIF_IN_SPDIN2: 1534 case CMPCI_SPDIF_IN_SPDOUT: 1535 break; 1536 default: 1537 return EINVAL; 1538 } 1539 goto xenum; 1540 case CMPCI_MONITOR_DAC: 1541 switch (cp->un.ord) { 1542 case CMPCI_MONITOR_DAC_OFF: 1543 case CMPCI_MONITOR_DAC_SPDIN: 1544 case CMPCI_MONITOR_DAC_SPDOUT: 1545 break; 1546 default: 1547 return EINVAL; 1548 } 1549 xenum: 1550 if (cp->type != AUDIO_MIXER_ENUM) 1551 return EINVAL; 1552 sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord; 1553 cmpci_set_mixer_gain(sc, cp->dev); 1554 break; 1555 1556 default: 1557 return EINVAL; 1558 } 1559 1560 return 0; 1561 } 1562 1563 static int 1564 cmpci_get_port(void *handle, mixer_ctrl_t *cp) 1565 { 1566 struct cmpci_softc *sc; 1567 1568 sc = handle; 1569 switch (cp->dev) { 1570 case CMPCI_MIC_VOL: 1571 case CMPCI_PCSPEAKER: 1572 case CMPCI_MIC_RECVOL: 1573 if (cp->un.value.num_channels != 1) 1574 return EINVAL; 1575 /*FALLTHROUGH*/ 1576 case CMPCI_DAC_VOL: 1577 case CMPCI_FM_VOL: 1578 case CMPCI_CD_VOL: 1579 case CMPCI_LINE_IN_VOL: 1580 case CMPCI_AUX_IN_VOL: 1581 case CMPCI_MASTER_VOL: 1582 switch (cp->un.value.num_channels) { 1583 case 1: 1584 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = 1585 sc->sc_gain[cp->dev][CMPCI_LEFT]; 1586 break; 1587 case 2: 1588 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 1589 sc->sc_gain[cp->dev][CMPCI_LEFT]; 1590 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 1591 sc->sc_gain[cp->dev][CMPCI_RIGHT]; 1592 break; 1593 default: 1594 return EINVAL; 1595 } 1596 break; 1597 1598 case CMPCI_RECORD_SOURCE: 1599 cp->un.mask = sc->sc_in_mask; 1600 break; 1601 1602 case CMPCI_DAC_MUTE: 1603 case CMPCI_FM_MUTE: 1604 case CMPCI_CD_MUTE: 1605 case CMPCI_LINE_IN_MUTE: 1606 case CMPCI_AUX_IN_MUTE: 1607 case CMPCI_MIC_MUTE: 1608 case CMPCI_MIC_PREAMP: 1609 case CMPCI_PLAYBACK_MODE: 1610 case CMPCI_SPDIF_IN_SELECT: 1611 case CMPCI_SPDIF_IN_PHASE: 1612 case CMPCI_SPDIF_LOOP: 1613 case CMPCI_SPDIF_OUT_PLAYBACK: 1614 case CMPCI_SPDIF_OUT_VOLTAGE: 1615 case CMPCI_MONITOR_DAC: 1616 case CMPCI_REAR: 1617 case CMPCI_INDIVIDUAL: 1618 case CMPCI_REVERSE: 1619 case CMPCI_SURROUND: 1620 cp->un.ord = sc->sc_gain[cp->dev][CMPCI_LR]; 1621 break; 1622 1623 default: 1624 return EINVAL; 1625 } 1626 1627 return 0; 1628 } 1629 1630 /* ARGSUSED */ 1631 static size_t 1632 cmpci_round_buffersize(void *handle, int direction, 1633 size_t bufsize) 1634 { 1635 1636 if (bufsize > 0x10000) 1637 bufsize = 0x10000; 1638 1639 return bufsize; 1640 } 1641 1642 static paddr_t 1643 cmpci_mappage(void *handle, void *addr, off_t offset, int prot) 1644 { 1645 struct cmpci_dmanode *p; 1646 1647 if (offset < 0 || NULL == (p = cmpci_find_dmamem(handle, addr))) 1648 return -1; 1649 1650 return bus_dmamem_mmap(p->cd_tag, p->cd_segs, 1651 sizeof(p->cd_segs)/sizeof(p->cd_segs[0]), 1652 offset, prot, BUS_DMA_WAITOK); 1653 } 1654 1655 /* ARGSUSED */ 1656 static int 1657 cmpci_get_props(void *handle) 1658 { 1659 1660 return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 1661 } 1662 1663 static int 1664 cmpci_trigger_output(void *handle, void *start, void *end, int blksize, 1665 void (*intr)(void *), void *arg, 1666 const audio_params_t *param) 1667 { 1668 struct cmpci_softc *sc; 1669 struct cmpci_dmanode *p; 1670 int bps; 1671 1672 sc = handle; 1673 sc->sc_play.intr = intr; 1674 sc->sc_play.intr_arg = arg; 1675 bps = param->channels * param->precision / 8; 1676 if (!bps) 1677 return EINVAL; 1678 1679 /* set DMA frame */ 1680 if (!(p = cmpci_find_dmamem(sc, start))) 1681 return EINVAL; 1682 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BASE, 1683 DMAADDR(p)); 1684 delay(10); 1685 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BYTES, 1686 ((char *)end - (char *)start + 1) / bps - 1); 1687 delay(10); 1688 1689 /* set interrupt count */ 1690 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_SAMPLES, 1691 (blksize + bps - 1) / bps - 1); 1692 delay(10); 1693 1694 /* start DMA */ 1695 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); /* PLAY */ 1696 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 1697 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); 1698 1699 return 0; 1700 } 1701 1702 static int 1703 cmpci_trigger_input(void *handle, void *start, void *end, int blksize, 1704 void (*intr)(void *), void *arg, 1705 const audio_params_t *param) 1706 { 1707 struct cmpci_softc *sc; 1708 struct cmpci_dmanode *p; 1709 int bps; 1710 1711 sc = handle; 1712 sc->sc_rec.intr = intr; 1713 sc->sc_rec.intr_arg = arg; 1714 bps = param->channels * param->precision / 8; 1715 if (!bps) 1716 return EINVAL; 1717 1718 /* set DMA frame */ 1719 if (!(p=cmpci_find_dmamem(sc, start))) 1720 return EINVAL; 1721 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BASE, 1722 DMAADDR(p)); 1723 delay(10); 1724 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BYTES, 1725 ((char *)end - (char *)start + 1) / bps - 1); 1726 delay(10); 1727 1728 /* set interrupt count */ 1729 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_SAMPLES, 1730 (blksize + bps - 1) / bps - 1); 1731 delay(10); 1732 1733 /* start DMA */ 1734 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_DIR); /* REC */ 1735 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 1736 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); 1737 1738 return 0; 1739 } 1740 1741 static void 1742 cmpci_get_locks(void *addr, kmutex_t **intr, kmutex_t **thread) 1743 { 1744 struct cmpci_softc *sc; 1745 1746 sc = addr; 1747 *intr = &sc->sc_intr_lock; 1748 *thread = &sc->sc_lock; 1749 } 1750 1751 /* end of file */ 1752
Indexes created Sat Sep 27 14:09:57 GMT 2025