cmpci.c revision 1.52
1 /* $NetBSD: cmpci.c,v 1.52 2019/03/16 12:09:58 isaki Exp $ */ 2 3 /* 4 * Copyright (c) 2000, 2001, 2008 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Takuya SHIOZAKI <tshiozak (at) NetBSD.org> . 9 * 10 * This code is derived from software contributed to The NetBSD Foundation 11 * by ITOH Yasufumi. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 /* 37 * C-Media CMI8x38 Audio Chip Support. 38 * 39 * TODO: 40 * - 4ch / 6ch support. 41 * - Joystick support. 42 * 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: cmpci.c,v 1.52 2019/03/16 12:09:58 isaki Exp $"); 47 48 #if defined(AUDIO_DEBUG) || defined(DEBUG) 49 #define DPRINTF(x) if (cmpcidebug) printf x 50 int cmpcidebug = 0; 51 #else 52 #define DPRINTF(x) 53 #endif 54 55 #include "mpu.h" 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/kernel.h> 60 #include <sys/kmem.h> 61 #include <sys/device.h> 62 #include <sys/proc.h> 63 64 #include <dev/pci/pcidevs.h> 65 #include <dev/pci/pcivar.h> 66 67 #include <sys/audioio.h> 68 #include <dev/audio_if.h> 69 #include <dev/midi_if.h> 70 71 #include <dev/mulaw.h> 72 #include <dev/auconv.h> 73 #include <dev/pci/cmpcireg.h> 74 #include <dev/pci/cmpcivar.h> 75 76 #include <dev/ic/mpuvar.h> 77 #include <sys/bus.h> 78 #include <sys/intr.h> 79 80 /* 81 * Low-level HW interface 82 */ 83 static inline uint8_t cmpci_mixerreg_read(struct cmpci_softc *, uint8_t); 84 static inline void cmpci_mixerreg_write(struct cmpci_softc *, 85 uint8_t, uint8_t); 86 static inline void cmpci_reg_partial_write_1(struct cmpci_softc *, int, int, 87 unsigned, unsigned); 88 static inline void cmpci_reg_partial_write_4(struct cmpci_softc *, int, int, 89 uint32_t, uint32_t); 90 static inline void cmpci_reg_set_1(struct cmpci_softc *, int, uint8_t); 91 static inline void cmpci_reg_clear_1(struct cmpci_softc *, int, uint8_t); 92 static inline void cmpci_reg_set_4(struct cmpci_softc *, int, uint32_t); 93 static inline void cmpci_reg_clear_4(struct cmpci_softc *, int, uint32_t); 94 static inline void cmpci_reg_set_reg_misc(struct cmpci_softc *, uint32_t); 95 static inline void cmpci_reg_clear_reg_misc(struct cmpci_softc *, uint32_t); 96 static int cmpci_rate_to_index(int); 97 static inline int cmpci_index_to_rate(int); 98 static inline int cmpci_index_to_divider(int); 99 100 static int cmpci_adjust(int, int); 101 static void cmpci_set_mixer_gain(struct cmpci_softc *, int); 102 static void cmpci_set_out_ports(struct cmpci_softc *); 103 static int cmpci_set_in_ports(struct cmpci_softc *); 104 105 106 /* 107 * autoconf interface 108 */ 109 static int cmpci_match(device_t, cfdata_t, void *); 110 static void cmpci_attach(device_t, device_t, void *); 111 112 CFATTACH_DECL_NEW(cmpci, sizeof (struct cmpci_softc), 113 cmpci_match, cmpci_attach, NULL, NULL); 114 115 /* interrupt */ 116 static int cmpci_intr(void *); 117 118 119 /* 120 * DMA stuffs 121 */ 122 static int cmpci_alloc_dmamem(struct cmpci_softc *, size_t, void **); 123 static int cmpci_free_dmamem(struct cmpci_softc *, void *, size_t); 124 static struct cmpci_dmanode * cmpci_find_dmamem(struct cmpci_softc *, 125 void *); 126 127 128 /* 129 * interface to machine independent layer 130 */ 131 static int cmpci_query_encoding(void *, struct audio_encoding *); 132 static int cmpci_set_params(void *, int, int, audio_params_t *, 133 audio_params_t *, stream_filter_list_t *, stream_filter_list_t *); 134 static int cmpci_round_blocksize(void *, int, int, const audio_params_t *); 135 static int cmpci_halt_output(void *); 136 static int cmpci_halt_input(void *); 137 static int cmpci_getdev(void *, struct audio_device *); 138 static int cmpci_set_port(void *, mixer_ctrl_t *); 139 static int cmpci_get_port(void *, mixer_ctrl_t *); 140 static int cmpci_query_devinfo(void *, mixer_devinfo_t *); 141 static void *cmpci_allocm(void *, int, size_t); 142 static void cmpci_freem(void *, void *, size_t); 143 static size_t cmpci_round_buffersize(void *, int, size_t); 144 static paddr_t cmpci_mappage(void *, void *, off_t, int); 145 static int cmpci_get_props(void *); 146 static int cmpci_trigger_output(void *, void *, void *, int, 147 void (*)(void *), void *, const audio_params_t *); 148 static int cmpci_trigger_input(void *, void *, void *, int, 149 void (*)(void *), void *, const audio_params_t *); 150 static void cmpci_get_locks(void *, kmutex_t **, kmutex_t **); 151 152 static const struct audio_hw_if cmpci_hw_if = { 153 .query_encoding = cmpci_query_encoding, 154 .set_params = cmpci_set_params, 155 .round_blocksize = cmpci_round_blocksize, 156 .halt_output = cmpci_halt_output, 157 .halt_input = cmpci_halt_input, 158 .getdev = cmpci_getdev, 159 .set_port = cmpci_set_port, 160 .get_port = cmpci_get_port, 161 .query_devinfo = cmpci_query_devinfo, 162 .allocm = cmpci_allocm, 163 .freem = cmpci_freem, 164 .round_buffersize = cmpci_round_buffersize, 165 .mappage = cmpci_mappage, 166 .get_props = cmpci_get_props, 167 .trigger_output = cmpci_trigger_output, 168 .trigger_input = cmpci_trigger_input, 169 .get_locks = cmpci_get_locks, 170 }; 171 172 #define CMPCI_NFORMATS 4 173 static const struct audio_format cmpci_formats[CMPCI_NFORMATS] = { 174 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 175 2, AUFMT_STEREO, 0, {5512, 48000}}, 176 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 177 1, AUFMT_MONAURAL, 0, {5512, 48000}}, 178 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8, 179 2, AUFMT_STEREO, 0, {5512, 48000}}, 180 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8, 181 1, AUFMT_MONAURAL, 0, {5512, 48000}}, 182 }; 183 184 185 /* 186 * Low-level HW interface 187 */ 188 189 /* mixer register read/write */ 190 static inline uint8_t 191 cmpci_mixerreg_read(struct cmpci_softc *sc, uint8_t no) 192 { 193 uint8_t ret; 194 195 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no); 196 delay(10); 197 ret = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA); 198 delay(10); 199 return ret; 200 } 201 202 static inline void 203 cmpci_mixerreg_write(struct cmpci_softc *sc, uint8_t no, uint8_t val) 204 { 205 206 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no); 207 delay(10); 208 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA, val); 209 delay(10); 210 } 211 212 213 /* register partial write */ 214 static inline void 215 cmpci_reg_partial_write_1(struct cmpci_softc *sc, int no, int shift, 216 unsigned mask, unsigned val) 217 { 218 219 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 220 (val<<shift) | 221 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift))); 222 delay(10); 223 } 224 225 static inline void 226 cmpci_reg_partial_write_4(struct cmpci_softc *sc, int no, int shift, 227 uint32_t mask, uint32_t val) 228 { 229 230 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 231 (val<<shift) | 232 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift))); 233 delay(10); 234 } 235 236 /* register set/clear bit */ 237 static inline void 238 cmpci_reg_set_1(struct cmpci_softc *sc, int no, uint8_t mask) 239 { 240 241 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 242 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) | mask)); 243 delay(10); 244 } 245 246 static inline void 247 cmpci_reg_clear_1(struct cmpci_softc *sc, int no, uint8_t mask) 248 { 249 250 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 251 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~mask)); 252 delay(10); 253 } 254 255 static inline void 256 cmpci_reg_set_4(struct cmpci_softc *sc, int no, uint32_t mask) 257 { 258 259 /* use cmpci_reg_set_reg_misc() for CMPCI_REG_MISC */ 260 KDASSERT(no != CMPCI_REG_MISC); 261 262 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 263 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) | mask)); 264 delay(10); 265 } 266 267 static inline void 268 cmpci_reg_clear_4(struct cmpci_softc *sc, int no, uint32_t mask) 269 { 270 271 /* use cmpci_reg_clear_reg_misc() for CMPCI_REG_MISC */ 272 KDASSERT(no != CMPCI_REG_MISC); 273 274 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 275 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~mask)); 276 delay(10); 277 } 278 279 /* 280 * The CMPCI_REG_MISC register needs special handling, since one of 281 * its bits has different read/write values. 282 */ 283 static inline void 284 cmpci_reg_set_reg_misc(struct cmpci_softc *sc, uint32_t mask) 285 { 286 287 sc->sc_reg_misc |= mask; 288 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC, 289 sc->sc_reg_misc); 290 delay(10); 291 } 292 293 static inline void 294 cmpci_reg_clear_reg_misc(struct cmpci_softc *sc, uint32_t mask) 295 { 296 297 sc->sc_reg_misc &= ~mask; 298 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC, 299 sc->sc_reg_misc); 300 delay(10); 301 } 302 303 /* rate */ 304 static const struct { 305 int rate; 306 int divider; 307 } cmpci_rate_table[CMPCI_REG_NUMRATE] = { 308 #define _RATE(n) { n, CMPCI_REG_RATE_ ## n } 309 _RATE(5512), 310 _RATE(8000), 311 _RATE(11025), 312 _RATE(16000), 313 _RATE(22050), 314 _RATE(32000), 315 _RATE(44100), 316 _RATE(48000) 317 #undef _RATE 318 }; 319 320 static int 321 cmpci_rate_to_index(int rate) 322 { 323 int i; 324 325 for (i = 0; i < CMPCI_REG_NUMRATE - 1; i++) 326 if (rate <= 327 (cmpci_rate_table[i].rate+cmpci_rate_table[i+1].rate) / 2) 328 return i; 329 return i; /* 48000 */ 330 } 331 332 static inline int 333 cmpci_index_to_rate(int index) 334 { 335 336 return cmpci_rate_table[index].rate; 337 } 338 339 static inline int 340 cmpci_index_to_divider(int index) 341 { 342 343 return cmpci_rate_table[index].divider; 344 } 345 346 /* 347 * interface to configure the device. 348 */ 349 static int 350 cmpci_match(device_t parent, cfdata_t match, void *aux) 351 { 352 struct pci_attach_args *pa; 353 354 pa = (struct pci_attach_args *)aux; 355 if ( PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CMEDIA && 356 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338A || 357 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338B || 358 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738 || 359 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738B) ) 360 return 1; 361 362 return 0; 363 } 364 365 static void 366 cmpci_attach(device_t parent, device_t self, void *aux) 367 { 368 struct cmpci_softc *sc; 369 struct pci_attach_args *pa; 370 struct audio_attach_args aa; 371 pci_intr_handle_t ih; 372 char const *strintr; 373 int i, v; 374 char intrbuf[PCI_INTRSTR_LEN]; 375 376 sc = device_private(self); 377 sc->sc_dev = self; 378 pa = (struct pci_attach_args *)aux; 379 380 sc->sc_id = pa->pa_id; 381 sc->sc_class = pa->pa_class; 382 pci_aprint_devinfo(pa, "Audio controller"); 383 switch (PCI_PRODUCT(sc->sc_id)) { 384 case PCI_PRODUCT_CMEDIA_CMI8338A: 385 /*FALLTHROUGH*/ 386 case PCI_PRODUCT_CMEDIA_CMI8338B: 387 sc->sc_capable = CMPCI_CAP_CMI8338; 388 break; 389 case PCI_PRODUCT_CMEDIA_CMI8738: 390 /*FALLTHROUGH*/ 391 case PCI_PRODUCT_CMEDIA_CMI8738B: 392 sc->sc_capable = CMPCI_CAP_CMI8738; 393 break; 394 } 395 396 /* map I/O space */ 397 if (pci_mapreg_map(pa, CMPCI_PCI_IOBASEREG, PCI_MAPREG_TYPE_IO, 0, 398 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 399 aprint_error_dev(sc->sc_dev, "failed to map I/O space\n"); 400 return; 401 } 402 403 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 404 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO); 405 406 /* interrupt */ 407 if (pci_intr_map(pa, &ih)) { 408 aprint_error_dev(sc->sc_dev, "failed to map interrupt\n"); 409 return; 410 } 411 strintr = pci_intr_string(pa->pa_pc, ih, intrbuf, sizeof(intrbuf)); 412 sc->sc_ih = pci_intr_establish_xname(pa->pa_pc, ih, IPL_AUDIO, 413 cmpci_intr, sc, device_xname(self)); 414 if (sc->sc_ih == NULL) { 415 aprint_error_dev(sc->sc_dev, "failed to establish interrupt"); 416 if (strintr != NULL) 417 aprint_error(" at %s", strintr); 418 aprint_error("\n"); 419 mutex_destroy(&sc->sc_lock); 420 mutex_destroy(&sc->sc_intr_lock); 421 return; 422 } 423 aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", strintr); 424 425 sc->sc_dmat = pa->pa_dmat; 426 427 audio_attach_mi(&cmpci_hw_if, sc, sc->sc_dev); 428 429 /* attach OPL device */ 430 aa.type = AUDIODEV_TYPE_OPL; 431 aa.hwif = NULL; 432 aa.hdl = NULL; 433 (void)config_found(sc->sc_dev, &aa, audioprint); 434 435 /* attach MPU-401 device */ 436 aa.type = AUDIODEV_TYPE_MPU; 437 aa.hwif = NULL; 438 aa.hdl = NULL; 439 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh, 440 CMPCI_REG_MPU_BASE, CMPCI_REG_MPU_SIZE, &sc->sc_mpu_ioh) == 0) 441 sc->sc_mpudev = config_found(sc->sc_dev, &aa, audioprint); 442 443 /* get initial value (this is 0 and may be omitted but just in case) */ 444 sc->sc_reg_misc = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 445 CMPCI_REG_MISC) & ~CMPCI_REG_SPDIF48K; 446 447 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_RESET, 0); 448 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0); 449 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0); 450 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, 451 CMPCI_SB16_SW_CD|CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE); 452 for (i = 0; i < CMPCI_NDEVS; i++) { 453 switch (i) { 454 /* 455 * CMI8738 defaults are 456 * master: 0xe0 (0x00 - 0xf8) 457 * FM, DAC: 0xc0 (0x00 - 0xf8) 458 * PC speaker: 0x80 (0x00 - 0xc0) 459 * others: 0 460 */ 461 /* volume */ 462 case CMPCI_MASTER_VOL: 463 v = 128; /* 224 */ 464 break; 465 case CMPCI_FM_VOL: 466 case CMPCI_DAC_VOL: 467 v = 192; 468 break; 469 case CMPCI_PCSPEAKER: 470 v = 128; 471 break; 472 473 /* booleans, set to true */ 474 case CMPCI_CD_MUTE: 475 case CMPCI_MIC_MUTE: 476 case CMPCI_LINE_IN_MUTE: 477 case CMPCI_AUX_IN_MUTE: 478 v = 1; 479 break; 480 481 /* volume with inital value 0 */ 482 case CMPCI_CD_VOL: 483 case CMPCI_LINE_IN_VOL: 484 case CMPCI_AUX_IN_VOL: 485 case CMPCI_MIC_VOL: 486 case CMPCI_MIC_RECVOL: 487 /* FALLTHROUGH */ 488 489 /* others are cleared */ 490 case CMPCI_MIC_PREAMP: 491 case CMPCI_RECORD_SOURCE: 492 case CMPCI_PLAYBACK_MODE: 493 case CMPCI_SPDIF_IN_SELECT: 494 case CMPCI_SPDIF_IN_PHASE: 495 case CMPCI_SPDIF_LOOP: 496 case CMPCI_SPDIF_OUT_PLAYBACK: 497 case CMPCI_SPDIF_OUT_VOLTAGE: 498 case CMPCI_MONITOR_DAC: 499 case CMPCI_REAR: 500 case CMPCI_INDIVIDUAL: 501 case CMPCI_REVERSE: 502 case CMPCI_SURROUND: 503 default: 504 v = 0; 505 break; 506 } 507 sc->sc_gain[i][CMPCI_LEFT] = sc->sc_gain[i][CMPCI_RIGHT] = v; 508 cmpci_set_mixer_gain(sc, i); 509 } 510 } 511 512 static int 513 cmpci_intr(void *handle) 514 { 515 struct cmpci_softc *sc = handle; 516 #if NMPU > 0 517 struct mpu_softc *sc_mpu = device_private(sc->sc_mpudev); 518 #endif 519 uint32_t intrstat; 520 521 mutex_spin_enter(&sc->sc_intr_lock); 522 523 intrstat = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 524 CMPCI_REG_INTR_STATUS); 525 526 if (!(intrstat & CMPCI_REG_ANY_INTR)) { 527 mutex_spin_exit(&sc->sc_intr_lock); 528 return 0; 529 } 530 531 delay(10); 532 533 /* disable and reset intr */ 534 if (intrstat & CMPCI_REG_CH0_INTR) 535 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, 536 CMPCI_REG_CH0_INTR_ENABLE); 537 if (intrstat & CMPCI_REG_CH1_INTR) 538 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, 539 CMPCI_REG_CH1_INTR_ENABLE); 540 541 if (intrstat & CMPCI_REG_CH0_INTR) { 542 if (sc->sc_play.intr != NULL) 543 (*sc->sc_play.intr)(sc->sc_play.intr_arg); 544 } 545 if (intrstat & CMPCI_REG_CH1_INTR) { 546 if (sc->sc_rec.intr != NULL) 547 (*sc->sc_rec.intr)(sc->sc_rec.intr_arg); 548 } 549 550 /* enable intr */ 551 if (intrstat & CMPCI_REG_CH0_INTR) 552 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, 553 CMPCI_REG_CH0_INTR_ENABLE); 554 if (intrstat & CMPCI_REG_CH1_INTR) 555 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, 556 CMPCI_REG_CH1_INTR_ENABLE); 557 558 #if NMPU > 0 559 if (intrstat & CMPCI_REG_UART_INTR && sc_mpu != NULL) 560 mpu_intr(sc_mpu); 561 #endif 562 563 mutex_spin_exit(&sc->sc_intr_lock); 564 return 1; 565 } 566 567 static int 568 cmpci_query_encoding(void *handle, struct audio_encoding *fp) 569 { 570 571 switch (fp->index) { 572 case 0: 573 strcpy(fp->name, AudioEulinear); 574 fp->encoding = AUDIO_ENCODING_ULINEAR; 575 fp->precision = 8; 576 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 577 break; 578 case 1: 579 strcpy(fp->name, AudioEmulaw); 580 fp->encoding = AUDIO_ENCODING_ULAW; 581 fp->precision = 8; 582 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 583 break; 584 case 2: 585 strcpy(fp->name, AudioEalaw); 586 fp->encoding = AUDIO_ENCODING_ALAW; 587 fp->precision = 8; 588 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 589 break; 590 case 3: 591 strcpy(fp->name, AudioEslinear); 592 fp->encoding = AUDIO_ENCODING_SLINEAR; 593 fp->precision = 8; 594 fp->flags = 0; 595 break; 596 case 4: 597 strcpy(fp->name, AudioEslinear_le); 598 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 599 fp->precision = 16; 600 fp->flags = 0; 601 break; 602 case 5: 603 strcpy(fp->name, AudioEulinear_le); 604 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 605 fp->precision = 16; 606 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 607 break; 608 case 6: 609 strcpy(fp->name, AudioEslinear_be); 610 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 611 fp->precision = 16; 612 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 613 break; 614 case 7: 615 strcpy(fp->name, AudioEulinear_be); 616 fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 617 fp->precision = 16; 618 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 619 break; 620 default: 621 return EINVAL; 622 } 623 return 0; 624 } 625 626 627 static int 628 cmpci_set_params(void *handle, int setmode, int usemode, 629 audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil, 630 stream_filter_list_t *rfil) 631 { 632 int i; 633 struct cmpci_softc *sc; 634 635 sc = handle; 636 for (i = 0; i < 2; i++) { 637 int md_format; 638 int md_divide; 639 int md_index; 640 int mode; 641 audio_params_t *p; 642 stream_filter_list_t *fil; 643 int ind; 644 645 switch (i) { 646 case 0: 647 mode = AUMODE_PLAY; 648 p = play; 649 fil = pfil; 650 break; 651 case 1: 652 mode = AUMODE_RECORD; 653 p = rec; 654 fil = rfil; 655 break; 656 default: 657 return EINVAL; 658 } 659 660 if (!(setmode & mode)) 661 continue; 662 663 md_index = cmpci_rate_to_index(p->sample_rate); 664 md_divide = cmpci_index_to_divider(md_index); 665 p->sample_rate = cmpci_index_to_rate(md_index); 666 DPRINTF(("%s: sample:%u, divider=%d\n", 667 device_xname(sc->sc_dev), p->sample_rate, md_divide)); 668 669 ind = auconv_set_converter(cmpci_formats, CMPCI_NFORMATS, 670 mode, p, FALSE, fil); 671 if (ind < 0) 672 return EINVAL; 673 if (fil->req_size > 0) 674 p = &fil->filters[0].param; 675 676 /* format */ 677 md_format = p->channels == 1 678 ? CMPCI_REG_FORMAT_MONO : CMPCI_REG_FORMAT_STEREO; 679 md_format |= p->precision == 16 680 ? CMPCI_REG_FORMAT_16BIT : CMPCI_REG_FORMAT_8BIT; 681 if (mode & AUMODE_PLAY) { 682 cmpci_reg_partial_write_4(sc, 683 CMPCI_REG_CHANNEL_FORMAT, 684 CMPCI_REG_CH0_FORMAT_SHIFT, 685 CMPCI_REG_CH0_FORMAT_MASK, md_format); 686 cmpci_reg_partial_write_4(sc, 687 CMPCI_REG_FUNC_1, CMPCI_REG_DAC_FS_SHIFT, 688 CMPCI_REG_DAC_FS_MASK, md_divide); 689 sc->sc_play.md_divide = md_divide; 690 } else { 691 cmpci_reg_partial_write_4(sc, 692 CMPCI_REG_CHANNEL_FORMAT, 693 CMPCI_REG_CH1_FORMAT_SHIFT, 694 CMPCI_REG_CH1_FORMAT_MASK, md_format); 695 cmpci_reg_partial_write_4(sc, 696 CMPCI_REG_FUNC_1, CMPCI_REG_ADC_FS_SHIFT, 697 CMPCI_REG_ADC_FS_MASK, md_divide); 698 sc->sc_rec.md_divide = md_divide; 699 } 700 cmpci_set_out_ports(sc); 701 cmpci_set_in_ports(sc); 702 } 703 return 0; 704 } 705 706 /* ARGSUSED */ 707 static int 708 cmpci_round_blocksize(void *handle, int block, 709 int mode, const audio_params_t *param) 710 { 711 712 return block & -4; 713 } 714 715 static int 716 cmpci_halt_output(void *handle) 717 { 718 struct cmpci_softc *sc; 719 720 sc = handle; 721 sc->sc_play.intr = NULL; 722 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 723 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); 724 /* wait for reset DMA */ 725 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); 726 delay(10); 727 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); 728 729 return 0; 730 } 731 732 static int 733 cmpci_halt_input(void *handle) 734 { 735 struct cmpci_softc *sc; 736 737 sc = handle; 738 sc->sc_rec.intr = NULL; 739 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 740 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); 741 /* wait for reset DMA */ 742 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); 743 delay(10); 744 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); 745 746 return 0; 747 } 748 749 /* get audio device information */ 750 static int 751 cmpci_getdev(void *handle, struct audio_device *ad) 752 { 753 struct cmpci_softc *sc; 754 755 sc = handle; 756 strncpy(ad->name, "CMI PCI Audio", sizeof(ad->name)); 757 snprintf(ad->version, sizeof(ad->version), "0x%02x", 758 PCI_REVISION(sc->sc_class)); 759 switch (PCI_PRODUCT(sc->sc_id)) { 760 case PCI_PRODUCT_CMEDIA_CMI8338A: 761 strncpy(ad->config, "CMI8338A", sizeof(ad->config)); 762 break; 763 case PCI_PRODUCT_CMEDIA_CMI8338B: 764 strncpy(ad->config, "CMI8338B", sizeof(ad->config)); 765 break; 766 case PCI_PRODUCT_CMEDIA_CMI8738: 767 strncpy(ad->config, "CMI8738", sizeof(ad->config)); 768 break; 769 case PCI_PRODUCT_CMEDIA_CMI8738B: 770 strncpy(ad->config, "CMI8738B", sizeof(ad->config)); 771 break; 772 default: 773 strncpy(ad->config, "unknown", sizeof(ad->config)); 774 } 775 776 return 0; 777 } 778 779 /* mixer device information */ 780 int 781 cmpci_query_devinfo(void *handle, mixer_devinfo_t *dip) 782 { 783 static const char *const mixer_port_names[] = { 784 AudioNdac, AudioNfmsynth, AudioNcd, AudioNline, AudioNaux, 785 AudioNmicrophone 786 }; 787 static const char *const mixer_classes[] = { 788 AudioCinputs, AudioCoutputs, AudioCrecord, CmpciCplayback, 789 CmpciCspdif 790 }; 791 struct cmpci_softc *sc; 792 int i; 793 794 sc = handle; 795 dip->prev = dip->next = AUDIO_MIXER_LAST; 796 797 switch (dip->index) { 798 case CMPCI_INPUT_CLASS: 799 case CMPCI_OUTPUT_CLASS: 800 case CMPCI_RECORD_CLASS: 801 case CMPCI_PLAYBACK_CLASS: 802 case CMPCI_SPDIF_CLASS: 803 dip->type = AUDIO_MIXER_CLASS; 804 dip->mixer_class = dip->index; 805 strcpy(dip->label.name, 806 mixer_classes[dip->index - CMPCI_INPUT_CLASS]); 807 return 0; 808 809 case CMPCI_AUX_IN_VOL: 810 dip->un.v.delta = 1 << (8 - CMPCI_REG_AUX_VALBITS); 811 goto vol1; 812 case CMPCI_DAC_VOL: 813 case CMPCI_FM_VOL: 814 case CMPCI_CD_VOL: 815 case CMPCI_LINE_IN_VOL: 816 case CMPCI_MIC_VOL: 817 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS); 818 vol1: dip->mixer_class = CMPCI_INPUT_CLASS; 819 dip->next = dip->index + 6; /* CMPCI_xxx_MUTE */ 820 strcpy(dip->label.name, mixer_port_names[dip->index]); 821 dip->un.v.num_channels = (dip->index == CMPCI_MIC_VOL ? 1 : 2); 822 vol: 823 dip->type = AUDIO_MIXER_VALUE; 824 strcpy(dip->un.v.units.name, AudioNvolume); 825 return 0; 826 827 case CMPCI_MIC_MUTE: 828 dip->next = CMPCI_MIC_PREAMP; 829 /* FALLTHROUGH */ 830 case CMPCI_DAC_MUTE: 831 case CMPCI_FM_MUTE: 832 case CMPCI_CD_MUTE: 833 case CMPCI_LINE_IN_MUTE: 834 case CMPCI_AUX_IN_MUTE: 835 dip->prev = dip->index - 6; /* CMPCI_xxx_VOL */ 836 dip->mixer_class = CMPCI_INPUT_CLASS; 837 strcpy(dip->label.name, AudioNmute); 838 goto on_off; 839 on_off: 840 dip->type = AUDIO_MIXER_ENUM; 841 dip->un.e.num_mem = 2; 842 strcpy(dip->un.e.member[0].label.name, AudioNoff); 843 dip->un.e.member[0].ord = 0; 844 strcpy(dip->un.e.member[1].label.name, AudioNon); 845 dip->un.e.member[1].ord = 1; 846 return 0; 847 848 case CMPCI_MIC_PREAMP: 849 dip->mixer_class = CMPCI_INPUT_CLASS; 850 dip->prev = CMPCI_MIC_MUTE; 851 strcpy(dip->label.name, AudioNpreamp); 852 goto on_off; 853 case CMPCI_PCSPEAKER: 854 dip->mixer_class = CMPCI_INPUT_CLASS; 855 strcpy(dip->label.name, AudioNspeaker); 856 dip->un.v.num_channels = 1; 857 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_SPEAKER_VALBITS); 858 goto vol; 859 case CMPCI_RECORD_SOURCE: 860 dip->mixer_class = CMPCI_RECORD_CLASS; 861 strcpy(dip->label.name, AudioNsource); 862 dip->type = AUDIO_MIXER_SET; 863 dip->un.s.num_mem = 7; 864 strcpy(dip->un.s.member[0].label.name, AudioNmicrophone); 865 dip->un.s.member[0].mask = CMPCI_RECORD_SOURCE_MIC; 866 strcpy(dip->un.s.member[1].label.name, AudioNcd); 867 dip->un.s.member[1].mask = CMPCI_RECORD_SOURCE_CD; 868 strcpy(dip->un.s.member[2].label.name, AudioNline); 869 dip->un.s.member[2].mask = CMPCI_RECORD_SOURCE_LINE_IN; 870 strcpy(dip->un.s.member[3].label.name, AudioNaux); 871 dip->un.s.member[3].mask = CMPCI_RECORD_SOURCE_AUX_IN; 872 strcpy(dip->un.s.member[4].label.name, AudioNwave); 873 dip->un.s.member[4].mask = CMPCI_RECORD_SOURCE_WAVE; 874 strcpy(dip->un.s.member[5].label.name, AudioNfmsynth); 875 dip->un.s.member[5].mask = CMPCI_RECORD_SOURCE_FM; 876 strcpy(dip->un.s.member[6].label.name, CmpciNspdif); 877 dip->un.s.member[6].mask = CMPCI_RECORD_SOURCE_SPDIF; 878 return 0; 879 case CMPCI_MIC_RECVOL: 880 dip->mixer_class = CMPCI_RECORD_CLASS; 881 strcpy(dip->label.name, AudioNmicrophone); 882 dip->un.v.num_channels = 1; 883 dip->un.v.delta = 1 << (8 - CMPCI_REG_ADMIC_VALBITS); 884 goto vol; 885 886 case CMPCI_PLAYBACK_MODE: 887 dip->mixer_class = CMPCI_PLAYBACK_CLASS; 888 dip->type = AUDIO_MIXER_ENUM; 889 strcpy(dip->label.name, AudioNmode); 890 dip->un.e.num_mem = 2; 891 strcpy(dip->un.e.member[0].label.name, AudioNdac); 892 dip->un.e.member[0].ord = CMPCI_PLAYBACK_MODE_WAVE; 893 strcpy(dip->un.e.member[1].label.name, CmpciNspdif); 894 dip->un.e.member[1].ord = CMPCI_PLAYBACK_MODE_SPDIF; 895 return 0; 896 case CMPCI_SPDIF_IN_SELECT: 897 dip->mixer_class = CMPCI_SPDIF_CLASS; 898 dip->type = AUDIO_MIXER_ENUM; 899 dip->next = CMPCI_SPDIF_IN_PHASE; 900 strcpy(dip->label.name, AudioNinput); 901 i = 0; 902 strcpy(dip->un.e.member[i].label.name, CmpciNspdin1); 903 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN1; 904 if (CMPCI_ISCAP(sc, 2ND_SPDIN)) { 905 strcpy(dip->un.e.member[i].label.name, CmpciNspdin2); 906 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN2; 907 } 908 strcpy(dip->un.e.member[i].label.name, CmpciNspdout); 909 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDOUT; 910 dip->un.e.num_mem = i; 911 return 0; 912 case CMPCI_SPDIF_IN_PHASE: 913 dip->mixer_class = CMPCI_SPDIF_CLASS; 914 dip->prev = CMPCI_SPDIF_IN_SELECT; 915 strcpy(dip->label.name, CmpciNphase); 916 dip->type = AUDIO_MIXER_ENUM; 917 dip->un.e.num_mem = 2; 918 strcpy(dip->un.e.member[0].label.name, CmpciNpositive); 919 dip->un.e.member[0].ord = CMPCI_SPDIF_IN_PHASE_POSITIVE; 920 strcpy(dip->un.e.member[1].label.name, CmpciNnegative); 921 dip->un.e.member[1].ord = CMPCI_SPDIF_IN_PHASE_NEGATIVE; 922 return 0; 923 case CMPCI_SPDIF_LOOP: 924 dip->mixer_class = CMPCI_SPDIF_CLASS; 925 dip->next = CMPCI_SPDIF_OUT_PLAYBACK; 926 strcpy(dip->label.name, AudioNoutput); 927 dip->type = AUDIO_MIXER_ENUM; 928 dip->un.e.num_mem = 2; 929 strcpy(dip->un.e.member[0].label.name, CmpciNplayback); 930 dip->un.e.member[0].ord = CMPCI_SPDIF_LOOP_OFF; 931 strcpy(dip->un.e.member[1].label.name, CmpciNspdin); 932 dip->un.e.member[1].ord = CMPCI_SPDIF_LOOP_ON; 933 return 0; 934 case CMPCI_SPDIF_OUT_PLAYBACK: 935 dip->mixer_class = CMPCI_SPDIF_CLASS; 936 dip->prev = CMPCI_SPDIF_LOOP; 937 dip->next = CMPCI_SPDIF_OUT_VOLTAGE; 938 strcpy(dip->label.name, CmpciNplayback); 939 dip->type = AUDIO_MIXER_ENUM; 940 dip->un.e.num_mem = 2; 941 strcpy(dip->un.e.member[0].label.name, AudioNwave); 942 dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_PLAYBACK_WAVE; 943 strcpy(dip->un.e.member[1].label.name, CmpciNlegacy); 944 dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_PLAYBACK_LEGACY; 945 return 0; 946 case CMPCI_SPDIF_OUT_VOLTAGE: 947 dip->mixer_class = CMPCI_SPDIF_CLASS; 948 dip->prev = CMPCI_SPDIF_OUT_PLAYBACK; 949 strcpy(dip->label.name, CmpciNvoltage); 950 dip->type = AUDIO_MIXER_ENUM; 951 dip->un.e.num_mem = 2; 952 strcpy(dip->un.e.member[0].label.name, CmpciNhigh_v); 953 dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_VOLTAGE_HIGH; 954 strcpy(dip->un.e.member[1].label.name, CmpciNlow_v); 955 dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_VOLTAGE_LOW; 956 return 0; 957 case CMPCI_MONITOR_DAC: 958 dip->mixer_class = CMPCI_SPDIF_CLASS; 959 strcpy(dip->label.name, AudioNmonitor); 960 dip->type = AUDIO_MIXER_ENUM; 961 dip->un.e.num_mem = 3; 962 strcpy(dip->un.e.member[0].label.name, AudioNoff); 963 dip->un.e.member[0].ord = CMPCI_MONITOR_DAC_OFF; 964 strcpy(dip->un.e.member[1].label.name, CmpciNspdin); 965 dip->un.e.member[1].ord = CMPCI_MONITOR_DAC_SPDIN; 966 strcpy(dip->un.e.member[2].label.name, CmpciNspdout); 967 dip->un.e.member[2].ord = CMPCI_MONITOR_DAC_SPDOUT; 968 return 0; 969 970 case CMPCI_MASTER_VOL: 971 dip->mixer_class = CMPCI_OUTPUT_CLASS; 972 strcpy(dip->label.name, AudioNmaster); 973 dip->un.v.num_channels = 2; 974 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS); 975 goto vol; 976 case CMPCI_REAR: 977 dip->mixer_class = CMPCI_OUTPUT_CLASS; 978 dip->next = CMPCI_INDIVIDUAL; 979 strcpy(dip->label.name, CmpciNrear); 980 goto on_off; 981 case CMPCI_INDIVIDUAL: 982 dip->mixer_class = CMPCI_OUTPUT_CLASS; 983 dip->prev = CMPCI_REAR; 984 dip->next = CMPCI_REVERSE; 985 strcpy(dip->label.name, CmpciNindividual); 986 goto on_off; 987 case CMPCI_REVERSE: 988 dip->mixer_class = CMPCI_OUTPUT_CLASS; 989 dip->prev = CMPCI_INDIVIDUAL; 990 strcpy(dip->label.name, CmpciNreverse); 991 goto on_off; 992 case CMPCI_SURROUND: 993 dip->mixer_class = CMPCI_OUTPUT_CLASS; 994 strcpy(dip->label.name, CmpciNsurround); 995 goto on_off; 996 } 997 998 return ENXIO; 999 } 1000 1001 static int 1002 cmpci_alloc_dmamem(struct cmpci_softc *sc, size_t size, void **r_addr) 1003 { 1004 int error; 1005 struct cmpci_dmanode *n; 1006 1007 error = 0; 1008 n = kmem_alloc(sizeof(*n), KM_SLEEP); 1009 1010 #define CMPCI_DMABUF_ALIGN 0x4 1011 #define CMPCI_DMABUF_BOUNDARY 0x0 1012 n->cd_tag = sc->sc_dmat; 1013 n->cd_size = size; 1014 error = bus_dmamem_alloc(n->cd_tag, n->cd_size, 1015 CMPCI_DMABUF_ALIGN, CMPCI_DMABUF_BOUNDARY, n->cd_segs, 1016 sizeof(n->cd_segs)/sizeof(n->cd_segs[0]), &n->cd_nsegs, 1017 BUS_DMA_WAITOK); 1018 if (error) 1019 goto mfree; 1020 error = bus_dmamem_map(n->cd_tag, n->cd_segs, n->cd_nsegs, n->cd_size, 1021 &n->cd_addr, BUS_DMA_WAITOK | BUS_DMA_COHERENT); 1022 if (error) 1023 goto dmafree; 1024 error = bus_dmamap_create(n->cd_tag, n->cd_size, 1, n->cd_size, 0, 1025 BUS_DMA_WAITOK, &n->cd_map); 1026 if (error) 1027 goto unmap; 1028 error = bus_dmamap_load(n->cd_tag, n->cd_map, n->cd_addr, n->cd_size, 1029 NULL, BUS_DMA_WAITOK); 1030 if (error) 1031 goto destroy; 1032 1033 n->cd_next = sc->sc_dmap; 1034 sc->sc_dmap = n; 1035 *r_addr = KVADDR(n); 1036 return 0; 1037 1038 destroy: 1039 bus_dmamap_destroy(n->cd_tag, n->cd_map); 1040 unmap: 1041 bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size); 1042 dmafree: 1043 bus_dmamem_free(n->cd_tag, 1044 n->cd_segs, sizeof(n->cd_segs)/sizeof(n->cd_segs[0])); 1045 mfree: 1046 kmem_free(n, sizeof(*n)); 1047 return error; 1048 } 1049 1050 static int 1051 cmpci_free_dmamem(struct cmpci_softc *sc, void *addr, size_t size) 1052 { 1053 struct cmpci_dmanode **nnp; 1054 1055 for (nnp = &sc->sc_dmap; *nnp; nnp= &(*nnp)->cd_next) { 1056 if ((*nnp)->cd_addr == addr) { 1057 struct cmpci_dmanode *n = *nnp; 1058 bus_dmamap_unload(n->cd_tag, n->cd_map); 1059 bus_dmamap_destroy(n->cd_tag, n->cd_map); 1060 bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size); 1061 bus_dmamem_free(n->cd_tag, n->cd_segs, 1062 sizeof(n->cd_segs)/sizeof(n->cd_segs[0])); 1063 kmem_free(n, sizeof(*n)); 1064 return 0; 1065 } 1066 } 1067 return -1; 1068 } 1069 1070 static struct cmpci_dmanode * 1071 cmpci_find_dmamem(struct cmpci_softc *sc, void *addr) 1072 { 1073 struct cmpci_dmanode *p; 1074 1075 for (p = sc->sc_dmap; p; p = p->cd_next) 1076 if (KVADDR(p) == (void *)addr) 1077 break; 1078 return p; 1079 } 1080 1081 #if 0 1082 static void 1083 cmpci_print_dmamem(struct cmpci_dmanode *); 1084 static void 1085 cmpci_print_dmamem(struct cmpci_dmanode *p) 1086 { 1087 1088 DPRINTF(("DMA at virt:%p, dmaseg:%p, mapseg:%p, size:%p\n", 1089 (void *)p->cd_addr, (void *)p->cd_segs[0].ds_addr, 1090 (void *)DMAADDR(p), (void *)p->cd_size)); 1091 } 1092 #endif /* DEBUG */ 1093 1094 static void * 1095 cmpci_allocm(void *handle, int direction, size_t size) 1096 { 1097 void *addr; 1098 1099 addr = NULL; /* XXX gcc */ 1100 1101 if (cmpci_alloc_dmamem(handle, size, &addr)) 1102 return NULL; 1103 return addr; 1104 } 1105 1106 static void 1107 cmpci_freem(void *handle, void *addr, size_t size) 1108 { 1109 1110 cmpci_free_dmamem(handle, addr, size); 1111 } 1112 1113 #define MAXVAL 256 1114 static int 1115 cmpci_adjust(int val, int mask) 1116 { 1117 1118 val += (MAXVAL - mask) >> 1; 1119 if (val >= MAXVAL) 1120 val = MAXVAL-1; 1121 return val & mask; 1122 } 1123 1124 static void 1125 cmpci_set_mixer_gain(struct cmpci_softc *sc, int port) 1126 { 1127 int src; 1128 int bits, mask; 1129 1130 switch (port) { 1131 case CMPCI_MIC_VOL: 1132 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_MIC, 1133 CMPCI_ADJUST_MIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1134 return; 1135 case CMPCI_MASTER_VOL: 1136 src = CMPCI_SB16_MIXER_MASTER_L; 1137 break; 1138 case CMPCI_LINE_IN_VOL: 1139 src = CMPCI_SB16_MIXER_LINE_L; 1140 break; 1141 case CMPCI_AUX_IN_VOL: 1142 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MIXER_AUX, 1143 CMPCI_ADJUST_AUX_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT], 1144 sc->sc_gain[port][CMPCI_RIGHT])); 1145 return; 1146 case CMPCI_MIC_RECVOL: 1147 cmpci_reg_partial_write_1(sc, CMPCI_REG_MIXER25, 1148 CMPCI_REG_ADMIC_SHIFT, CMPCI_REG_ADMIC_MASK, 1149 CMPCI_ADJUST_ADMIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1150 return; 1151 case CMPCI_DAC_VOL: 1152 src = CMPCI_SB16_MIXER_VOICE_L; 1153 break; 1154 case CMPCI_FM_VOL: 1155 src = CMPCI_SB16_MIXER_FM_L; 1156 break; 1157 case CMPCI_CD_VOL: 1158 src = CMPCI_SB16_MIXER_CDDA_L; 1159 break; 1160 case CMPCI_PCSPEAKER: 1161 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_SPEAKER, 1162 CMPCI_ADJUST_2_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1163 return; 1164 case CMPCI_MIC_PREAMP: 1165 if (sc->sc_gain[port][CMPCI_LR]) 1166 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1167 CMPCI_REG_MICGAINZ); 1168 else 1169 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1170 CMPCI_REG_MICGAINZ); 1171 return; 1172 1173 case CMPCI_DAC_MUTE: 1174 if (sc->sc_gain[port][CMPCI_LR]) 1175 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1176 CMPCI_REG_WSMUTE); 1177 else 1178 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1179 CMPCI_REG_WSMUTE); 1180 return; 1181 case CMPCI_FM_MUTE: 1182 if (sc->sc_gain[port][CMPCI_LR]) 1183 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1184 CMPCI_REG_FMMUTE); 1185 else 1186 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1187 CMPCI_REG_FMMUTE); 1188 return; 1189 case CMPCI_AUX_IN_MUTE: 1190 if (sc->sc_gain[port][CMPCI_LR]) 1191 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1192 CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM); 1193 else 1194 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1195 CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM); 1196 return; 1197 case CMPCI_CD_MUTE: 1198 mask = CMPCI_SB16_SW_CD; 1199 goto sbmute; 1200 case CMPCI_MIC_MUTE: 1201 mask = CMPCI_SB16_SW_MIC; 1202 goto sbmute; 1203 case CMPCI_LINE_IN_MUTE: 1204 mask = CMPCI_SB16_SW_LINE; 1205 sbmute: 1206 bits = cmpci_mixerreg_read(sc, CMPCI_SB16_MIXER_OUTMIX); 1207 if (sc->sc_gain[port][CMPCI_LR]) 1208 bits = bits & ~mask; 1209 else 1210 bits = bits | mask; 1211 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, bits); 1212 return; 1213 1214 case CMPCI_SPDIF_IN_SELECT: 1215 case CMPCI_MONITOR_DAC: 1216 case CMPCI_PLAYBACK_MODE: 1217 case CMPCI_SPDIF_LOOP: 1218 case CMPCI_SPDIF_OUT_PLAYBACK: 1219 cmpci_set_out_ports(sc); 1220 return; 1221 case CMPCI_SPDIF_OUT_VOLTAGE: 1222 if (CMPCI_ISCAP(sc, SPDOUT_VOLTAGE)) { 1223 if (sc->sc_gain[CMPCI_SPDIF_OUT_VOLTAGE][CMPCI_LR] 1224 == CMPCI_SPDIF_OUT_VOLTAGE_HIGH) 1225 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_5V); 1226 else 1227 cmpci_reg_set_reg_misc(sc, CMPCI_REG_5V); 1228 } 1229 return; 1230 case CMPCI_SURROUND: 1231 if (CMPCI_ISCAP(sc, SURROUND)) { 1232 if (sc->sc_gain[CMPCI_SURROUND][CMPCI_LR]) 1233 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1234 CMPCI_REG_SURROUND); 1235 else 1236 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1237 CMPCI_REG_SURROUND); 1238 } 1239 return; 1240 case CMPCI_REAR: 1241 if (CMPCI_ISCAP(sc, REAR)) { 1242 if (sc->sc_gain[CMPCI_REAR][CMPCI_LR]) 1243 cmpci_reg_set_reg_misc(sc, CMPCI_REG_N4SPK3D); 1244 else 1245 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_N4SPK3D); 1246 } 1247 return; 1248 case CMPCI_INDIVIDUAL: 1249 if (CMPCI_ISCAP(sc, INDIVIDUAL_REAR)) { 1250 if (sc->sc_gain[CMPCI_REAR][CMPCI_LR]) 1251 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1252 CMPCI_REG_INDIVIDUAL); 1253 else 1254 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1255 CMPCI_REG_INDIVIDUAL); 1256 } 1257 return; 1258 case CMPCI_REVERSE: 1259 if (CMPCI_ISCAP(sc, REVERSE_FR)) { 1260 if (sc->sc_gain[CMPCI_REVERSE][CMPCI_LR]) 1261 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1262 CMPCI_REG_REVERSE_FR); 1263 else 1264 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1265 CMPCI_REG_REVERSE_FR); 1266 } 1267 return; 1268 case CMPCI_SPDIF_IN_PHASE: 1269 if (CMPCI_ISCAP(sc, SPDIN_PHASE)) { 1270 if (sc->sc_gain[CMPCI_SPDIF_IN_PHASE][CMPCI_LR] 1271 == CMPCI_SPDIF_IN_PHASE_POSITIVE) 1272 cmpci_reg_clear_1(sc, CMPCI_REG_CHANNEL_FORMAT, 1273 CMPCI_REG_SPDIN_PHASE); 1274 else 1275 cmpci_reg_set_1(sc, CMPCI_REG_CHANNEL_FORMAT, 1276 CMPCI_REG_SPDIN_PHASE); 1277 } 1278 return; 1279 default: 1280 return; 1281 } 1282 1283 cmpci_mixerreg_write(sc, src, 1284 CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT])); 1285 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_L_TO_R(src), 1286 CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_RIGHT])); 1287 } 1288 1289 static void 1290 cmpci_set_out_ports(struct cmpci_softc *sc) 1291 { 1292 uint8_t v; 1293 int enspdout; 1294 1295 if (!CMPCI_ISCAP(sc, SPDLOOP)) 1296 return; 1297 1298 /* SPDIF/out select */ 1299 if (sc->sc_gain[CMPCI_SPDIF_LOOP][CMPCI_LR] == CMPCI_SPDIF_LOOP_OFF) { 1300 /* playback */ 1301 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP); 1302 } else { 1303 /* monitor SPDIF/in */ 1304 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP); 1305 } 1306 1307 /* SPDIF in select */ 1308 v = sc->sc_gain[CMPCI_SPDIF_IN_SELECT][CMPCI_LR]; 1309 if (v & CMPCI_SPDIFIN_SPDIFIN2) 1310 cmpci_reg_set_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN); 1311 else 1312 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN); 1313 if (v & CMPCI_SPDIFIN_SPDIFOUT) 1314 cmpci_reg_set_reg_misc(sc, CMPCI_REG_SPDFLOOPI); 1315 else 1316 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPDFLOOPI); 1317 1318 enspdout = 0; 1319 /* playback to ... */ 1320 if (CMPCI_ISCAP(sc, SPDOUT) && 1321 sc->sc_gain[CMPCI_PLAYBACK_MODE][CMPCI_LR] 1322 == CMPCI_PLAYBACK_MODE_SPDIF && 1323 (sc->sc_play.md_divide == CMPCI_REG_RATE_44100 || 1324 (CMPCI_ISCAP(sc, SPDOUT_48K) && 1325 sc->sc_play.md_divide==CMPCI_REG_RATE_48000))) { 1326 /* playback to SPDIF */ 1327 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE); 1328 enspdout = 1; 1329 if (sc->sc_play.md_divide==CMPCI_REG_RATE_48000) 1330 cmpci_reg_set_reg_misc(sc, 1331 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1332 else 1333 cmpci_reg_clear_reg_misc(sc, 1334 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1335 } else { 1336 /* playback to DAC */ 1337 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, 1338 CMPCI_REG_SPDIF0_ENABLE); 1339 if (CMPCI_ISCAP(sc, SPDOUT_48K)) 1340 cmpci_reg_clear_reg_misc(sc, 1341 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1342 } 1343 1344 /* legacy to SPDIF/out or not */ 1345 if (CMPCI_ISCAP(sc, SPDLEGACY)) { 1346 if (sc->sc_gain[CMPCI_SPDIF_OUT_PLAYBACK][CMPCI_LR] 1347 == CMPCI_SPDIF_OUT_PLAYBACK_WAVE) 1348 cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL, 1349 CMPCI_REG_LEGACY_SPDIF_ENABLE); 1350 else { 1351 cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL, 1352 CMPCI_REG_LEGACY_SPDIF_ENABLE); 1353 enspdout = 1; 1354 } 1355 } 1356 1357 /* enable/disable SPDIF/out */ 1358 if (CMPCI_ISCAP(sc, XSPDOUT) && enspdout) 1359 cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL, 1360 CMPCI_REG_XSPDIF_ENABLE); 1361 else 1362 cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL, 1363 CMPCI_REG_XSPDIF_ENABLE); 1364 1365 /* SPDIF monitor (digital to analog output) */ 1366 if (CMPCI_ISCAP(sc, SPDIN_MONITOR)) { 1367 v = sc->sc_gain[CMPCI_MONITOR_DAC][CMPCI_LR]; 1368 if (!(v & CMPCI_MONDAC_ENABLE)) 1369 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1370 CMPCI_REG_SPDIN_MONITOR); 1371 if (v & CMPCI_MONDAC_SPDOUT) 1372 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, 1373 CMPCI_REG_SPDIFOUT_DAC); 1374 else 1375 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, 1376 CMPCI_REG_SPDIFOUT_DAC); 1377 if (v & CMPCI_MONDAC_ENABLE) 1378 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1379 CMPCI_REG_SPDIN_MONITOR); 1380 } 1381 } 1382 1383 static int 1384 cmpci_set_in_ports(struct cmpci_softc *sc) 1385 { 1386 int mask; 1387 int bitsl, bitsr; 1388 1389 mask = sc->sc_in_mask; 1390 1391 /* 1392 * Note CMPCI_RECORD_SOURCE_CD, CMPCI_RECORD_SOURCE_LINE_IN and 1393 * CMPCI_RECORD_SOURCE_FM are defined to the corresponding bit 1394 * of the mixer register. 1395 */ 1396 bitsr = mask & (CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN | 1397 CMPCI_RECORD_SOURCE_FM); 1398 1399 bitsl = CMPCI_SB16_MIXER_SRC_R_TO_L(bitsr); 1400 if (mask & CMPCI_RECORD_SOURCE_MIC) { 1401 bitsl |= CMPCI_SB16_MIXER_MIC_SRC; 1402 bitsr |= CMPCI_SB16_MIXER_MIC_SRC; 1403 } 1404 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, bitsl); 1405 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, bitsr); 1406 1407 if (mask & CMPCI_RECORD_SOURCE_AUX_IN) 1408 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1409 CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN); 1410 else 1411 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1412 CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN); 1413 1414 if (mask & CMPCI_RECORD_SOURCE_WAVE) 1415 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1416 CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR); 1417 else 1418 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1419 CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR); 1420 1421 if (CMPCI_ISCAP(sc, SPDIN) && 1422 (sc->sc_rec.md_divide == CMPCI_REG_RATE_44100 || 1423 (CMPCI_ISCAP(sc, SPDOUT_48K) && 1424 sc->sc_rec.md_divide == CMPCI_REG_RATE_48000/* XXX? */))) { 1425 if (mask & CMPCI_RECORD_SOURCE_SPDIF) { 1426 /* enable SPDIF/in */ 1427 cmpci_reg_set_4(sc, 1428 CMPCI_REG_FUNC_1, 1429 CMPCI_REG_SPDIF1_ENABLE); 1430 } else { 1431 cmpci_reg_clear_4(sc, 1432 CMPCI_REG_FUNC_1, 1433 CMPCI_REG_SPDIF1_ENABLE); 1434 } 1435 } 1436 1437 return 0; 1438 } 1439 1440 static int 1441 cmpci_set_port(void *handle, mixer_ctrl_t *cp) 1442 { 1443 struct cmpci_softc *sc; 1444 int lgain, rgain; 1445 1446 sc = handle; 1447 switch (cp->dev) { 1448 case CMPCI_MIC_VOL: 1449 case CMPCI_PCSPEAKER: 1450 case CMPCI_MIC_RECVOL: 1451 if (cp->un.value.num_channels != 1) 1452 return EINVAL; 1453 /* FALLTHROUGH */ 1454 case CMPCI_DAC_VOL: 1455 case CMPCI_FM_VOL: 1456 case CMPCI_CD_VOL: 1457 case CMPCI_LINE_IN_VOL: 1458 case CMPCI_AUX_IN_VOL: 1459 case CMPCI_MASTER_VOL: 1460 if (cp->type != AUDIO_MIXER_VALUE) 1461 return EINVAL; 1462 switch (cp->un.value.num_channels) { 1463 case 1: 1464 lgain = rgain = 1465 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]; 1466 break; 1467 case 2: 1468 lgain = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]; 1469 rgain = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]; 1470 break; 1471 default: 1472 return EINVAL; 1473 } 1474 sc->sc_gain[cp->dev][CMPCI_LEFT] = lgain; 1475 sc->sc_gain[cp->dev][CMPCI_RIGHT] = rgain; 1476 1477 cmpci_set_mixer_gain(sc, cp->dev); 1478 break; 1479 1480 case CMPCI_RECORD_SOURCE: 1481 if (cp->type != AUDIO_MIXER_SET) 1482 return EINVAL; 1483 1484 if (cp->un.mask & ~(CMPCI_RECORD_SOURCE_MIC | 1485 CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN | 1486 CMPCI_RECORD_SOURCE_AUX_IN | CMPCI_RECORD_SOURCE_WAVE | 1487 CMPCI_RECORD_SOURCE_FM | CMPCI_RECORD_SOURCE_SPDIF)) 1488 return EINVAL; 1489 1490 if (cp->un.mask & CMPCI_RECORD_SOURCE_SPDIF) 1491 cp->un.mask = CMPCI_RECORD_SOURCE_SPDIF; 1492 1493 sc->sc_in_mask = cp->un.mask; 1494 return cmpci_set_in_ports(sc); 1495 1496 /* boolean */ 1497 case CMPCI_DAC_MUTE: 1498 case CMPCI_FM_MUTE: 1499 case CMPCI_CD_MUTE: 1500 case CMPCI_LINE_IN_MUTE: 1501 case CMPCI_AUX_IN_MUTE: 1502 case CMPCI_MIC_MUTE: 1503 case CMPCI_MIC_PREAMP: 1504 case CMPCI_PLAYBACK_MODE: 1505 case CMPCI_SPDIF_IN_PHASE: 1506 case CMPCI_SPDIF_LOOP: 1507 case CMPCI_SPDIF_OUT_PLAYBACK: 1508 case CMPCI_SPDIF_OUT_VOLTAGE: 1509 case CMPCI_REAR: 1510 case CMPCI_INDIVIDUAL: 1511 case CMPCI_REVERSE: 1512 case CMPCI_SURROUND: 1513 if (cp->type != AUDIO_MIXER_ENUM) 1514 return EINVAL; 1515 sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord != 0; 1516 cmpci_set_mixer_gain(sc, cp->dev); 1517 break; 1518 1519 case CMPCI_SPDIF_IN_SELECT: 1520 switch (cp->un.ord) { 1521 case CMPCI_SPDIF_IN_SPDIN1: 1522 case CMPCI_SPDIF_IN_SPDIN2: 1523 case CMPCI_SPDIF_IN_SPDOUT: 1524 break; 1525 default: 1526 return EINVAL; 1527 } 1528 goto xenum; 1529 case CMPCI_MONITOR_DAC: 1530 switch (cp->un.ord) { 1531 case CMPCI_MONITOR_DAC_OFF: 1532 case CMPCI_MONITOR_DAC_SPDIN: 1533 case CMPCI_MONITOR_DAC_SPDOUT: 1534 break; 1535 default: 1536 return EINVAL; 1537 } 1538 xenum: 1539 if (cp->type != AUDIO_MIXER_ENUM) 1540 return EINVAL; 1541 sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord; 1542 cmpci_set_mixer_gain(sc, cp->dev); 1543 break; 1544 1545 default: 1546 return EINVAL; 1547 } 1548 1549 return 0; 1550 } 1551 1552 static int 1553 cmpci_get_port(void *handle, mixer_ctrl_t *cp) 1554 { 1555 struct cmpci_softc *sc; 1556 1557 sc = handle; 1558 switch (cp->dev) { 1559 case CMPCI_MIC_VOL: 1560 case CMPCI_PCSPEAKER: 1561 case CMPCI_MIC_RECVOL: 1562 if (cp->un.value.num_channels != 1) 1563 return EINVAL; 1564 /*FALLTHROUGH*/ 1565 case CMPCI_DAC_VOL: 1566 case CMPCI_FM_VOL: 1567 case CMPCI_CD_VOL: 1568 case CMPCI_LINE_IN_VOL: 1569 case CMPCI_AUX_IN_VOL: 1570 case CMPCI_MASTER_VOL: 1571 switch (cp->un.value.num_channels) { 1572 case 1: 1573 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = 1574 sc->sc_gain[cp->dev][CMPCI_LEFT]; 1575 break; 1576 case 2: 1577 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 1578 sc->sc_gain[cp->dev][CMPCI_LEFT]; 1579 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 1580 sc->sc_gain[cp->dev][CMPCI_RIGHT]; 1581 break; 1582 default: 1583 return EINVAL; 1584 } 1585 break; 1586 1587 case CMPCI_RECORD_SOURCE: 1588 cp->un.mask = sc->sc_in_mask; 1589 break; 1590 1591 case CMPCI_DAC_MUTE: 1592 case CMPCI_FM_MUTE: 1593 case CMPCI_CD_MUTE: 1594 case CMPCI_LINE_IN_MUTE: 1595 case CMPCI_AUX_IN_MUTE: 1596 case CMPCI_MIC_MUTE: 1597 case CMPCI_MIC_PREAMP: 1598 case CMPCI_PLAYBACK_MODE: 1599 case CMPCI_SPDIF_IN_SELECT: 1600 case CMPCI_SPDIF_IN_PHASE: 1601 case CMPCI_SPDIF_LOOP: 1602 case CMPCI_SPDIF_OUT_PLAYBACK: 1603 case CMPCI_SPDIF_OUT_VOLTAGE: 1604 case CMPCI_MONITOR_DAC: 1605 case CMPCI_REAR: 1606 case CMPCI_INDIVIDUAL: 1607 case CMPCI_REVERSE: 1608 case CMPCI_SURROUND: 1609 cp->un.ord = sc->sc_gain[cp->dev][CMPCI_LR]; 1610 break; 1611 1612 default: 1613 return EINVAL; 1614 } 1615 1616 return 0; 1617 } 1618 1619 /* ARGSUSED */ 1620 static size_t 1621 cmpci_round_buffersize(void *handle, int direction, 1622 size_t bufsize) 1623 { 1624 1625 if (bufsize > 0x10000) 1626 bufsize = 0x10000; 1627 1628 return bufsize; 1629 } 1630 1631 static paddr_t 1632 cmpci_mappage(void *handle, void *addr, off_t offset, int prot) 1633 { 1634 struct cmpci_dmanode *p; 1635 1636 if (offset < 0 || NULL == (p = cmpci_find_dmamem(handle, addr))) 1637 return -1; 1638 1639 return bus_dmamem_mmap(p->cd_tag, p->cd_segs, 1640 sizeof(p->cd_segs)/sizeof(p->cd_segs[0]), 1641 offset, prot, BUS_DMA_WAITOK); 1642 } 1643 1644 /* ARGSUSED */ 1645 static int 1646 cmpci_get_props(void *handle) 1647 { 1648 1649 return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 1650 } 1651 1652 static int 1653 cmpci_trigger_output(void *handle, void *start, void *end, int blksize, 1654 void (*intr)(void *), void *arg, 1655 const audio_params_t *param) 1656 { 1657 struct cmpci_softc *sc; 1658 struct cmpci_dmanode *p; 1659 int bps; 1660 1661 sc = handle; 1662 sc->sc_play.intr = intr; 1663 sc->sc_play.intr_arg = arg; 1664 bps = param->channels * param->precision / 8; 1665 if (!bps) 1666 return EINVAL; 1667 1668 /* set DMA frame */ 1669 if (!(p = cmpci_find_dmamem(sc, start))) 1670 return EINVAL; 1671 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BASE, 1672 DMAADDR(p)); 1673 delay(10); 1674 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BYTES, 1675 ((char *)end - (char *)start + 1) / bps - 1); 1676 delay(10); 1677 1678 /* set interrupt count */ 1679 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_SAMPLES, 1680 (blksize + bps - 1) / bps - 1); 1681 delay(10); 1682 1683 /* start DMA */ 1684 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); /* PLAY */ 1685 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 1686 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); 1687 1688 return 0; 1689 } 1690 1691 static int 1692 cmpci_trigger_input(void *handle, void *start, void *end, int blksize, 1693 void (*intr)(void *), void *arg, 1694 const audio_params_t *param) 1695 { 1696 struct cmpci_softc *sc; 1697 struct cmpci_dmanode *p; 1698 int bps; 1699 1700 sc = handle; 1701 sc->sc_rec.intr = intr; 1702 sc->sc_rec.intr_arg = arg; 1703 bps = param->channels * param->precision / 8; 1704 if (!bps) 1705 return EINVAL; 1706 1707 /* set DMA frame */ 1708 if (!(p=cmpci_find_dmamem(sc, start))) 1709 return EINVAL; 1710 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BASE, 1711 DMAADDR(p)); 1712 delay(10); 1713 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BYTES, 1714 ((char *)end - (char *)start + 1) / bps - 1); 1715 delay(10); 1716 1717 /* set interrupt count */ 1718 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_SAMPLES, 1719 (blksize + bps - 1) / bps - 1); 1720 delay(10); 1721 1722 /* start DMA */ 1723 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_DIR); /* REC */ 1724 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 1725 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); 1726 1727 return 0; 1728 } 1729 1730 static void 1731 cmpci_get_locks(void *addr, kmutex_t **intr, kmutex_t **thread) 1732 { 1733 struct cmpci_softc *sc; 1734 1735 sc = addr; 1736 *intr = &sc->sc_intr_lock; 1737 *thread = &sc->sc_lock; 1738 } 1739 1740 /* end of file */ 1741
Indexes created Sat Sep 27 14:09:57 GMT 2025