cmpci.c revision 1.53.2.1
1 /* $NetBSD: cmpci.c,v 1.53.2.1 2019/04/21 05:11:22 isaki Exp $ */ 2 3 /* 4 * Copyright (c) 2000, 2001, 2008 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Takuya SHIOZAKI <tshiozak (at) NetBSD.org> . 9 * 10 * This code is derived from software contributed to The NetBSD Foundation 11 * by ITOH Yasufumi. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 /* 37 * C-Media CMI8x38 Audio Chip Support. 38 * 39 * TODO: 40 * - 4ch / 6ch support. 41 * - Joystick support. 42 * 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: cmpci.c,v 1.53.2.1 2019/04/21 05:11:22 isaki Exp $"); 47 48 #if defined(AUDIO_DEBUG) || defined(DEBUG) 49 #define DPRINTF(x) if (cmpcidebug) printf x 50 int cmpcidebug = 0; 51 #else 52 #define DPRINTF(x) 53 #endif 54 55 #include "mpu.h" 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/kernel.h> 60 #include <sys/kmem.h> 61 #include <sys/device.h> 62 #include <sys/proc.h> 63 64 #include <dev/pci/pcidevs.h> 65 #include <dev/pci/pcivar.h> 66 67 #include <sys/audioio.h> 68 #include <dev/audio_if.h> 69 #include <dev/midi_if.h> 70 71 #include <dev/mulaw.h> 72 #include <dev/auconv.h> 73 #include <dev/pci/cmpcireg.h> 74 #include <dev/pci/cmpcivar.h> 75 76 #include <dev/ic/mpuvar.h> 77 #include <sys/bus.h> 78 #include <sys/intr.h> 79 80 /* 81 * Low-level HW interface 82 */ 83 static inline uint8_t cmpci_mixerreg_read(struct cmpci_softc *, uint8_t); 84 static inline void cmpci_mixerreg_write(struct cmpci_softc *, 85 uint8_t, uint8_t); 86 static inline void cmpci_reg_partial_write_1(struct cmpci_softc *, int, int, 87 unsigned, unsigned); 88 static inline void cmpci_reg_partial_write_4(struct cmpci_softc *, int, int, 89 uint32_t, uint32_t); 90 static inline void cmpci_reg_set_1(struct cmpci_softc *, int, uint8_t); 91 static inline void cmpci_reg_clear_1(struct cmpci_softc *, int, uint8_t); 92 static inline void cmpci_reg_set_4(struct cmpci_softc *, int, uint32_t); 93 static inline void cmpci_reg_clear_4(struct cmpci_softc *, int, uint32_t); 94 static inline void cmpci_reg_set_reg_misc(struct cmpci_softc *, uint32_t); 95 static inline void cmpci_reg_clear_reg_misc(struct cmpci_softc *, uint32_t); 96 static int cmpci_rate_to_index(int); 97 static inline int cmpci_index_to_rate(int); 98 static inline int cmpci_index_to_divider(int); 99 100 static int cmpci_adjust(int, int); 101 static void cmpci_set_mixer_gain(struct cmpci_softc *, int); 102 static void cmpci_set_out_ports(struct cmpci_softc *); 103 static int cmpci_set_in_ports(struct cmpci_softc *); 104 105 106 /* 107 * autoconf interface 108 */ 109 static int cmpci_match(device_t, cfdata_t, void *); 110 static void cmpci_attach(device_t, device_t, void *); 111 112 CFATTACH_DECL_NEW(cmpci, sizeof (struct cmpci_softc), 113 cmpci_match, cmpci_attach, NULL, NULL); 114 115 /* interrupt */ 116 static int cmpci_intr(void *); 117 118 119 /* 120 * DMA stuffs 121 */ 122 static int cmpci_alloc_dmamem(struct cmpci_softc *, size_t, void **); 123 static int cmpci_free_dmamem(struct cmpci_softc *, void *, size_t); 124 static struct cmpci_dmanode * cmpci_find_dmamem(struct cmpci_softc *, 125 void *); 126 127 128 /* 129 * interface to machine independent layer 130 */ 131 static int cmpci_query_encoding(void *, struct audio_encoding *); 132 static int cmpci_set_params(void *, int, int, audio_params_t *, 133 audio_params_t *, stream_filter_list_t *, stream_filter_list_t *); 134 static int cmpci_round_blocksize(void *, int, int, const audio_params_t *); 135 static int cmpci_halt_output(void *); 136 static int cmpci_halt_input(void *); 137 static int cmpci_getdev(void *, struct audio_device *); 138 static int cmpci_set_port(void *, mixer_ctrl_t *); 139 static int cmpci_get_port(void *, mixer_ctrl_t *); 140 static int cmpci_query_devinfo(void *, mixer_devinfo_t *); 141 static void *cmpci_allocm(void *, int, size_t); 142 static void cmpci_freem(void *, void *, size_t); 143 static size_t cmpci_round_buffersize(void *, int, size_t); 144 static paddr_t cmpci_mappage(void *, void *, off_t, int); 145 static int cmpci_get_props(void *); 146 static int cmpci_trigger_output(void *, void *, void *, int, 147 void (*)(void *), void *, const audio_params_t *); 148 static int cmpci_trigger_input(void *, void *, void *, int, 149 void (*)(void *), void *, const audio_params_t *); 150 static void cmpci_get_locks(void *, kmutex_t **, kmutex_t **); 151 152 static const struct audio_hw_if cmpci_hw_if = { 153 .query_encoding = cmpci_query_encoding, 154 .set_params = cmpci_set_params, 155 .round_blocksize = cmpci_round_blocksize, 156 .halt_output = cmpci_halt_output, 157 .halt_input = cmpci_halt_input, 158 .getdev = cmpci_getdev, 159 .set_port = cmpci_set_port, 160 .get_port = cmpci_get_port, 161 .query_devinfo = cmpci_query_devinfo, 162 .allocm = cmpci_allocm, 163 .freem = cmpci_freem, 164 .round_buffersize = cmpci_round_buffersize, 165 .mappage = cmpci_mappage, 166 .get_props = cmpci_get_props, 167 .trigger_output = cmpci_trigger_output, 168 .trigger_input = cmpci_trigger_input, 169 .get_locks = cmpci_get_locks, 170 }; 171 172 #define CMPCI_NFORMATS 4 173 #define CMPCI_FORMAT(enc, prec, ch, chmask) \ 174 { \ 175 .mode = AUMODE_PLAY | AUMODE_RECORD, \ 176 .encoding = (enc), \ 177 .validbits = (prec), \ 178 .precision = (prec), \ 179 .channels = (ch), \ 180 .channel_mask = (chmask), \ 181 .frequency_type = 0, \ 182 .frequency = { 5512, 48000 }, \ 183 } 184 static const struct audio_format cmpci_formats[CMPCI_NFORMATS] = { 185 CMPCI_FORMAT(AUDIO_ENCODING_SLINEAR_LE, 16, 2, AUFMT_STEREO), 186 CMPCI_FORMAT(AUDIO_ENCODING_SLINEAR_LE, 16, 1, AUFMT_MONAURAL), 187 CMPCI_FORMAT(AUDIO_ENCODING_ULINEAR_LE, 8, 2, AUFMT_STEREO), 188 CMPCI_FORMAT(AUDIO_ENCODING_ULINEAR_LE, 8, 1, AUFMT_MONAURAL), 189 }; 190 191 192 /* 193 * Low-level HW interface 194 */ 195 196 /* mixer register read/write */ 197 static inline uint8_t 198 cmpci_mixerreg_read(struct cmpci_softc *sc, uint8_t no) 199 { 200 uint8_t ret; 201 202 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no); 203 delay(10); 204 ret = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA); 205 delay(10); 206 return ret; 207 } 208 209 static inline void 210 cmpci_mixerreg_write(struct cmpci_softc *sc, uint8_t no, uint8_t val) 211 { 212 213 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no); 214 delay(10); 215 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA, val); 216 delay(10); 217 } 218 219 220 /* register partial write */ 221 static inline void 222 cmpci_reg_partial_write_1(struct cmpci_softc *sc, int no, int shift, 223 unsigned mask, unsigned val) 224 { 225 226 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 227 (val<<shift) | 228 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift))); 229 delay(10); 230 } 231 232 static inline void 233 cmpci_reg_partial_write_4(struct cmpci_softc *sc, int no, int shift, 234 uint32_t mask, uint32_t val) 235 { 236 237 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 238 (val<<shift) | 239 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift))); 240 delay(10); 241 } 242 243 /* register set/clear bit */ 244 static inline void 245 cmpci_reg_set_1(struct cmpci_softc *sc, int no, uint8_t mask) 246 { 247 248 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 249 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) | mask)); 250 delay(10); 251 } 252 253 static inline void 254 cmpci_reg_clear_1(struct cmpci_softc *sc, int no, uint8_t mask) 255 { 256 257 bus_space_write_1(sc->sc_iot, sc->sc_ioh, no, 258 (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~mask)); 259 delay(10); 260 } 261 262 static inline void 263 cmpci_reg_set_4(struct cmpci_softc *sc, int no, uint32_t mask) 264 { 265 266 /* use cmpci_reg_set_reg_misc() for CMPCI_REG_MISC */ 267 KDASSERT(no != CMPCI_REG_MISC); 268 269 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 270 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) | mask)); 271 delay(10); 272 } 273 274 static inline void 275 cmpci_reg_clear_4(struct cmpci_softc *sc, int no, uint32_t mask) 276 { 277 278 /* use cmpci_reg_clear_reg_misc() for CMPCI_REG_MISC */ 279 KDASSERT(no != CMPCI_REG_MISC); 280 281 bus_space_write_4(sc->sc_iot, sc->sc_ioh, no, 282 (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~mask)); 283 delay(10); 284 } 285 286 /* 287 * The CMPCI_REG_MISC register needs special handling, since one of 288 * its bits has different read/write values. 289 */ 290 static inline void 291 cmpci_reg_set_reg_misc(struct cmpci_softc *sc, uint32_t mask) 292 { 293 294 sc->sc_reg_misc |= mask; 295 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC, 296 sc->sc_reg_misc); 297 delay(10); 298 } 299 300 static inline void 301 cmpci_reg_clear_reg_misc(struct cmpci_softc *sc, uint32_t mask) 302 { 303 304 sc->sc_reg_misc &= ~mask; 305 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC, 306 sc->sc_reg_misc); 307 delay(10); 308 } 309 310 /* rate */ 311 static const struct { 312 int rate; 313 int divider; 314 } cmpci_rate_table[CMPCI_REG_NUMRATE] = { 315 #define _RATE(n) { n, CMPCI_REG_RATE_ ## n } 316 _RATE(5512), 317 _RATE(8000), 318 _RATE(11025), 319 _RATE(16000), 320 _RATE(22050), 321 _RATE(32000), 322 _RATE(44100), 323 _RATE(48000) 324 #undef _RATE 325 }; 326 327 static int 328 cmpci_rate_to_index(int rate) 329 { 330 int i; 331 332 for (i = 0; i < CMPCI_REG_NUMRATE - 1; i++) 333 if (rate <= 334 (cmpci_rate_table[i].rate+cmpci_rate_table[i+1].rate) / 2) 335 return i; 336 return i; /* 48000 */ 337 } 338 339 static inline int 340 cmpci_index_to_rate(int index) 341 { 342 343 return cmpci_rate_table[index].rate; 344 } 345 346 static inline int 347 cmpci_index_to_divider(int index) 348 { 349 350 return cmpci_rate_table[index].divider; 351 } 352 353 /* 354 * interface to configure the device. 355 */ 356 static int 357 cmpci_match(device_t parent, cfdata_t match, void *aux) 358 { 359 struct pci_attach_args *pa; 360 361 pa = (struct pci_attach_args *)aux; 362 if ( PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CMEDIA && 363 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338A || 364 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338B || 365 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738 || 366 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738B) ) 367 return 1; 368 369 return 0; 370 } 371 372 static void 373 cmpci_attach(device_t parent, device_t self, void *aux) 374 { 375 struct cmpci_softc *sc; 376 struct pci_attach_args *pa; 377 struct audio_attach_args aa; 378 pci_intr_handle_t ih; 379 char const *strintr; 380 int i, v; 381 char intrbuf[PCI_INTRSTR_LEN]; 382 383 sc = device_private(self); 384 sc->sc_dev = self; 385 pa = (struct pci_attach_args *)aux; 386 387 sc->sc_id = pa->pa_id; 388 sc->sc_class = pa->pa_class; 389 pci_aprint_devinfo(pa, "Audio controller"); 390 switch (PCI_PRODUCT(sc->sc_id)) { 391 case PCI_PRODUCT_CMEDIA_CMI8338A: 392 /*FALLTHROUGH*/ 393 case PCI_PRODUCT_CMEDIA_CMI8338B: 394 sc->sc_capable = CMPCI_CAP_CMI8338; 395 break; 396 case PCI_PRODUCT_CMEDIA_CMI8738: 397 /*FALLTHROUGH*/ 398 case PCI_PRODUCT_CMEDIA_CMI8738B: 399 sc->sc_capable = CMPCI_CAP_CMI8738; 400 break; 401 } 402 403 /* map I/O space */ 404 if (pci_mapreg_map(pa, CMPCI_PCI_IOBASEREG, PCI_MAPREG_TYPE_IO, 0, 405 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 406 aprint_error_dev(sc->sc_dev, "failed to map I/O space\n"); 407 return; 408 } 409 410 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 411 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO); 412 413 /* interrupt */ 414 if (pci_intr_map(pa, &ih)) { 415 aprint_error_dev(sc->sc_dev, "failed to map interrupt\n"); 416 return; 417 } 418 strintr = pci_intr_string(pa->pa_pc, ih, intrbuf, sizeof(intrbuf)); 419 sc->sc_ih = pci_intr_establish_xname(pa->pa_pc, ih, IPL_AUDIO, 420 cmpci_intr, sc, device_xname(self)); 421 if (sc->sc_ih == NULL) { 422 aprint_error_dev(sc->sc_dev, "failed to establish interrupt"); 423 if (strintr != NULL) 424 aprint_error(" at %s", strintr); 425 aprint_error("\n"); 426 mutex_destroy(&sc->sc_lock); 427 mutex_destroy(&sc->sc_intr_lock); 428 return; 429 } 430 aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", strintr); 431 432 sc->sc_dmat = pa->pa_dmat; 433 434 audio_attach_mi(&cmpci_hw_if, sc, sc->sc_dev); 435 436 /* attach OPL device */ 437 aa.type = AUDIODEV_TYPE_OPL; 438 aa.hwif = NULL; 439 aa.hdl = NULL; 440 (void)config_found(sc->sc_dev, &aa, audioprint); 441 442 /* attach MPU-401 device */ 443 aa.type = AUDIODEV_TYPE_MPU; 444 aa.hwif = NULL; 445 aa.hdl = NULL; 446 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh, 447 CMPCI_REG_MPU_BASE, CMPCI_REG_MPU_SIZE, &sc->sc_mpu_ioh) == 0) 448 sc->sc_mpudev = config_found(sc->sc_dev, &aa, audioprint); 449 450 /* get initial value (this is 0 and may be omitted but just in case) */ 451 sc->sc_reg_misc = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 452 CMPCI_REG_MISC) & ~CMPCI_REG_SPDIF48K; 453 454 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_RESET, 0); 455 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0); 456 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0); 457 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, 458 CMPCI_SB16_SW_CD|CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE); 459 for (i = 0; i < CMPCI_NDEVS; i++) { 460 switch (i) { 461 /* 462 * CMI8738 defaults are 463 * master: 0xe0 (0x00 - 0xf8) 464 * FM, DAC: 0xc0 (0x00 - 0xf8) 465 * PC speaker: 0x80 (0x00 - 0xc0) 466 * others: 0 467 */ 468 /* volume */ 469 case CMPCI_MASTER_VOL: 470 v = 128; /* 224 */ 471 break; 472 case CMPCI_FM_VOL: 473 case CMPCI_DAC_VOL: 474 v = 192; 475 break; 476 case CMPCI_PCSPEAKER: 477 v = 128; 478 break; 479 480 /* booleans, set to true */ 481 case CMPCI_CD_MUTE: 482 case CMPCI_MIC_MUTE: 483 case CMPCI_LINE_IN_MUTE: 484 case CMPCI_AUX_IN_MUTE: 485 v = 1; 486 break; 487 488 /* volume with inital value 0 */ 489 case CMPCI_CD_VOL: 490 case CMPCI_LINE_IN_VOL: 491 case CMPCI_AUX_IN_VOL: 492 case CMPCI_MIC_VOL: 493 case CMPCI_MIC_RECVOL: 494 /* FALLTHROUGH */ 495 496 /* others are cleared */ 497 case CMPCI_MIC_PREAMP: 498 case CMPCI_RECORD_SOURCE: 499 case CMPCI_PLAYBACK_MODE: 500 case CMPCI_SPDIF_IN_SELECT: 501 case CMPCI_SPDIF_IN_PHASE: 502 case CMPCI_SPDIF_LOOP: 503 case CMPCI_SPDIF_OUT_PLAYBACK: 504 case CMPCI_SPDIF_OUT_VOLTAGE: 505 case CMPCI_MONITOR_DAC: 506 case CMPCI_REAR: 507 case CMPCI_INDIVIDUAL: 508 case CMPCI_REVERSE: 509 case CMPCI_SURROUND: 510 default: 511 v = 0; 512 break; 513 } 514 sc->sc_gain[i][CMPCI_LEFT] = sc->sc_gain[i][CMPCI_RIGHT] = v; 515 cmpci_set_mixer_gain(sc, i); 516 } 517 } 518 519 static int 520 cmpci_intr(void *handle) 521 { 522 struct cmpci_softc *sc = handle; 523 #if NMPU > 0 524 struct mpu_softc *sc_mpu = device_private(sc->sc_mpudev); 525 #endif 526 uint32_t intrstat; 527 528 mutex_spin_enter(&sc->sc_intr_lock); 529 530 intrstat = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 531 CMPCI_REG_INTR_STATUS); 532 533 if (!(intrstat & CMPCI_REG_ANY_INTR)) { 534 mutex_spin_exit(&sc->sc_intr_lock); 535 return 0; 536 } 537 538 delay(10); 539 540 /* disable and reset intr */ 541 if (intrstat & CMPCI_REG_CH0_INTR) 542 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, 543 CMPCI_REG_CH0_INTR_ENABLE); 544 if (intrstat & CMPCI_REG_CH1_INTR) 545 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, 546 CMPCI_REG_CH1_INTR_ENABLE); 547 548 if (intrstat & CMPCI_REG_CH0_INTR) { 549 if (sc->sc_play.intr != NULL) 550 (*sc->sc_play.intr)(sc->sc_play.intr_arg); 551 } 552 if (intrstat & CMPCI_REG_CH1_INTR) { 553 if (sc->sc_rec.intr != NULL) 554 (*sc->sc_rec.intr)(sc->sc_rec.intr_arg); 555 } 556 557 /* enable intr */ 558 if (intrstat & CMPCI_REG_CH0_INTR) 559 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, 560 CMPCI_REG_CH0_INTR_ENABLE); 561 if (intrstat & CMPCI_REG_CH1_INTR) 562 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, 563 CMPCI_REG_CH1_INTR_ENABLE); 564 565 #if NMPU > 0 566 if (intrstat & CMPCI_REG_UART_INTR && sc_mpu != NULL) 567 mpu_intr(sc_mpu); 568 #endif 569 570 mutex_spin_exit(&sc->sc_intr_lock); 571 return 1; 572 } 573 574 static int 575 cmpci_query_encoding(void *handle, struct audio_encoding *fp) 576 { 577 578 switch (fp->index) { 579 case 0: 580 strcpy(fp->name, AudioEulinear); 581 fp->encoding = AUDIO_ENCODING_ULINEAR; 582 fp->precision = 8; 583 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 584 break; 585 case 1: 586 strcpy(fp->name, AudioEmulaw); 587 fp->encoding = AUDIO_ENCODING_ULAW; 588 fp->precision = 8; 589 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 590 break; 591 case 2: 592 strcpy(fp->name, AudioEalaw); 593 fp->encoding = AUDIO_ENCODING_ALAW; 594 fp->precision = 8; 595 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 596 break; 597 case 3: 598 strcpy(fp->name, AudioEslinear); 599 fp->encoding = AUDIO_ENCODING_SLINEAR; 600 fp->precision = 8; 601 fp->flags = 0; 602 break; 603 case 4: 604 strcpy(fp->name, AudioEslinear_le); 605 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 606 fp->precision = 16; 607 fp->flags = 0; 608 break; 609 case 5: 610 strcpy(fp->name, AudioEulinear_le); 611 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 612 fp->precision = 16; 613 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 614 break; 615 case 6: 616 strcpy(fp->name, AudioEslinear_be); 617 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 618 fp->precision = 16; 619 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 620 break; 621 case 7: 622 strcpy(fp->name, AudioEulinear_be); 623 fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 624 fp->precision = 16; 625 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 626 break; 627 default: 628 return EINVAL; 629 } 630 return 0; 631 } 632 633 634 static int 635 cmpci_set_params(void *handle, int setmode, int usemode, 636 audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil, 637 stream_filter_list_t *rfil) 638 { 639 int i; 640 struct cmpci_softc *sc; 641 642 sc = handle; 643 for (i = 0; i < 2; i++) { 644 int md_format; 645 int md_divide; 646 int md_index; 647 int mode; 648 audio_params_t *p; 649 stream_filter_list_t *fil; 650 int ind; 651 652 switch (i) { 653 case 0: 654 mode = AUMODE_PLAY; 655 p = play; 656 fil = pfil; 657 break; 658 case 1: 659 mode = AUMODE_RECORD; 660 p = rec; 661 fil = rfil; 662 break; 663 default: 664 return EINVAL; 665 } 666 667 if (!(setmode & mode)) 668 continue; 669 670 md_index = cmpci_rate_to_index(p->sample_rate); 671 md_divide = cmpci_index_to_divider(md_index); 672 p->sample_rate = cmpci_index_to_rate(md_index); 673 DPRINTF(("%s: sample:%u, divider=%d\n", 674 device_xname(sc->sc_dev), p->sample_rate, md_divide)); 675 676 ind = auconv_set_converter(cmpci_formats, CMPCI_NFORMATS, 677 mode, p, FALSE, fil); 678 if (ind < 0) 679 return EINVAL; 680 if (fil->req_size > 0) 681 p = &fil->filters[0].param; 682 683 /* format */ 684 md_format = p->channels == 1 685 ? CMPCI_REG_FORMAT_MONO : CMPCI_REG_FORMAT_STEREO; 686 md_format |= p->precision == 16 687 ? CMPCI_REG_FORMAT_16BIT : CMPCI_REG_FORMAT_8BIT; 688 if (mode & AUMODE_PLAY) { 689 cmpci_reg_partial_write_4(sc, 690 CMPCI_REG_CHANNEL_FORMAT, 691 CMPCI_REG_CH0_FORMAT_SHIFT, 692 CMPCI_REG_CH0_FORMAT_MASK, md_format); 693 cmpci_reg_partial_write_4(sc, 694 CMPCI_REG_FUNC_1, CMPCI_REG_DAC_FS_SHIFT, 695 CMPCI_REG_DAC_FS_MASK, md_divide); 696 sc->sc_play.md_divide = md_divide; 697 } else { 698 cmpci_reg_partial_write_4(sc, 699 CMPCI_REG_CHANNEL_FORMAT, 700 CMPCI_REG_CH1_FORMAT_SHIFT, 701 CMPCI_REG_CH1_FORMAT_MASK, md_format); 702 cmpci_reg_partial_write_4(sc, 703 CMPCI_REG_FUNC_1, CMPCI_REG_ADC_FS_SHIFT, 704 CMPCI_REG_ADC_FS_MASK, md_divide); 705 sc->sc_rec.md_divide = md_divide; 706 } 707 cmpci_set_out_ports(sc); 708 cmpci_set_in_ports(sc); 709 } 710 return 0; 711 } 712 713 /* ARGSUSED */ 714 static int 715 cmpci_round_blocksize(void *handle, int block, 716 int mode, const audio_params_t *param) 717 { 718 719 return block & -4; 720 } 721 722 static int 723 cmpci_halt_output(void *handle) 724 { 725 struct cmpci_softc *sc; 726 727 sc = handle; 728 sc->sc_play.intr = NULL; 729 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 730 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); 731 /* wait for reset DMA */ 732 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); 733 delay(10); 734 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); 735 736 return 0; 737 } 738 739 static int 740 cmpci_halt_input(void *handle) 741 { 742 struct cmpci_softc *sc; 743 744 sc = handle; 745 sc->sc_rec.intr = NULL; 746 cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 747 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); 748 /* wait for reset DMA */ 749 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); 750 delay(10); 751 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); 752 753 return 0; 754 } 755 756 /* get audio device information */ 757 static int 758 cmpci_getdev(void *handle, struct audio_device *ad) 759 { 760 struct cmpci_softc *sc; 761 762 sc = handle; 763 strncpy(ad->name, "CMI PCI Audio", sizeof(ad->name)); 764 snprintf(ad->version, sizeof(ad->version), "0x%02x", 765 PCI_REVISION(sc->sc_class)); 766 switch (PCI_PRODUCT(sc->sc_id)) { 767 case PCI_PRODUCT_CMEDIA_CMI8338A: 768 strncpy(ad->config, "CMI8338A", sizeof(ad->config)); 769 break; 770 case PCI_PRODUCT_CMEDIA_CMI8338B: 771 strncpy(ad->config, "CMI8338B", sizeof(ad->config)); 772 break; 773 case PCI_PRODUCT_CMEDIA_CMI8738: 774 strncpy(ad->config, "CMI8738", sizeof(ad->config)); 775 break; 776 case PCI_PRODUCT_CMEDIA_CMI8738B: 777 strncpy(ad->config, "CMI8738B", sizeof(ad->config)); 778 break; 779 default: 780 strncpy(ad->config, "unknown", sizeof(ad->config)); 781 } 782 783 return 0; 784 } 785 786 /* mixer device information */ 787 int 788 cmpci_query_devinfo(void *handle, mixer_devinfo_t *dip) 789 { 790 static const char *const mixer_port_names[] = { 791 AudioNdac, AudioNfmsynth, AudioNcd, AudioNline, AudioNaux, 792 AudioNmicrophone 793 }; 794 static const char *const mixer_classes[] = { 795 AudioCinputs, AudioCoutputs, AudioCrecord, CmpciCplayback, 796 CmpciCspdif 797 }; 798 struct cmpci_softc *sc; 799 int i; 800 801 sc = handle; 802 dip->prev = dip->next = AUDIO_MIXER_LAST; 803 804 switch (dip->index) { 805 case CMPCI_INPUT_CLASS: 806 case CMPCI_OUTPUT_CLASS: 807 case CMPCI_RECORD_CLASS: 808 case CMPCI_PLAYBACK_CLASS: 809 case CMPCI_SPDIF_CLASS: 810 dip->type = AUDIO_MIXER_CLASS; 811 dip->mixer_class = dip->index; 812 strcpy(dip->label.name, 813 mixer_classes[dip->index - CMPCI_INPUT_CLASS]); 814 return 0; 815 816 case CMPCI_AUX_IN_VOL: 817 dip->un.v.delta = 1 << (8 - CMPCI_REG_AUX_VALBITS); 818 goto vol1; 819 case CMPCI_DAC_VOL: 820 case CMPCI_FM_VOL: 821 case CMPCI_CD_VOL: 822 case CMPCI_LINE_IN_VOL: 823 case CMPCI_MIC_VOL: 824 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS); 825 vol1: dip->mixer_class = CMPCI_INPUT_CLASS; 826 dip->next = dip->index + 6; /* CMPCI_xxx_MUTE */ 827 strcpy(dip->label.name, mixer_port_names[dip->index]); 828 dip->un.v.num_channels = (dip->index == CMPCI_MIC_VOL ? 1 : 2); 829 vol: 830 dip->type = AUDIO_MIXER_VALUE; 831 strcpy(dip->un.v.units.name, AudioNvolume); 832 return 0; 833 834 case CMPCI_MIC_MUTE: 835 dip->next = CMPCI_MIC_PREAMP; 836 /* FALLTHROUGH */ 837 case CMPCI_DAC_MUTE: 838 case CMPCI_FM_MUTE: 839 case CMPCI_CD_MUTE: 840 case CMPCI_LINE_IN_MUTE: 841 case CMPCI_AUX_IN_MUTE: 842 dip->prev = dip->index - 6; /* CMPCI_xxx_VOL */ 843 dip->mixer_class = CMPCI_INPUT_CLASS; 844 strcpy(dip->label.name, AudioNmute); 845 goto on_off; 846 on_off: 847 dip->type = AUDIO_MIXER_ENUM; 848 dip->un.e.num_mem = 2; 849 strcpy(dip->un.e.member[0].label.name, AudioNoff); 850 dip->un.e.member[0].ord = 0; 851 strcpy(dip->un.e.member[1].label.name, AudioNon); 852 dip->un.e.member[1].ord = 1; 853 return 0; 854 855 case CMPCI_MIC_PREAMP: 856 dip->mixer_class = CMPCI_INPUT_CLASS; 857 dip->prev = CMPCI_MIC_MUTE; 858 strcpy(dip->label.name, AudioNpreamp); 859 goto on_off; 860 case CMPCI_PCSPEAKER: 861 dip->mixer_class = CMPCI_INPUT_CLASS; 862 strcpy(dip->label.name, AudioNspeaker); 863 dip->un.v.num_channels = 1; 864 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_SPEAKER_VALBITS); 865 goto vol; 866 case CMPCI_RECORD_SOURCE: 867 dip->mixer_class = CMPCI_RECORD_CLASS; 868 strcpy(dip->label.name, AudioNsource); 869 dip->type = AUDIO_MIXER_SET; 870 dip->un.s.num_mem = 7; 871 strcpy(dip->un.s.member[0].label.name, AudioNmicrophone); 872 dip->un.s.member[0].mask = CMPCI_RECORD_SOURCE_MIC; 873 strcpy(dip->un.s.member[1].label.name, AudioNcd); 874 dip->un.s.member[1].mask = CMPCI_RECORD_SOURCE_CD; 875 strcpy(dip->un.s.member[2].label.name, AudioNline); 876 dip->un.s.member[2].mask = CMPCI_RECORD_SOURCE_LINE_IN; 877 strcpy(dip->un.s.member[3].label.name, AudioNaux); 878 dip->un.s.member[3].mask = CMPCI_RECORD_SOURCE_AUX_IN; 879 strcpy(dip->un.s.member[4].label.name, AudioNwave); 880 dip->un.s.member[4].mask = CMPCI_RECORD_SOURCE_WAVE; 881 strcpy(dip->un.s.member[5].label.name, AudioNfmsynth); 882 dip->un.s.member[5].mask = CMPCI_RECORD_SOURCE_FM; 883 strcpy(dip->un.s.member[6].label.name, CmpciNspdif); 884 dip->un.s.member[6].mask = CMPCI_RECORD_SOURCE_SPDIF; 885 return 0; 886 case CMPCI_MIC_RECVOL: 887 dip->mixer_class = CMPCI_RECORD_CLASS; 888 strcpy(dip->label.name, AudioNmicrophone); 889 dip->un.v.num_channels = 1; 890 dip->un.v.delta = 1 << (8 - CMPCI_REG_ADMIC_VALBITS); 891 goto vol; 892 893 case CMPCI_PLAYBACK_MODE: 894 dip->mixer_class = CMPCI_PLAYBACK_CLASS; 895 dip->type = AUDIO_MIXER_ENUM; 896 strcpy(dip->label.name, AudioNmode); 897 dip->un.e.num_mem = 2; 898 strcpy(dip->un.e.member[0].label.name, AudioNdac); 899 dip->un.e.member[0].ord = CMPCI_PLAYBACK_MODE_WAVE; 900 strcpy(dip->un.e.member[1].label.name, CmpciNspdif); 901 dip->un.e.member[1].ord = CMPCI_PLAYBACK_MODE_SPDIF; 902 return 0; 903 case CMPCI_SPDIF_IN_SELECT: 904 dip->mixer_class = CMPCI_SPDIF_CLASS; 905 dip->type = AUDIO_MIXER_ENUM; 906 dip->next = CMPCI_SPDIF_IN_PHASE; 907 strcpy(dip->label.name, AudioNinput); 908 i = 0; 909 strcpy(dip->un.e.member[i].label.name, CmpciNspdin1); 910 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN1; 911 if (CMPCI_ISCAP(sc, 2ND_SPDIN)) { 912 strcpy(dip->un.e.member[i].label.name, CmpciNspdin2); 913 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN2; 914 } 915 strcpy(dip->un.e.member[i].label.name, CmpciNspdout); 916 dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDOUT; 917 dip->un.e.num_mem = i; 918 return 0; 919 case CMPCI_SPDIF_IN_PHASE: 920 dip->mixer_class = CMPCI_SPDIF_CLASS; 921 dip->prev = CMPCI_SPDIF_IN_SELECT; 922 strcpy(dip->label.name, CmpciNphase); 923 dip->type = AUDIO_MIXER_ENUM; 924 dip->un.e.num_mem = 2; 925 strcpy(dip->un.e.member[0].label.name, CmpciNpositive); 926 dip->un.e.member[0].ord = CMPCI_SPDIF_IN_PHASE_POSITIVE; 927 strcpy(dip->un.e.member[1].label.name, CmpciNnegative); 928 dip->un.e.member[1].ord = CMPCI_SPDIF_IN_PHASE_NEGATIVE; 929 return 0; 930 case CMPCI_SPDIF_LOOP: 931 dip->mixer_class = CMPCI_SPDIF_CLASS; 932 dip->next = CMPCI_SPDIF_OUT_PLAYBACK; 933 strcpy(dip->label.name, AudioNoutput); 934 dip->type = AUDIO_MIXER_ENUM; 935 dip->un.e.num_mem = 2; 936 strcpy(dip->un.e.member[0].label.name, CmpciNplayback); 937 dip->un.e.member[0].ord = CMPCI_SPDIF_LOOP_OFF; 938 strcpy(dip->un.e.member[1].label.name, CmpciNspdin); 939 dip->un.e.member[1].ord = CMPCI_SPDIF_LOOP_ON; 940 return 0; 941 case CMPCI_SPDIF_OUT_PLAYBACK: 942 dip->mixer_class = CMPCI_SPDIF_CLASS; 943 dip->prev = CMPCI_SPDIF_LOOP; 944 dip->next = CMPCI_SPDIF_OUT_VOLTAGE; 945 strcpy(dip->label.name, CmpciNplayback); 946 dip->type = AUDIO_MIXER_ENUM; 947 dip->un.e.num_mem = 2; 948 strcpy(dip->un.e.member[0].label.name, AudioNwave); 949 dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_PLAYBACK_WAVE; 950 strcpy(dip->un.e.member[1].label.name, CmpciNlegacy); 951 dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_PLAYBACK_LEGACY; 952 return 0; 953 case CMPCI_SPDIF_OUT_VOLTAGE: 954 dip->mixer_class = CMPCI_SPDIF_CLASS; 955 dip->prev = CMPCI_SPDIF_OUT_PLAYBACK; 956 strcpy(dip->label.name, CmpciNvoltage); 957 dip->type = AUDIO_MIXER_ENUM; 958 dip->un.e.num_mem = 2; 959 strcpy(dip->un.e.member[0].label.name, CmpciNhigh_v); 960 dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_VOLTAGE_HIGH; 961 strcpy(dip->un.e.member[1].label.name, CmpciNlow_v); 962 dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_VOLTAGE_LOW; 963 return 0; 964 case CMPCI_MONITOR_DAC: 965 dip->mixer_class = CMPCI_SPDIF_CLASS; 966 strcpy(dip->label.name, AudioNmonitor); 967 dip->type = AUDIO_MIXER_ENUM; 968 dip->un.e.num_mem = 3; 969 strcpy(dip->un.e.member[0].label.name, AudioNoff); 970 dip->un.e.member[0].ord = CMPCI_MONITOR_DAC_OFF; 971 strcpy(dip->un.e.member[1].label.name, CmpciNspdin); 972 dip->un.e.member[1].ord = CMPCI_MONITOR_DAC_SPDIN; 973 strcpy(dip->un.e.member[2].label.name, CmpciNspdout); 974 dip->un.e.member[2].ord = CMPCI_MONITOR_DAC_SPDOUT; 975 return 0; 976 977 case CMPCI_MASTER_VOL: 978 dip->mixer_class = CMPCI_OUTPUT_CLASS; 979 strcpy(dip->label.name, AudioNmaster); 980 dip->un.v.num_channels = 2; 981 dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS); 982 goto vol; 983 case CMPCI_REAR: 984 dip->mixer_class = CMPCI_OUTPUT_CLASS; 985 dip->next = CMPCI_INDIVIDUAL; 986 strcpy(dip->label.name, CmpciNrear); 987 goto on_off; 988 case CMPCI_INDIVIDUAL: 989 dip->mixer_class = CMPCI_OUTPUT_CLASS; 990 dip->prev = CMPCI_REAR; 991 dip->next = CMPCI_REVERSE; 992 strcpy(dip->label.name, CmpciNindividual); 993 goto on_off; 994 case CMPCI_REVERSE: 995 dip->mixer_class = CMPCI_OUTPUT_CLASS; 996 dip->prev = CMPCI_INDIVIDUAL; 997 strcpy(dip->label.name, CmpciNreverse); 998 goto on_off; 999 case CMPCI_SURROUND: 1000 dip->mixer_class = CMPCI_OUTPUT_CLASS; 1001 strcpy(dip->label.name, CmpciNsurround); 1002 goto on_off; 1003 } 1004 1005 return ENXIO; 1006 } 1007 1008 static int 1009 cmpci_alloc_dmamem(struct cmpci_softc *sc, size_t size, void **r_addr) 1010 { 1011 int error; 1012 struct cmpci_dmanode *n; 1013 1014 error = 0; 1015 n = kmem_alloc(sizeof(*n), KM_SLEEP); 1016 1017 #define CMPCI_DMABUF_ALIGN 0x4 1018 #define CMPCI_DMABUF_BOUNDARY 0x0 1019 n->cd_tag = sc->sc_dmat; 1020 n->cd_size = size; 1021 error = bus_dmamem_alloc(n->cd_tag, n->cd_size, 1022 CMPCI_DMABUF_ALIGN, CMPCI_DMABUF_BOUNDARY, n->cd_segs, 1023 sizeof(n->cd_segs)/sizeof(n->cd_segs[0]), &n->cd_nsegs, 1024 BUS_DMA_WAITOK); 1025 if (error) 1026 goto mfree; 1027 error = bus_dmamem_map(n->cd_tag, n->cd_segs, n->cd_nsegs, n->cd_size, 1028 &n->cd_addr, BUS_DMA_WAITOK | BUS_DMA_COHERENT); 1029 if (error) 1030 goto dmafree; 1031 error = bus_dmamap_create(n->cd_tag, n->cd_size, 1, n->cd_size, 0, 1032 BUS_DMA_WAITOK, &n->cd_map); 1033 if (error) 1034 goto unmap; 1035 error = bus_dmamap_load(n->cd_tag, n->cd_map, n->cd_addr, n->cd_size, 1036 NULL, BUS_DMA_WAITOK); 1037 if (error) 1038 goto destroy; 1039 1040 n->cd_next = sc->sc_dmap; 1041 sc->sc_dmap = n; 1042 *r_addr = KVADDR(n); 1043 return 0; 1044 1045 destroy: 1046 bus_dmamap_destroy(n->cd_tag, n->cd_map); 1047 unmap: 1048 bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size); 1049 dmafree: 1050 bus_dmamem_free(n->cd_tag, 1051 n->cd_segs, sizeof(n->cd_segs)/sizeof(n->cd_segs[0])); 1052 mfree: 1053 kmem_free(n, sizeof(*n)); 1054 return error; 1055 } 1056 1057 static int 1058 cmpci_free_dmamem(struct cmpci_softc *sc, void *addr, size_t size) 1059 { 1060 struct cmpci_dmanode **nnp; 1061 1062 for (nnp = &sc->sc_dmap; *nnp; nnp= &(*nnp)->cd_next) { 1063 if ((*nnp)->cd_addr == addr) { 1064 struct cmpci_dmanode *n = *nnp; 1065 bus_dmamap_unload(n->cd_tag, n->cd_map); 1066 bus_dmamap_destroy(n->cd_tag, n->cd_map); 1067 bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size); 1068 bus_dmamem_free(n->cd_tag, n->cd_segs, 1069 sizeof(n->cd_segs)/sizeof(n->cd_segs[0])); 1070 kmem_free(n, sizeof(*n)); 1071 return 0; 1072 } 1073 } 1074 return -1; 1075 } 1076 1077 static struct cmpci_dmanode * 1078 cmpci_find_dmamem(struct cmpci_softc *sc, void *addr) 1079 { 1080 struct cmpci_dmanode *p; 1081 1082 for (p = sc->sc_dmap; p; p = p->cd_next) 1083 if (KVADDR(p) == (void *)addr) 1084 break; 1085 return p; 1086 } 1087 1088 #if 0 1089 static void 1090 cmpci_print_dmamem(struct cmpci_dmanode *); 1091 static void 1092 cmpci_print_dmamem(struct cmpci_dmanode *p) 1093 { 1094 1095 DPRINTF(("DMA at virt:%p, dmaseg:%p, mapseg:%p, size:%p\n", 1096 (void *)p->cd_addr, (void *)p->cd_segs[0].ds_addr, 1097 (void *)DMAADDR(p), (void *)p->cd_size)); 1098 } 1099 #endif /* DEBUG */ 1100 1101 static void * 1102 cmpci_allocm(void *handle, int direction, size_t size) 1103 { 1104 void *addr; 1105 1106 addr = NULL; /* XXX gcc */ 1107 1108 if (cmpci_alloc_dmamem(handle, size, &addr)) 1109 return NULL; 1110 return addr; 1111 } 1112 1113 static void 1114 cmpci_freem(void *handle, void *addr, size_t size) 1115 { 1116 1117 cmpci_free_dmamem(handle, addr, size); 1118 } 1119 1120 #define MAXVAL 256 1121 static int 1122 cmpci_adjust(int val, int mask) 1123 { 1124 1125 val += (MAXVAL - mask) >> 1; 1126 if (val >= MAXVAL) 1127 val = MAXVAL-1; 1128 return val & mask; 1129 } 1130 1131 static void 1132 cmpci_set_mixer_gain(struct cmpci_softc *sc, int port) 1133 { 1134 int src; 1135 int bits, mask; 1136 1137 switch (port) { 1138 case CMPCI_MIC_VOL: 1139 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_MIC, 1140 CMPCI_ADJUST_MIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1141 return; 1142 case CMPCI_MASTER_VOL: 1143 src = CMPCI_SB16_MIXER_MASTER_L; 1144 break; 1145 case CMPCI_LINE_IN_VOL: 1146 src = CMPCI_SB16_MIXER_LINE_L; 1147 break; 1148 case CMPCI_AUX_IN_VOL: 1149 bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MIXER_AUX, 1150 CMPCI_ADJUST_AUX_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT], 1151 sc->sc_gain[port][CMPCI_RIGHT])); 1152 return; 1153 case CMPCI_MIC_RECVOL: 1154 cmpci_reg_partial_write_1(sc, CMPCI_REG_MIXER25, 1155 CMPCI_REG_ADMIC_SHIFT, CMPCI_REG_ADMIC_MASK, 1156 CMPCI_ADJUST_ADMIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1157 return; 1158 case CMPCI_DAC_VOL: 1159 src = CMPCI_SB16_MIXER_VOICE_L; 1160 break; 1161 case CMPCI_FM_VOL: 1162 src = CMPCI_SB16_MIXER_FM_L; 1163 break; 1164 case CMPCI_CD_VOL: 1165 src = CMPCI_SB16_MIXER_CDDA_L; 1166 break; 1167 case CMPCI_PCSPEAKER: 1168 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_SPEAKER, 1169 CMPCI_ADJUST_2_GAIN(sc, sc->sc_gain[port][CMPCI_LR])); 1170 return; 1171 case CMPCI_MIC_PREAMP: 1172 if (sc->sc_gain[port][CMPCI_LR]) 1173 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1174 CMPCI_REG_MICGAINZ); 1175 else 1176 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1177 CMPCI_REG_MICGAINZ); 1178 return; 1179 1180 case CMPCI_DAC_MUTE: 1181 if (sc->sc_gain[port][CMPCI_LR]) 1182 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1183 CMPCI_REG_WSMUTE); 1184 else 1185 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1186 CMPCI_REG_WSMUTE); 1187 return; 1188 case CMPCI_FM_MUTE: 1189 if (sc->sc_gain[port][CMPCI_LR]) 1190 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1191 CMPCI_REG_FMMUTE); 1192 else 1193 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1194 CMPCI_REG_FMMUTE); 1195 return; 1196 case CMPCI_AUX_IN_MUTE: 1197 if (sc->sc_gain[port][CMPCI_LR]) 1198 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1199 CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM); 1200 else 1201 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1202 CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM); 1203 return; 1204 case CMPCI_CD_MUTE: 1205 mask = CMPCI_SB16_SW_CD; 1206 goto sbmute; 1207 case CMPCI_MIC_MUTE: 1208 mask = CMPCI_SB16_SW_MIC; 1209 goto sbmute; 1210 case CMPCI_LINE_IN_MUTE: 1211 mask = CMPCI_SB16_SW_LINE; 1212 sbmute: 1213 bits = cmpci_mixerreg_read(sc, CMPCI_SB16_MIXER_OUTMIX); 1214 if (sc->sc_gain[port][CMPCI_LR]) 1215 bits = bits & ~mask; 1216 else 1217 bits = bits | mask; 1218 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, bits); 1219 return; 1220 1221 case CMPCI_SPDIF_IN_SELECT: 1222 case CMPCI_MONITOR_DAC: 1223 case CMPCI_PLAYBACK_MODE: 1224 case CMPCI_SPDIF_LOOP: 1225 case CMPCI_SPDIF_OUT_PLAYBACK: 1226 cmpci_set_out_ports(sc); 1227 return; 1228 case CMPCI_SPDIF_OUT_VOLTAGE: 1229 if (CMPCI_ISCAP(sc, SPDOUT_VOLTAGE)) { 1230 if (sc->sc_gain[CMPCI_SPDIF_OUT_VOLTAGE][CMPCI_LR] 1231 == CMPCI_SPDIF_OUT_VOLTAGE_HIGH) 1232 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_5V); 1233 else 1234 cmpci_reg_set_reg_misc(sc, CMPCI_REG_5V); 1235 } 1236 return; 1237 case CMPCI_SURROUND: 1238 if (CMPCI_ISCAP(sc, SURROUND)) { 1239 if (sc->sc_gain[CMPCI_SURROUND][CMPCI_LR]) 1240 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1241 CMPCI_REG_SURROUND); 1242 else 1243 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1244 CMPCI_REG_SURROUND); 1245 } 1246 return; 1247 case CMPCI_REAR: 1248 if (CMPCI_ISCAP(sc, REAR)) { 1249 if (sc->sc_gain[CMPCI_REAR][CMPCI_LR]) 1250 cmpci_reg_set_reg_misc(sc, CMPCI_REG_N4SPK3D); 1251 else 1252 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_N4SPK3D); 1253 } 1254 return; 1255 case CMPCI_INDIVIDUAL: 1256 if (CMPCI_ISCAP(sc, INDIVIDUAL_REAR)) { 1257 if (sc->sc_gain[CMPCI_REAR][CMPCI_LR]) 1258 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1259 CMPCI_REG_INDIVIDUAL); 1260 else 1261 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1262 CMPCI_REG_INDIVIDUAL); 1263 } 1264 return; 1265 case CMPCI_REVERSE: 1266 if (CMPCI_ISCAP(sc, REVERSE_FR)) { 1267 if (sc->sc_gain[CMPCI_REVERSE][CMPCI_LR]) 1268 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1269 CMPCI_REG_REVERSE_FR); 1270 else 1271 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1272 CMPCI_REG_REVERSE_FR); 1273 } 1274 return; 1275 case CMPCI_SPDIF_IN_PHASE: 1276 if (CMPCI_ISCAP(sc, SPDIN_PHASE)) { 1277 if (sc->sc_gain[CMPCI_SPDIF_IN_PHASE][CMPCI_LR] 1278 == CMPCI_SPDIF_IN_PHASE_POSITIVE) 1279 cmpci_reg_clear_1(sc, CMPCI_REG_CHANNEL_FORMAT, 1280 CMPCI_REG_SPDIN_PHASE); 1281 else 1282 cmpci_reg_set_1(sc, CMPCI_REG_CHANNEL_FORMAT, 1283 CMPCI_REG_SPDIN_PHASE); 1284 } 1285 return; 1286 default: 1287 return; 1288 } 1289 1290 cmpci_mixerreg_write(sc, src, 1291 CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT])); 1292 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_L_TO_R(src), 1293 CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_RIGHT])); 1294 } 1295 1296 static void 1297 cmpci_set_out_ports(struct cmpci_softc *sc) 1298 { 1299 uint8_t v; 1300 int enspdout; 1301 1302 if (!CMPCI_ISCAP(sc, SPDLOOP)) 1303 return; 1304 1305 /* SPDIF/out select */ 1306 if (sc->sc_gain[CMPCI_SPDIF_LOOP][CMPCI_LR] == CMPCI_SPDIF_LOOP_OFF) { 1307 /* playback */ 1308 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP); 1309 } else { 1310 /* monitor SPDIF/in */ 1311 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP); 1312 } 1313 1314 /* SPDIF in select */ 1315 v = sc->sc_gain[CMPCI_SPDIF_IN_SELECT][CMPCI_LR]; 1316 if (v & CMPCI_SPDIFIN_SPDIFIN2) 1317 cmpci_reg_set_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN); 1318 else 1319 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN); 1320 if (v & CMPCI_SPDIFIN_SPDIFOUT) 1321 cmpci_reg_set_reg_misc(sc, CMPCI_REG_SPDFLOOPI); 1322 else 1323 cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPDFLOOPI); 1324 1325 enspdout = 0; 1326 /* playback to ... */ 1327 if (CMPCI_ISCAP(sc, SPDOUT) && 1328 sc->sc_gain[CMPCI_PLAYBACK_MODE][CMPCI_LR] 1329 == CMPCI_PLAYBACK_MODE_SPDIF && 1330 (sc->sc_play.md_divide == CMPCI_REG_RATE_44100 || 1331 (CMPCI_ISCAP(sc, SPDOUT_48K) && 1332 sc->sc_play.md_divide==CMPCI_REG_RATE_48000))) { 1333 /* playback to SPDIF */ 1334 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE); 1335 enspdout = 1; 1336 if (sc->sc_play.md_divide==CMPCI_REG_RATE_48000) 1337 cmpci_reg_set_reg_misc(sc, 1338 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1339 else 1340 cmpci_reg_clear_reg_misc(sc, 1341 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1342 } else { 1343 /* playback to DAC */ 1344 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, 1345 CMPCI_REG_SPDIF0_ENABLE); 1346 if (CMPCI_ISCAP(sc, SPDOUT_48K)) 1347 cmpci_reg_clear_reg_misc(sc, 1348 CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); 1349 } 1350 1351 /* legacy to SPDIF/out or not */ 1352 if (CMPCI_ISCAP(sc, SPDLEGACY)) { 1353 if (sc->sc_gain[CMPCI_SPDIF_OUT_PLAYBACK][CMPCI_LR] 1354 == CMPCI_SPDIF_OUT_PLAYBACK_WAVE) 1355 cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL, 1356 CMPCI_REG_LEGACY_SPDIF_ENABLE); 1357 else { 1358 cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL, 1359 CMPCI_REG_LEGACY_SPDIF_ENABLE); 1360 enspdout = 1; 1361 } 1362 } 1363 1364 /* enable/disable SPDIF/out */ 1365 if (CMPCI_ISCAP(sc, XSPDOUT) && enspdout) 1366 cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL, 1367 CMPCI_REG_XSPDIF_ENABLE); 1368 else 1369 cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL, 1370 CMPCI_REG_XSPDIF_ENABLE); 1371 1372 /* SPDIF monitor (digital to analog output) */ 1373 if (CMPCI_ISCAP(sc, SPDIN_MONITOR)) { 1374 v = sc->sc_gain[CMPCI_MONITOR_DAC][CMPCI_LR]; 1375 if (!(v & CMPCI_MONDAC_ENABLE)) 1376 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1377 CMPCI_REG_SPDIN_MONITOR); 1378 if (v & CMPCI_MONDAC_SPDOUT) 1379 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, 1380 CMPCI_REG_SPDIFOUT_DAC); 1381 else 1382 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, 1383 CMPCI_REG_SPDIFOUT_DAC); 1384 if (v & CMPCI_MONDAC_ENABLE) 1385 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1386 CMPCI_REG_SPDIN_MONITOR); 1387 } 1388 } 1389 1390 static int 1391 cmpci_set_in_ports(struct cmpci_softc *sc) 1392 { 1393 int mask; 1394 int bitsl, bitsr; 1395 1396 mask = sc->sc_in_mask; 1397 1398 /* 1399 * Note CMPCI_RECORD_SOURCE_CD, CMPCI_RECORD_SOURCE_LINE_IN and 1400 * CMPCI_RECORD_SOURCE_FM are defined to the corresponding bit 1401 * of the mixer register. 1402 */ 1403 bitsr = mask & (CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN | 1404 CMPCI_RECORD_SOURCE_FM); 1405 1406 bitsl = CMPCI_SB16_MIXER_SRC_R_TO_L(bitsr); 1407 if (mask & CMPCI_RECORD_SOURCE_MIC) { 1408 bitsl |= CMPCI_SB16_MIXER_MIC_SRC; 1409 bitsr |= CMPCI_SB16_MIXER_MIC_SRC; 1410 } 1411 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, bitsl); 1412 cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, bitsr); 1413 1414 if (mask & CMPCI_RECORD_SOURCE_AUX_IN) 1415 cmpci_reg_set_1(sc, CMPCI_REG_MIXER25, 1416 CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN); 1417 else 1418 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25, 1419 CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN); 1420 1421 if (mask & CMPCI_RECORD_SOURCE_WAVE) 1422 cmpci_reg_set_1(sc, CMPCI_REG_MIXER24, 1423 CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR); 1424 else 1425 cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24, 1426 CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR); 1427 1428 if (CMPCI_ISCAP(sc, SPDIN) && 1429 (sc->sc_rec.md_divide == CMPCI_REG_RATE_44100 || 1430 (CMPCI_ISCAP(sc, SPDOUT_48K) && 1431 sc->sc_rec.md_divide == CMPCI_REG_RATE_48000/* XXX? */))) { 1432 if (mask & CMPCI_RECORD_SOURCE_SPDIF) { 1433 /* enable SPDIF/in */ 1434 cmpci_reg_set_4(sc, 1435 CMPCI_REG_FUNC_1, 1436 CMPCI_REG_SPDIF1_ENABLE); 1437 } else { 1438 cmpci_reg_clear_4(sc, 1439 CMPCI_REG_FUNC_1, 1440 CMPCI_REG_SPDIF1_ENABLE); 1441 } 1442 } 1443 1444 return 0; 1445 } 1446 1447 static int 1448 cmpci_set_port(void *handle, mixer_ctrl_t *cp) 1449 { 1450 struct cmpci_softc *sc; 1451 int lgain, rgain; 1452 1453 sc = handle; 1454 switch (cp->dev) { 1455 case CMPCI_MIC_VOL: 1456 case CMPCI_PCSPEAKER: 1457 case CMPCI_MIC_RECVOL: 1458 if (cp->un.value.num_channels != 1) 1459 return EINVAL; 1460 /* FALLTHROUGH */ 1461 case CMPCI_DAC_VOL: 1462 case CMPCI_FM_VOL: 1463 case CMPCI_CD_VOL: 1464 case CMPCI_LINE_IN_VOL: 1465 case CMPCI_AUX_IN_VOL: 1466 case CMPCI_MASTER_VOL: 1467 if (cp->type != AUDIO_MIXER_VALUE) 1468 return EINVAL; 1469 switch (cp->un.value.num_channels) { 1470 case 1: 1471 lgain = rgain = 1472 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]; 1473 break; 1474 case 2: 1475 lgain = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]; 1476 rgain = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]; 1477 break; 1478 default: 1479 return EINVAL; 1480 } 1481 sc->sc_gain[cp->dev][CMPCI_LEFT] = lgain; 1482 sc->sc_gain[cp->dev][CMPCI_RIGHT] = rgain; 1483 1484 cmpci_set_mixer_gain(sc, cp->dev); 1485 break; 1486 1487 case CMPCI_RECORD_SOURCE: 1488 if (cp->type != AUDIO_MIXER_SET) 1489 return EINVAL; 1490 1491 if (cp->un.mask & ~(CMPCI_RECORD_SOURCE_MIC | 1492 CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN | 1493 CMPCI_RECORD_SOURCE_AUX_IN | CMPCI_RECORD_SOURCE_WAVE | 1494 CMPCI_RECORD_SOURCE_FM | CMPCI_RECORD_SOURCE_SPDIF)) 1495 return EINVAL; 1496 1497 if (cp->un.mask & CMPCI_RECORD_SOURCE_SPDIF) 1498 cp->un.mask = CMPCI_RECORD_SOURCE_SPDIF; 1499 1500 sc->sc_in_mask = cp->un.mask; 1501 return cmpci_set_in_ports(sc); 1502 1503 /* boolean */ 1504 case CMPCI_DAC_MUTE: 1505 case CMPCI_FM_MUTE: 1506 case CMPCI_CD_MUTE: 1507 case CMPCI_LINE_IN_MUTE: 1508 case CMPCI_AUX_IN_MUTE: 1509 case CMPCI_MIC_MUTE: 1510 case CMPCI_MIC_PREAMP: 1511 case CMPCI_PLAYBACK_MODE: 1512 case CMPCI_SPDIF_IN_PHASE: 1513 case CMPCI_SPDIF_LOOP: 1514 case CMPCI_SPDIF_OUT_PLAYBACK: 1515 case CMPCI_SPDIF_OUT_VOLTAGE: 1516 case CMPCI_REAR: 1517 case CMPCI_INDIVIDUAL: 1518 case CMPCI_REVERSE: 1519 case CMPCI_SURROUND: 1520 if (cp->type != AUDIO_MIXER_ENUM) 1521 return EINVAL; 1522 sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord != 0; 1523 cmpci_set_mixer_gain(sc, cp->dev); 1524 break; 1525 1526 case CMPCI_SPDIF_IN_SELECT: 1527 switch (cp->un.ord) { 1528 case CMPCI_SPDIF_IN_SPDIN1: 1529 case CMPCI_SPDIF_IN_SPDIN2: 1530 case CMPCI_SPDIF_IN_SPDOUT: 1531 break; 1532 default: 1533 return EINVAL; 1534 } 1535 goto xenum; 1536 case CMPCI_MONITOR_DAC: 1537 switch (cp->un.ord) { 1538 case CMPCI_MONITOR_DAC_OFF: 1539 case CMPCI_MONITOR_DAC_SPDIN: 1540 case CMPCI_MONITOR_DAC_SPDOUT: 1541 break; 1542 default: 1543 return EINVAL; 1544 } 1545 xenum: 1546 if (cp->type != AUDIO_MIXER_ENUM) 1547 return EINVAL; 1548 sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord; 1549 cmpci_set_mixer_gain(sc, cp->dev); 1550 break; 1551 1552 default: 1553 return EINVAL; 1554 } 1555 1556 return 0; 1557 } 1558 1559 static int 1560 cmpci_get_port(void *handle, mixer_ctrl_t *cp) 1561 { 1562 struct cmpci_softc *sc; 1563 1564 sc = handle; 1565 switch (cp->dev) { 1566 case CMPCI_MIC_VOL: 1567 case CMPCI_PCSPEAKER: 1568 case CMPCI_MIC_RECVOL: 1569 if (cp->un.value.num_channels != 1) 1570 return EINVAL; 1571 /*FALLTHROUGH*/ 1572 case CMPCI_DAC_VOL: 1573 case CMPCI_FM_VOL: 1574 case CMPCI_CD_VOL: 1575 case CMPCI_LINE_IN_VOL: 1576 case CMPCI_AUX_IN_VOL: 1577 case CMPCI_MASTER_VOL: 1578 switch (cp->un.value.num_channels) { 1579 case 1: 1580 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = 1581 sc->sc_gain[cp->dev][CMPCI_LEFT]; 1582 break; 1583 case 2: 1584 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 1585 sc->sc_gain[cp->dev][CMPCI_LEFT]; 1586 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 1587 sc->sc_gain[cp->dev][CMPCI_RIGHT]; 1588 break; 1589 default: 1590 return EINVAL; 1591 } 1592 break; 1593 1594 case CMPCI_RECORD_SOURCE: 1595 cp->un.mask = sc->sc_in_mask; 1596 break; 1597 1598 case CMPCI_DAC_MUTE: 1599 case CMPCI_FM_MUTE: 1600 case CMPCI_CD_MUTE: 1601 case CMPCI_LINE_IN_MUTE: 1602 case CMPCI_AUX_IN_MUTE: 1603 case CMPCI_MIC_MUTE: 1604 case CMPCI_MIC_PREAMP: 1605 case CMPCI_PLAYBACK_MODE: 1606 case CMPCI_SPDIF_IN_SELECT: 1607 case CMPCI_SPDIF_IN_PHASE: 1608 case CMPCI_SPDIF_LOOP: 1609 case CMPCI_SPDIF_OUT_PLAYBACK: 1610 case CMPCI_SPDIF_OUT_VOLTAGE: 1611 case CMPCI_MONITOR_DAC: 1612 case CMPCI_REAR: 1613 case CMPCI_INDIVIDUAL: 1614 case CMPCI_REVERSE: 1615 case CMPCI_SURROUND: 1616 cp->un.ord = sc->sc_gain[cp->dev][CMPCI_LR]; 1617 break; 1618 1619 default: 1620 return EINVAL; 1621 } 1622 1623 return 0; 1624 } 1625 1626 /* ARGSUSED */ 1627 static size_t 1628 cmpci_round_buffersize(void *handle, int direction, 1629 size_t bufsize) 1630 { 1631 1632 if (bufsize > 0x10000) 1633 bufsize = 0x10000; 1634 1635 return bufsize; 1636 } 1637 1638 static paddr_t 1639 cmpci_mappage(void *handle, void *addr, off_t offset, int prot) 1640 { 1641 struct cmpci_dmanode *p; 1642 1643 if (offset < 0 || NULL == (p = cmpci_find_dmamem(handle, addr))) 1644 return -1; 1645 1646 return bus_dmamem_mmap(p->cd_tag, p->cd_segs, 1647 sizeof(p->cd_segs)/sizeof(p->cd_segs[0]), 1648 offset, prot, BUS_DMA_WAITOK); 1649 } 1650 1651 /* ARGSUSED */ 1652 static int 1653 cmpci_get_props(void *handle) 1654 { 1655 1656 return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 1657 } 1658 1659 static int 1660 cmpci_trigger_output(void *handle, void *start, void *end, int blksize, 1661 void (*intr)(void *), void *arg, 1662 const audio_params_t *param) 1663 { 1664 struct cmpci_softc *sc; 1665 struct cmpci_dmanode *p; 1666 int bps; 1667 1668 sc = handle; 1669 sc->sc_play.intr = intr; 1670 sc->sc_play.intr_arg = arg; 1671 bps = param->channels * param->precision / 8; 1672 if (!bps) 1673 return EINVAL; 1674 1675 /* set DMA frame */ 1676 if (!(p = cmpci_find_dmamem(sc, start))) 1677 return EINVAL; 1678 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BASE, 1679 DMAADDR(p)); 1680 delay(10); 1681 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BYTES, 1682 ((char *)end - (char *)start + 1) / bps - 1); 1683 delay(10); 1684 1685 /* set interrupt count */ 1686 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_SAMPLES, 1687 (blksize + bps - 1) / bps - 1); 1688 delay(10); 1689 1690 /* start DMA */ 1691 cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); /* PLAY */ 1692 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 1693 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); 1694 1695 return 0; 1696 } 1697 1698 static int 1699 cmpci_trigger_input(void *handle, void *start, void *end, int blksize, 1700 void (*intr)(void *), void *arg, 1701 const audio_params_t *param) 1702 { 1703 struct cmpci_softc *sc; 1704 struct cmpci_dmanode *p; 1705 int bps; 1706 1707 sc = handle; 1708 sc->sc_rec.intr = intr; 1709 sc->sc_rec.intr_arg = arg; 1710 bps = param->channels * param->precision / 8; 1711 if (!bps) 1712 return EINVAL; 1713 1714 /* set DMA frame */ 1715 if (!(p=cmpci_find_dmamem(sc, start))) 1716 return EINVAL; 1717 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BASE, 1718 DMAADDR(p)); 1719 delay(10); 1720 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BYTES, 1721 ((char *)end - (char *)start + 1) / bps - 1); 1722 delay(10); 1723 1724 /* set interrupt count */ 1725 bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_SAMPLES, 1726 (blksize + bps - 1) / bps - 1); 1727 delay(10); 1728 1729 /* start DMA */ 1730 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_DIR); /* REC */ 1731 cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 1732 cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); 1733 1734 return 0; 1735 } 1736 1737 static void 1738 cmpci_get_locks(void *addr, kmutex_t **intr, kmutex_t **thread) 1739 { 1740 struct cmpci_softc *sc; 1741 1742 sc = addr; 1743 *intr = &sc->sc_intr_lock; 1744 *thread = &sc->sc_lock; 1745 } 1746 1747 /* end of file */ 1748
Indexes created Sun Sep 28 07:09:56 GMT 2025