cmpcivar.h revision 1.9.28.1 1 1.9.28.1 ad /* $NetBSD: cmpcivar.h,v 1.9.28.1 2007/02/27 14:16:21 ad Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.9.28.1 ad * Copyright (c) 2000, 2001, 2007 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.1 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.6 keihan * by Takuya SHIOZAKI <tshiozak (at) NetBSD.org> .
9 1.1 augustss *
10 1.4 itohy * This code is derived from software contributed to The NetBSD Foundation
11 1.4 itohy * by ITOH Yasufumi.
12 1.4 itohy *
13 1.1 augustss * Redistribution and use in source and binary forms, with or without
14 1.1 augustss * modification, are permitted provided that the following conditions
15 1.1 augustss * are met:
16 1.1 augustss * 1. Redistributions of source code must retain the above copyright
17 1.1 augustss * notice, this list of conditions and the following disclaimer.
18 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
19 1.1 augustss * notice, this list of conditions and the following disclaimer in the
20 1.1 augustss * documentation and/or other materials provided with the distribution.
21 1.1 augustss *
22 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23 1.1 augustss * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 1.1 augustss * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 1.1 augustss * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
26 1.1 augustss * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 1.1 augustss * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 1.1 augustss * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 1.1 augustss * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 1.1 augustss * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 1.1 augustss * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 1.1 augustss * SUCH DAMAGE.
33 1.1 augustss *
34 1.1 augustss */
35 1.1 augustss
36 1.1 augustss /* C-Media CMI8x38 Audio Chip Support */
37 1.1 augustss
38 1.1 augustss #ifndef _DEV_PCI_CMPCIVAR_H_
39 1.1 augustss #define _DEV_PCI_CMPCIVAR_H_ (1)
40 1.1 augustss
41 1.1 augustss
42 1.1 augustss /*
43 1.1 augustss * DMA pool
44 1.1 augustss */
45 1.1 augustss struct cmpci_dmanode {
46 1.2 tshiozak bus_dma_tag_t cd_tag;
47 1.2 tshiozak int cd_nsegs;
48 1.2 tshiozak bus_dma_segment_t cd_segs[1];
49 1.2 tshiozak bus_dmamap_t cd_map;
50 1.2 tshiozak caddr_t cd_addr;
51 1.2 tshiozak size_t cd_size;
52 1.2 tshiozak struct cmpci_dmanode *cd_next;
53 1.1 augustss };
54 1.1 augustss
55 1.1 augustss typedef struct cmpci_dmanode *cmpci_dmapool_t;
56 1.1 augustss #define KVADDR(dma) ((void *)(dma)->cd_addr)
57 1.1 augustss #define DMAADDR(dma) ((dma)->cd_map->dm_segs[0].ds_addr)
58 1.1 augustss
59 1.1 augustss
60 1.1 augustss /*
61 1.4 itohy * Mixer device
62 1.4 itohy *
63 1.4 itohy * Note that cmpci_query_devinfo() is optimized depending on
64 1.4 itohy * the order of this. Be careful if you change the values.
65 1.1 augustss */
66 1.4 itohy #define CMPCI_DAC_VOL 0 /* inputs.dac */
67 1.4 itohy #define CMPCI_FM_VOL 1 /* inputs.fmsynth */
68 1.4 itohy #define CMPCI_CD_VOL 2 /* inputs.cd */
69 1.4 itohy #define CMPCI_LINE_IN_VOL 3 /* inputs.line */
70 1.4 itohy #define CMPCI_AUX_IN_VOL 4 /* inputs.aux */
71 1.4 itohy #define CMPCI_MIC_VOL 5 /* inputs.mic */
72 1.4 itohy
73 1.4 itohy #define CMPCI_DAC_MUTE 6 /* inputs.dac.mute */
74 1.4 itohy #define CMPCI_FM_MUTE 7 /* inputs.fmsynth.mute */
75 1.4 itohy #define CMPCI_CD_MUTE 8 /* inputs.cd.mute */
76 1.4 itohy #define CMPCI_LINE_IN_MUTE 9 /* inputs.line.mute */
77 1.4 itohy #define CMPCI_AUX_IN_MUTE 10 /* inputs.aux.mute */
78 1.4 itohy #define CMPCI_MIC_MUTE 11 /* inputs.mic.mute */
79 1.4 itohy
80 1.4 itohy #define CMPCI_MIC_PREAMP 12 /* inputs.mic.preamp */
81 1.4 itohy #define CMPCI_PCSPEAKER 13 /* inputs.speaker */
82 1.4 itohy
83 1.4 itohy #define CMPCI_RECORD_SOURCE 14 /* record.source */
84 1.4 itohy #define CMPCI_MIC_RECVOL 15 /* record.mic */
85 1.4 itohy
86 1.4 itohy #define CMPCI_PLAYBACK_MODE 16 /* playback.mode */
87 1.4 itohy #define CMPCI_SPDIF_IN_SELECT 17 /* spdif.input */
88 1.4 itohy #define CMPCI_SPDIF_IN_PHASE 18 /* spdif.input.phase */
89 1.4 itohy #define CMPCI_SPDIF_LOOP 19 /* spdif.output */
90 1.4 itohy #define CMPCI_SPDIF_OUT_PLAYBACK 20 /* spdif.output.playback */
91 1.4 itohy #define CMPCI_SPDIF_OUT_VOLTAGE 21 /* spdif.output.voltage */
92 1.4 itohy #define CMPCI_MONITOR_DAC 22 /* spdif.monitor */
93 1.4 itohy
94 1.4 itohy #define CMPCI_MASTER_VOL 23 /* outputs.master */
95 1.4 itohy #define CMPCI_REAR 24 /* outputs.rear */
96 1.4 itohy #define CMPCI_INDIVIDUAL 25 /* outputs.rear.individual */
97 1.4 itohy #define CMPCI_REVERSE 26 /* outputs.rear.reverse */
98 1.4 itohy #define CMPCI_SURROUND 27 /* outputs.surround */
99 1.4 itohy
100 1.4 itohy #define CMPCI_NDEVS 28
101 1.4 itohy
102 1.4 itohy #define CMPCI_INPUT_CLASS 28
103 1.4 itohy #define CMPCI_OUTPUT_CLASS 29
104 1.4 itohy #define CMPCI_RECORD_CLASS 30
105 1.4 itohy #define CMPCI_PLAYBACK_CLASS 31
106 1.4 itohy #define CMPCI_SPDIF_CLASS 32
107 1.4 itohy
108 1.1 augustss #define CmpciNspdif "spdif"
109 1.2 tshiozak #define CmpciCspdif "spdif"
110 1.4 itohy #define CmpciNspdin "spdin"
111 1.4 itohy #define CmpciNspdin1 "spdin1"
112 1.4 itohy #define CmpciNspdin2 "spdin2"
113 1.4 itohy #define CmpciNspdout "spdout"
114 1.4 itohy #define CmpciNplayback "playback"
115 1.4 itohy #define CmpciCplayback "playback"
116 1.2 tshiozak #define CmpciNlegacy "legacy"
117 1.4 itohy #define CmpciNvoltage "voltage"
118 1.4 itohy #define CmpciNphase "phase"
119 1.2 tshiozak #define CmpciNpositive "positive"
120 1.2 tshiozak #define CmpciNnegative "negative"
121 1.2 tshiozak #define CmpciNrear "rear"
122 1.2 tshiozak #define CmpciNindividual "individual"
123 1.2 tshiozak #define CmpciNreverse "reverse"
124 1.5 itohy #define CmpciNhigh_v "5V"
125 1.2 tshiozak #define CmpciNlow_v "0.5V"
126 1.2 tshiozak #define CmpciNsurround "surround"
127 1.1 augustss
128 1.7 wiz /* record.source bitmap (see cmpci_set_in_ports()) */
129 1.4 itohy #define CMPCI_RECORD_SOURCE_MIC CMPCI_SB16_MIXER_MIC_SRC /* mic */
130 1.4 itohy #define CMPCI_RECORD_SOURCE_CD CMPCI_SB16_MIXER_CD_SRC_R /* cd */
131 1.4 itohy #define CMPCI_RECORD_SOURCE_LINE_IN CMPCI_SB16_MIXER_LINE_SRC_R /* line */
132 1.4 itohy #define CMPCI_RECORD_SOURCE_AUX_IN (1 << 8) /* aux */
133 1.4 itohy #define CMPCI_RECORD_SOURCE_WAVE (1 << 9) /* wave */
134 1.4 itohy #define CMPCI_RECORD_SOURCE_FM CMPCI_SB16_MIXER_FM_SRC_R /* fmsynth*/
135 1.4 itohy #define CMPCI_RECORD_SOURCE_SPDIF (1 << 10) /* spdif */
136 1.4 itohy
137 1.4 itohy /* playback.mode */
138 1.4 itohy #define CMPCI_PLAYBACK_MODE_WAVE 0 /* dac */
139 1.4 itohy #define CMPCI_PLAYBACK_MODE_SPDIF 1 /* spdif */
140 1.4 itohy
141 1.4 itohy /* spdif.input */
142 1.4 itohy #define CMPCI_SPDIFIN_SPDIFIN2 0x01
143 1.4 itohy #define CMPCI_SPDIFIN_SPDIFOUT 0x02
144 1.4 itohy #define CMPCI_SPDIF_IN_SPDIN1 0 /* spdin1 */
145 1.4 itohy #define CMPCI_SPDIF_IN_SPDIN2 CMPCI_SPDIFIN_SPDIFIN2 /* spdin2 */
146 1.4 itohy #define CMPCI_SPDIF_IN_SPDOUT (CMPCI_SPDIFIN_SPDIFIN2|CMPCI_SPDIFIN_SPDIFOUT)
147 1.4 itohy /* spdout */
148 1.4 itohy /* spdif.input.phase */
149 1.4 itohy #define CMPCI_SPDIF_IN_PHASE_POSITIVE 0 /* positive */
150 1.4 itohy #define CMPCI_SPDIF_IN_PHASE_NEGATIVE 1 /* negative */
151 1.4 itohy
152 1.4 itohy /* spdif.output */
153 1.4 itohy #define CMPCI_SPDIF_LOOP_OFF 0 /* playback */
154 1.4 itohy #define CMPCI_SPDIF_LOOP_ON 1 /* spdin */
155 1.4 itohy
156 1.4 itohy /* spdif.output.playback */
157 1.4 itohy #define CMPCI_SPDIF_OUT_PLAYBACK_WAVE 0 /* wave */
158 1.4 itohy #define CMPCI_SPDIF_OUT_PLAYBACK_LEGACY 1 /* legacy */
159 1.4 itohy
160 1.4 itohy /* spdif.output.voltage */
161 1.5 itohy #define CMPCI_SPDIF_OUT_VOLTAGE_HIGH 0 /* 5V */
162 1.5 itohy #define CMPCI_SPDIF_OUT_VOLTAGE_LOW 1 /* 0.5V */
163 1.4 itohy
164 1.4 itohy /* spdif.monitor */
165 1.4 itohy #define CMPCI_MONDAC_ENABLE 0x01
166 1.4 itohy #define CMPCI_MONDAC_SPDOUT 0x02
167 1.4 itohy #define CMPCI_MONITOR_DAC_OFF 0 /* off */
168 1.4 itohy #define CMPCI_MONITOR_DAC_SPDIN CMPCI_MONDAC_ENABLE /* spdin */
169 1.4 itohy #define CMPCI_MONITOR_DAC_SPDOUT (CMPCI_MONDAC_ENABLE | CMPCI_MONDAC_SPDOUT)
170 1.4 itohy /* spdout */
171 1.1 augustss
172 1.1 augustss /*
173 1.1 augustss * softc
174 1.1 augustss */
175 1.1 augustss struct cmpci_softc {
176 1.2 tshiozak struct device sc_dev;
177 1.9.28.1 ad kmutex_t sc_lock;
178 1.9.28.1 ad kmutex_t sc_intr_lock;
179 1.4 itohy
180 1.1 augustss /* model/rev */
181 1.2 tshiozak uint32_t sc_id;
182 1.2 tshiozak uint32_t sc_class;
183 1.2 tshiozak uint32_t sc_capable;
184 1.2 tshiozak #define CMPCI_CAP_SPDIN 0x00000001
185 1.2 tshiozak #define CMPCI_CAP_SPDOUT 0x00000002
186 1.2 tshiozak #define CMPCI_CAP_SPDLOOP 0x00000004
187 1.2 tshiozak #define CMPCI_CAP_SPDLEGACY 0x00000008
188 1.2 tshiozak #define CMPCI_CAP_SPDIN_MONITOR 0x00000010
189 1.2 tshiozak #define CMPCI_CAP_XSPDOUT 0x00000020
190 1.2 tshiozak #define CMPCI_CAP_SPDOUT_VOLTAGE 0x00000040
191 1.2 tshiozak #define CMPCI_CAP_SPDOUT_48K 0x00000080
192 1.2 tshiozak #define CMPCI_CAP_SURROUND 0x00000100
193 1.2 tshiozak #define CMPCI_CAP_REAR 0x00000200
194 1.2 tshiozak #define CMPCI_CAP_INDIVIDUAL_REAR 0x00000400
195 1.2 tshiozak #define CMPCI_CAP_REVERSE_FR 0x00000800
196 1.2 tshiozak #define CMPCI_CAP_SPDIN_PHASE 0x00001000
197 1.4 itohy #define CMPCI_CAP_2ND_SPDIN 0x00002000
198 1.2 tshiozak
199 1.4 itohy #define CMPCI_CAP_CMI8338 (CMPCI_CAP_SPDIN | CMPCI_CAP_SPDOUT | \
200 1.2 tshiozak CMPCI_CAP_SPDLOOP | CMPCI_CAP_SPDLEGACY)
201 1.2 tshiozak
202 1.2 tshiozak #define CMPCI_CAP_CMI8738 (CMPCI_CAP_CMI8338 | \
203 1.2 tshiozak CMPCI_CAP_SPDIN_MONITOR | \
204 1.2 tshiozak CMPCI_CAP_XSPDOUT | \
205 1.2 tshiozak CMPCI_CAP_SPDOUT_VOLTAGE | \
206 1.2 tshiozak CMPCI_CAP_SPDOUT_48K | CMPCI_CAP_SURROUND |\
207 1.2 tshiozak CMPCI_CAP_REAR | \
208 1.2 tshiozak CMPCI_CAP_INDIVIDUAL_REAR | \
209 1.2 tshiozak CMPCI_CAP_REVERSE_FR | \
210 1.4 itohy CMPCI_CAP_SPDIN_PHASE | \
211 1.4 itohy CMPCI_CAP_2ND_SPDIN /* XXX 6ch only */)
212 1.2 tshiozak #define CMPCI_ISCAP(sc, name) (sc->sc_capable & CMPCI_CAP_ ## name)
213 1.1 augustss
214 1.1 augustss /* I/O Base device */
215 1.2 tshiozak bus_space_tag_t sc_iot;
216 1.2 tshiozak bus_space_handle_t sc_ioh;
217 1.3 itohy
218 1.3 itohy bus_space_handle_t sc_mpu_ioh;
219 1.3 itohy struct device *sc_mpudev;
220 1.1 augustss
221 1.1 augustss /* intr handle */
222 1.2 tshiozak pci_intr_handle_t *sc_ih;
223 1.1 augustss
224 1.1 augustss /* DMA */
225 1.2 tshiozak bus_dma_tag_t sc_dmat;
226 1.2 tshiozak cmpci_dmapool_t sc_dmap;
227 1.1 augustss
228 1.1 augustss /* each channel */
229 1.1 augustss struct {
230 1.8 kent void (*intr)(void *);
231 1.2 tshiozak void *intr_arg;
232 1.2 tshiozak int md_divide;
233 1.1 augustss } sc_play, sc_rec;
234 1.5 itohy
235 1.5 itohy /* value of CMPCI_REG_MISC register */
236 1.5 itohy uint32_t sc_reg_misc;
237 1.1 augustss
238 1.1 augustss /* mixer */
239 1.2 tshiozak uint8_t sc_gain[CMPCI_NDEVS][2];
240 1.2 tshiozak #define CMPCI_LEFT 0
241 1.2 tshiozak #define CMPCI_RIGHT 1
242 1.2 tshiozak #define CMPCI_LR 0
243 1.2 tshiozak uint16_t sc_in_mask;
244 1.1 augustss };
245 1.1 augustss
246 1.1 augustss
247 1.1 augustss #endif /* _DEV_PCI_CMPCIVAR_H_ */
248 1.1 augustss
249 1.1 augustss /* end of file */
250