cxgb_adapter.h revision 1.1.2.2
1 1.1.2.2 uebayasi /************************************************************************** 2 1.1.2.2 uebayasi 3 1.1.2.2 uebayasi Copyright (c) 2007, Chelsio Inc. 4 1.1.2.2 uebayasi All rights reserved. 5 1.1.2.2 uebayasi 6 1.1.2.2 uebayasi Redistribution and use in source and binary forms, with or without 7 1.1.2.2 uebayasi modification, are permitted provided that the following conditions are met: 8 1.1.2.2 uebayasi 9 1.1.2.2 uebayasi 1. Redistributions of source code must retain the above copyright notice, 10 1.1.2.2 uebayasi this list of conditions and the following disclaimer. 11 1.1.2.2 uebayasi 12 1.1.2.2 uebayasi 2. Neither the name of the Chelsio Corporation nor the names of its 13 1.1.2.2 uebayasi contributors may be used to endorse or promote products derived from 14 1.1.2.2 uebayasi this software without specific prior written permission. 15 1.1.2.2 uebayasi 16 1.1.2.2 uebayasi THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 1.1.2.2 uebayasi AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 1.1.2.2 uebayasi IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 1.1.2.2 uebayasi ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 20 1.1.2.2 uebayasi LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 1.1.2.2 uebayasi CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 1.1.2.2 uebayasi SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 1.1.2.2 uebayasi INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 1.1.2.2 uebayasi CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 1.1.2.2 uebayasi ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 1.1.2.2 uebayasi POSSIBILITY OF SUCH DAMAGE. 27 1.1.2.2 uebayasi 28 1.1.2.2 uebayasi 29 1.1.2.2 uebayasi ***************************************************************************/ 30 1.1.2.2 uebayasi 31 1.1.2.2 uebayasi 32 1.1.2.2 uebayasi 33 1.1.2.2 uebayasi #ifndef _CXGB_ADAPTER_H_ 34 1.1.2.2 uebayasi #define _CXGB_ADAPTER_H_ 35 1.1.2.2 uebayasi 36 1.1.2.2 uebayasi #include <sys/lock.h> 37 1.1.2.2 uebayasi #include <sys/mutex.h> 38 1.1.2.2 uebayasi #include <sys/mbuf.h> 39 1.1.2.2 uebayasi #include <sys/socket.h> 40 1.1.2.2 uebayasi #include <sys/sockio.h> 41 1.1.2.2 uebayasi 42 1.1.2.2 uebayasi #include <net/if.h> 43 1.1.2.2 uebayasi #include <net/if_ether.h> 44 1.1.2.2 uebayasi #include <net/if_media.h> 45 1.1.2.2 uebayasi 46 1.1.2.2 uebayasi #include <machine/bus.h> 47 1.1.2.2 uebayasi #include <dev/pci/pcireg.h> 48 1.1.2.2 uebayasi #include <dev/pci/pcivar.h> 49 1.1.2.2 uebayasi 50 1.1.2.2 uebayasi #ifdef CONFIG_DEFINED 51 1.1.2.2 uebayasi #include <cxgb_osdep.h> 52 1.1.2.2 uebayasi #include <ulp/toecore/toedev.h> 53 1.1.2.2 uebayasi #include <sys/mbufq.h> 54 1.1.2.2 uebayasi #else 55 1.1.2.2 uebayasi #include "cxgb_osdep.h" 56 1.1.2.2 uebayasi #include "cxgb_mbuf.h" 57 1.1.2.2 uebayasi #include "cxgb_toedev.h" 58 1.1.2.2 uebayasi #endif 59 1.1.2.2 uebayasi 60 1.1.2.2 uebayasi struct adapter; 61 1.1.2.2 uebayasi struct sge_qset; 62 1.1.2.2 uebayasi extern int cxgb_debug; 63 1.1.2.2 uebayasi 64 1.1.2.2 uebayasi #ifdef DEBUG_LOCKING 65 1.1.2.2 uebayasi #define MTX_INIT(lock, lockname, class, flags) \ 66 1.1.2.2 uebayasi do { \ 67 1.1.2.2 uebayasi printf("initializing %s at %s:%d\n", lockname, __FILE__, __LINE__); \ 68 1.1.2.2 uebayasi mtx_init((lock), lockname, class, flags); \ 69 1.1.2.2 uebayasi } while (0) 70 1.1.2.2 uebayasi 71 1.1.2.2 uebayasi #define MTX_DESTROY(lock) \ 72 1.1.2.2 uebayasi do { \ 73 1.1.2.2 uebayasi printf("destroying %s at %s:%d\n", (lock)->lock_object.lo_name, __FILE__, __LINE__); \ 74 1.1.2.2 uebayasi mtx_destroy((lock)); \ 75 1.1.2.2 uebayasi } while (0) 76 1.1.2.2 uebayasi 77 1.1.2.2 uebayasi #define SX_INIT(lock, lockname) \ 78 1.1.2.2 uebayasi do { \ 79 1.1.2.2 uebayasi printf("initializing %s at %s:%d\n", lockname, __FILE__, __LINE__); \ 80 1.1.2.2 uebayasi sx_init((lock), lockname); \ 81 1.1.2.2 uebayasi } while (0) 82 1.1.2.2 uebayasi 83 1.1.2.2 uebayasi #define SX_DESTROY(lock) \ 84 1.1.2.2 uebayasi do { \ 85 1.1.2.2 uebayasi printf("destroying %s at %s:%d\n", (lock)->lock_object.lo_name, __FILE__, __LINE__); \ 86 1.1.2.2 uebayasi sx_destroy((lock)); \ 87 1.1.2.2 uebayasi } while (0) 88 1.1.2.2 uebayasi #else 89 1.1.2.2 uebayasi #define MTX_INIT mtx_init 90 1.1.2.2 uebayasi #define MTX_DESTROY mtx_destroy 91 1.1.2.2 uebayasi #define SX_INIT sx_init 92 1.1.2.2 uebayasi #define SX_DESTROY sx_destroy 93 1.1.2.2 uebayasi #endif 94 1.1.2.2 uebayasi 95 1.1.2.2 uebayasi struct port_device { 96 1.1.2.2 uebayasi struct device original; 97 1.1.2.2 uebayasi device_t dev; 98 1.1.2.2 uebayasi struct adapter *parent; 99 1.1.2.2 uebayasi int port_number; 100 1.1.2.2 uebayasi }; 101 1.1.2.2 uebayasi 102 1.1.2.2 uebayasi struct port_info { 103 1.1.2.2 uebayasi struct adapter *adapter; 104 1.1.2.2 uebayasi struct ifnet *ifp; 105 1.1.2.2 uebayasi struct port_device *pd; 106 1.1.2.2 uebayasi int port; 107 1.1.2.2 uebayasi int if_flags; 108 1.1.2.2 uebayasi const struct port_type_info *port_type; 109 1.1.2.2 uebayasi struct cphy phy; 110 1.1.2.2 uebayasi struct cmac mac; 111 1.1.2.2 uebayasi struct link_config link_config; 112 1.1.2.2 uebayasi struct ifmedia media; 113 1.1.2.2 uebayasi #ifdef USE_SX 114 1.1.2.2 uebayasi struct sx lock; 115 1.1.2.2 uebayasi #else 116 1.1.2.2 uebayasi struct mtx lock; 117 1.1.2.2 uebayasi #endif 118 1.1.2.2 uebayasi uint8_t port_id; 119 1.1.2.2 uebayasi uint8_t tx_chan; 120 1.1.2.2 uebayasi uint8_t txpkt_intf; 121 1.1.2.2 uebayasi uint8_t nqsets; 122 1.1.2.2 uebayasi uint8_t first_qset; 123 1.1.2.2 uebayasi 124 1.1.2.2 uebayasi uint8_t hw_addr[ETHER_ADDR_LEN]; 125 1.1.2.2 uebayasi struct cxgb_task start_task; 126 1.1.2.2 uebayasi struct cxgb_task timer_reclaim_task; 127 1.1.2.2 uebayasi struct cdev *port_cdev; 128 1.1.2.2 uebayasi 129 1.1.2.2 uebayasi #define PORT_NAME_LEN 32 130 1.1.2.2 uebayasi #define TASKQ_NAME_LEN 32 131 1.1.2.2 uebayasi char lockbuf[PORT_NAME_LEN]; 132 1.1.2.2 uebayasi char taskqbuf[TASKQ_NAME_LEN]; 133 1.1.2.2 uebayasi }; 134 1.1.2.2 uebayasi 135 1.1.2.2 uebayasi enum { /* adapter flags */ 136 1.1.2.2 uebayasi FULL_INIT_DONE = (1 << 0), 137 1.1.2.2 uebayasi USING_MSI = (1 << 1), 138 1.1.2.2 uebayasi USING_MSIX = (1 << 2), 139 1.1.2.2 uebayasi QUEUES_BOUND = (1 << 3), 140 1.1.2.2 uebayasi FW_UPTODATE = (1 << 4), 141 1.1.2.2 uebayasi TPS_UPTODATE = (1 << 5), 142 1.1.2.2 uebayasi }; 143 1.1.2.2 uebayasi 144 1.1.2.2 uebayasi 145 1.1.2.2 uebayasi #define FL_Q_SIZE 4096 146 1.1.2.2 uebayasi #define JUMBO_Q_SIZE 512 147 1.1.2.2 uebayasi #define RSPQ_Q_SIZE 1024 148 1.1.2.2 uebayasi #define TX_ETH_Q_SIZE 1024 149 1.1.2.2 uebayasi 150 1.1.2.2 uebayasi 151 1.1.2.2 uebayasi 152 1.1.2.2 uebayasi /* 153 1.1.2.2 uebayasi * Types of Tx queues in each queue set. Order here matters, do not change. 154 1.1.2.2 uebayasi * XXX TOE is not implemented yet, so the extra queues are just placeholders. 155 1.1.2.2 uebayasi */ 156 1.1.2.2 uebayasi enum { TXQ_ETH, TXQ_OFLD, TXQ_CTRL }; 157 1.1.2.2 uebayasi 158 1.1.2.2 uebayasi 159 1.1.2.2 uebayasi /* careful, the following are set on priv_flags and must not collide with 160 1.1.2.2 uebayasi * IFF_ flags! 161 1.1.2.2 uebayasi */ 162 1.1.2.2 uebayasi enum { 163 1.1.2.2 uebayasi LRO_ACTIVE = (1 << 8), 164 1.1.2.2 uebayasi }; 165 1.1.2.2 uebayasi 166 1.1.2.2 uebayasi /* Max concurrent LRO sessions per queue set */ 167 1.1.2.2 uebayasi #define MAX_LRO_SES 8 168 1.1.2.2 uebayasi 169 1.1.2.2 uebayasi struct t3_lro_session { 170 1.1.2.2 uebayasi struct mbuf *head; 171 1.1.2.2 uebayasi struct mbuf *tail; 172 1.1.2.2 uebayasi uint32_t seq; 173 1.1.2.2 uebayasi uint16_t ip_len; 174 1.1.2.2 uebayasi uint16_t mss; 175 1.1.2.2 uebayasi uint16_t vtag; 176 1.1.2.2 uebayasi uint8_t npkts; 177 1.1.2.2 uebayasi }; 178 1.1.2.2 uebayasi 179 1.1.2.2 uebayasi struct lro_state { 180 1.1.2.2 uebayasi unsigned short enabled; 181 1.1.2.2 uebayasi unsigned short active_idx; 182 1.1.2.2 uebayasi unsigned int nactive; 183 1.1.2.2 uebayasi struct t3_lro_session sess[MAX_LRO_SES]; 184 1.1.2.2 uebayasi }; 185 1.1.2.2 uebayasi 186 1.1.2.2 uebayasi #define RX_BUNDLE_SIZE 8 187 1.1.2.2 uebayasi 188 1.1.2.2 uebayasi struct rsp_desc; 189 1.1.2.2 uebayasi 190 1.1.2.2 uebayasi struct sge_rspq { 191 1.1.2.2 uebayasi uint32_t credits; 192 1.1.2.2 uebayasi uint32_t size; 193 1.1.2.2 uebayasi uint32_t cidx; 194 1.1.2.2 uebayasi uint32_t gen; 195 1.1.2.2 uebayasi uint32_t polling; 196 1.1.2.2 uebayasi uint32_t holdoff_tmr; 197 1.1.2.2 uebayasi uint32_t next_holdoff; 198 1.1.2.2 uebayasi uint32_t imm_data; 199 1.1.2.2 uebayasi struct rsp_desc *desc; 200 1.1.2.2 uebayasi uint32_t cntxt_id; 201 1.1.2.2 uebayasi struct mtx lock; 202 1.1.2.2 uebayasi struct mbuf *rx_head; /* offload packet receive queue head */ 203 1.1.2.2 uebayasi struct mbuf *rx_tail; /* offload packet receive queue tail */ 204 1.1.2.2 uebayasi 205 1.1.2.2 uebayasi uint32_t offload_pkts; 206 1.1.2.2 uebayasi uint32_t offload_bundles; 207 1.1.2.2 uebayasi uint32_t pure_rsps; 208 1.1.2.2 uebayasi uint32_t unhandled_irqs; 209 1.1.2.2 uebayasi 210 1.1.2.2 uebayasi bus_addr_t phys_addr; 211 1.1.2.2 uebayasi bus_dma_tag_t desc_tag; 212 1.1.2.2 uebayasi bus_dmamap_t desc_map; 213 1.1.2.2 uebayasi 214 1.1.2.2 uebayasi struct t3_mbuf_hdr rspq_mh; 215 1.1.2.2 uebayasi #define RSPQ_NAME_LEN 32 216 1.1.2.2 uebayasi char lockbuf[RSPQ_NAME_LEN]; 217 1.1.2.2 uebayasi 218 1.1.2.2 uebayasi }; 219 1.1.2.2 uebayasi 220 1.1.2.2 uebayasi #ifndef DISABLE_MBUF_IOVEC 221 1.1.2.2 uebayasi #define rspq_mbuf rspq_mh.mh_head 222 1.1.2.2 uebayasi #endif 223 1.1.2.2 uebayasi 224 1.1.2.2 uebayasi struct rx_desc; 225 1.1.2.2 uebayasi struct rx_sw_desc; 226 1.1.2.2 uebayasi 227 1.1.2.2 uebayasi struct sge_fl { 228 1.1.2.2 uebayasi uint32_t buf_size; 229 1.1.2.2 uebayasi uint32_t credits; 230 1.1.2.2 uebayasi uint32_t size; 231 1.1.2.2 uebayasi uint32_t cidx; 232 1.1.2.2 uebayasi uint32_t pidx; 233 1.1.2.2 uebayasi uint32_t gen; 234 1.1.2.2 uebayasi struct rx_desc *desc; 235 1.1.2.2 uebayasi struct rx_sw_desc *sdesc; 236 1.1.2.2 uebayasi bus_addr_t phys_addr; 237 1.1.2.2 uebayasi uint32_t cntxt_id; 238 1.1.2.2 uebayasi uint64_t empty; 239 1.1.2.2 uebayasi bus_dma_tag_t desc_tag; 240 1.1.2.2 uebayasi bus_dmamap_t desc_map; 241 1.1.2.2 uebayasi bus_dma_tag_t entry_tag; 242 1.1.2.2 uebayasi int type; 243 1.1.2.2 uebayasi }; 244 1.1.2.2 uebayasi 245 1.1.2.2 uebayasi struct tx_desc; 246 1.1.2.2 uebayasi struct tx_sw_desc; 247 1.1.2.2 uebayasi 248 1.1.2.2 uebayasi #define TXQ_TRANSMITTING 0x1 249 1.1.2.2 uebayasi 250 1.1.2.2 uebayasi struct sge_txq { 251 1.1.2.2 uebayasi uint64_t flags; 252 1.1.2.2 uebayasi uint32_t in_use; 253 1.1.2.2 uebayasi uint32_t size; 254 1.1.2.2 uebayasi uint32_t processed; 255 1.1.2.2 uebayasi uint32_t cleaned; 256 1.1.2.2 uebayasi uint32_t stop_thres; 257 1.1.2.2 uebayasi uint32_t cidx; 258 1.1.2.2 uebayasi uint32_t pidx; 259 1.1.2.2 uebayasi uint32_t gen; 260 1.1.2.2 uebayasi uint32_t unacked; 261 1.1.2.2 uebayasi struct tx_desc *desc; 262 1.1.2.2 uebayasi struct tx_sw_desc *sdesc; 263 1.1.2.2 uebayasi uint32_t token; 264 1.1.2.2 uebayasi bus_addr_t phys_addr; 265 1.1.2.2 uebayasi struct cxgb_task qresume_task; 266 1.1.2.2 uebayasi struct cxgb_task qreclaim_task; 267 1.1.2.2 uebayasi struct port_info *port; 268 1.1.2.2 uebayasi uint32_t cntxt_id; 269 1.1.2.2 uebayasi uint64_t stops; 270 1.1.2.2 uebayasi uint64_t restarts; 271 1.1.2.2 uebayasi bus_dma_tag_t desc_tag; 272 1.1.2.2 uebayasi bus_dmamap_t desc_map; 273 1.1.2.2 uebayasi bus_dma_tag_t entry_tag; 274 1.1.2.2 uebayasi struct mbuf_head sendq; 275 1.1.2.2 uebayasi struct mtx lock; 276 1.1.2.2 uebayasi #define TXQ_NAME_LEN 32 277 1.1.2.2 uebayasi char lockbuf[TXQ_NAME_LEN]; 278 1.1.2.2 uebayasi }; 279 1.1.2.2 uebayasi 280 1.1.2.2 uebayasi 281 1.1.2.2 uebayasi enum { 282 1.1.2.2 uebayasi SGE_PSTAT_TSO, /* # of TSO requests */ 283 1.1.2.2 uebayasi SGE_PSTAT_RX_CSUM_GOOD, /* # of successful RX csum offloads */ 284 1.1.2.2 uebayasi SGE_PSTAT_TX_CSUM, /* # of TX checksum offloads */ 285 1.1.2.2 uebayasi SGE_PSTAT_VLANEX, /* # of VLAN tag extractions */ 286 1.1.2.2 uebayasi SGE_PSTAT_VLANINS, /* # of VLAN tag insertions */ 287 1.1.2.2 uebayasi SGE_PSTATS_LRO_QUEUED, /* # of LRO appended packets */ 288 1.1.2.2 uebayasi SGE_PSTATS_LRO_FLUSHED, /* # of LRO flushed packets */ 289 1.1.2.2 uebayasi SGE_PSTATS_LRO_X_STREAMS, /* # of exceeded LRO contexts */ 290 1.1.2.2 uebayasi }; 291 1.1.2.2 uebayasi 292 1.1.2.2 uebayasi #define SGE_PSTAT_MAX (SGE_PSTATS_LRO_X_STREAMS+1) 293 1.1.2.2 uebayasi 294 1.1.2.2 uebayasi struct sge_qset { 295 1.1.2.2 uebayasi struct sge_rspq rspq; 296 1.1.2.2 uebayasi struct sge_fl fl[SGE_RXQ_PER_SET]; 297 1.1.2.2 uebayasi struct lro_state lro; 298 1.1.2.2 uebayasi struct sge_txq txq[SGE_TXQ_PER_SET]; 299 1.1.2.2 uebayasi uint32_t txq_stopped; /* which Tx queues are stopped */ 300 1.1.2.2 uebayasi uint64_t port_stats[SGE_PSTAT_MAX]; 301 1.1.2.2 uebayasi struct port_info *port; 302 1.1.2.2 uebayasi int idx; /* qset # */ 303 1.1.2.2 uebayasi }; 304 1.1.2.2 uebayasi 305 1.1.2.2 uebayasi struct sge { 306 1.1.2.2 uebayasi struct sge_qset qs[SGE_QSETS]; 307 1.1.2.2 uebayasi struct mtx reg_lock; 308 1.1.2.2 uebayasi }; 309 1.1.2.2 uebayasi 310 1.1.2.2 uebayasi struct filter_info; 311 1.1.2.2 uebayasi 312 1.1.2.2 uebayasi struct adapter { 313 1.1.2.2 uebayasi struct device original; 314 1.1.2.2 uebayasi device_t dev; // so we have a compatible pointer 315 1.1.2.2 uebayasi int flags; 316 1.1.2.2 uebayasi TAILQ_ENTRY(adapter) adapter_entry; 317 1.1.2.2 uebayasi 318 1.1.2.2 uebayasi /* PCI register resources */ 319 1.1.2.2 uebayasi int regs_rid; 320 1.1.2.2 uebayasi struct resource *regs_res; 321 1.1.2.2 uebayasi bus_space_handle_t bh; 322 1.1.2.2 uebayasi bus_space_tag_t bt; 323 1.1.2.2 uebayasi bus_size_t mmio_len; 324 1.1.2.2 uebayasi uint32_t link_width; 325 1.1.2.2 uebayasi struct pci_attach_args pa; 326 1.1.2.2 uebayasi uint32_t bar0; 327 1.1.2.2 uebayasi bus_space_handle_t bar0_handle; 328 1.1.2.2 uebayasi pci_intr_handle_t intr_handle; 329 1.1.2.2 uebayasi void *intr_cookie; 330 1.1.2.2 uebayasi 331 1.1.2.2 uebayasi /* DMA resources */ 332 1.1.2.2 uebayasi bus_dma_tag_t parent_dmat; 333 1.1.2.2 uebayasi bus_dma_tag_t rx_dmat; 334 1.1.2.2 uebayasi bus_dma_tag_t rx_jumbo_dmat; 335 1.1.2.2 uebayasi bus_dma_tag_t tx_dmat; 336 1.1.2.2 uebayasi 337 1.1.2.2 uebayasi /* Interrupt resources */ 338 1.1.2.2 uebayasi int irq_rid; 339 1.1.2.2 uebayasi 340 1.1.2.2 uebayasi uint32_t msix_regs_rid; 341 1.1.2.2 uebayasi struct resource *msix_regs_res; 342 1.1.2.2 uebayasi 343 1.1.2.2 uebayasi struct resource *msix_irq_res[SGE_QSETS]; 344 1.1.2.2 uebayasi int msix_irq_rid[SGE_QSETS]; 345 1.1.2.2 uebayasi void *msix_intr_tag[SGE_QSETS]; 346 1.1.2.2 uebayasi uint8_t rxpkt_map[8]; /* maps RX_PKT interface values to port ids */ 347 1.1.2.2 uebayasi uint8_t rrss_map[SGE_QSETS]; /* revers RSS map table */ 348 1.1.2.2 uebayasi 349 1.1.2.2 uebayasi struct filter_info *filters; 350 1.1.2.2 uebayasi 351 1.1.2.2 uebayasi /* Tasks */ 352 1.1.2.2 uebayasi struct cxgb_task ext_intr_task; 353 1.1.2.2 uebayasi struct cxgb_task slow_intr_task; 354 1.1.2.2 uebayasi struct cxgb_task tick_task; 355 1.1.2.2 uebayasi struct callout cxgb_tick_ch; 356 1.1.2.2 uebayasi struct callout sge_timer_ch; 357 1.1.2.2 uebayasi 358 1.1.2.2 uebayasi /* Register lock for use by the hardware layer */ 359 1.1.2.2 uebayasi struct mtx mdio_lock; 360 1.1.2.2 uebayasi struct mtx elmer_lock; 361 1.1.2.2 uebayasi 362 1.1.2.2 uebayasi /* Bookkeeping for the hardware layer */ 363 1.1.2.2 uebayasi struct adapter_params params; 364 1.1.2.2 uebayasi unsigned int slow_intr_mask; 365 1.1.2.2 uebayasi unsigned long irq_stats[IRQ_NUM_STATS]; 366 1.1.2.2 uebayasi 367 1.1.2.2 uebayasi struct sge sge; 368 1.1.2.2 uebayasi struct mc7 pmrx; 369 1.1.2.2 uebayasi struct mc7 pmtx; 370 1.1.2.2 uebayasi struct mc7 cm; 371 1.1.2.2 uebayasi struct mc5 mc5; 372 1.1.2.2 uebayasi 373 1.1.2.2 uebayasi struct port_info port[MAX_NPORTS]; 374 1.1.2.2 uebayasi device_t portdev[MAX_NPORTS]; 375 1.1.2.2 uebayasi struct toedev tdev; 376 1.1.2.2 uebayasi char fw_version[64]; 377 1.1.2.2 uebayasi uint32_t open_device_map; 378 1.1.2.2 uebayasi uint32_t registered_device_map; 379 1.1.2.2 uebayasi #ifdef USE_SX 380 1.1.2.2 uebayasi struct sx lock; 381 1.1.2.2 uebayasi #else 382 1.1.2.2 uebayasi struct mtx lock; 383 1.1.2.2 uebayasi #endif 384 1.1.2.2 uebayasi int (*cxgb_intr)(void *); 385 1.1.2.2 uebayasi int msi_count; 386 1.1.2.2 uebayasi 387 1.1.2.2 uebayasi #define ADAPTER_LOCK_NAME_LEN 32 388 1.1.2.2 uebayasi char lockbuf[ADAPTER_LOCK_NAME_LEN]; 389 1.1.2.2 uebayasi char reglockbuf[ADAPTER_LOCK_NAME_LEN]; 390 1.1.2.2 uebayasi char mdiolockbuf[ADAPTER_LOCK_NAME_LEN]; 391 1.1.2.2 uebayasi char elmerlockbuf[ADAPTER_LOCK_NAME_LEN]; 392 1.1.2.2 uebayasi }; 393 1.1.2.2 uebayasi 394 1.1.2.2 uebayasi struct t3_rx_mode { 395 1.1.2.2 uebayasi 396 1.1.2.2 uebayasi uint32_t idx; 397 1.1.2.2 uebayasi struct port_info *port; 398 1.1.2.2 uebayasi }; 399 1.1.2.2 uebayasi 400 1.1.2.2 uebayasi 401 1.1.2.2 uebayasi #define MDIO_LOCK(adapter) mtx_lock(&(adapter)->mdio_lock) 402 1.1.2.2 uebayasi #define MDIO_UNLOCK(adapter) mtx_unlock(&(adapter)->mdio_lock) 403 1.1.2.2 uebayasi #define ELMR_LOCK(adapter) mtx_lock(&(adapter)->elmer_lock) 404 1.1.2.2 uebayasi #define ELMR_UNLOCK(adapter) mtx_unlock(&(adapter)->elmer_lock) 405 1.1.2.2 uebayasi 406 1.1.2.2 uebayasi 407 1.1.2.2 uebayasi #ifdef USE_SX 408 1.1.2.2 uebayasi #define PORT_LOCK(port) sx_xlock(&(port)->lock); 409 1.1.2.2 uebayasi #define PORT_UNLOCK(port) sx_xunlock(&(port)->lock); 410 1.1.2.2 uebayasi #define PORT_LOCK_INIT(port, name) SX_INIT(&(port)->lock, name) 411 1.1.2.2 uebayasi #define PORT_LOCK_DEINIT(port) SX_DESTROY(&(port)->lock) 412 1.1.2.2 uebayasi #define PORT_LOCK_ASSERT_OWNED(port) sx_assert(&(port)->lock, SA_LOCKED) 413 1.1.2.2 uebayasi 414 1.1.2.2 uebayasi #define ADAPTER_LOCK(adap) sx_xlock(&(adap)->lock); 415 1.1.2.2 uebayasi #define ADAPTER_UNLOCK(adap) sx_xunlock(&(adap)->lock); 416 1.1.2.2 uebayasi #define ADAPTER_LOCK_INIT(adap, name) SX_INIT(&(adap)->lock, name) 417 1.1.2.2 uebayasi #define ADAPTER_LOCK_DEINIT(adap) SX_DESTROY(&(adap)->lock) 418 1.1.2.2 uebayasi #define ADAPTER_LOCK_ASSERT_NOTOWNED(adap) sx_assert(&(adap)->lock, SA_UNLOCKED) 419 1.1.2.2 uebayasi #else 420 1.1.2.2 uebayasi #define PORT_LOCK(port) mtx_lock(&(port)->lock); 421 1.1.2.2 uebayasi #define PORT_UNLOCK(port) mtx_unlock(&(port)->lock); 422 1.1.2.2 uebayasi #define PORT_LOCK_INIT(port, name) mtx_init(&(port)->lock, name, 0, MTX_DEF) 423 1.1.2.2 uebayasi #define PORT_LOCK_DEINIT(port) mtx_destroy(&(port)->lock) 424 1.1.2.2 uebayasi #define PORT_LOCK_ASSERT_OWNED(port) mtx_assert(&(port)->lock, MA_OWNED) 425 1.1.2.2 uebayasi 426 1.1.2.2 uebayasi #define ADAPTER_LOCK(adap) mtx_lock(&(adap)->lock); 427 1.1.2.2 uebayasi #define ADAPTER_UNLOCK(adap) mtx_unlock(&(adap)->lock); 428 1.1.2.2 uebayasi #define ADAPTER_LOCK_INIT(adap, name) mtx_init(&(adap)->lock, name, 0, MTX_DEF) 429 1.1.2.2 uebayasi #define ADAPTER_LOCK_DEINIT(adap) mtx_destroy(&(adap)->lock) 430 1.1.2.2 uebayasi #define ADAPTER_LOCK_ASSERT_NOTOWNED(adap) mtx_assert(&(adap)->lock, MA_NOTOWNED) 431 1.1.2.2 uebayasi #endif 432 1.1.2.2 uebayasi 433 1.1.2.2 uebayasi 434 1.1.2.2 uebayasi static __inline uint32_t 435 1.1.2.2 uebayasi t3_read_reg(adapter_t *adapter, uint32_t reg_addr) 436 1.1.2.2 uebayasi { 437 1.1.2.2 uebayasi return (bus_space_read_4(adapter->bt, adapter->bh, reg_addr)); 438 1.1.2.2 uebayasi } 439 1.1.2.2 uebayasi 440 1.1.2.2 uebayasi static __inline void 441 1.1.2.2 uebayasi t3_write_reg(adapter_t *adapter, uint32_t reg_addr, uint32_t val) 442 1.1.2.2 uebayasi { 443 1.1.2.2 uebayasi bus_space_write_4(adapter->bt, adapter->bh, reg_addr, val); 444 1.1.2.2 uebayasi } 445 1.1.2.2 uebayasi 446 1.1.2.2 uebayasi static __inline void 447 1.1.2.2 uebayasi t3_os_pci_read_config_4(adapter_t *adapter, int reg, uint32_t *val) 448 1.1.2.2 uebayasi { 449 1.1.2.2 uebayasi *val = pci_conf_read(adapter->pa.pa_pc, adapter->pa.pa_tag, reg); 450 1.1.2.2 uebayasi } 451 1.1.2.2 uebayasi 452 1.1.2.2 uebayasi static __inline void 453 1.1.2.2 uebayasi t3_os_pci_write_config_4(adapter_t *adapter, int reg, uint32_t val) 454 1.1.2.2 uebayasi { 455 1.1.2.2 uebayasi pci_conf_write(adapter->pa.pa_pc, adapter->pa.pa_tag, reg, val); 456 1.1.2.2 uebayasi } 457 1.1.2.2 uebayasi 458 1.1.2.2 uebayasi static __inline void 459 1.1.2.2 uebayasi t3_os_pci_read_config_2(adapter_t *adapter, int reg, uint16_t *val) 460 1.1.2.2 uebayasi { 461 1.1.2.2 uebayasi uint32_t temp; 462 1.1.2.2 uebayasi temp = pci_conf_read(adapter->pa.pa_pc, adapter->pa.pa_tag, reg&0xfc); 463 1.1.2.2 uebayasi if (reg&0x2) 464 1.1.2.2 uebayasi *val = (temp>>16)&0xffff; 465 1.1.2.2 uebayasi else 466 1.1.2.2 uebayasi *val = temp&0xffff; 467 1.1.2.2 uebayasi } 468 1.1.2.2 uebayasi 469 1.1.2.2 uebayasi static __inline void 470 1.1.2.2 uebayasi t3_os_pci_write_config_2(adapter_t *adapter, int reg, uint16_t val) 471 1.1.2.2 uebayasi { 472 1.1.2.2 uebayasi uint32_t temp = pci_conf_read(adapter->pa.pa_pc, adapter->pa.pa_tag, reg&0xfc); 473 1.1.2.2 uebayasi if (reg&0x2) 474 1.1.2.2 uebayasi temp = (temp&0xffff)|(val<<16); 475 1.1.2.2 uebayasi else 476 1.1.2.2 uebayasi temp = (temp&0xffff0000)|val; 477 1.1.2.2 uebayasi pci_conf_write(adapter->pa.pa_pc, adapter->pa.pa_tag, reg&0xfc, temp); 478 1.1.2.2 uebayasi } 479 1.1.2.2 uebayasi 480 1.1.2.2 uebayasi static __inline uint8_t * 481 1.1.2.2 uebayasi t3_get_next_mcaddr(struct t3_rx_mode *rm) 482 1.1.2.2 uebayasi { 483 1.1.2.2 uebayasi uint8_t *macaddr = NULL; 484 1.1.2.2 uebayasi 485 1.1.2.2 uebayasi if (rm->idx == 0) 486 1.1.2.2 uebayasi macaddr = rm->port->hw_addr; 487 1.1.2.2 uebayasi 488 1.1.2.2 uebayasi rm->idx++; 489 1.1.2.2 uebayasi return (macaddr); 490 1.1.2.2 uebayasi } 491 1.1.2.2 uebayasi 492 1.1.2.2 uebayasi static __inline void 493 1.1.2.2 uebayasi t3_init_rx_mode(struct t3_rx_mode *rm, struct port_info *port) 494 1.1.2.2 uebayasi { 495 1.1.2.2 uebayasi rm->idx = 0; 496 1.1.2.2 uebayasi rm->port = port; 497 1.1.2.2 uebayasi } 498 1.1.2.2 uebayasi 499 1.1.2.2 uebayasi static __inline struct port_info * 500 1.1.2.2 uebayasi adap2pinfo(struct adapter *adap, int idx) 501 1.1.2.2 uebayasi { 502 1.1.2.2 uebayasi return &adap->port[idx]; 503 1.1.2.2 uebayasi } 504 1.1.2.2 uebayasi 505 1.1.2.2 uebayasi int t3_os_find_pci_capability(adapter_t *adapter, int cap); 506 1.1.2.2 uebayasi int t3_os_pci_save_state(struct adapter *adapter); 507 1.1.2.2 uebayasi int t3_os_pci_restore_state(struct adapter *adapter); 508 1.1.2.2 uebayasi void t3_os_link_changed(adapter_t *adapter, int port_id, int link_status, 509 1.1.2.2 uebayasi int speed, int duplex, int fc); 510 1.1.2.2 uebayasi void t3_sge_err_intr_handler(adapter_t *adapter); 511 1.1.2.2 uebayasi int t3_offload_tx(struct toedev *, struct mbuf *); 512 1.1.2.2 uebayasi void t3_os_ext_intr_handler(adapter_t *adapter); 513 1.1.2.2 uebayasi void t3_os_set_hw_addr(adapter_t *adapter, int port_idx, u8 hw_addr[]); 514 1.1.2.2 uebayasi int t3_mgmt_tx(adapter_t *adap, struct mbuf *m); 515 1.1.2.2 uebayasi 516 1.1.2.2 uebayasi 517 1.1.2.2 uebayasi int t3_sge_alloc(struct adapter *); 518 1.1.2.2 uebayasi int t3_sge_free(struct adapter *); 519 1.1.2.2 uebayasi int t3_sge_alloc_qset(adapter_t *, uint32_t, int, int, const struct qset_params *, 520 1.1.2.2 uebayasi int, struct port_info *); 521 1.1.2.2 uebayasi void t3_free_sge_resources(adapter_t *); 522 1.1.2.2 uebayasi void t3_sge_start(adapter_t *); 523 1.1.2.2 uebayasi void t3_sge_stop(adapter_t *); 524 1.1.2.2 uebayasi int t3b_intr(void *data); 525 1.1.2.2 uebayasi int t3_intr_msi(void *data); 526 1.1.2.2 uebayasi int t3_intr_msix(void *data); 527 1.1.2.2 uebayasi int t3_encap(struct port_info *, struct mbuf **, int *free); 528 1.1.2.2 uebayasi 529 1.1.2.2 uebayasi int t3_sge_init_adapter(adapter_t *); 530 1.1.2.2 uebayasi int t3_sge_init_port(struct port_info *); 531 1.1.2.2 uebayasi void t3_sge_deinit_sw(adapter_t *); 532 1.1.2.2 uebayasi 533 1.1.2.2 uebayasi void t3_rx_eth_lro(adapter_t *adap, struct sge_rspq *rq, struct mbuf *m, 534 1.1.2.2 uebayasi int ethpad, uint32_t rss_hash, uint32_t rss_csum, int lro); 535 1.1.2.2 uebayasi void t3_rx_eth(struct adapter *adap, struct sge_rspq *rq, struct mbuf *m, int ethpad); 536 1.1.2.2 uebayasi void t3_lro_flush(adapter_t *adap, struct sge_qset *qs, struct lro_state *state); 537 1.1.2.2 uebayasi 538 1.1.2.2 uebayasi void t3_add_sysctls(adapter_t *sc); 539 1.1.2.2 uebayasi int t3_get_desc(const struct sge_qset *qs, unsigned int qnum, unsigned int idx, 540 1.1.2.2 uebayasi unsigned char *data); 541 1.1.2.2 uebayasi void t3_update_qset_coalesce(struct sge_qset *qs, const struct qset_params *p); 542 1.1.2.2 uebayasi /* 543 1.1.2.2 uebayasi * XXX figure out how we can return this to being private to sge 544 1.1.2.2 uebayasi */ 545 1.1.2.2 uebayasi #define desc_reclaimable(q) ((int)((q)->processed - (q)->cleaned - TX_MAX_DESC)) 546 1.1.2.2 uebayasi 547 1.1.2.2 uebayasi #define container_of(p, stype, field) ((stype *)(((uint8_t *)(p)) - offsetof(stype, field))) 548 1.1.2.2 uebayasi 549 1.1.2.2 uebayasi static __inline struct sge_qset * 550 1.1.2.2 uebayasi fl_to_qset(struct sge_fl *q, int qidx) 551 1.1.2.2 uebayasi { 552 1.1.2.2 uebayasi return container_of(q, struct sge_qset, fl[qidx]); 553 1.1.2.2 uebayasi } 554 1.1.2.2 uebayasi 555 1.1.2.2 uebayasi static __inline struct sge_qset * 556 1.1.2.2 uebayasi rspq_to_qset(struct sge_rspq *q) 557 1.1.2.2 uebayasi { 558 1.1.2.2 uebayasi return container_of(q, struct sge_qset, rspq); 559 1.1.2.2 uebayasi } 560 1.1.2.2 uebayasi 561 1.1.2.2 uebayasi static __inline struct sge_qset * 562 1.1.2.2 uebayasi txq_to_qset(struct sge_txq *q, int qidx) 563 1.1.2.2 uebayasi { 564 1.1.2.2 uebayasi return container_of(q, struct sge_qset, txq[qidx]); 565 1.1.2.2 uebayasi } 566 1.1.2.2 uebayasi 567 1.1.2.2 uebayasi static __inline struct adapter * 568 1.1.2.2 uebayasi tdev2adap(struct toedev *d) 569 1.1.2.2 uebayasi { 570 1.1.2.2 uebayasi return container_of(d, struct adapter, tdev); 571 1.1.2.2 uebayasi } 572 1.1.2.2 uebayasi 573 1.1.2.2 uebayasi #undef container_of 574 1.1.2.2 uebayasi 575 1.1.2.2 uebayasi #define OFFLOAD_DEVMAP_BIT 15 576 1.1.2.2 uebayasi static inline int offload_running(adapter_t *adapter) 577 1.1.2.2 uebayasi { 578 1.1.2.2 uebayasi return isset(&adapter->open_device_map, OFFLOAD_DEVMAP_BIT); 579 1.1.2.2 uebayasi } 580 1.1.2.2 uebayasi 581 1.1.2.2 uebayasi 582 1.1.2.2 uebayasi #endif 583
Indexes created Sat Nov 01 05:10:12 GMT 2025