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dpt_pci.c revision 1.21
      1  1.21    cegger /*	$NetBSD: dpt_pci.c,v 1.21 2008/04/10 19:13:36 cegger Exp $	*/
      2   1.1        ad 
      3   1.1        ad /*
      4  1.15    keihan  * Copyright (c) 1999, 2000, 2001 Andrew Doran <ad (at) NetBSD.org>
      5   1.1        ad  * All rights reserved.
      6   1.1        ad  *
      7   1.1        ad  * Redistribution and use in source and binary forms, with or without
      8   1.1        ad  * modification, are permitted provided that the following conditions
      9   1.1        ad  * are met:
     10   1.1        ad  * 1. Redistributions of source code must retain the above copyright
     11   1.1        ad  *    notice, this list of conditions and the following disclaimer.
     12   1.1        ad  * 2. Redistributions in binary form must reproduce the above copyright
     13   1.1        ad  *    notice, this list of conditions and the following disclaimer in the
     14   1.1        ad  *    documentation and/or other materials provided with the distribution.
     15   1.1        ad  *
     16   1.1        ad  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     17   1.1        ad  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     18   1.1        ad  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     19   1.1        ad  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     20   1.1        ad  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     21   1.1        ad  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     22   1.1        ad  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     23   1.1        ad  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     24   1.1        ad  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25   1.1        ad  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26   1.1        ad  * SUCH DAMAGE.
     27   1.1        ad  *
     28   1.1        ad  */
     29   1.1        ad 
     30   1.1        ad /*
     31   1.2        ad  * PCI front-end for DPT EATA SCSI driver.
     32   1.1        ad  */
     33   1.9     lukem 
     34   1.9     lukem #include <sys/cdefs.h>
     35  1.21    cegger __KERNEL_RCSID(0, "$NetBSD: dpt_pci.c,v 1.21 2008/04/10 19:13:36 cegger Exp $");
     36   1.1        ad 
     37   1.1        ad #include <sys/param.h>
     38   1.1        ad #include <sys/systm.h>
     39   1.1        ad #include <sys/device.h>
     40   1.1        ad #include <sys/queue.h>
     41   1.1        ad 
     42  1.20        ad #include <sys/bus.h>
     43  1.20        ad #include <sys/intr.h>
     44   1.1        ad 
     45   1.1        ad #include <dev/scsipi/scsipi_all.h>
     46   1.1        ad #include <dev/scsipi/scsiconf.h>
     47   1.1        ad 
     48   1.1        ad #include <dev/pci/pcidevs.h>
     49   1.1        ad #include <dev/pci/pcivar.h>
     50   1.1        ad 
     51   1.1        ad #include <dev/ic/dptreg.h>
     52   1.1        ad #include <dev/ic/dptvar.h>
     53   1.1        ad 
     54  1.13        ad #include <dev/i2o/dptivar.h>
     55  1.13        ad 
     56   1.1        ad #define	PCI_CBMA	0x14	/* Configuration base memory address */
     57   1.1        ad #define	PCI_CBIO	0x10	/* Configuration base I/O address */
     58   1.1        ad 
     59   1.8    bouyer static int	dpt_pci_match(struct device *, struct cfdata *, void *);
     60   1.8    bouyer static void	dpt_pci_attach(struct device *, struct device *, void *);
     61   1.1        ad 
     62  1.11   thorpej CFATTACH_DECL(dpt_pci, sizeof(struct dpt_softc),
     63  1.12   thorpej     dpt_pci_match, dpt_pci_attach, NULL, NULL);
     64   1.1        ad 
     65   1.8    bouyer static int
     66  1.19  christos dpt_pci_match(struct device *parent, struct cfdata *match,
     67  1.18  christos     void *aux)
     68   1.1        ad {
     69   1.5        ad 	struct pci_attach_args *pa;
     70  1.16     perry 
     71   1.5        ad 	pa = (struct pci_attach_args *)aux;
     72   1.1        ad 
     73  1.16     perry 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DPT &&
     74   1.1        ad 	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DPT_SC_RAID)
     75   1.1        ad 		return (1);
     76  1.16     perry 
     77   1.1        ad 	return (0);
     78   1.1        ad }
     79   1.1        ad 
     80   1.8    bouyer static void
     81  1.19  christos dpt_pci_attach(struct device *parent, struct device *self, void *aux)
     82   1.1        ad {
     83   1.1        ad 	struct pci_attach_args *pa;
     84   1.1        ad 	struct dpt_softc *sc;
     85   1.1        ad 	pci_chipset_tag_t pc;
     86   1.1        ad 	pci_intr_handle_t ih;
     87   1.4        ad 	bus_space_handle_t ioh;
     88   1.1        ad 	const char *intrstr;
     89   1.1        ad 	pcireg_t csr;
     90   1.1        ad 
     91  1.14   thorpej 	aprint_naive(": Storage controller\n");
     92  1.14   thorpej 
     93   1.1        ad 	sc = (struct dpt_softc *)self;
     94   1.1        ad 	pa = (struct pci_attach_args *)aux;
     95   1.1        ad 	pc = pa->pa_pc;
     96  1.14   thorpej 	aprint_normal(": ");
     97   1.1        ad 
     98  1.16     perry 	if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, &sc->sc_iot,
     99   1.4        ad 	    &ioh, NULL, NULL)) {
    100  1.14   thorpej 		aprint_error("can't map i/o space\n");
    101   1.4        ad 		return;
    102   1.4        ad 	}
    103  1.16     perry 
    104   1.8    bouyer 	/* Need to map in by 16 registers. */
    105   1.4        ad 	if (bus_space_subregion(sc->sc_iot, ioh, 16, 16, &sc->sc_ioh)) {
    106  1.14   thorpej 		aprint_error("can't map i/o subregion\n");
    107   1.1        ad 		return;
    108   1.1        ad 	}
    109   1.1        ad 
    110   1.1        ad 	sc->sc_dmat = pa->pa_dmat;
    111   1.1        ad 
    112   1.1        ad 	/* Enable the device. */
    113   1.1        ad 	csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    114   1.1        ad 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
    115   1.1        ad 		       csr | PCI_COMMAND_MASTER_ENABLE);
    116   1.1        ad 
    117   1.1        ad 	/* Map and establish the interrupt. */
    118   1.7  sommerfe 	if (pci_intr_map(pa, &ih)) {
    119  1.14   thorpej 		aprint_error("can't map interrupt\n");
    120   1.1        ad 		return;
    121   1.1        ad 	}
    122   1.1        ad 	intrstr = pci_intr_string(pc, ih);
    123   1.1        ad 	sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, dpt_intr, sc);
    124   1.1        ad 	if (sc->sc_ih == NULL) {
    125  1.14   thorpej 		aprint_error("can't establish interrupt");
    126   1.1        ad 		if (intrstr != NULL)
    127  1.14   thorpej 			aprint_normal(" at %s", intrstr);
    128  1.14   thorpej 		aprint_normal("\n");
    129   1.1        ad 		return;
    130   1.2        ad 	}
    131   1.2        ad 
    132   1.8    bouyer 	/* Read the EATA configuration. */
    133   1.2        ad 	if (dpt_readcfg(sc)) {
    134  1.21    cegger 		aprint_error_dev(&sc->sc_dv, "readcfg failed - see dpt(4)\n");
    135  1.16     perry 		return;
    136   1.1        ad 	}
    137  1.13        ad 
    138  1.13        ad 	sc->sc_bustype = SI_PCI_BUS;
    139   1.8    bouyer 
    140   1.8    bouyer 	/* Now attach to the bus-independent code. */
    141   1.1        ad 	dpt_init(sc, intrstr);
    142   1.1        ad }
    143