dpt_pci.c revision 1.6 1 1.6 ad /* $NetBSD: dpt_pci.c,v 1.6 2000/06/13 13:36:50 ad Exp $ */
2 1.1 ad
3 1.1 ad /*
4 1.6 ad * Copyright (c) 1999 Andrew Doran <ad (at) NetBSD.org>
5 1.1 ad * All rights reserved.
6 1.1 ad *
7 1.1 ad * Redistribution and use in source and binary forms, with or without
8 1.1 ad * modification, are permitted provided that the following conditions
9 1.1 ad * are met:
10 1.1 ad * 1. Redistributions of source code must retain the above copyright
11 1.1 ad * notice, this list of conditions and the following disclaimer.
12 1.1 ad * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 ad * notice, this list of conditions and the following disclaimer in the
14 1.1 ad * documentation and/or other materials provided with the distribution.
15 1.1 ad *
16 1.1 ad * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 1.1 ad * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 1.1 ad * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 1.1 ad * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 1.1 ad * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 1.1 ad * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 1.1 ad * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 1.1 ad * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 1.1 ad * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 ad * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 ad * SUCH DAMAGE.
27 1.1 ad *
28 1.1 ad */
29 1.1 ad
30 1.1 ad /*
31 1.2 ad * PCI front-end for DPT EATA SCSI driver.
32 1.1 ad */
33 1.1 ad
34 1.1 ad #include <sys/cdefs.h>
35 1.6 ad __KERNEL_RCSID(0, "$NetBSD: dpt_pci.c,v 1.6 2000/06/13 13:36:50 ad Exp $");
36 1.1 ad
37 1.1 ad #include <sys/param.h>
38 1.1 ad #include <sys/systm.h>
39 1.1 ad #include <sys/kernel.h>
40 1.1 ad #include <sys/device.h>
41 1.1 ad #include <sys/queue.h>
42 1.1 ad #include <sys/proc.h>
43 1.1 ad
44 1.1 ad #include <machine/endian.h>
45 1.1 ad #include <machine/bus.h>
46 1.1 ad
47 1.1 ad #include <dev/scsipi/scsi_all.h>
48 1.1 ad #include <dev/scsipi/scsipi_all.h>
49 1.1 ad #include <dev/scsipi/scsiconf.h>
50 1.1 ad
51 1.1 ad #include <dev/pci/pcidevs.h>
52 1.1 ad #include <dev/pci/pcivar.h>
53 1.1 ad
54 1.1 ad #include <dev/ic/dptreg.h>
55 1.1 ad #include <dev/ic/dptvar.h>
56 1.1 ad
57 1.1 ad #define PCI_CBMA 0x14 /* Configuration base memory address */
58 1.1 ad #define PCI_CBIO 0x10 /* Configuration base I/O address */
59 1.1 ad
60 1.1 ad int dpt_pci_match __P((struct device *, struct cfdata *, void *));
61 1.1 ad void dpt_pci_attach __P((struct device *, struct device *, void *));
62 1.1 ad
63 1.1 ad struct cfattach dpt_pci_ca = {
64 1.1 ad sizeof(struct dpt_softc), dpt_pci_match, dpt_pci_attach
65 1.1 ad };
66 1.1 ad
67 1.1 ad int
68 1.1 ad dpt_pci_match(parent, match, aux)
69 1.1 ad struct device *parent;
70 1.1 ad struct cfdata *match;
71 1.1 ad void *aux;
72 1.1 ad {
73 1.5 ad struct pci_attach_args *pa;
74 1.5 ad
75 1.5 ad pa = (struct pci_attach_args *)aux;
76 1.1 ad
77 1.1 ad if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DPT &&
78 1.1 ad PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DPT_SC_RAID)
79 1.1 ad return (1);
80 1.1 ad
81 1.1 ad return (0);
82 1.1 ad }
83 1.1 ad
84 1.1 ad void
85 1.1 ad dpt_pci_attach(parent, self, aux)
86 1.1 ad struct device *parent;
87 1.1 ad struct device *self;
88 1.1 ad void *aux;
89 1.1 ad {
90 1.1 ad struct pci_attach_args *pa;
91 1.1 ad struct dpt_softc *sc;
92 1.1 ad pci_chipset_tag_t pc;
93 1.1 ad pci_intr_handle_t ih;
94 1.4 ad bus_space_handle_t ioh;
95 1.1 ad const char *intrstr;
96 1.1 ad pcireg_t csr;
97 1.1 ad
98 1.1 ad sc = (struct dpt_softc *)self;
99 1.1 ad pa = (struct pci_attach_args *)aux;
100 1.1 ad pc = pa->pa_pc;
101 1.1 ad printf(": ");
102 1.1 ad
103 1.1 ad if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, &sc->sc_iot,
104 1.4 ad &ioh, NULL, NULL)) {
105 1.1 ad printf("can't map i/o space\n");
106 1.4 ad return;
107 1.4 ad }
108 1.4 ad
109 1.4 ad /* Need to map in by 16 registers */
110 1.4 ad if (bus_space_subregion(sc->sc_iot, ioh, 16, 16, &sc->sc_ioh)) {
111 1.4 ad printf("can't map i/o subregion\n");
112 1.1 ad return;
113 1.1 ad }
114 1.1 ad
115 1.1 ad sc->sc_dmat = pa->pa_dmat;
116 1.1 ad
117 1.1 ad /* Enable the device. */
118 1.1 ad csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
119 1.1 ad pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
120 1.1 ad csr | PCI_COMMAND_MASTER_ENABLE);
121 1.1 ad
122 1.1 ad /* Map and establish the interrupt. */
123 1.1 ad if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin,
124 1.1 ad pa->pa_intrline, &ih)) {
125 1.2 ad printf("can't map interrupt\n");
126 1.1 ad return;
127 1.1 ad }
128 1.1 ad intrstr = pci_intr_string(pc, ih);
129 1.1 ad sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, dpt_intr, sc);
130 1.1 ad if (sc->sc_ih == NULL) {
131 1.2 ad printf("can't establish interrupt");
132 1.1 ad if (intrstr != NULL)
133 1.1 ad printf(" at %s", intrstr);
134 1.1 ad printf("\n");
135 1.1 ad return;
136 1.2 ad }
137 1.2 ad
138 1.2 ad /* Read the EATA configuration */
139 1.2 ad if (dpt_readcfg(sc)) {
140 1.2 ad printf("%s: readcfg failed - see dpt(4)\n",
141 1.2 ad sc->sc_dv.dv_xname);
142 1.2 ad return;
143 1.1 ad }
144 1.5 ad
145 1.3 ad /* Now attach to the bus-independent code */
146 1.1 ad dpt_init(sc, intrstr);
147 1.1 ad }
148